Communication system

Abstract

The system not only identifies the device where the malfunction occurred but also determines the nature of the malfunction. [Solution] This communication system determines abnormalities in data communication between a first device and a second device. The system includes an error detection code comparison determination unit that compares a first error detection code generated by the second device based on data received by the second device from the first device with a second error detection code generated by the first device based on the data; a delay comparison determination unit that compares an error detection result obtained by detecting a data error in the first device with a delayed error detection result obtained by detecting an error after delaying the data by a predetermined protection time; and a fault determination unit that determines whether the first device and the second device have a fixed or intermittent failure according to the determination results of the error detection code comparison determination unit and the delay comparison determination unit.

Description

Technical Field

[0001] The present invention relates to a communication system.

Background Art

[0002] In data communication between a plurality of electronic boards or between a plurality of devices within the same electronic board, a communication system that determines communication anomalies is used to detect whether there is any error in transmitted and received data. In such a system, for example, data to be transmitted is added with an error detection code and then transmitted (such as parity check, checksum, CRC check, etc.), and an error is determined based on a result calculated from the error detection code and the received data when data is received.

[0003] In addition, technologies have been proposed that not only determine the presence or absence of a communication anomaly, but also determine the location where the communication anomaly occurs. For example, Patent Document 1 describes a technology that uses an error detection code to determine an anomaly in each transmission and reception between electronic devices or between electronic modules, and determines a faulty location based on two error determination results.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problem to be Solved by the Invention

[0005] However, with the above-described conventional technology, when a communication anomaly occurs, the determination only stops at inferring which of the transmitting and receiving devices the anomaly or failure has occurred in, and the specification of the determination of the content of the anomaly has not been sufficient. For this reason, work such as performing reproduction tests to specify the content of the failure, or performing signal analysis to specify the faulty location has been required.

[0006] In view of the above-mentioned problems, the present invention aims to provide a communication system that can determine not only the device in which an abnormality has occurred, but also the nature of the abnormality. [Means for solving the problem]

[0007] The communication system relating to this disclosure is a communication system for determining an anomaly in data communication between a first device and a second device, comprising: an error detection code comparison determination unit that compares a first error detection code generated by the second device based on data received by the second device from the first device with a second error detection code generated by the first device based on the data; The communication system includes a delay comparison determination unit that compares an error detection result obtained by detecting an error in the data at the first device with a delayed error detection result obtained by detecting an error after delaying the data for a predetermined protection period, and a fault determination unit that determines whether the first device and the second device are fixed or intermittent faults according to the determination results of the error detection code comparison determination unit and the delay comparison determination unit. In this communication system, the error detection code comparison determination unit generates a first error detection code, and compares the first error detection code with a second error detection code generated at the first device. Furthermore, the delay comparison determination unit compares the error detection result obtained at the first device with a delayed error detection result detected after delaying for a protection period. Then, according to the determination results of the error detection code comparison determination unit and the delay comparison determination unit, it becomes possible to determine whether there are faults at the first device and the second device, and whether the faults are fixed or intermittent faults.

[0008] The fault determination unit can be configured to detect a degradation fault in the first device. Furthermore, the communication system according to this disclosure may further include a soft error determination unit that determines whether or not a soft error has occurred in the entire system, including the first device and the second device, based on the determination results of the error detection code comparison determination unit and the delay comparison determination unit. In this case, the fault determination unit can make a determination, including the occurrence of a soft error, in accordance with the determination of the soft error determination unit.

[0009] Furthermore, the first device includes an error detection unit that outputs an error detection result for the data based on the first error detection code, and the first error detection code may include odd parity and even parity. Based on a comparison of the odd parity and the even parity, it is determined whether or not a degraded failure has occurred in the first device. [Brief explanation of the drawing]

[0010] [Figure 1] Figure 1 is a schematic diagram illustrating a communication system 1 (failure) according to an embodiment. [Figure 2] Figure 2 shows an example of the configuration of communication system 1 on device A. [Figure 3] Figure 3 shows an example of the configuration of communication system 1 on device B. [Figure 4] Figure 4 is a timing chart illustrating the operation of the error detection code generation unit 11 and the error detection unit 12. [Figure 5] Figure 5 is a timing chart illustrating the operation of the delay error detection code generation unit 13 and the delay error detection unit 14. [Figure 6] Figure 6 is a timing chart illustrating the operation of the degraded fault detection unit 15. [Figure 7] Figure 7 is a timing chart illustrating the operation of the error detection code generation unit 21 and the error detection code comparison unit 22. [Figure 8]Figure 8 is a timing chart illustrating the generation of the delay error detection result B and the intermittent fault B flag in the error detection code comparison unit 22. [Figure 9] Figure 9 shows the fault identification management table referenced by the fault identification unit 24. [Modes for carrying out the invention]

[0011] This embodiment will be described below with reference to the attached drawings. The attached drawings show embodiments in accordance with the principles of this disclosure, but they are for the purpose of understanding this disclosure and are not to be used in any way to restrict the interpretation of this disclosure. The descriptions herein are merely typical examples and do not limit in any way the claims or applications of this disclosure. Although this embodiment is described in sufficient detail for those skilled in the art to implement this disclosure, other implementations and forms are possible, and it is important to understand that the configuration and structure can be changed and various elements replaced without departing from the scope and spirit of the technical idea of ​​this disclosure. Accordingly, the following description should not be interpreted as limiting to this.

[0012] Referring to Figure 1, the communication system 1 (failure) according to the embodiment will be described. This communication system 1 is configured to determine whether there is a communication abnormality in the data communication between device A and device B, where it occurred, and the type of communication abnormality that occurred, by performing various judgments in the case of a communication failure in data communication between devices A and B. Specifically, in this communication system 1, device A generates internal data, an error detection code A for detecting errors in the internal data, an error detection result A which is the result of the error detection operation, a delay error detection result A which is the result of the error detection operation after a predetermined protection period has been given, and a degraded failure detection result A which is the result of detecting a degraded failure, and transmits them to device B.

[0013] Internal data is data that is monitored for data communication abnormalities (including errors) in this communication system 1, and in this explanation, it is assumed to be 8-bit parallel data as an example. Error detection code A is an error detection code generated in device A for the purpose of detecting errors in internal data, and as an example, it is a 2-bit code with odd parity bits / even parity bits.

[0014] Furthermore, Error Detection Result A is data obtained by device A after detecting an error in the internal data based on the internal data and Error Detection Code A. Delayed Error Detection Result A is the result of device A diagnosing whether there are any errors again after a predetermined protection time has been taken from Error Detection Result A, using the internal data and Error Detection Code A. Degenerate Fault Detection Result A is the result of diagnosing whether any bit of the parallel data output (8 bits) of device A has a degenerate fault (fixed at L level or fixed at H level). Device B determines the occurrence of various faults (fixed faults, intermittent faults, degenerate faults, soft errors, etc.) in device A and device B according to the various data received from device A and the data obtained by device B.

[0015] Figure 2 shows an example of the configuration of the communication system 1 on the device A side. The communication system 1 is configured, for example, to include an error detection code generation unit 11, an error detection unit 12, a delay error detection code generation unit 13, a delay error detection unit 14, and a degraded fault detection unit 15.

[0016] The error detection code generation unit 11 has the function of generating an error detection code A for detecting errors in internal data sent from device A to device B. The error detection code A is used to perform error detection of internal data in device A and is also transmitted to device B. The error detection unit 12 uses the error detection code A to detect errors in the internal data and outputs an error detection result A.

[0017] The delay error detection generation unit 13 outputs a delay error detection code A used for error detection of data obtained by delaying internal data by a predetermined protection period. The protection period is set according to a protection time frame counter generated by the error detection code generation unit 11. The delay error detection unit 14 performs error detection on internal data delayed by the protection period using the delay error detection code A, and outputs a delay error detection result A as the result. The stuck-at fault detection unit 15 compares the odd parity bit and the even parity bit of the error detection code A to detect a stuck-at fault of the error detection code A.

[0018] Referring to FIG. 3, the configuration of the communication system 1 on the device B side will be described. As an example, the communication system 1 includes, on the device B side, an error detection code generation unit 21, an error detection code comparison unit 22, a delay comparison determination unit 23, a fault identification unit 24, an intermittent fault extraction unit 25, and a soft error determination unit 26.

[0019] The error detection code generation unit 21 receives internal data from the device A side, and generates an error detection code for performing error detection on the internal data in the same manner as the error detection code generation unit 11.

[0020] The error detection code comparison unit 22 compares the error detection code generated by the error detection code generation unit 21 of the device B with another error detection code A for error detection of the same internal data received from the device A, detects the presence or absence of an error in the internal data according to the comparison result, outputs an error detection result B, and generates an intermittent fault B flag indicating the presence or absence of an intermittent fault in the device B.

[0021] The delay comparison determination unit 23 compares the error detection result A received from the device A with the delay error detection result A also received from the device A, and outputs an intermittent fault A flag indicating the result of the comparison. When the error detection result A and the delay error detection result A match, the intermittent fault A flag determines that a fixed fault has occurred in the device A; when the two do not match, it determines that the fault of the device A is not fixed but intermittent.

[0022] The fault identification unit 24 receives error detection result B, intermittent fault A flag, degraded fault detection result A, intermittent fault B flag, soft error flag, etc., and identifies what kind of fault (fixed fault, degraded fault, intermittent fault, soft error, etc.) has occurred in devices A and B. In response to the received signals, the fault identification unit 24 refers to the fault identification management table described later and determines whether there is a fault in devices A and B, and the type of fault.

[0023] The intermittent fault extraction unit 25 outputs an intermittent fault OR flag based on the intermittent fault A flag output from the delay comparison determination unit 23 and the intermittent fault B flag output from the error detection code comparison unit 22. The intermittent fault extraction unit 25 determines, based on the intermittent fault A flag and the intermittent fault B flag, whether the intermittent fault is occurring only in device A, only in device B, or in both devices A and B, and outputs an intermittent fault OR flag indicating the result of that determination.

[0024] The soft error determination unit 26 outputs a soft error flag indicating the occurrence of a soft error, based on the intermittent fault OR flag output from the intermittent fault extraction unit 25 and the intermittent fault flag (OR) similarly extracted from other data between device A and device B. The soft error determination unit 26 calculates the logical AND of the intermittent fault OR flag from the intermittent fault extraction unit 25 and the intermittent fault OR flag similarly extracted from other data between device A and device B.

[0025] If, as a result of the logical AND operation, both the intermittent fault OR flag from the intermittent fault extraction unit 25 and the intermittent fault flag (OR) based on other data indicate an intermittent fault, it is determined that this is not an intermittent fault specific to device A or B, but rather a soft error caused by an external fault in the communication path or the like. In other words, if both the intermittent fault OR flag from the intermittent fault extraction unit 25 and the intermittent fault flag (OR) based on other data indicate an intermittent fault at the same time, it is considered that a soft error has occurred, and the soft error flag is raised. If the intermittent fault OR flag is not raised at the same time, it is considered that an intermittent fault has occurred in device A or B, and the soft error flag is lowered.

[0026] Referring to the timing chart in Figure 4, the operation of the error detection code generation unit 11 and the error detection unit 12 will be explained. When the internal data DATA[7:0] (8-bit parallel data) is input to the error detection code generation unit 11, the error detection code generation clock HCLK (a clock 8 times faster than the internal clock CLK) is used to calculate the odd parity ODDPTY and even parity EVENPTY as the error detection code A for each bit from the LSB to the MSB of the internal data DATA[7:0], and the result of this calculation is output as the error detection code A (ERRCHECK).

[0027] If there are no errors in either the odd parity (ODDPTY) or the even parity (EVENPTY), ERRCHECK=00(b). If there is an error only in the odd parity (ODDPTY), ERRCHECK=10(b). If there is an error only in the even parity (EVENPTY), ERRCHECK=01(b). If there are errors in both the odd parity (ODDPTY) and the even parity (EVENPTY), ERRCHECK=11(b). The reason why a 2-bit error detection code A (ODDPTY,EVENPTY) is used for 1-bit error checking is to avoid the risk that data error checking will become impossible due to a malfunction in the parity signal pin.

[0028] Next, the operation of the delay error detection code generation unit 13 and the delay error detection unit 14 will be explained with reference to the timing chart in Figure 5. When the frame counter for protection time is output from the error detection code generation unit 11 and the protection time (for example, 100 frames) is set by this protection time frame counter, the delay error detection code generation unit 13 uses the delay error detection code generation clock HCLK (a clock 8 times faster than the internal clock CLK) to calculate the delay error detection code A (delay odd parity D-ODDPTY, delay even parity D-EVENPTY) bit by bit from the LSB to the MSB of the internal data DATA[7:0] at the frame counter value of "101".

[0029] The delay error detection unit 14 extracts the odd parity ODDPTY and even parity EVENPTY again from the internal data DATA[7:0] (8 bits) and compares them with the delay error detection code A (delay odd parity D-ODDPTY, delay even parity D-EVENPTY) input from the delay error detection code generation unit 13. If there is a mismatch in the comparison of the odd and even parities, the signal D-ERRCHECK (delay error detection result A) is stored as "1", and if they match, it is stored as "0", and output to device B.

[0030] The operation of the degenerate fault detection unit 15 will be explained with reference to the timing chart in Figure 6. The degenerate fault detection unit 15 monitors the error detection code A (odd parity ODDPTY, even parity EVENPTY) generated by the error detection code generation unit 11 to determine whether a specific bit has degenerated to 0 (fixed at L level) or 1 (fixed at H level).

[0031] The error detection code A for each bit of the internal data DATA[7:0] is monitored. If the error detection code A is consecutively 10(b), it is determined to be 0 degeneration. If the error detection code A is consecutively 01(b), it is determined to be 1 degeneration. When either occurs, the signal DEGEN, which is the degeneration fault detection result A, is set to "1" and output to device B. The timing chart in Figure 6 shows an example where bit 3 of the data is degenerated to 0 (fixed at L), and the error detection code A (2 bits) for each bit 3 is fixed at 10(b) and output.

[0032] The operation of the error detection code generation unit 21 and the error detection code comparison unit 22 will be explained with reference to the timing chart in Figure 7. When the internal data DATA[7:0] is received from device A, the error detection code generation unit 21 generates error detection codes B (odd parity B-ODDPTY, even parity B-EVENPTY). The error detection code comparison unit 22 compares error detection codes B (odd parity B-ODDPTY, even parity B-EVENPTY) with error detection codes A (odd parity ODDPTY, even parity EVENPTY) received from device A and generates error detection result B (B-ERRCHECK). The odd parity ODDPTY is compared with the odd parity B-ODDPTY, and the even parity EVENPTY is compared with the even parity B-EVENPTY. If the two match as a result of the comparison, it is determined that there are no errors in that parity.

[0033] If there are no errors in any of the odd parity values ​​ODDPTY, B-ODDPTY, or even parity values ​​EVENPTY and B-EVENPTY, then B-ERRCHECK=00(b). If there are errors only in the odd parity values ​​ODDPTY and B-ODDPTY, then B-ERRCHECK=10(b). If there are errors only in the even parity values ​​EVENPTY and B-EVENPTY, then B-ERRCHECK=01(b). If there are errors in all of the odd parity values ​​ODDPTY and B-ODDPTY, or even parity values ​​EVENPTY and B-EVENPTY, then B-ERRCHECK=11(b).

[0034] Referring to the timing chart in Figure 8, the generation of the delay error detection result B and the generation of the intermittent fault B flag in the error detection code comparison unit 22 will be explained.

[0035] If any bit of the 2-bit signal B-ERRCHECK, which is the error detection result B, is set, the error detection code comparison unit 22 performs a logical AND operation between each bit of the 2-bit error detection result B and the inverted value of each bit of the corresponding 2-bit delay error detection result B. If the logical AND is "1", the intermittent fault B flag is set to "1", and if it is "0", the intermittent fault B flag is set to "0".

[0036] In the intermittent fault extraction unit 25, if any bit of error detection result A is set, a logical AND operation is performed between each of the two bits of error detection result A and the inverted values ​​of the corresponding two bits of the delayed error detection result A. If the result of this operation is "1", "1" is set to the intermittent fault A flag; if it is "0", "0" is set to the intermittent fault A flag. Then, a logical OR operation is performed between the intermittent fault A flag and the intermittent fault B flag, and the resulting intermittent fault OR flag is output from the intermittent fault extraction unit 25.

[0037] The fault identification unit 24 receives the error detection result B, intermittent fault A flag, degraded fault detection result A, intermittent fault B flag, and soft error flag obtained in this manner, and identifies the fault location and type of fault based on the fault identification management table as illustrated in Figure 9.

[0038] The basic steps for identifying a faulty part can be broadly categorized into the following three types. (1) If error detection result A indicates an error, then depending on the values ​​of the intermittent fault A flag and the soft error flag, one of the following may be identified: a soft error, an intermittent fault of device A, or a fixed fault of device A. (2) If error detection result B indicates an error, depending on the values ​​of the intermittent failure B flag and the soft error flag, one of the following may be identified: a soft error, an intermittent failure of device B, or a fixed failure of device B. (3) If neither error detection result A nor B indicates an error, then, according to the degradation detection result A, it can be determined that both devices A and B are normal, or that device A has a degradation failure.

[0039] As described above, according to the communication system 1 of this embodiment, in order to monitor data communication abnormalities (including errors) between device A and device B, both devices A and B use error detection results from error detection codes, delayed error detection results with protection time, and degraded fault detection results from the transmitting device. By referring to the fault identification management table, it becomes possible to identify not only the location of the fault but also the type of fault. Since the location and type of the fault can be identified, the target electronic board to be replaced in the event of a failure during system maintenance work becomes clear, and the replacement work becomes easier. Furthermore, the analysis and repair work of faulty parts such as faulty electronic boards after their return becomes easier, which can contribute to a significant reduction in maintenance man-hours.

[0040] [others] The present invention is not limited to the embodiments described above, and various modifications are included. For example, the embodiments described above are described in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described. Furthermore, it is possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add configurations from other embodiments to the configuration of one embodiment. In addition, it is possible to add, delete, or replace parts of the configuration of each embodiment with other configurations. In the above embodiments, it is possible to make it possible to identify failures of other natures, or to omit some of the above failure identifications. [Explanation of symbols]

[0041] 1…Communication system 1...Error detection code generation unit 12...Error detection unit 13…Delay error detection code generation unit 14…Error detection unit for delay 15...Degraded Fault Detection Unit 21...Error detection code generation unit 22...Error detection code comparison unit 23... Delay comparison and determination unit 24...Fault identification section 25... Intermittent fault extraction unit 26...Soft Error Judgment Unit

Claims

1. A communication system for determining abnormalities in data communication between a first device and a second device, An error detection code comparison and determination unit compares a first error detection code generated by the second device based on data received by the second device from the first device with a second error detection code generated by the first device based on the data. A delay comparison determination unit compares an error detection result obtained by detecting an error in the data in the first device with a delayed error detection result obtained by detecting an error after delaying the data by a predetermined protection time, A fault determination unit determines whether the first device and the second device have a fixed or intermittent failure, in accordance with the determination results of the error detection code comparison determination unit and the delay comparison determination unit. A communication system equipped with [the following features].

2. The communication system according to claim 1, wherein the fault determination unit is configured to detect a degradation failure of the first device.

3. The system further includes a soft error determination unit that determines whether or not a soft error has occurred in the entire system, including the first device and the second device, based on the determination results from the error detection code comparison determination unit and the delay comparison determination unit. The communication system according to claim 2, wherein the fault determination unit makes a determination including the occurrence of a soft error in accordance with the determination of the soft error determination unit.

4. The communication system according to claim 2, wherein the fault determination unit determines whether or not a degraded fault has occurred in the first device based on a comparison between odd parity and even parity included in the second error detection code.

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