Electronic circuit

JP2026144884APending Publication Date: 2026-09-09INSTITUTE OF SCIENCE TOKYO
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Application Number
JP2025032443
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-28
Publication Date
2026-09-09

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Abstract

The objective is to provide an electronic circuit that can switch between functioning as a transmit mode or a receive mode, while suppressing the complexity of the circuit configuration. [Solution] An electronic circuit for a communication device is provided, comprising a first channel, a second channel, a third channel, and a mixer having a transistor, wherein the first channel is conductive to the gate of the transistor, the second channel is conductive to the back gate of the transistor, and the third channel is conductive to the drain of the transistor, and the mixer is configured to switch between functioning as a transmit mode or a receive mode by changing the voltage supplied to the back gate of the transistor.
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Description

[Technical Field]

[0001] The present invention relates to an electronic circuit including a mixer. [Background Art]

[0002] For example, a mixer (frequency converter) that converts the frequency of a signal is used in a wireless communication device (see, for example, Patent Document 1). The mixer serves to convert a modulated signal into a high-frequency signal when functioning in a transmission mode, and convert a received signal into a low-frequency signal when functioning in a reception mode. [Prior Art Documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2017-063348 [Summary of the Invention] [Problem to be Solved by the Invention]

[0004] Although a mixer has a simple circuit configuration, it is desired that the mixer can switch between a function as a transmission circuit and a function as a reception circuit.

[0005] An object of the present invention is to provide an electronic circuit that can switch whether a mixer functions in a transmission mode or a reception mode while suppressing an increase in complexity of the circuit configuration. [Means for Solving the Problem]

[0006] According to the present invention, an electronic circuit for a communication device is provided, comprising a first channel, a second channel, a third channel, and a mixer having a transistor, wherein the first channel is conductive to the gate of the transistor, the second channel is conductive to the back gate of the transistor, and the third channel is conductive to the drain of the transistor, and the mixer is configured to switch between functioning as a transmit mode or a receive mode by changing the voltage supplied to the back gate of the transistor.

[0007] According to the present invention, the mixer is configured to switch between functioning in transmit mode and receive mode by changing the voltage supplied to the back gate, making it possible to switch between functioning in transmit mode and receive mode while suppressing the complexity of the circuit configuration. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a circuit diagram showing an example of the circuit configuration of the electronic circuit 100 according to the embodiment. [Figure 2] Figure 2 is a schematic circuit diagram showing the circuit configuration of the mixer 10 of the electronic circuit 100 shown in Figure 1. [Figure 3] Figure 3 is an explanatory diagram showing the signal flow when the electronic circuit 100 operates in transmit mode (when the electronic circuit 100 functions as a transmit circuit). [Figure 4] Figure 4 is an explanatory diagram showing the signal flow when the electronic circuit 100 operates in receiving mode (when the electronic circuit 100 functions as a receiving circuit). [Modes for carrying out the invention]

[0009] Embodiments of the present invention will be described below with reference to the drawings. The various features shown in the embodiments below can be combined with each other. Furthermore, each feature can stand alone as an independent invention.

[0010] 1. Description of the Configuration of the Embodiment The electronic circuit 100 according to this embodiment includes a mixer 10 having a frequency conversion function, and the electronic circuit 100 is mounted on a communication device. There are various configurations for the mixer 10, but in this embodiment, the case in which the electronic circuit elements of the mixer 10 are source-grounded NMOS transistors will be described as an example.

[0011] As shown in Figure 1, the electronic circuit 100 according to this embodiment includes an input section p1, an input / output section p2, an input / output section p3, a mixer 10, a balun circuit 20, a differential amplifier 30, and a bidirectional amplifier 40. The electronic circuit 100 also has various configurations for connecting various circuits. These various configurations include nodes n1, n2, n31, n32, n41, n42, n5, n6, n7, n8, and n9. A node can be defined, for example, as a part through which an electrical signal flows, and may be, for example, a wire or a component of an element. The same applies to the other nodes in the following description.

[0012] The electronic circuit 100 also has pads pd1, pd2, and pd3. When pads pd1, pd2, and pd3 are used as signal pads, it is possible to extract or apply signals via, for example, probes, wires, bumps, etc. Also, when pads pd1, pd2, and pd3 are used for DC power supply or bias, it is possible to apply a DC voltage via, for example, probes, wires, bumps, etc., to allow current to flow. Note that providing pads pd1, pd2, and pd3 is optional. Pad pd1 is connected to the input section p1 via node n1 and to the balun circuit 20 via node n2. Pad pd2 is connected to the input / output section p2 via node n5 and to the bidirectional amplifier 40 via node n6. Pad pd3 is connected to the mixer 10 via node n8 and to the input / output section p3 via node n9.

[0013] 1-1. Input section p1 and input / output sections p2, p3 The input section p1 (an example of the first channel) has an AC signal source and a resistor. The AC signal source of input section p1 is connected to ground and also to a resistor with a predetermined resistance value. Note that in the receiving mode, input section p1 has no signal source (the signal source is not functioning) and only the load impedance of the resistor. Input section p1 is connected to the gate G of transistor 1 of the mixer 10, which will be described later, via the balun circuit 20 and the differential amplifier 30. The resistance value of the resistor in input section p1 is not limited (it depends on the voltage of the AC signal source), but is, for example, about 50Ω. When the electronic circuit 100 functions as a signal transmission circuit, input section p1 supplies a signal of a predetermined frequency and voltage to the balun circuit 20. The frequency (GHz) of the signal LOin (an example of the first signal) coming out of the input section p1 is, specifically, for example, 80, 84, 88, 92, 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 148, 152, 156, 160, 164, 168, 172, 176, 180, 184, 188, 192, 196, 200, and may also be within the range of the two values ​​listed here. Note that the frequency of the signal, signal LOin, is higher than the frequency of the signal IFin output from the input / output section p2, which will be described later.

[0014] The input / output section p2 (an example of the second channel) has an AC signal source and a resistor. The AC signal source of input / output section p2 is connected to ground and also to a resistor with a predetermined resistance value. Note that in the receiving mode, input section p1 has no signal source (the signal source is not functioning) and only the load impedance of the resistor. Input / output section p2 is connected to the back gate B of transistor 1 of the mixer 10, which will be described later, via the bidirectional amplifier 40. The resistance value of the resistor in input / output section p2 is not limited (it depends on the voltage of the AC signal source), but is, for example, about 50Ω. When the electronic circuit 100 functions as a signal transmission circuit, input / output section p2 supplies a signal of a predetermined frequency and voltage to the bidirectional amplifier 40. Also, when the electronic circuit 100 functions as a signal reception circuit, input / output section p2 receives a signal of a predetermined frequency and voltage from the bidirectional amplifier 40. When the electronic circuit 100 functions as a signal transmission circuit, the frequency (GHz) of the signal IFin (an example of a second signal) coming out of the input / output section p2 is specifically, for example, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, 50, and may be within the range of the two values ​​listed here. Even when the electronic circuit 100 functions as a signal receiving circuit, the frequency (GHz) of the received signal may be, for example, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, or 50, and may fall within the range of the two values ​​listed here.

[0015] The input / output section p3 (an example of a third channel) functions as a resistor (load impedance) when the electronic circuit 100 functions as a signal transmission circuit. Furthermore, when the electronic circuit 100 functions as a signal reception circuit, the input / output section p3 functions as an AC signal source supplying the AC signal received by an antenna (not shown) to the mixer 10. The input / output section p3 is connected to the drain D of transistor 1 of the mixer 10, which will be described later. The input / output section p3 has resistance, and this resistance value is not limited (depending on the AC voltage), but is, for example, about 50Ω. When the electronic circuit 100 functions as a signal transmission circuit, the frequency (GHz) of the signal RFout (an example of a third signal) that goes from the input / output section p3 to the antenna is determined by the processing input to the mixer 10. Specifically, the signal RFout is determined according to the frequencies of the signal LOin and the signal IFin described above. The signal RFout, which is the output from the mixer 10, has two output frequencies: an upper sideband (USB) and a lower sideband (LSB). The upper sideband is based on the sum of the frequencies of the signal LOin and the signal IFin, and in one embodiment, it is the frequency of signal LOin × 2 + signal IFin. The lower sideband is based on the difference between the frequencies of signal LOin and the signal IFin, and in one embodiment, it is the frequency of signal LOin × 2 - signal IFin. Transistor 1 functions as a nonlinear element and generates not only the fundamental frequency of signal LOin but also harmonic components (e.g., 2x). These signals are used as the upper and lower sidebands. Unwanted harmonics are removed as unwanted leakage signal components from transistor 1. These unwanted harmonics can be processed by a matching circuit (not shown in Figures 1-4). This matching circuit can be composed of, for example, capacitors, inductors, transmission lines, etc., and performs power and noise matching and rejection. This matching circuit, not shown in the diagram, can be placed, for example, after transistor 1 (e.g., at node n8), or at nodes n41 and n42.

[0016] 1-2. Mixer 10 As shown in FIG. 2, the mixer 10 includes the transistor 1. Although not shown in FIG. 2, the mixer 10 may include a first matching circuit at a node n8. In addition, although not shown in FIG. 2, the mixer 10 may include a second matching circuit at a node n7. Furthermore, although not shown in FIG. 2, the mixer 10 may include a third matching circuit at a node n41 and a node n42. The configurations of the first matching circuit, the second matching circuit, and the third matching circuit can be arbitrarily set according to the configuration of the mixer 10. In the embodiment, the transistor 1 is composed of a pair of transistor 1a (an example of one of the first transistor and the second transistor) and transistor 1b (an example of the other of the first transistor and the second transistor).

[0017] The transistor 1a and the transistor 1b each have a gate G, a source S, a drain D, and a back gate B. In the embodiment, each of the transistor 1a and the transistor 1b is a common-source NMOS transistor.

[0018] In the electronic circuit 100 according to the embodiment, the mixer 10 is configured such that whether the electronic circuit 100 functions as a transmission circuit or the electronic circuit 100 functions as a reception circuit can be switched by changing a voltage supplied to the back gate B of the transistor 1. The mixer 10 can switch its function by adjusting the voltage supplied to the back gate B. This will be described later in "2. Description of Operation".

[0019] The drains D of the transistor 1a and the transistor 1b are connected to each other. That is, as shown in FIG. 2, the drains D are connected to each other via a node nd. The sources S of transistors 1a and 1b are connected to ground. The gate G of transistor 1a is connected to the differential amplifier 30 via node n41. The gate G of transistor 1b is also connected to the differential amplifier 30 via node n42. The back gates B of transistors 1a and 1b are connected to node n8 via node nb.

[0020] Here, one of the gates G of transistors 1a and 1b is an example of a first gate, and the other gate G is an example of a second gate. Furthermore, one of the sources S of transistor 1a and transistor 1b is an example of a first source, and the other source S is an example of a second source. Furthermore, one of the drains D of transistor 1a and transistor 1b is an example of a first drain, and the other drain D is an example of a second drain. The input / output section p3 described above is conductive to the drains D of transistor 1a and transistor 1b. Furthermore, the back gate B of one of transistors 1a and 1b is an example of a first back gate, and the back gate B of the other transistor is an example of a second back gate. The input / output section p2 described above is electrically connected to the back gate B of transistor 1a and the back gate B of transistor 1b.

[0021] The first to third matching circuits, which are not shown in the diagram, can be composed of, for example, a transmission line, an inductor, and a capacitor, and can perform impedance matching and the removal of unwanted signal components (DC components and unwanted harmonic components) (filter function). The second matching circuit also has the function of adjusting the bias voltage of the back gate.

[0022] 1-3. Balun circuit 20 The balun circuit 20 employs a ratrace balun circuit configured in a ring shape and performs conversion between unbalanced signals (single-ended signals) and balanced signals (differential signals). The balun circuit 20 has the function of appropriately distributing and combining high-frequency signals by configuring the transmission line in units of λ / 4 (1 / 4 of the signal wavelength). This enables proper impedance matching in the electronic circuit 100, thereby improving the signal transmission efficiency.

[0023] In this embodiment, the balun circuit 20 has a 3-port configuration (3-terminal configuration), having one input terminal and two output terminals. The input terminal of the balun circuit 20 corresponds to node n2, and the output terminals of the balun circuit 20 correspond to nodes n31 and n32. The unbalanced signal input to the input terminal of the balun circuit 20 is converted into a pair of balanced signals (differential signals) with a phase difference of λ / 4 and output from the output terminals, respectively.

[0024] 1-4. Differential amplifier 30 The differential amplifier 30 has a pair of input terminals (an example of a pair of input sections) and a pair of output terminals (an example of a pair of output sections). The pair of input terminals of the differential amplifier 30 are connected to the input section p1 via the balun circuit 20, and the pair of output terminals of the differential amplifier 30 are connected to the gate G of transistor 1a and the gate G of transistor 1a, respectively. The differential amplifier 30 is an amplification circuit that amplifies the difference between the input signals of the pair of input terminals, and is capable of amplifying the signal while suppressing the effects of noise. One of the pair of input terminals is connected to node n31, and the other is connected to node n32. Also, one of the pair of output terminals is connected to node n41, and the other is connected to node n42. The differential amplifier 30 may be configured as a 5-stage amplifier, for example, to appropriately amplify the signal LOin.

[0025] In transmission mode, the differential amplifier 30 is driven to amplify the signal sent from the input p1 via the balun circuit 20 and transmit it to the mixer 10 (gate G of transistor 1). On the other hand, in reception mode, it is not driven and is not used.

[0026] Unlike a typical single-input amplifier, the differential amplifier 30 has two input terminals and amplifies only the potential difference between them, thus effectively eliminating common-mode noise. This makes it possible to suppress, for example, electromagnetic interference (EMI) from the external environment and noise on the signal line, and to ensure a high signal-to-noise ratio (SNR). In the electronic circuit 100 according to this embodiment, the differential amplifier 30 works in conjunction with the preceding balun circuit 20 and the subsequent mixer 10 to amplify the differential signal. Specifically, it adjusts the balanced signal generated by the balun circuit 20 to an appropriate amplitude (voltage) and inputs it to the mixer 10, thereby contributing to the proper frequency conversion in the mixer 10.

[0027] 1-5. Bidirectional amplifier 40 The bidirectional amplifier 40 is an amplification circuit that enables operation in both transmission and reception modes, depending on the direction of signal transmission. In other words, the bidirectional amplifier 40 is responsible for signal amplification and proper signal transmission in both transmission and reception modes. One terminal of the bidirectional amplifier 40 is connected to node n6, and the other terminal is connected to node n7. That is, the bidirectional amplifier 40 is configured to conduct electricity between the input / output section p2 and the back gate B of transistor 1a and the back gate B of transistor 1b.

[0028] In transmission mode, the bidirectional amplifier 40 amplifies the signal sent from the input / output unit p2 and transmits it to the mixer 10 (back gate B of transistor 1). In reception mode, the bidirectional amplifier 40 receives the received signal from the input / output unit p3 via the mixer 10 (back gate B of transistor 1), amplifies it, and transmits it to the input / output unit p2.

[0029] 2. Operation Description 2-1. About the transmission mode First, let's explain the operation of the mixer 10 (electronic circuit 100) in transmission mode. In this case, the input section p1 supplies the signal LOin to the gate G of transistor 1 (see Figure 2), as shown in Figure 3. Specifically, the signal LOin output from the input section p1 is converted from an unbalanced signal to a balanced signal through the balun circuit 20, and then amplified while noise is removed through the differential amplifier 30. Thus, the signal LOin, having passed through the balun circuit 20 and the differential amplifier 30, reaches the gate G of transistor 1.

[0030] The input / output section p2 supplies the signal IFin to the back gate B of transistor 1. Specifically, the signal IFin output from the input / output section p2 is amplified by the bidirectional amplifier 40 before reaching the back gate B of transistor 1.

[0031] These signals, LOin and IFin, are mixed by transistor 1 of mixer 10. The mixed signals are supplied to input / output section p3 via drain D of transistor 1. The signal supplied to input / output section p3 is signal RFout. Note that signal RFout has a higher frequency than the frequencies of signals LOin and IFin. The signal RFout that reaches input / output section p3 is then output to an antenna (not shown).

[0032] 2-2. About the receiving mode Next, we will explain the operation of the mixer 10 (electronic circuit 100) in receive mode. In this embodiment, the input section p1 is in an open state. A high-frequency signal received by an antenna (not shown) reaches the input / output section p3. This high-frequency signal is the signal RFin (an example of the fourth signal). As shown in Figure 4, the signal RFin is supplied from the input / output section p3 to the drain D of transistor 1. The signal RFin is then reduced in frequency via the mixer 10 (transistor 1), amplified by the bidirectional amplifier 40, and then supplied to the input / output section p2. The signal supplied to the input / output section p2 is the signal IFout (an example of the fifth signal). The input / output section p2 outputs the supplied signal IFout to any circuit, etc.

[0033] 2-3. Voltage related to switching between transmission mode and reception mode The mixer 10 of the electronic circuit 100 according to this embodiment can be switched between operating in transmit mode and receiving mode by controlling the voltage of the back gate B of the transistor 1.

[0034] 2-3-1. About the transmission mode When the mixer 10 (electronic circuit 100) is operated in transmit mode, the voltage of the back gate B is set to a predetermined back gate voltage VB1, the voltage of the drain D is set to a predetermined drain voltage VD1, the voltage of the gate G is set to a predetermined gate voltage VG1, and the voltage of the source S is set to a predetermined source voltage VS1.

[0035] The predetermined back gate voltage VB1 is, for example, 0.5 (V). The predetermined drain voltage VD1 is a voltage higher than the back gate voltage VB1, for example, 1.2(V). A predetermined gate voltage VG1 is lower than the back gate voltage VB1, for example, 0 (V) (ground voltage). The predetermined source voltage VS1 is a voltage lower than the back gate voltage VB1, for example, 0 (V) (ground voltage). In this way, the transmit mode can be executed by adjusting the voltage of the back gate and the drain voltage.

[0036] 2-3-2. About the receiving mode When the mixer 10 (electronic circuit 100) is operated in receive mode, the voltage of the back gate B is set to a predetermined back gate voltage VB2, the voltage of the drain D is set to a predetermined drain voltage VD2, the voltage of the gate G is set to a predetermined gate voltage VG2, and the voltage of the source S is set to a predetermined source voltage VS2.

[0037] The predetermined back gate voltage VB2 is a voltage lower than the back gate voltage VB1, for example, 0 (V) (ground voltage). In other words, the voltage of back gate B when mixer 10 functions in receive mode is lower than the voltage of back gate B when mixer 10 functions in transmit mode. Note that the voltage of back gate B referred to here is the voltage of back gate B of transistor 1a and the voltage of back gate B of transistor 1b. The predetermined drain voltage VD2 is, for example, 0 (V) (ground voltage). The predetermined gate voltage VG2 is, for example, 0 (V) (ground voltage). The predetermined source voltage VS2 is, for example, 0 (V) (ground voltage). In this way, it becomes possible to execute the receive mode by adjusting the voltage of the back gate and the drain voltage.

[0038] 3. Description of the effects of the embodiment The mixer 10 of the electronic circuit 100 according to this embodiment is configured to allow input to the back gate B (receiving mode) and to allow output from the back gate B (transmitting mode). Mode switching can be achieved by changing the voltage applied to the back gate B. In other words, the electronic circuit 100 according to this embodiment employs a bidirectional filter structure that allows input and output from the back gate B, and mode switching is possible by the voltage applied to the back gate B. Here, the electronic circuit 100 according to this embodiment does not require the provision of complex switching circuits or the like when switching between the above-mentioned modes, and has a simpler circuit configuration than conventional structures. In other words, the electronic circuit 100 is configured so that the mixer 10 can switch between functioning in transmit mode or receive mode by changing the voltage supplied to the back gate B, making it possible to switch between functioning in transmit mode or receive mode while suppressing the complexity of the circuit configuration. Furthermore, because the mixer 10 has a simple circuit configuration, it is easier to ensure the signal conversion gain.

[0039] Various embodiments are illustrated below. The embodiments shown below can be combined with each other. [Note 1] An electronic circuit installed in a communication device, It comprises a first channel, a second channel, a third channel, and a mixer having transistors. The first channel is conductive to the gate of the transistor, The second channel is connected to the back gate of the transistor, The third channel is connected to the drain of the transistor, The mixer is an electronic circuit configured to switch between functioning as a transmit mode and functioning as a receive mode by changing the voltage supplied to the back gate of the transistor. [Note 2] The electronic circuit described in Appendix 1, When the mixer functions in the transmission mode, The first channel supplies a first signal to the gate of the transistor, The second channel supplies a second signal to the back gate of the transistor. The third channel is an electronic circuit that outputs a third signal. [Note 3] The electronic circuit described in Appendix 2, An electronic circuit in which the frequency of the first signal is higher than the frequency of the second signal. [Note 4] An electronic circuit described in any one of the appendices 1 to 3, When the mixer functions in the receiving mode, The aforementioned channel 1 is open. The third channel supplies a fourth signal to the drain of the transistor, The aforementioned second channel is an electronic circuit that outputs a fifth signal. [Note 5] An electronic circuit described in any one of the appendices 1 to 4, Further equipped with a differential amplifier, The transistor comprises a first transistor and a second transistor. The differential amplifier has a pair of inputs that conduct to the first channel, and a pair of outputs that conduct to the first gate of the first transistor and the second gate of the second transistor, respectively. The second channel is connected to the first back gate of the first transistor and the second back gate of the second transistor. The third channel is an electronic circuit that conducts to the first drain of the first transistor and the second drain of the second transistor. [Note 6] The electronic circuit described in Appendix 5, An electronic circuit in which each of the first and second transistors is a common-source NMOS transistor, and the first drain and the second drain are connected to each other. [Note 7] The electronic circuit described in Appendix 6, An electronic circuit in which the voltages of the first back gate and the second back gate when the mixer functions in the receiving mode are lower than the voltages of the first back gate and the second back gate when the mixer functions in the transmitting mode. [Note 8] An electronic circuit described in any one of the appendices 5 to 7, Further equipped with a bidirectional amplifier, The bidirectional amplifier is an electronic circuit provided to conduct electricity between the second channel and the first back gate of the first transistor and the second back gate of the second transistor. [Explanation of Symbols]

[0040] 1: Transistor 1a: Transistor 1b: Transistor 10: Mixer 20: Balun circuit 30: Differential amplifier 40: Bidirectional amplifier 100:Electronic circuit B: Back gate D: Drain G: Gate S: Source p1: Input section (an example of the first channel) p2: Input / Output section (an example of the second channel) p3: Input / Output section (an example of the third channel) pd1: pad pd2: pad pd3: pad

Claims

1. An electronic circuit installed in a communication device, It comprises a first channel, a second channel, a third channel, and a mixer having transistors. The first channel is electrically connected to the gate of the transistor. The second channel is connected to the back gate of the transistor, The third channel is connected to the drain of the transistor, The mixer is an electronic circuit configured to switch between functioning as a transmit mode and functioning as a receive mode by changing the voltage supplied to the back gate of the transistor.

2. The electronic circuit according to claim 1, When the mixer functions in the transmission mode, The first channel supplies a first signal to the gate of the transistor, The second channel supplies a second signal to the back gate of the transistor. The third channel is an electronic circuit that outputs a third signal.

3. The electronic circuit according to claim 2, An electronic circuit in which the frequency of the first signal is higher than the frequency of the second signal.

4. An electronic circuit according to any one of claims 1 to 3, When the mixer functions in the receiving mode, The first channel mentioned above is open. The third channel supplies a fourth signal to the drain of the transistor. The aforementioned second channel is an electronic circuit that outputs a fifth signal.

5. An electronic circuit according to any one of claims 1 to 3, Further equipped with a differential amplifier, The transistor comprises a first transistor and a second transistor. The differential amplifier has a pair of inputs that conduct to the first channel, and a pair of outputs that conduct to the first gate of the first transistor and the second gate of the second transistor, respectively. The second channel is conductive to the first back gate of the first transistor and the second back gate of the second transistor. The third channel is an electronic circuit that conducts to the first drain of the first transistor and the second drain of the second transistor.

6. The electronic circuit according to claim 5, An electronic circuit in which each of the first and second transistors is a common-source NMOS transistor, and the first drain and the second drain are connected to each other.

7. The electronic circuit according to claim 6, An electronic circuit in which the voltages of the first back gate and the second back gate when the mixer functions in the receiving mode are lower than the voltages of the first back gate and the second back gate when the mixer functions in the transmitting mode.

8. The electronic circuit according to claim 5, Further equipped with a bidirectional amplifier, The bidirectional amplifier is an electronic circuit provided to conduct electricity between the second channel and the first back gate of the first transistor and the second back gate of the second transistor.

Citation Information

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