DC conversion circuit

Abstract

To provide a highly reliable DC conversion circuit. [Solution] An inductive element that generates electromotive force in response to changes in the flowing current, and a gate, source, It has a drain and, when it is in an ON state or an OFF state, the electromotive force in the inductive element A transistor that controls the generation of [something], and a rectifier that conducts when the transistor is in the off state. The device comprises an element and a control circuit that controls the on or off state of the transistor. ZISTA has a hydrogen concentration of 5 × 10⁻¹⁰ as a channel-forming layer. 19 atoms / cm 3 The following is The configuration includes an oxide semiconductor layer.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a DC conversion circuit. It also relates to a power supply circuit. [Background technology]

[0002] In recent years, various electronic devices have seen changes such as the shift from a voltage with large voltage fluctuations to a stable power supply voltage. When generating a certain value of DC, or when multiple different power supply voltages are required, A circuit that converts voltage to a DC voltage of another value (also called a DC converter or DC-DC converter) The character う) is used.

[0003] A DC conversion circuit is constructed using, for example, a coil, a diode, and a transistor. There is a type of non-isolated DC conversion circuit called a non-isolated DC conversion circuit (for example, Patent Document 1). Replacement circuits have the advantages of a small circuit area and low manufacturing costs. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 58-086868 [Overview of the project] [Problems that the invention aims to solve]

[0005] However, conventional DC conversion circuits have problems such as low reliability. One of the problems is For example, in a DC conversion circuit, relatively high voltages are handled, so for example, a DC conversion circuit is constructed When a high voltage above a certain value is applied to a transistor (for example, a thin-film transistor) This could potentially cause dielectric breakdown in the transistor.

[0006] One aspect of the present invention is an object of improving the reliability of a DC conversion circuit. [Means for Solving the Problem]

[0007] One embodiment of the present invention achieves high purity by removing impurities that act as electron donors (donors) as much as possible ized intrinsic or substantially intrinsic semiconductor, and a DC conversion circuit is formed using a transistor having, in a channel formation layer thereof, an oxide semiconductor with a larger energy gap than a silicon semiconductor . This achieves improvement in reliability of the DC conversion circuit. In one aspect of the present invention, the energy gap of the oxide semiconductor used is, for example, 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more.

[0008] Note that high purification means eliminating hydrogen in an oxide semiconductor layer as much as possible, and reducing defects caused by oxygen deficiency in the oxide semiconductor layer by supplying oxygen to the oxide semiconductor layer, and is a concept including at least one of the above.

[0009] Further, the concentration of hydrogen contained in the oxide semiconductor is 5×10 19 / cm 3 or less, preferably 5× 10 18 / cm 3 or less, more preferably 5×10 17 / cm 3 or less, or 1×10 16 / cm 3 or less. Further, hydrogen or OH groups contained in the oxide semiconductor are removed. Additio nally, the carrier concentration is less than 1×10 12 / cm 3 , preferably less than 1×10 11 / cm 3 .

[0010] ​The oxide semiconductor layer is an In-Sn-Ga-Zn-O film, which is a quaternary metal oxide, or a ternary metal oxide. In-Ga-Zn-O film, In-Sn-Zn-O film, In-Al-Zn- O film, Sn-Ga-Zn-O film, Al-Ga-Zn-O film, Sn-Al-Zn-O film, In-Zn-O film, Sn-Zn-O film, Al-Zn-O film, Zn -Mg-O film, Sn-Mg-O film, In-Mg-O film, In-Sn-O film, and In-O film It can be formed using oxide semiconductor films such as Sn-O films and Zn-O films. The above oxide semiconductor film may contain SiO2. For example, In-S n-Ga-Zn-O film is made of indium (In), tin (Sn), gallium (Ga), and zinc. This means an oxide film containing (Zn), and its stoichiometric ratio is not particularly important.

[0011] Furthermore, the oxide semiconductor layer is InMO3(ZnO) m Using a membrane represented by (m>0), shape This can be achieved. Here, M is one or more selected from Ga, Al, Mn, and Co. It indicates a number of metallic elements. For example, M could be Ga, Ga and Al, Ga and Mn, or Ga And Co, etc. InMO3(ZnO) m Oxide semiconductors with a structure represented by (m>0) Among the body films, the oxide semiconductor with a structure containing Ga as M is the In-Ga-Zn-O mentioned above. This is called an oxide semiconductor, and its film is also called an In-Ga-Zn-O film.

[0012] In this way, highly purified oxide semiconductors can be used in the channel formation region of transistors. Therefore, it exhibits normally-off electrical characteristics. For example, when the drain voltage is in the range of 1V to 10V When the voltage is within the range, the off-current (the voltage between the gate and source is 0V or less) The current flowing between the source and drain when this happens is 1 × 10 -13 A or less, or off-current tightness The degree (the value obtained by dividing the off-current by the channel width of the transistor) is 100aA (a (at) is 1 0 -18 (showing a multiple) / μm or less, preferably 10aA / μm or less, more preferably 1aA It can be reduced to less than / μm.

[0013] As the channel-forming layer, an oxide semiconductor layer with a sufficiently reduced hydrogen concentration and high purity is used. By using transistors, a highly reliable DC conversion circuit can be realized. ru.

[0014] One aspect of the present invention is an inductive element that generates an electromotive force in response to a change in the flowing current, and a gate, socket It has a drain and a vent, and when it is in an ON state or an OFF state, the inductive element A transistor that controls the generation of electromotive force, and a transistor that conducts when it is in the off state. It comprises a rectifier element and a control circuit that controls the on or off state of the transistor, The transistor also has a hydrogen concentration of 5 × 10⁻¹⁰ as the channel formation layer. 19 atoms / cm 3 The following is a DC conversion circuit having an oxide semiconductor layer.

[0015] In one embodiment of the present invention, the control circuit takes the voltage of the second terminal of the inductor as an input signal. A signal is input, the input signal is compared with a reference voltage, and pulses are produced according to the comparison result. A hysteresis that outputs a pulse signal with a set width as an output signal to the gate of a transistor. A configuration including a comparator is also possible.

[0016] In one aspect of the present invention, the hysteresis comparator is constructed using a logic circuit, and The circuit has a hydrogen concentration of 5 × 10 as the channel-forming layer. 19 atoms / cm 3 The following is It may also be constructed using a transistor having an oxide semiconductor layer.

[0017] One aspect of the present invention has a first terminal and a second terminal, and flows through the first terminal and the second terminal. An inductive element that generates electromotive force in response to a change in current, and has a gate, source, and drain. The on or off state controls the generation of electromotive force in the inductive element. A transistor, a rectifier element that conducts when the transistor is in the off state, and a transistor The device comprises a control circuit that controls the ON or OFF state of the device, and the control circuit takes the input signal as Then a signal, which is the voltage at the second terminal of the inductor, is input, and the input signal and a reference voltage are used. The pulse width is set according to the comparison result, and the resulting pulse signal is output as the transient. This is a DC conversion circuit that has a hysteresis comparator output to the gate of a sta.

[0018] In one embodiment of the present invention, the transistor has a channel formation layer with a hydrogen concentration of 5 × 10 1 9 atoms / cm 3 The following is also acceptable.

[0019] One aspect of the present invention is a coil having a first terminal and a second terminal, wherein the voltage of the second terminal becomes the output voltage. It has a gate, source, and drain, and either the source or the drain is a coil The first terminal of the unit is electrically connected, and the input voltage is applied to the other end of the source and drain. The transistor has a first electrode and a second electrode, and the first electrode supplies electricity to the second terminal of the coil. A capacitive element is connected to the anode and cathode, with a low power supply voltage applied to the second electrode. It has a low power supply voltage applied to the anode, and the cathode is the source and drain of the transistor. A diode electrically connected to either side of the coil, and the second terminal of the coil as the input signal. A voltage is input, and a pulse signal with a duty cycle set according to the voltage at the second terminal of the coil is generated. A hysteresis comparator that outputs a signal to the gate of a transistor, and The transistor is equipped with a channel formation layer with a hydrogen concentration of 5 × 10 19 atoms / cm 3 The following is a DC conversion circuit having an oxide semiconductor layer.

[0020] In one aspect of the present invention, the hysteresis comparator has a first input terminal, a second input terminal It has a sub and output terminal, and a first reference voltage is applied to the first input terminal, and the second input terminal A first comparator to which the voltage of the second terminal of the coil is input as an input signal, and a first input It has a power terminal, a second input terminal, and an output terminal, and the first input terminal receives a coil as an input signal. The voltage of the second terminal of is input, and a second reference voltage is applied to the second input terminal of the second capacitor. A comparator has an input terminal and an output terminal, the input terminal is connected to the output terminal of the first comparator. It has an electrically connected first inverter, an input terminal and an output terminal, and the input terminal is a second inverter. A second inverter electrically connected to the output terminal of the comparator, and the first input terminal, It has a second input terminal and an output terminal, and the first input terminal is connected to the output terminal of the first inverter. A first NOR gate is electrically connected, with its output terminal electrically connected to the gate of the transistor. It has a gate, a first input terminal, a second input terminal, and an output terminal, the first input terminal being the It is electrically connected to the output terminal of the NOR gate 1, and the second input terminal is connected to the second inverter The output terminal is electrically connected, and the output terminal is electrically connected to the second input terminal of the first NOR gate. The configuration may also include a second NOR gate connected to and .

[0021] In one embodiment of the present invention, a first comparator, a second comparator, and a first inverter The second inverter, the first NOR gate, and the second NOR gate are transistors The transistor comprises a gate, source, and drain, as well as a channel forming layer. Hydrogen concentration is 5 × 10 19 atoms / cm 3 The configuration has an oxide semiconductor layer as follows: That's fine.

[0022] In one embodiment of the present invention, the capacitive element is an electric double-layer capacitor, a redox capacitor, Alternatively, a lithium-ion capacitor may be used.

[0023] One aspect of the present invention is a DC conversion circuit described above and a storage device electrically connected to the DC conversion circuit. It is a power supply circuit having an electrical device.

[0024] In one embodiment of the present invention, the energy storage device includes a photoelectric converter, a lithium-ion secondary battery, and It may be one or more of the thium ion capacitors. [Effects of the Invention]

[0025] According to one aspect of the present invention, the reliability of a DC conversion circuit can be improved. [Brief explanation of the drawing]

[0026] [Figure 1] A circuit diagram showing an example of the circuit configuration of a DC conversion circuit. [Figure 2] A circuit diagram showing an example of the circuit configuration of a DC conversion circuit. [Figure 3] A circuit diagram showing an example of the circuit configuration of a DC conversion circuit. [Figure 4] A circuit diagram showing an example of a hysteresis comparator circuit configuration. [Figure 5] A timing chart illustrating an example of hysteresis comparator operation. [Figure 6] A diagram illustrating a transistor. [Figure 7] A diagram illustrating the method for manufacturing transistors. [Figure 8] A diagram illustrating a transistor. [Figure 9] A diagram illustrating the method for manufacturing transistors. [Figure 10] A diagram illustrating a transistor. [Figure 11] A diagram illustrating the method for manufacturing transistors. [Figure 12] A longitudinal cross-sectional view of an inverse staggered transistor using an oxide semiconductor. [Figure 13] Figure 12 shows the energy band diagram (schematic diagram) in the A-A' section. [Figure 14] (A) Diagram showing the state when a positive potential (+Vg) is applied to the gate electrode 1001. (B) Diagram showing the state when a negative potential (-Vg) is applied to the gate electrode 1001. [Figure 15] This diagram shows the relationship between the vacuum level, the work function (φM) of metals, and the electron affinity (χ) of oxide semiconductors. [Figure 16] A diagram illustrating the method for manufacturing transistors. [Figure 17] A diagram illustrating the method for manufacturing transistors. [Figure 18] A diagram illustrating the method for manufacturing transistors. [Figure 19] A diagram illustrating a transistor. [Figure 20] A diagram illustrating a power supply circuit. [Figure 21]A diagram illustrating electronic devices. [Modes for carrying out the invention]

[0027] An example of an embodiment of the present invention will be described below with reference to the drawings. However, the present invention is as follows The description is not limited to the present invention, and the form and details may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the parameters can be modified in various ways. Accordingly, the present invention is described below. The description of the embodiment is not to be interpreted as being limited to the stated content.

[0028] (Embodiment 1) This embodiment describes an example of a DC conversion circuit, which is one aspect of the present invention.

[0029] An example of the configuration of the DC conversion circuit in this embodiment will be explained with reference to Figure 1. Figure 1 This is a circuit diagram showing an example of the configuration of the DC conversion circuit in this embodiment.

[0030] The DC conversion circuit shown in Figure 1 consists of an inductive element 101, a transistor 102, and a rectifier element (RC). It is equipped with (also called T) 103 and

[0031] Furthermore, in this specification, a transistor has a gate, source, and drain of at least It possesses. As a transistor, for example, a gate-isolated transistor can be used. ru.

[0032] Note that "gate" refers to the gate electrode and part or all of the gate wiring. This means that at least one transistor's gate electrode is electrically connected to another electrode or another wire. This refers to the wiring used for connection. Also, the gate electrode and gate wiring are often used interchangeably. The conductive layer can also be configured to function as a gate electrode and gate wiring.

[0033] The term "source" refers to the source electrode and some or all of the source wiring. This refers to a conductive layer that functions as a source. A source wire is a conductive layer that functions as a source. This refers to the wiring used to electrically connect the source electrode of a dysta to another electrode or other wiring. Furthermore, without distinguishing between the source electrode and the source wiring, a single conductive layer is used for both the source electrode and the source wiring. It can also be configured to function as a wiring harness.

[0034] A drain refers to the drain electrode and part or all of the drain wiring. An electrode is a conductive layer that functions as a drain. Drain wiring is at least To electrically connect the drain electrode of one transistor to another electrode or another wire. This refers to the wiring. Also, without distinguishing between the drain electrode and the drain wiring, a single conductive layer is used. It can also be configured to function as a drain electrode and drain wiring.

[0035] Furthermore, in this specification, the source and drain of a transistor are defined in relation to the structure and movement of the transistor. Because they can switch roles depending on the operating conditions, it is not possible to determine which is the source and which is the drain. This is difficult. Therefore, in this document (specification, claims, or drawings, etc.), Either the source or the drain will be referred to as "source and drain," and the other as "source." This will be referred to as the other side of the drain.

[0036] The inductive element 101 generates an electromotive force in response to changes in the current flowing through it due to electromagnetic induction. It has a function. Also, as shown in Figure 1 for example, the inductive element 101 has a first terminal and a second terminal. It has a child. For example, a coil can be used as the inductive element 101.

[0037] Transistor 102, by being in an ON or OFF state, controls the induction element 101. It has the function of controlling the generation of electromotive force. Transistor 102 is as shown in Figure 1, for example. , one of the source and drain is connected to either the first terminal or the second terminal of the inductive element 101 It is electrically connected.

[0038] Generally speaking, voltage refers to the difference in electric potential between two points (also called potential difference). However, voltage and potential values ​​are often expressed in volts (V) in circuit diagrams, etc. Therefore, it is difficult to distinguish between them. Thus, in this specification, unless otherwise specified, a certain point The potential difference between the potential of a point and a reference potential (also called the reference potential) is used as the voltage at that point. There are cases where this is the case.

[0039] In this specification, analog signals or digital signals, such as voltage, are used as signals. Signals can be used. For example, signals using voltage (also called voltage signals) include: It is preferable to use a signal having at least a first voltage state and a second voltage state, for example. For example, a high-level voltage state as the first voltage state and a low-level voltage state as the second voltage state. Digital signals with voltage states can be used. Voltage V H Or simply V H Also, the voltage at low levels is called voltage V. L Or simply V L and Also, the values ​​of the voltage in the first voltage state and the voltage in the second voltage state are, This may vary depending on the model, and there may be influences such as noise, so the first voltage state is... The voltages of the first voltage state and the second voltage state are not constant values, but rather within a certain range. stomach.

[0040] For example, as shown in Figure 1, the rectifier element 103 has a first terminal and a second terminal, and the first terminal Either the first or second terminal is connected to either the first or second terminal of the inductive element 101. It is electrically connected.

[0041] As the rectifier element 103, for example, a diode can be used, and as a diode For example, a PN diode or a PIN diode can be used. As an oscillator, it is a transistor applicable to transistor 102, with a gate and a drain. Use a transistor with electrically connected inputs (also known as diode-connected). This is possible. As a diode-connected transistor, it functions as a channel formation layer. It has an oxide semiconductor layer and the hydrogen concentration of the channel formation layer is 5 × 10 19 ate / c m 3 The following is preferably 5 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 The carrier concentration is as follows: 12 / cm 3 Less than, preferred ku is 1 x 10 11 / cm 3 A transistor with a value less than 1 can be used.

[0042] Furthermore, the DC conversion circuit shown in Figure 1 determines which terminals receive the input voltage and which terminals receive the voltage. The function differs depending on whether it is used as the output voltage. For example, the first and second terminals of the inductive element 101 An input voltage is applied to the other terminal, and the voltages of the other terminals of the first and second terminals of the rectifier element 103 are output. When the voltage is defined as the force voltage and current flows from the first terminal to the second terminal of the rectifier element 103, the straight line shown in Figure 1 The current conversion circuit functions as a boost circuit. Also, the source and slave of transistor 102 An input voltage is applied to the other terminal of the inductor, and the voltages of the other terminals of the first and second terminals of the inductor 101 are When the output voltage is used and current flows from the first terminal to the second terminal of the rectifier element 103, as shown in Figure 1. A DC conversion circuit functions as a step-down circuit.

[0043] Furthermore, the DC conversion circuit of this embodiment controls the ON and OFF states of transistor 102. The configuration can include a control circuit for control. Circuit diagram of the DC conversion circuit in this embodiment. An example of the configuration will be explained using Figure 2. Note that in the DC conversion circuit shown in Figure 2, Figure 1 For parts with the same configuration as the DC conversion circuit shown, refer to the explanation of the DC conversion circuit shown in Figure 1 as appropriate. To use as a reference.

[0044] The DC conversion circuit shown in Figure 2 includes, in addition to the configuration shown in Figure 1, a control circuit 104.

[0045] The control circuit 104 has the function of controlling the ON state or OFF state of the transistor 102. The control circuit 104 receives the output voltage of the DC conversion circuit as an input signal, and the DC conversion circuit A pulse signal is generated using the ripple of the output voltage, and the generated pulse signal is then used in the transistor. The signal is output to the gate of transistor 102. This pulse signal determines the ON state of transistor 102 or The off state is controlled.

[0046] The control circuit 104 is configured, for example, using a hysteresis comparator, and hysteresis... An imparator is constructed using, for example, multiple logic circuits, and each of these logic circuits is For example, it is constructed using transistors. A channel formation layer is an example of a transistor. It has an oxide semiconductor layer that functions as such, and the hydrogen concentration of the oxide semiconductor layer is 5 × 10 19 atoms / cm 3 The following is preferably 5 × 10 18 atoms / cm 3 The following are further preferred Or 5x10 17 atoms / cm 3 The carrier concentration is as follows: 12 / cm 3 Less than 1 × 10 11 / cm 3 It is also possible to use transistors that are less than [a certain value]. This reduces voltage fluctuations caused by transistor leakage current in each logic circuit. Therefore, the voltage state of the pulse signal can be stabilized. Also, when performing a boost operation... To configure the control circuit 104, a hysteresis comparator is combined with another arithmetic circuit. It is preferable.

[0047] As shown in Figures 1 and 2, an example of the DC conversion circuit of this embodiment includes a transistor and an induction The device comprises a conductive element and a rectifying element.

[0048] Furthermore, the DC conversion circuit of this embodiment has a capacitive element for smoothing the output voltage. It may be possible to make the output voltage approach a constant value by providing a capacitive element. Cut.

[0049] Furthermore, an example of the DC conversion circuit of this embodiment includes a channel formation layer and a transistor. It has an oxide semiconductor layer that has the function of having a hydrogen concentration of 5 × 1019 a toms / cm 3 The following is preferably 5 × 10 18 atoms / cm 3 The following are even more preferable kuha 5×10 17 atoms / cm 3 The carrier concentration is as follows: 12 / cm 3 Less than 1 × 10 11 / cm 3 Use a configuration that uses transistors that are less than [amount missing]. This is possible. Compared to, for example, conventional silicon transistors, It has a low off-current and high dielectric strength. Therefore, it is used as a transistor in a DC conversion circuit. As a result, even when a high voltage is applied between the terminals of the transistor, the transistor It can suppress the destruction of the ta.

[0050] Next, as an example of the operation of the DC conversion circuit of this embodiment, the operation of the DC conversion circuit shown in Figure 2 is described. Let me explain an example.

[0051] As the DC conversion method for the DC conversion circuit of this embodiment, for example, a nonlinear control method is used. This is possible. The nonlinear control method alternates the state of transistor 102 between the ON state and the OFF state. By switching between them, the voltage input to the DC conversion circuit is converted into a pulse signal, and then... This method generates an output voltage using a pulsed signal. The state is set, for example, by the duty cycle of the pulse signal input to the gate. The pulse signal input to transistor 102 utilizes, for example, the output voltage of a DC conversion circuit. It is generated by doing so.

[0052] An example of the operation of the DC conversion circuit shown in Figure 2 can be mainly divided into period T1 and period T2. The input was obtained by alternately performing the operation in period T1 and the operation in period T2. This process involves increasing or decreasing the voltage. The respective time periods are described below.

[0053] During period T1, transistor 102 turns on in response to the pulse signal, and rectifier element 10 3 becomes non-conductive. Also, depending on the value of the input voltage input to the DC conversion circuit, the inductive element Current flows through 101. At this time, an electromotive force V1 is generated in the inductive element 101.

[0054] During period T2, transistor 102 turns off in response to the pulse signal. At this time, In the conductive element 101, an electromotive force is generated in the opposite direction to the electromotive force V1 in order to suppress changes in its own magnetic field. V2 is generated, the rectifier element 103 becomes conductive, and the inductive element 101 and the rectifier element 103 Current flows through it, and the output voltage changes. At this time, the output of the DC conversion circuit shown in Figure 2 The voltage value is the value obtained when the input voltage value changes. Also, the output voltage value is obtained during period T1 and period T1. It is determined by the ratio of the length to T2, in other words, by the duty cycle of the pulse signal. For example, period T During period T2, if the output voltage is greater than the desired value, the duty cycle of the pulse signal The ratio is set to be lower by the control circuit 104. Also, the output voltage is set to a desired value. If the value is small, the duty cycle of the pulse signal is set to be high by the control circuit 104. Thus, in the DC conversion circuit shown in Figure 2, the output voltage for each unit period is controlled by the control circuit. By feeding back to 104, the output voltage after feedback approaches the desired value. It is possible to do so.

[0055] As described above, an example of the DC conversion circuit of this embodiment receives pulse signals input from the control circuit. The transistor electrically connected to the inductor element 101 is turned ON according to the duty cycle of the number. It alternately switches between the ON and OFF states, converting the input voltage to a different voltage value to generate an output voltage. This allows it to function as either a boost circuit or a buck circuit.

[0056] (Embodiment 2) This embodiment describes an example of a DC conversion circuit, which is one aspect of the present invention. Typical conversion methods for circuit switching include linear and switching methods, but switches The DC conversion circuit using the spooling method is excellent in conversion efficiency and is therefore suitable for reducing power consumption in electronic devices. In this embodiment, a switching type, and more particularly a chopper type, DC conversion circuit will be described. .

[0057] An example of the configuration of the DC conversion circuit in this embodiment will be explained with reference to Figure 3. This is a circuit diagram showing an example of the configuration of the DC conversion circuit in this embodiment.

[0058] The DC conversion circuit shown in Figure 3 consists of a coil 201, a transistor 202, and a diode 203. The system comprises a capacitive element 204 and a hysteresis comparator (also called HCMP) 205. To prepare.

[0059] Coil 201 has a first terminal and a second terminal. Coil 201 functions as an inductive element. It holds.

[0060] Transistor 202 has one of its sources and drain electrically connected to the first terminal of coil 201. Connected.

[0061] Transistor 202 is, for example, an oxide semiconductor having the function of a channel formation layer. It has a hydrogen concentration of 5 × 10 in the channel-forming layer. 19 atoms / cm 3 The following, preferably 5 x 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 The carrier concentration is as follows: 12 / cm 3 Less than 1 × 10 11 / c m 3 A transistor with a value less than 1 can be used.

[0062] Diode 203 has an anode and a cathode, with a low power supply voltage (VSS) applied to the anode. A (also simply called VSS) is provided, and the cathode is electrically connected to the first terminal of coil 201. The process continues. Diode 203 functions as a rectifier element.

[0063] For diode 203, for example, a PN diode or a PIN diode can be used. It can. Also, for example, a transistor applicable to transistor 202, and a diode The connected transistor can also be used as diode 203. Diode connection Examples of transistors include oxide semiconductors that function as channel formation layers. It has a layer, and the hydrogen concentration of the oxide semiconductor layer is 5 × 10 19 atoms / cm 3 The following are preferable is 5 x 10 18 atoms / cm 3 More preferably 5 × 10 17 ate / c m 3 The carrier concentration is as follows: 12 / cm 3Less than 1 × 10 11 / cm 3 A transistor with a value less than 1 can be used.

[0064] The capacitive element 204 is provided between the first electrode and the second electrode. It has a dielectric layer, and the first electrode is electrically connected to the second terminal of the coil 201. A low power supply voltage is applied to the second electrode. The capacitive element 204 has the function of a smoothing capacitor. It has the function of smoothing the voltage at node N2 as shown in Figure 3.

[0065] For the capacitive element 204, for example, an oxide semiconductor layer used in the transistor 202 is used. MIS capacitor, electric double layer capacitor, redox capacitor, or lithium-ion capacitor A passiter or the like can be used. In one aspect of the present invention, a DC conversion circuit can be used in a short period of time. By switching transistor 202 between the ON and OFF states, a boost operation or To perform a step-down operation, the charge and discharge rate of the capacitive element 204 to which the boosted or step-down voltage is applied. If the voltage is low, the boost or buck operation may be delayed. Therefore, for example, if the charge / discharge rate is By using lithium-ion capacitors, which are considered fast, the delay in boosting or bucking voltage operation can be reduced. Delay can be suppressed. Furthermore, it is not limited to lithium-ion capacitors, but capacitive elements 2 As 04, other alkali metal ions or alkaline earth metal ions are used as mobile ions. A capacitor can also be used. For example, by using a sodium ion capacitor... This reduces manufacturing costs. Also, in the DC conversion circuit shown in Figure 3, the capacitive element 2 A larger capacitance for 04 is preferable. By increasing the capacitance of the capacitive element 204, as shown in Figure 3... The output voltage of the DC conversion circuit shown can be made smoother.

[0066] The hysteresis comparator 205 receives the output power of the DC conversion circuit shown in Figure 3 as its input signal. A pressure is input, the ripple of the input signal is detected, and the duty cycle is adjusted according to the detected ripple. A set pulse signal is generated, and the generated pulse signal is used as a control signal by transistor 20 It has the function of outputting to gate 2.

[0067] Furthermore, the hysteresis comparator 205 is constructed using a logic circuit, and the entire logic circuit This can be constructed using transistors of the same conductivity type. This reduces the number of steps. It can be reduced.

[0068] Here, the rotation of the hysteresis comparator (hysteresis comparator 205) shown in Figure 3 An example of a path configuration will be explained using Figure 4. Figure 4 shows the hysteresis comparator shown in Figure 3. This is a circuit diagram showing an example of the inverter's circuit configuration.

[0069] The hysteresis comparator shown in Figure 4 consists of comparator 221 and comparator 222. Inverter 223, Inverter 224, NOR gate 225, NOR gate 22 It is equipped with 6 and .

[0070] Comparator 221 has a first input terminal, a second input terminal, and an output terminal, and the first A reference high voltage (reference voltage Vref) is connected to the input terminal. H Or simply Vref H (Also known as) gives Then, signal S22 is input to the second input terminal.

[0071] Comparator 222 has a first input terminal, a second input terminal, and an output terminal, and the first Signal S22 is input to the input terminal, and a reference low voltage (reference voltage Vre) is input to the second input terminal. f L Or simply Vref L A reference voltage Vref (also known as) is given. L The value of is Quasi-voltage Vref H It is less than the value of [the specified value].

[0072] The inverter 223 has an input terminal and an output terminal, and the input terminal is the output terminal of the comparator 221. It is electrically connected to the power terminal.

[0073] The inverter 224 has an input terminal and an output terminal, and the input terminal is the output terminal of the comparator 222. It is electrically connected to the power terminal.

[0074] The NOR gate 225 has a first input terminal, a second input terminal, and an output terminal, and the first The input terminal is electrically connected to the output terminal of inverter 223. The connection point between the first input terminal of 5 and the output terminal of inverter 223 is defined as node S.

[0075] The NOR gate 226 has a first input terminal, a second input terminal, and an output terminal, and the first The input terminal is electrically connected to the output terminal of the NOR gate 225, and the second input terminal is an inverter It is electrically connected to the output terminal of the NOR gate 224, and the output terminal is the second input of the NOR gate 225. The terminals are electrically connected. Note that the first input terminal of the NOR gate 226 and inverter 2 The connection point with the 24 output terminals is designated as node R.

[0076] Note that comparator 221, comparator 222, inverter 223, inverter 224 The logic circuits for NOR gate 225 and NOR gate 226 are, for example, transistors. comprises. As the transistor, for example, an oxide semiconductor having a function as a channel formation layer has a conductor layer, and the hydrogen concentration of the oxide semiconductor layer is 5×10 19 atoms / cm 3 or less, preferab ly 5×10 18 atoms / cm 3 or less, more preferably 5×10 17 atoms / cm 3 or less, and the carrier concentration is 1×10 12 / cm 3 less than, preferably 1×10 1 1 / cm 3 transistors having less than the above can be used. Further, in the present embodiment, each log ic circuit can also be configured using only transistors of the same conductivity type. By configu ring each logic circuit using only transistors of the same conductivity type, the manufacturing process can be simplified.

[0077] As shown as an example in FIG. 4, an example of the hysteresis comparator shown in FIG. 3 includes two co mparators, and the voltage of a signal input to each of the two comparators (the output voltage of the DC-DC converter circuit shown in FIG. 3) and a reference voltage (reference voltage Vref H or refe rence voltage Vref L ), and outputs a pulse signal having a duty ratio set according to the comparison result .

[0078] Next, an example of the operation of the hysteresis comparator shown in FIG. 4 will be described.

[0079] An example of the operation of the hysteresis comparator shown in FIG. 4 is the operation illustrated in FIG. 3 input as an input signal the voltage of node N2 shown (voltage V N2 or simply VN2 (Also known as) the reference voltage Vref H twist If it is high (V N2 >Vref H ), voltage V N2 The reference voltage Vref L Higher, reference voltage Vref H If lower (Vref H >V N2 >Vref L ), voltage V N2 The reference voltage V ref L If lower (Vref L >V N2 It can be divided into ) and each case This will be explained below.

[0080] V N2 >Vref H At that time, the potential of node S is V H The potential of node R becomes V L It becomes At this time, the potential of node Q is V L This is the output of the hysteresis comparator shown in Figure 4. Signal (Signal OUT HCMP (Also known as) becomes a low level.

[0081] Vref H >V N2 >Vref L At that time, the potential of node S is V L The potential of node R ga V L This is what happens. At this point, node Q maintains the state it was in during the previous period. Example For example, if the potential of node Q in the previous period was V H In this case, the potential of node Q is V H And, The output signal of the hysteresis comparator also remained at a high level, and in the previous period, no The potential of Q is V L In this case, the potential of node Q is V L It remains as is, signal OUTHCMP Moro It remains at the same level.

[0082] Vref L >V N2 At that time, the potential of node S is V L The potential of node R becomes V H It becomes At this time, the potential of node Q is V H As a result, the output signal of the hysteresis comparator is, It becomes an E-level.

[0083] Furthermore, an example of the operation of the hysteresis comparator in this embodiment is shown using Figure 5. Let me explain. Figure 5 illustrates an example of the operation of the hysteresis comparator in this embodiment. This is a timing chart for the purpose of voltage V N2 , the voltage of node S (V NS (Also known as) , the voltage at node R (V NR (Also known as), and the waveform of the output signal of a hysteresis comparator. These are shown below.

[0084] As shown in Figure 5, for example, voltage V N2 If it is a triangular wave, Vref L >V N2 During, The voltage of the S is maintained at a low level. Then, Vref L >V N2 From Vref L <V N2 When this happens, the voltage at node R changes from a high level to a low level, and Vref H >V N2 >Vref L During this time, the signal is out. HCMP It is maintained at a high level. Furthermore, Vre f H >V N2 >Vref L From V N2 >Vref HWhen this happens, the voltage at node S becomes low level The signal goes from low to high level, then out HCMP It goes from high level to low level. V N 2>Vref H During this time, the voltage at node S is maintained at a high level. Furthermore, V N2 >V ref H From Vref H >V N2 When this happens, the voltage at node S changes from high level to low level It becomes. Furthermore, Vref H >V N2 >Vref L During this time, the signal is out. HCMP is low level It is maintained in this manner. Thus, the voltage V is a triangular wave. N2 A pulse signal based on this is generated. The above is an example of the operation of the hysteresis comparator shown in Figure 4.

[0085] As shown in Figures 2 to 4 above, an example of the DC conversion circuit of this embodiment is A coil that functions as a conductive element and a transistor that functions as a switching element A diode that functions as a rectifier element and a capacitor that functions as a smoothing capacitor. A quantitative element and a hysteresis comparator that controls the on or off state of the transistor. It is a configuration that includes the following:

[0086] Furthermore, an example of the DC conversion circuit of this embodiment is an acid that functions as a channel forming layer. It has an oxide semiconductor layer, and the hydrogen concentration of the oxide semiconductor layer is 5 × 10 19 atoms / cm 3 below Preferably 5 × 10 18 atoms / cm 3 More preferably 5 × 10 17 at oms / cm 3The carrier concentration is as follows: 12 / cm 3 Less than 1x 10 11 / cm 3 A configuration can be made using transistors that are less than [a certain value]. Compared to conventional silicon transistors, for example, this transistor has a lower off-current and better isolation. It has a high voltage resistance. Therefore, by using it as a transistor in a DC conversion circuit, Even when a high voltage is applied between the terminals of a transistor, the failure of the transistor is suppressed. It is possible.

[0087] Next, we will explain an example of the operation of the DC conversion circuit shown in Figure 3.

[0088] The DC conversion method of the DC conversion circuit in this embodiment is a pulse width modulation control method. An example of the operation of the DC conversion circuit shown in 3 can be divided into period T51 and period T52. The operation in period T51 and the operation in period T52 are repeated alternately. The power voltage is reduced. Each period is explained below.

[0089] During period T51, according to the pulse signal input from the hysteresis comparator 205, When transistor 202 is turned on, the voltage at node N1 becomes the input of the DC conversion circuit shown in Figure 3. The voltage becomes equal to the diode 203, and diode 203 becomes non-conductive. Also, the voltage at node N1 increases. When the input voltage becomes equal to the input voltage, current flows through coil 201. At this time, coil 20 At point 1, an electromotive force is generated.

[0090] During period T52, the pulse signal input from the hysteresis comparator 205 causes a traction The inverter 202 turns off. At this time, the coil 201 generates a magnetic field around itself. an electromotive force V2 in the direction opposite to the electromotive force V1 is generated to suppress the change, and the diode 203 becomes conductive, a current flows through the diode 203, and a current flows through the coil 201. By repe ating periods T51 and T52, the voltage of node N2 decreases. At this time, the output vo ltage of the DC-DC conversion circuit shown in FIG. 3 becomes lower than the input voltage. The value of the output voltage is de termined by the ratio of the lengths of period T51 and period T52, in other words, the duty ratio of the pulse signal. For ex ample, in period T51 and period T52, when the output voltage is higher than a desired value, the du ty ratio of the pulse signal is set to be lowered by the hysteresis comparator 205. Further, when the output voltage is lower than a desired value, the duty ratio of the pulse signal is set to be increased by the hysteresis comparator 205. As described above, in the DC- DC conversion circuit shown in FIG. 3, the output voltage for each unit period is fed back to the hysteresis comparator 205, whereby the output voltage in subsequent periods can be brought close to a desired value.

[0091] As shown as an example in FIG. 3, an example of the DC-DC conversion circuit according to the present embodiment alte rnately switches a transistor electrically connected to the first terminal of the coil between an on state and an off state in accordance with the duty ratio of a pulse signal input from a control circuit, converts the input voltage into a voltage of another value to generate an output voltage, thereby allowing the circuit to function as a step-up circuit or a step-down circuit.

[0092] Note that the present embodiment can be appropriately combined with or replaced by other embodiments.

[0093] (Embodiment 3) ​​​This embodiment can be applied to the transistors constituting the DC conversion circuit disclosed herein. An example of a transistor is shown.

[0094] One embodiment of the transistor and the method for manufacturing the transistor according to this embodiment is shown in Figures 6 and 7. I will explain.

[0095] Figures 6(A) and 6(B) show examples of the planar and cross-sectional structures of a transistor. The transistor 410 shown is a top-gate transistor.

[0096] Figure 6(A) is a plan view of transistor 410 with a top gate structure, and Figure 6(B) is a plan view of Figure 6 This is a cross-sectional view along the line C1-C2 in (A).

[0097] The transistor 410 has an insulating layer 407 and an oxide semiconductor on a substrate 400 having an insulating surface. Layer 412, source electrode layer 415a, drain electrode layer 415b, gate insulating layer 402, and It includes a gate electrode layer 411, and the wiring layer 414a is in contact with the source electrode layer 415a, and the drain electrode The wiring layer 414b is in contact with the pole layer 415b.

[0098] Furthermore, in Figures 6(A) and 6(B), transistor 410 is a single-gate transistor. This will be explained using a transistor, but in this embodiment, the transistor has a channel formation region It may also be a transistor with a multi-gate structure having multiple gates.

[0099] The following describes the process of fabricating the transistor 410 on the substrate 400, using Figures 7(A) to (E). Explain.

[0100] There are no major restrictions on the substrates that can be used for the substrate 400 having an insulating surface, however In both cases, it is necessary that the material has sufficient heat resistance to withstand heat treatment. For example, substrate 4 00 refers to glass substrates such as barium borosilicate glass or aluminoborosilicate glass. You can use it.

[0101] In addition, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used instead of the glass substrates mentioned above. A substrate made of edge material may be used. Alternatively, a crystallized glass substrate or similar material can be used. Furthermore, plastic substrates can also be used as appropriate. Also, silicon can be used as a substrate. A semiconductor substrate can also be used.

[0102] First, an insulating layer 407, which will serve as the base film, is formed on the substrate 400 having an insulating surface. 07 consists of a silicon oxide layer and a silicon oxide nitride layer (SiO x N y It is also called, however, (x>y>0), an oxide insulating layer such as an aluminum oxide layer or an aluminum oxide nitride layer It is preferable to use it. As for the method of forming the insulating layer 407, plasma CVD or sputtering Methods such as the sizing method can be used, but it is important to ensure that a large amount of hydrogen is not contained in the insulating layer 407. To achieve this, it is preferable to deposit the insulating layer 407 by sputtering.

[0103] In this embodiment, a silicon oxide layer is formed as the insulating layer 407 by sputtering. The substrate 400 is transported to the processing room, where hydrogen and moisture are removed, and high-purity spalling containing oxygen is performed. A tarring gas is introduced, and an oxidation process is performed using a silicon semiconductor target to create an insulating layer 407. A silicon layer is formed on the substrate 400. Also, when forming the insulating layer 407, the substrate 40 0 can be at room temperature or heated.

[0104] In this embodiment, quartz (prefer ably synthetic quartz) is used, for example, as a target for depositing a silicon oxide film. The substrate temperature is 108°C, the distance between the substrate and the target (distance T-S) is 60 mm, the pressure is 0.4 Pa, the high-frequency power is 1.5 kW, and under an atmosphere of oxygen and argon (oxygen flow rate 25 sccm : argon flow rate 25 sccm = 1:1), a silicon oxide film is formed by the RF sputtering method. The film thickness of the silicon oxide film is set to 100 nm. Furthermore, instead of quartz (preferably synthetic quartz), a silicon target can be used as the target for depositing the silicon oxide film. In addition, as the sputtering gas, oxygen or a mixed gas of oxygen and argon can be used.

[0105] In the case of forming the insulating layer 407 using any one of the above materials and methods, it is preferable to form the insulating layer 407 while removing residual moisture in the processing chamber. This is to prevent the insulating layer 407 from containing hydrogen, hydroxyl groups, or moisture.

[0106] In order to remove residual moisture in the processing chamber, it is preferable to use an adsorption-type vacuum pump. As the adsorption-type vacuum pump, it is preferable to use, for example, a cryopump, an ion pump, or a titanium sublimation pump. In addition, as the exhaust means, for example, a turbo pump provided with a cold trap can be used. In a deposition chamber that has been evacuated using a cryopump, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water) are exhausted, so that deposition performed in said deposition chamber can reduce the concentration of impurities (particularly hydrogen) contained in the formed insulating layer 407.

[0107] ​​Furthermore, the sputtering gas used when forming the insulating layer 407 is hydrogen, water, and hydroxyl High-purity product in which impurities such as ions or hydrides have been removed to a concentration of approximately ppm or ppb. It is preferable to use gas.

[0108] Furthermore, the sputtering method uses a high-frequency power supply for sputtering, which is called RF sputtering. Sputtering method, DC sputtering method using a DC power supply, or pulsed biasing method Examples include DC sputtering. RF sputtering is mainly used for depositing insulating films. DC sputtering is used for various purposes, and is primarily used for depositing metal films.

[0109] Furthermore, as a sputtering apparatus, it is possible to set up multiple targets of different materials using a multi-point sputtering system. There is a sputtering machine. A multi-component sputtering machine allows different material films to be deposited in the same chamber. It is possible to deposit layers of film, or to deposit multiple types of materials simultaneously by discharging electricity in the same chamber. can.

[0110] Furthermore, as a sputtering device, a magnetron equipped with a magnetic mechanism inside the chamber... Sputtering equipment that uses the puttering method, or that uses microwaves instead of glow discharge There are sputtering devices that use the ECR sputtering method, which utilizes the generated plasma. .

[0111] Furthermore, in the sputtering method, the target material and sputtering gas components are used during film deposition. Reactive sputtering, a method that uses chemical reactions to form thin films of these compounds, and film deposition. Some methods, such as bias sputtering, also involve applying voltage to the substrate.

[0112] Furthermore, the insulating layer 407 may also have a laminated structure, for example, a nitride insulating layer from the substrate 400 side, A laminated structure with an oxide insulating layer may also be used. For example, a silicon nitride layer can be used as the nitride insulating layer. Silicon nitride (SiN x O y Also called, however, the layer is aluminum nitride (x>y>0). A layer or an aluminum nitride oxide layer can be used, and as the oxide insulating layer, an acid Silicon oxide layer, silicon oxide nitride layer, aluminum oxide layer, or aluminum oxide nitride layer These can be used.

[0113] For example, hydrogen and water are removed, and a high-purity sputtering gas containing nitrogen is introduced, A silicon nitride layer is formed on the substrate using a contour, and an oxide layer is formed on the silicon nitride layer. A silicon layer is formed. In this case as well, the residual in the processing chamber is similar to that of the silicon oxide layer. It is preferable to form a silicon nitride layer while removing moisture.

[0114] Furthermore, the substrate 400 may also be heated when forming the silicon nitride layer.

[0115] When laminating a silicon nitride layer and a silicon oxide layer as the insulating layer 407, in the same processing chamber The process involves using a common silicon target to form a silicon nitride layer and a silicon oxide layer. This can be done by first introducing a sputtering gas containing nitrogen, and then using a silicon filter installed in the processing chamber. A silicon nitride layer is formed using a target, and then a sputtering gas containing oxygen is used. Switch to sputtering gas and form a silicon oxide layer using the same silicon target. This allows the silicon nitride layer and silicon oxide layer to be separated without exposing the substrate 400 to the atmosphere. Because it can be formed continuously, impurities such as hydrogen and moisture can be released onto the silicon nitride layer surface. This can prevent the adsorption of [unclear material].

[0116] Next, an oxide semiconductor film with a thickness of 2 nm to 200 nm is formed on the insulating layer 407.

[0117] Furthermore, in order to minimize the presence of hydrogen, hydroxyl groups, and water in the oxide semiconductor film, As a pretreatment, the substrate 400 on which the insulating layer 407 is formed is placed in the preheating chamber of the sputtering apparatus. The substrate 400 is preheated to remove impurities such as hydrogen and moisture adsorbed on it, and then exhausted. This is preferable. As for the exhaust means to be installed in the preheating chamber, for example, a cryopump is preferable. It seems so. However, this preheating process can be omitted. Also, this preheating is done later. This may be done on the substrate 400 before the formation of the gate insulating layer 402, or on the substrate 400 before the formation of the gate insulating layer 402 that will be formed later. The same procedure was performed on the substrate 400, which had the drain electrode layer 415a and the drain electrode layer 415b formed on it. That's fine.

[0118] Furthermore, before depositing the oxide semiconductor film by sputtering, argon gas is introduced. Reverse sputtering is performed to generate plasma, and during film formation, the film attached to the surface of the insulating layer 407 is generated It is preferable to remove the resulting powdery material (also called particles or debris). Reverse sputtering This refers to a method where no voltage is applied to the target side, and a high-frequency power supply is used on the substrate side under an argon atmosphere. This method involves applying a voltage to form plasma near the substrate and modify the surface. Nitrogen, helium, oxygen, etc., can be used instead of a GON atmosphere.

[0119] Oxide semiconductor films can be deposited by sputtering. For example, the In-Sn-Ga-Zn-O film is a quaternary metal oxide, and the ternary metal oxide is In-Ga-Zn-O film, In-Sn-Zn-O film, In-Al-Zn-O film, Sn- Ga-Zn-O film, Al-Ga-Zn-O film, Sn-Al-Zn-O film, and binary metal acids The Zn-O film is an alloy of In-Zn-O, Sn-Zn-O, Al-Zn-O, and Zn-Mg-O. Sn-Mg-O film, In-Mg-O film, In-Sn-O film, In-O film, Sn-O film Furthermore, oxide semiconductor films such as Zn-O films can be used. It may contain SiO2.

[0120] In addition, as an oxide semiconductor film, InMO3(ZnO) m Using a membrane denoted as (m>0) This is possible. Here, M is one or more selected from Ga, Al, Mn, and Co. This indicates a metallic element. For example, M could be Ga, Ga and Al, Ga and Mn, or Ga and C. There are things like o.

[0121] In this embodiment, as an example, an oxide semiconductor film is made using an In-Ga-Zn-O-based metal oxide. The film is deposited by sputtering using a GET. Furthermore, oxide semiconductor films are deposited using a rare gas (alternative). Typically, under an argon atmosphere, an oxygen atmosphere, or with a noble gas (typically argon) and an acid. It can be formed by sputtering in a mixed atmosphere. When using the ring method, a target containing 2% to 10% by weight of SiO2 is used. Film deposition may be performed.

[0122] The sputtering gas used when depositing oxide semiconductor films includes hydrogen, water, hydroxyl group, and This is a high-purity gas from which impurities such as hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use [this].

[0123] As targets for fabricating the above oxide semiconductor film by sputtering, In, Ga , and metal oxide targets containing Zn (composition ratio: In2O3:Ga2O3:Zn) O=1:1:1 [mol%] or In:Ga:Zn=1:1:0.5 [atom%] It can be used. Note that the total volume of the metal oxide target to be fabricated is The ratio of the volume remaining after deducting the space occupied by voids, etc., from the total volume (also called the packing efficiency) is 90 The fill density is % or more, preferably 95% or more. A metal oxide target with a high fill density is used. As a result, the deposited oxide semiconductor film becomes a dense film.

[0124] In this embodiment, as an example, the substrate is held in a processing chamber that is kept under reduced pressure, and the processing chamber While removing residual moisture from the inside, sputtering gas from which hydrogen and moisture have been removed is introduced, and the metal An oxide semiconductor film is deposited on the substrate 400 using an oxide as the target. Residual water in the processing chamber To remove the particles, it is preferable to use an adsorption-type vacuum pump. Examples of such pumps include cryopumps, ion pumps, or titanium sublimation pumps. It is preferable to use a turbo pump. In addition, as an exhaust means, a cold trap is attached to the turbo pump. A device equipped with the following can be used. The deposition chamber, which is evacuated using a cryopump, can be used, for example. , hydrogen atoms, water (H2O) and other compounds containing hydrogen atoms (more preferably compounds containing carbon atoms) Because compounds (including additives) are exhausted, the oxidation formed when a film is deposited in the deposition chamber is a result of the oxidation. The concentration of impurities in the semiconductor film can be reduced. Also, the substrate during oxide semiconductor film deposition can be reduced. It may be heated.

[0125] An example of film deposition conditions is a substrate temperature of room temperature, a distance of 60 mm between the substrate and the target, and a pressure of 0. 4 Pa, DC power supply 0.5 kW, oxygen and argon (oxygen flow rate 15 sccm: argon) The conditions under atmospheric conditions with a flow rate of 30 sccm are applied. Furthermore, a pulsed DC power supply is used. When used, it reduces particles and makes the film thickness distribution more uniform. The thickness is preferably 5 nm to 30 nm. The appropriate thickness of the oxide semiconductor film is Since this varies depending on the oxide semiconductor material used, you should select the appropriate thickness according to the material. .

[0126] Next, the oxide semiconductor film is transformed into island-shaped oxide semiconductor layers 41 by a first photolithography process. Process to 2 (see Figure 7(A)). Note that this is necessary to form the island-shaped oxide semiconductor layer 412. The resist mask may be formed by an inkjet method. Forming it by law can reduce manufacturing costs.

[0127] Furthermore, the etching of the oxide semiconductor film here can be done by dry etching or wet etching. Dry etching can be used. Also, dry etching is used as the etching method for oxide semiconductor films. Both etching and wet etching may be used.

[0128] Etching gases used in dry etching include chlorine-containing gases (chlorine-based gases, for example) Chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC) l4) etc.) are preferable.

[0129] Furthermore, fluorine-containing gases (fluorine-based) are used as etching gases for dry etching. Gases, such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), Lifluoromethane (CHF3, etc.), hydrogen bromide (HBr), or oxygen (O2), These gases are obtained by adding noble gases such as helium (He) or argon (Ar) to them. You can use it.

[0130] Dry etching methods include, for example, parallel plate type RIE (Reactive Ion Etching). tching) method, ICP (Inductively Coupled Plasma) An inductively coupled plasma etching method can be used. Etching can be performed to the desired processing shape. To enable etching, etching conditions (amount of power applied to the coil-type electrode, the electrode on the substrate side) The amount of power applied, the electrode temperature on the substrate, etc., are adjusted as appropriate.

[0131] For example, an etching solution used in wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Liquids can be used. Also, as an etching solution used for wet etching, I TO07N (manufactured by Kanto Chemical Co., Ltd.) may also be used.

[0132] Furthermore, the etching solution after wet etching, along with the material removed by etching, It is removed by washing. The waste etching solution containing the removed material is purified and ed The material contained in the material removed by etching may be reused. By recovering and reusing materials such as indium contained in oxide semiconductor layers from waste liquid, This allows for the effective use of resources and a reduction in manufacturing costs.

[0133] Furthermore, during etching, the material is adjusted to allow etching to the desired shape. Adjust the etching conditions (etching solution, etching time, temperature, etc.) as appropriate.

[0134] In this embodiment, as an example, a solution of phosphoric acid, acetic acid, and nitric acid is used as the etching solution. The oxide semiconductor film was processed into island-shaped oxide semiconductor layers 412 using a wet etching method. do.

[0135] Next, the oxide semiconductor layer 412 is subjected to a first heat treatment. The temperature of the first heat treatment is 400°C. The temperature should be between 750°C and 750°C, preferably above 400°C and below the substrate's strain point. Here is an example. As a result, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and a nitrogen atmosphere is applied to the oxide semiconductor layer. After heat treatment at 450°C under ambient air for 1 hour, oxidation was performed without contact with air. This prevents water and hydrogen from entering the semiconductor layer and obtains an oxide semiconductor layer. This first heat treatment This allows for dehydration or dehydrogenation of the oxide semiconductor layer 412.

[0136] Furthermore, when cooling the heat treatment apparatus from the heat treatment temperature, the atmosphere may be switched to oxygen. When the temperature is reduced, switching to an oxygen atmosphere replenishes oxygen in the oxygen-deficient areas of the oxide semiconductor layer. Oxygen deficiency generates carriers, but their elimination significantly reduces the number of carriers. This significantly reduces the carrier concentration, making it possible to obtain an oxide semiconductor layer with an extremely low carrier concentration.

[0137] Furthermore, the heating apparatus is not limited to electric furnaces, but also includes heat conduction or heat radiation from heat-generating elements such as resistance heating elements. The device may include an apparatus for heating the object to be processed by injection. For example, GRTA(Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Angle) devices such as Thermal Annealing equipment A neal device can be used. The LRTA device uses halogen lamps and metal halide lamps. Lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, high pressure A device that heats an object to be processed by radiation of light (electromagnetic waves) emitted from lamps such as mercury lamps. The GRTA device is a device that performs heat treatment using high-temperature gas. The gas contains A Inert gases such as argon or nitrogen, which do not react with the material being treated by heat treatment. A gas is used.

[0138] Furthermore, as a first heat treatment, the substrate is placed in an inert gas heated to 650°C to 700°C. After heating for several minutes, the substrate is removed from the high-temperature heated inert gas during a GRTA treatment. This is also good. Using GRTA treatment allows for high-temperature heat treatment in a short time.

[0139] Furthermore, in the first heat treatment, the atmosphere during the heat treatment (nitrogen, or helium, neon, Alternatively, the gas (such as argon or other noble gases) must not contain water, hydrogen, etc., or undergo heating treatment. The purity of nitrogen, or noble gases such as helium, neon, or argon, introduced into the apparatus. , 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher, (that is, It is preferable to keep the impurity concentration at 1 ppm or less, preferably 0.1 ppm or less.

[0140] Furthermore, the first heat treatment is performed on the oxide semiconductor film before it is processed into an island-shaped oxide semiconductor layer. It is also possible to do so. In that case, after the first heat treatment, remove the substrate from the heating device and photo The lithography process is performed.

[0141] Heat treatments that produce dehydration and dehydrogenation effects on oxide semiconductor layers are used in oxide semiconductor layer formation After formation, a source electrode layer and a drain electrode layer are stacked on the oxide semiconductor layer, and then the source electrode... At what point after forming the gate insulating layer on the layer and the drain electrode layer should this be done? stomach.

[0142] Next, a conductive film is formed on the insulating layer 407 and the oxide semiconductor layer 412. This can be done using sputtering or vacuum deposition methods. Suitable materials for the conductive film include aluminum. Elements selected from chromium, copper, tantalum, titanium, molybdenum, and tungsten, as described above. It is possible to use alloys mainly composed of elements, or alloy films combining the aforementioned elements. It can be done. Also, as materials for conductive films, manganese, magnesium, zirconium, beryllium Materials selected from one or more of the following may be used: yttrium, yttrium, or conductive materials. The film may have a single-layer structure or a multilayer structure of two or more layers. For example, a single-layer structure can be made of silica. One example is a single-layer structure of an aluminum film containing condensate. Another example is a laminated structure of aluminum film containing condensate. A two-layer structure in which a titanium film is laminated on top of an aluminum film, the titanium film and the aluminum film that is layered on top of the titanium film. Examples include a three-layer structure consisting of a um film and a titanium film layered on top of it. In addition to nium, titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and Scandinavian Using a film, alloy film, or nitride film made of one or more elements selected from um That's fine.

[0143] Next, a resist mask is formed on the conductive film by a second photolithography process, selectively After etching is performed to form the source electrode layer 415a and the drain electrode layer 415b, Remove the resist mask (see Figure 7(B)). Note that the formed source electrode layer 415a Preferably, the end of the drain electrode layer 415b is tapered. This results in the gate insulating layer being laminated on the source electrode layer 415a and the drain electrode layer 415b. This is preferable because it improves the coverage.

[0144] In this embodiment, a titanium film with a thickness of 150 nm is formed by sputtering, and the titanium film A resist mask is formed on top, and the titanium film is selectively etched to create the source electrode. Layer 415a and drain electrode layer 415b are formed.

[0145] Furthermore, during etching of the conductive film, the oxide semiconductor layer 412 is removed, and the insulating layer beneath it is removed. To prevent exposure of 407, the materials and etching processes of the conductive film and oxide semiconductor film are carefully considered. Adjust the conditions as needed.

[0146] In this embodiment, as an example, a titanium film is used as the conductive film, and I is used as the oxide semiconductor film. Using an n-Ga-Zn-O oxide semiconductor film, ammonia peroxide (A) is used as the etchant. Use a mixture of humonic acid, water, and hydrogen peroxide solution.

[0147] In the second photolithography process, only a portion of the oxide semiconductor layer is etched. The oxide semiconductor layer 412 may also have grooves (recesses). 15a, A resist mask for forming the drain electrode layer 415b is made by inkjet method It may be formed. If the resist mask is formed by the inkjet method, a photomask is used. Therefore, manufacturing costs can be reduced.

[0148] For exposure during the resist mask formation in the second photolithography process, ultraviolet light and KrF light are used. A laser beam or ArF laser beam is used. Underneath the adjacent source electrode layer on the oxide semiconductor layer 412. The gap width between the end and the lower end of the drain electrode layer determines the channel of the transistor that is later formed. The channel length L is determined. Note that when performing exposure with a channel length L = less than 25 nm, a few nm Extreme ultraviolet light, with wavelengths as short as tens of nanometers. Using this, exposure is performed during the resist mask formation in the second photolithography step. Linear exposure offers high resolution and a large depth of field. Therefore, transistors that were formed later... The channel length L can also be set to 10 nm or more and 1000 nm or less, and the operating speed of the circuit This allows for faster operation and extremely low off-current values, resulting in lower power consumption. It can also be measured.

[0149] Next, insulating layer 407, oxide semiconductor layer 412, source electrode layer 415a, drain electrode layer 4 A gate insulating layer 402 is formed on 15b (see Figure 7(C)).

[0150] The gate insulating layer 402 is formed using plasma CVD or sputtering, etc. Cone layer, silicon nitride layer, silicon oxide nitride layer, silicon nitride oxide layer, or aluminum oxide layer The hydrogen layer can be formed as a single layer or in multiple layers. In order to prevent the presence of large amounts of [unclear], the gate insulating layer 402 is deposited using the sputtering method. It is preferable to do so. When forming a silicon oxide film by sputtering, for example, If a silicon target or a quartz target is used as the target, and the sputtering gas is This is done using oxygen or a mixture of oxygen and argon.

[0151] Furthermore, the gate insulating layer 402 can be, for example, HfO x (x>0) can also be used. HfO is used as the gate insulating layer 402. x By using such methods, from the oxide semiconductor layer side This can reduce the leakage current flowing toward the gate electrode.

[0152] Furthermore, the gate insulating layer 402 is acid-treated from the source electrode layer 415a and drain electrode layer 415b sides. A structure can also be formed by stacking a silicon oxide layer and a silicon nitride layer. For example, the first G A silicon oxide layer (SiO₂) with a thickness of 5 nm to 300 nm is used as the insulating layer. x (x>0)) A film is formed on the first gate insulating layer by sputtering as the second gate insulating layer. Silicon nitride layer (SiN) with a thickness of 50 nm to 200 nm y (y>0)) stacked to form a film A gate insulating layer with a thickness of 100 nm may also be used. In this embodiment, as an example, a pressure of 0.4 Pa, high-frequency power supply 1.5kW, oxygen and argon (oxygen flow rate 25 sccm: argon flow rate) A 100 nm thick oxide film was produced by RF sputtering under a 25 sccm = 1:1 atmosphere. It forms a recon layer.

[0153] Next, a resist mask is formed by a third photolithography step, and selective etching is performed. By performing a procedure to remove a portion of the gate insulating layer 402, the source electrode layer 415a and drain electrode are removed. Openings 421a and 421b are formed, reaching layer 415b (see Figure 7(D)).

[0154] Next, after forming a conductive film on the gate insulating layer 402, the opening 421a, and the opening 421b, The fourth photolithography step produces the gate electrode layer 411, wiring layer 414a, and wiring layer 41 Form 4b. Alternatively, the resist mask may be formed by an inkjet method. Forming masks using an inkjet method can reduce manufacturing costs.

[0155] Furthermore, the materials for the gate electrode layer 411, wiring layer 414a, and wiring layer 414b are molybdenum, cyanoacrylate. Tan, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium Which metal material or alloy material mainly composed of these materials is used to form a single layer or a laminate? It is possible.

[0156] For example, as a two-layer stacked structure consisting of a gate electrode layer 411, a wiring layer 414a, and a wiring layer 414b For example, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a copper layer with a molybdenum layer A two-layer structure with stacked butene layers, and a two-layer structure with a titanium nitride layer or tantalum nitride layer stacked on a copper layer. A layered structure, or a two-layer structure consisting of a titanium nitride layer and a molybdenum layer, is preferred. Furthermore, the three-layer laminated structure consists of a tungsten layer or a tungsten nitride layer and an aluminum layer. A layer of aluminum and silicon alloy or aluminum and titanium alloy, and a titanium nitride layer or titanium layer It is preferable to have a laminated structure in which the and are stacked. Furthermore, a transparent conductive film is used A lead electrode layer 411 and wiring layers 414a and 414b can also be formed. Examples of conductive films include translucent conductive oxides.

[0157] In this embodiment, as an example, a titanium film with a thickness of 150 nm is formed by sputtering. Then, using photolithography, the gate electrode layer 411, wiring layer 414a, and wiring layer 41 Forms 4b.

[0158] Next, a second heat treatment (preferably 200°C) is performed under an inert gas atmosphere or an oxygen gas atmosphere. The temperature is between 250°C and 400°C, for example, between 250°C and 350°C. In this embodiment, nitrogen A second heat treatment is performed at 250°C for 1 hour under an ambient atmosphere. In this embodiment, Even if a protective insulating layer or a planar insulating layer is formed on the radiator 410 and then the second heat treatment is performed, good.

[0159] In the above process, the concentrations of hydrogen, water, hydride, and hydroxide are reduced in the oxide semiconductor layer 41. A transistor 410 having 2 can be formed (see Figure 7(E)).

[0160] Furthermore, a protective insulating layer or a planarizing insulating layer for planarization may be provided on transistor 410. For example, as a protective insulating layer, a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, A silicon nitride oxide layer or an aluminum oxide layer can be formed as a single layer or in a laminated manner. ru.

[0161] Furthermore, the planar insulating layer can be made of polyimide, acrylic, benzocyclobutene, or polyamide. Heat-resistant organic materials such as epoxy can be used. Other materials include low-dielectric materials (low-k materials), siloxane resins, PSG (phosphorus glass), and B PSG (Limboron glass), etc., can be used. A planar insulating layer may be formed by stacking multiple insulating films.

[0162] Siloxane-based resins are formed using siloxane-based materials as starting materials. This corresponds to a resin containing Si bonds. Siloxane resins use organic groups as substituents (for example, A You may also use aryl groups or fluoro groups. Furthermore, organic groups may contain fluoro groups. It's okay to do so.

[0163] The method for forming the planar insulating layer is not particularly limited and can be done by sputtering, SO2, or other methods depending on the material. G method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen coating) Printing methods such as screen printing and offset printing can be used. Also, a doctor's knife and a rhinoceros knife can be used. It can be formed using a curtain coater, knife coater, or the like.

[0164] As described above, when depositing an oxide semiconductor film, residual moisture in the atmosphere during film formation is removed. This makes it possible to reduce the concentration of hydrogen and hydrides in the oxide semiconductor film, and transient This allows for the stabilization of the characteristics of the sta.

[0165] As described above, in a DC conversion circuit having a transistor using an oxide semiconductor layer, This allows us to provide a highly reliable DC conversion circuit with consistent electrical characteristics.

[0166] This embodiment can be appropriately combined with or substituted with other embodiments.

[0167] (Embodiment 4) This embodiment can be applied to the transistors constituting the DC conversion circuit disclosed herein. Other examples of transistors are shown. Note that these are the same parts as in Embodiment 3 or parts having similar functions. The minutes and steps may be the same as in Embodiment 3, and the explanation of their repetition will be omitted as appropriate. Detailed explanations of the same sections will also be omitted where appropriate.

[0168] One embodiment of the transistor and the method for manufacturing the transistor is shown in Figures 8 and 9. I will explain.

[0169] Figures 8(A) and 8(B) show examples of the planar and cross-sectional structures of a transistor. The transistor 460 shown is a top-gate transistor.

[0170] Figure 8(A) is a plan view of transistor 460 with a top gate structure, and Figure 8(B) is... This is a cross-sectional view along the line D1-D2 in Figure 8(A).

[0171] The transistor 460 has an insulating layer 457 and a source electrode layer on a substrate 450 having an insulating surface. Electrode layers 465a1 and 465a2, which will be either the drain electrode layer or an oxide semiconductor Layer 462, electrode layer 465b which is the other of the source electrode layer and drain electrode layer, wiring layer 468 , including gate insulating layer 452, gate electrode layer 461 (461a, 461b), electrode layer 46 5a (465a1, 465a2) is electrically connected to wiring layer 464 via wiring layer 468. Although not shown in the diagram, the electrode layer 465b is also provided on the gate insulating layer 452. The opening is electrically connected to the wiring layer.

[0172] The following describes the process of fabricating a transistor 460 on substrate 450, using Figures 9(A) to (E). Explain.

[0173] First, an insulating layer 457, which will serve as the base film, is formed on a substrate 450 having an insulating surface.

[0174] In this embodiment, the substrate 450 is transported to a processing chamber where hydrogen and moisture are removed, and oxygen is removed. A high-purity sputtering gas is introduced and a silicon target or quartz (preferably synthetic quartz) is used. Using this method, an example of an insulating layer 457 is formed on the substrate 450 by sputtering, using silica oxide. A concrete layer is formed. The sputtering gas is oxygen or oxygen and argon. A gas mixture is used.

[0175] In this embodiment, for example, the target is quartz (preferably synthetic quartz) with a purity of 6N. Used as a target, with a substrate temperature of 108°C and a distance of 60 mm between the substrate and the target (TS distance). Pressure 0.4 Pa, high-frequency power supply 1.5 kW, oxygen and argon (oxygen flow rate 25 sccm: Silicon oxide is produced by RF sputtering under an argon flow rate of 25 sccm (1:1) atmosphere. A silicon oxide film is formed. The thickness of the silicon oxide film is 100 nm. Also, quartz (preferably a silicon oxide film) is used. Instead of quartz, a silicon target is used as a target for depositing silicon oxide films. You can use a net.

[0176] When forming the insulating layer 457 using any of the above materials and methods, in the processing chamber It is preferable to form the insulating layer 457 while removing residual moisture. Hydrogen and water This is to prevent the presence of acidic groups or moisture.

[0177] Furthermore, it is preferable to use an adsorption-type vacuum pump to remove residual moisture from the processing chamber. Adsorption-type vacuum pumps include, for example, cryopumps, ion pumps, or titanium It is preferable to use an exhaust pump. Also, as an exhaust means, for example, A cryopump equipped with a cold trap can be used. The evacuated deposition chamber contains, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water). Because it is exhausted, the concentration of impurities contained in the insulating layer 457 by forming a film in the said film deposition chamber It can be reduced.

[0178] The sputtering gas used when forming the insulating layer 457 is hydrogen, water, hydroxyl group or High-purity gas from which impurities such as hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use it.

[0179] Furthermore, the insulating layer 457 may also have a laminated structure, for example, a nitride insulating layer from the substrate 450 side and an acid It can also be a laminated structure with a nitride insulating layer, and as the nitride insulating layer, for example, silica nitride Cone layer, silicon nitride layer, aluminum nitride layer, or aluminum nitride layer, etc. It can be used, and as an oxide insulating layer, it can be a silicon oxide layer, a silicon oxide nitride layer, or an oxide An aluminum layer or an aluminum oxide nitride layer can be used.

[0180] For example, hydrogen and water are removed, and a high-purity sputtering gas containing nitrogen is introduced, A silicon nitride layer is formed on the substrate using a contour, and an oxide layer is formed on the silicon nitride layer. A silicon layer is formed. In this case as well, the residual in the processing chamber is similar to that of the silicon oxide layer. It is preferable to form a silicon nitride layer while removing moisture.

[0181] Next, a conductive film is formed on the insulating layer 457, and the conductive film is formed by the first photolithography process. A resist mask is formed on top, and selective etching is performed to create electrode layers 465a1 and 465a After forming layer 2, remove the resist mask (see Figure 9(A)). Electrode layers 465a1, 4 Although 65a2 is shown as divided in the cross-sectional view, it is a continuous membrane. The edges of the source electrode layer and drain electrode layer are tapered, and the gate insulating layer is laminated on top of them. This is preferable because it improves the coverage.

[0182] The materials for electrode layers 465a1 and 465a2 include aluminum, chromium, copper, tantalum, Elements selected from titanium, molybdenum, and tungsten, and alloys with the above elements as the main components. Alternatively, an alloy film combining the elements mentioned above can be used. Also, electrode layer 46 The materials for 5a1 and 465a2 include manganese, magnesium, zirconium, and beryllium. Materials selected from one or more of the following may be used: yttrium, yttrium, or conductive materials. The film may have a single-layer structure or a multilayer structure of two or more layers. For example, a single-layer structure may be... One example is a single-layer structure of an aluminum film containing ricon. Another example is a laminated structure of aluminum. A two-layer structure in which a titanium film is laminated on top of a titanium film, with the titanium film and aluminum layered on top of the titanium film. Examples include a three-layer structure in which a titanium film is deposited on top of a layer of titanium films. Aluminum, titanium, tantalum, tungsten, molybdenum, chromium, neodymium, A film made by combining one or more elements selected from scandium, or by combining one or more of the elements. Even when using alloy films made up of several combinations, or nitride films made up of one or more of the elements, good.

[0183] In this embodiment, the electrode layers 465a1 and 465a2 are made to a film thickness of 15mm by sputtering. A 0nm titanium film is formed.

[0184] Next, an oxide semiconductor film with a thickness of 2 nm to 200 nm is formed on the insulating layer 457.

[0185] Next, an oxide semiconductor film is formed, and island-shaped oxide semiconductors are created by a second photolithography process. The material is processed into layer 462 (see Figure 9(B)). In this embodiment, In is used as the oxide semiconductor film. - A film is deposited by sputtering using a Ga-Zn-O metal oxide target.

[0186] In this embodiment, as an example, the substrate is held in a processing chamber that is kept under reduced pressure, and the processing chamber While removing residual moisture from the inside, sputtering gas from which hydrogen and moisture have been removed is introduced, and the metal An oxide semiconductor film is deposited on the substrate 450 using an oxide as the target. Residual water in the processing chamber To remove the particles, it is preferable to use an adsorption-type vacuum pump. Examples of applications include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use it. In addition, as an exhaust means, the turbopump is equipped with a cold trap. The obtained material can be used. The deposition chamber, which has been evacuated using a cryopump, can be used for example, water. Elementary atoms, compounds containing hydrogen atoms such as water (H2O) (more preferably compounds containing carbon atoms) Because exhaust gases (including) are used, by forming a film in the said deposition chamber, the oxide semiconductor film contains The concentration of impurities can be reduced. Furthermore, the substrate may be heated during oxide semiconductor film deposition. .

[0187] Furthermore, the sputtering gas used when depositing oxide semiconductor films is hydrogen, water, water High-purity mineral from which impurities such as acid groups or hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use a gas.

[0188] An example of film deposition conditions is a substrate temperature of room temperature, a distance of 60 mm between the substrate and the target, and a pressure of 0. 4 Pa, DC power supply 0.5 kW, oxygen and argon (oxygen flow rate 15 sccm: argon) The conditions under atmospheric conditions with a flow rate of 30 sccm are applied. Furthermore, a pulsed DC power supply is used. When used, it reduces particles and makes the film thickness distribution more uniform. The thickness is preferably 5 nm to 30 nm. The appropriate thickness of the oxide semiconductor film is Since this varies depending on the oxide semiconductor material used, you should select the appropriate thickness according to the material. .

[0189] In this embodiment, as an example, a solution of phosphoric acid, acetic acid, and nitric acid is used as the etching solution. The oxide semiconductor film was processed into island-shaped oxide semiconductor layers 462 using a wet etching method. do.

[0190] Next, the oxide semiconductor layer 462 is subjected to a first heat treatment. The temperature of the first heat treatment is 400°C. The temperature should be between 750°C and 750°C, preferably above 400°C and below the substrate's strain point. Here is an example. As a result, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and a nitrogen atmosphere is applied to the oxide semiconductor layer. After heat treatment at 450°C under ambient air for 1 hour, oxidation was performed without contact with air. This prevents water and hydrogen from entering the semiconductor layer and obtains an oxide semiconductor layer. This first heat treatment This allows for the dehydration or dehydrogenation of the oxide semiconductor layer 462.

[0191] Furthermore, when cooling the heat treatment apparatus from the heat treatment temperature, the atmosphere may be switched to oxygen. When the temperature is reduced, switching to an oxygen atmosphere replenishes oxygen in the oxygen-deficient areas of the oxide semiconductor layer. Oxygen deficiency generates carriers, but their elimination leads to a significant decrease in carriers. This makes it possible to obtain an oxide semiconductor layer with an extremely low carrier concentration.

[0192] Furthermore, the heating apparatus is not limited to electric furnaces, but also includes heat conduction or heat radiation from heat-generating elements such as resistance heating elements. The apparatus may include a device that heats the object to be processed by injection. For example, a GRTA apparatus, LR RTA equipment such as TA equipment can be used. For example, as the first heat treatment, 65 The substrate is moved into an inert gas heated to a high temperature of 0°C to 700°C, heated for several minutes, and then the substrate GRTA may be performed by moving the plate and exposing it to a high-temperature heated inert gas. Using this method allows for high-temperature heat treatment in a short amount of time.

[0193] In the first heat treatment, nitrogen or noble gas such as helium, neon, or argon is used. It is preferable that it does not contain water, hydrogen, etc. Alternatively, nitrogen introduced into the heat treatment device, The purity of noble gases such as helium, neon, and argon is 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., an impurity concentration of 1 ppm or less is preferred) It is preferable that the concentration be 0.1 ppm or less.

[0194] Furthermore, the first heat treatment of the oxide semiconductor layer is performed on the oxide before it is processed into an island-shaped oxide semiconductor layer. This can also be done on semiconductor films. In that case, after the first heat treatment, the substrate is removed from the heating device. The material is removed and the photolithography process is performed.

[0195] Heat treatments that produce dehydration and dehydrogenation effects on oxide semiconductor layers are used in oxide semiconductor layer formation After formation, a source electrode layer and a drain electrode layer are further stacked on the oxide semiconductor layer, After forming the gate insulating layer on the drain electrode layer and the gate electrode layer, at any of the following timings That's fine.

[0196] Next, a conductive film is formed on the insulating layer 457 and the oxide semiconductor layer 462, and a third photolithography is performed. A resist mask is formed on the conductive film by the graphing process, and selective etching is performed. After forming the pole layer 465b and the wiring layer 468, the resist mask is removed (see Figure 9(C)). ). The electrode layer 465b and wiring layer 468 are made of the same materials and processes as the electrode layers 465a1 and 465a2. It should be formed to a certain extent.

[0197] In this embodiment, as an example, a titanium film with a thickness of 150 nm is formed by sputtering. Then, a resist mask is formed on the titanium film by a third photolithography process, selectively Etching is performed to form the electrode layer 465b and the wiring layer 468. In this embodiment, This is an example where the same titanium film is used for the polar layers 465a1 and 465a2 and the electrode layer 465b, In etching, electrode layer 465b does not have a selectivity ratio between layers 465a1 and 465a2. So, electrode layers 465a1 and 465a2 are etched when electrode layer 465b is etched. To prevent this, a wiring layer 468 is placed on the electrode layer 465a2 that is not covered by the oxide semiconductor layer 462. It is provided. In the etching process, electrode layers 465a1, 465a2 and electrode layer 465b When using different materials with high selectivity ratios, the electrode layer 465a2 is etched. The protective wiring layer 468 does not necessarily have to be provided.

[0198] Furthermore, in order to prevent the oxide semiconductor layer 462 from being removed during etching of the conductive film, The materials and etching conditions for the oxide semiconductor film are adjusted as appropriate.

[0199] In this embodiment, as an example, a titanium film is used as the conductive film, and I is used as the oxide semiconductor film. Using an n-Ga-Zn-O oxide semiconductor film, ammonia peroxide (A) is used as the etchant. Use a mixture of humonic acid, water, and hydrogen peroxide solution.

[0200] In the third photolithography process, a portion of the oxide semiconductor layer 462 is etched. This may result in an oxide semiconductor layer 462 having grooves (recesses). Also, electrode layer 465 b. A resist mask for forming the wiring layer 468 may be formed by an inkjet method. When a resist mask is formed using an inkjet method, a photomask is not used, thus manufacturing It can reduce costs.

[0201] Next, insulating layer 457, oxide semiconductor layer 462, electrode layers 465a1, 465a2, electrode layer 4 65b. A gate insulating layer 452 is formed on the wiring layer 468.

[0202] The gate insulating layer 452 is formed using plasma CVD or sputtering, etc. Cone layer, silicon nitride layer, silicon oxide nitride layer, silicon nitride oxide layer, or aluminum oxide layer The hydrogen layer can be formed as a single layer or in multiple layers. In order to prevent the inclusion of large amounts of [unclear], the gate insulating layer 452 is deposited using the sputtering method. It is preferable to do so. When forming a silicon oxide film by sputtering, for example, If a silicon target or a quartz target is used as the target, sputtering gas This is carried out using oxygen or a mixture of oxygen and argon.

[0203] Furthermore, the gate insulating layer 452 can be, for example, HfO x You can also use gates. HfO x By using methods such as the oxide semiconductor layer, the gate electrode can be accessed from the oxide semiconductor layer side. This can reduce the leakage current flowing toward the target.

[0204] The gate insulating layer 452 is made of oxide silica from the electrode layers 465a1, 465a2, and electrode layer 465b. A structure in which a silicon nitride layer and a silicon oxide layer are stacked can also be used. In this embodiment, as an example, The system uses a pressure of 0.4 Pa, a high-frequency power supply of 1.5 kW, and oxygen and argon (oxygen flow rate 25 sccm²). Film thickness 10 mm under RF sputtering method in an argon flow rate of 25 sccm = 1:1 atmosphere. A 0nm silicon oxide layer is formed.

[0205] Next, a resist mask is formed by a fourth photolithography step, and selective etching is performed. By performing a procedure to remove a portion of the gate insulation layer 452, an opening 423 is formed that reaches the wiring layer 468. This is achieved (see Figure 9(D)). Although not shown, when the opening 423 is formed, the electrode layer 465b An opening that reaches the electrode layer 465b may be formed. In this embodiment, as an example, the opening to the electrode layer 465b is Furthermore, there is an example in which an interlayer insulating layer is formed after lamination, and an electrically connected wiring layer is formed in the opening. do.

[0206] Next, after forming a conductive film on the gate insulating layer 452 and the opening 423, a fifth photolithography is performed. The gate electrode layer 461 (461a, 461b) and the wiring layer 464 are formed by the graphing process. The resist mask may also be formed by an inkjet method. Using the cudget method can reduce manufacturing costs.

[0207] Furthermore, conductive materials for forming the gate electrode layer 461 (461a, 461b) and the wiring layer 464. The film is made of molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, and neo Using metallic materials such as zinc and scandium, or alloy materials mainly composed of these, a single layer Alternatively, they can be formed by lamination.

[0208] In this embodiment, as an example, a titanium film with a thickness of 150 nm is formed by sputtering. Then, using a fifth photolithography method, the gate electrode layers 461a and 461b, and the wiring layer 46 Form 4.

[0209] Next, a second heat treatment (preferably 200°C) is performed under an inert gas atmosphere or an oxygen gas atmosphere. The temperature is between 250°C and 400°C, for example, between 250°C and 350°C. In this embodiment, nitrogen A second heating treatment is performed at 250°C for 1 hour in an ambient atmosphere. Also, on transistor 460 This may be done after forming a protective insulating layer or a planar insulating layer.

[0210] In the above process, the concentrations of hydrogen, water, hydride, and hydroxide are reduced in the oxide semiconductor layer 46. A transistor 460 having 2 can be formed (see Figure 9(E)).

[0211] Additionally, a protective insulating layer and a planarizing insulating layer for planarization may be provided on transistor 460. Note that although not shown in the diagram, there is an electrode layer 46 on the gate insulating layer 452, the protective insulating layer and the planar insulating layer. An opening is formed that reaches 5b, and a wiring layer is formed in this opening that is electrically connected to the electrode layer 465b. To accomplish.

[0212] This embodiment can be implemented in appropriate combination with other embodiments.

[0213] As described above, when depositing oxide semiconductor films, it is necessary to remove residual moisture from the atmosphere during film formation. This makes it possible to reduce the concentration of hydrogen and hydrides in the oxide semiconductor film. This can help stabilize oxide semiconductor films.

[0214] As described above, in a DC conversion circuit having a transistor using an oxide semiconductor layer, This allows us to provide a highly reliable DC conversion circuit with consistent electrical characteristics.

[0215] (Embodiment 5) This embodiment is applicable to a transistor constituting a DC conversion circuit, which is one aspect of the present invention. An example of a transistor will be described. Note that this is the same as and part of Embodiment 3 or Embodiment 4. The parts or processes having similar functions are the same as in Embodiment 3 or Embodiment 4. It is sufficient to do so, and repeated explanations will be omitted as appropriate. Similarly, detailed explanations of the same section will also be omitted as appropriate. ru.

[0216] An example of the transistor of this embodiment will be explained using Figure 10.

[0217] Figures 10(A) and 10(B) show an example of a transistor cross-sectional structure. Transistors 425 and 426 have a structure in which an oxide semiconductor layer is sandwiched between a conductive layer and a gate electrode layer. It is one of the transistors.

[0218] Furthermore, in Figures 10(A) and 10(B), a silicon substrate is used as the substrate, and the silicon base Transistors 425 and 426 are provided on an insulating layer 422 provided on a plate 420. It is being done.

[0219] In Figure 10(A), insulating layer 422 and insulating layer 407 are provided on the silicon substrate 420. A conductive layer 427 is provided between them so as to overlap at least the entire oxide semiconductor layer 412. ru.

[0220] Note that Figure 10(B) shows that the conductive layer between insulating layer 422 and insulating layer 407 is the conductive layer 424 The oxide semiconductor layer 412 is processed by etching in such a way that at least the channel region is included. This is an example that overlaps with some other examples.

[0221] The conductive layers 427 and 424 can be made of a metal material that can withstand the heat treatment temperature in the subsequent process. Commonly known as titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium Elements selected from the above, or alloys containing the above elements, or combinations of the above elements An alloy film or a nitride containing the above-mentioned elements can be used. 427 and 424 may be single-layer or multi-layer structures, for example, a single layer of tungsten or nitrogen A laminated structure can be formed by stacking tungsten oxide layers and tungsten layers.

[0222] Furthermore, the conductive layers 427 and 424 have a potential equal to the gate electrode layer 41 of transistors 425 and 426. It can be the same as layer 1, or it can be different, and it can also function as a second gate electrode layer. Yes, it is possible. Also, the potentials of conductive layers 427 and 424 may be fixed at GND and 0V. stomach.

[0223] The conductive layers 427 and 424 control the electrical characteristics of transistors 425 and 426. It is possible.

[0224] Furthermore, the configuration is not limited to forming a second gate electrode layer by providing a conductive layer, for example, If a semiconductor substrate is used as the substrate, the substrate is formed by thermal oxidation. The selected region can also be used to function as a second gate electrode layer.

[0225] This embodiment can be appropriately combined with or substituted with other embodiments.

[0226] (Embodiment 6) In this embodiment, it is applicable to the transistors constituting a DC conversion circuit, which is one aspect of the present invention. Let's describe an example of a capable transistor.

[0227] An example of the transistor and method for fabricating the transistor according to this embodiment is shown in Figure 11. explain.

[0228] Figures 11(A) to (E) show an example of a transistor fabrication method. The transistor shown is a bottom-gate structure and is also called an inverse staggered transistor. cormorant.

[0229] Furthermore, in this embodiment, transistor 390 is a single-gate transistor. The transistor is a multi-gate transistor having multiple channel formation regions. That's fine.

[0230] The following describes the process of fabricating the transistor 390 on the substrate 394 using Figures 11(A) to (E). Let me explain the process.

[0231] First, a conductive film is formed on a substrate 394 having an insulating surface, and then the first photolithography is performed. The process involves forming a resist mask on the conductive film and selectively etching the conductive film. This forms the gate electrode layer 391. The ends of the gate electrode layer 391 are tapered. It is preferable that the shape is tapered. If the end of the gate electrode layer 391 is tapered, stacking on top The coverage of the layered gate insulating layer is improved. It is possible to do so. Manufacturing costs can be reduced by forming the resist mask using an inkjet method. .

[0232] There are no major restrictions on the substrates that can be used for the substrate 394 having an insulating surface, however In both cases, it is necessary to have heat resistance sufficient to withstand heat treatment. Substrate 394 For example, glass substrates such as barium borosilicate glass or aluminoborosilicate glass It can be used.

[0233] In addition, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used instead of the glass substrates mentioned above. A substrate made of edge material may also be used. Other materials such as crystallized glass can also be used. Plastic substrates can also be used as appropriate. Furthermore, semiconductor substrates such as silicon can be used. A substrate can also be used.

[0234] Alternatively, an insulating film serving as an underlayer may be provided between the substrate 394 and the gate electrode layer 391. The ground film has the function of preventing the diffusion of impurity elements from the substrate 394, and is composed of a silicon nitride film and an acid One or more selected from silicon oxide films, silicon nitride films, or silicon oxide-nitride films. It can be formed by a layered structure of films.

[0235] Furthermore, the material of the gate electrode layer 391 is molybdenum, titanium, chromium, tantalum, tungsten Metal materials such as tungsten, aluminum, copper, neodymium, scandium, or materials with these as their main components It can be formed using alloy materials in a single layer or in a laminated manner.

[0236] For example, the two-layer stacked structure of the gate electrode layer 391 is such that a molybdenum layer is stacked on top of an aluminum layer. A layered two-layer structure, a two-layer structure with a molybdenum layer on top of a copper layer, and a titanium nitride layer on top of a copper layer. A two-layer structure consisting of a tangentine layer or a tantalum nitride layer, or a titanium nitride layer and a molybdenum layer. A two-layer structure, or a two-layer structure consisting of a tungsten nitride layer and a tungsten layer stacked on top of each other. This is preferable. The three-layer laminated structure consists of a tungsten layer or a tungsten nitride layer and an aluminum layer. A layer of aluminum and silicon alloy or aluminum and titanium alloy, and a titanium nitride or titanium layer. It is preferable to use a laminated structure in which the layers are stacked. Furthermore, a conductive film that is translucent is used for the gate electrode. Layer 391 can also be formed. As a light-transmitting conductive film, a light-transmitting conductive oxide can be used. These are some examples.

[0237] Next, a gate insulating layer 397 is formed on the gate electrode layer 391.

[0238] Here, by removing impurities, the oxide semiconductor is converted to type I or substantially converted to type I (high Purified oxide semiconductors are extremely sensitive to interface states and interface charges, therefore, The interface with the insulating layer is important. Therefore, the gate in contact with the highly purified oxide semiconductor layer The insulating layer (GI) requires high quality.

[0239] For example, high-density plasma CVD using μ-wave (2.45 GHz) produces dense materials with high dielectric strength. It is preferable because it can form a high-quality insulating film. A highly purified oxide semiconductor layer and a high-quality gel By ensuring close contact with the insulating layer, the interface state can be reduced, resulting in improved interface properties. This is because it can do so. The high-density plasma device used here is 1 × 10 11 / cm 3 A device capable of achieving the above plasma density can be used.

[0240] For example, by applying microwave power of 3kW to 6kW to generate plasma, the insulating film is formed The film is made. Monosilane gas (SiH4) and nitrous oxide (N2) are used as material gases in the chamber. By introducing O and a noble gas, a high-density plasma is generated under a pressure of 10 Pa to 30 Pa. An insulating film is formed on a substrate having an insulating surface such as a slab. Then, monosilane gas is supplied. The process is stopped, and nitrous oxide (N2O) and a noble gas are introduced onto the insulating film surface without exposure to the atmosphere. A rasma treatment may be performed. At a minimum, nitrous oxide (N2O) and a noble gas may be introduced for insulation. The plasma treatment performed on the film surface is carried out after the deposition of the insulating film. The flow rate ratio of nosilane gas (SiH4) to nitrous oxide (N2O) is between 1:10 and 1:20. The range is set to 0. Furthermore, the noble gases introduced into the chamber are helium, argon, and chlorite. Lipton, xenon, etc. can be used, but argon is used because it is the cheapest. This is preferable.

[0241] Of course, if it can form a good insulating film as the gate insulating layer 397, sputtering Other film deposition methods such as the ring method and plasma CVD can be applied. Furthermore, after film deposition... This is an insulating film in which the film quality of the gate insulating film and the interface characteristics with the oxide semiconductor are modified by heat treatment. That's fine. In any case, it goes without saying that the film quality as a gate insulating film must be good. Any material that can reduce the interface state density with the oxide semiconductor and form a good interface is acceptable.

[0242] For example, 85°C, 2 × 10 6 V / cm, 12-hour gate bias thermal stress test (B In the T test, if impurities are added to the oxide semiconductor, the impurities and the oxide semiconductor... The bonds with the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), and The resulting uncoupled hands induce a drift in the threshold voltage (Vth). Transistors used in DC conversion circuits, one aspect of the invention, are made of oxide semiconductors with impurities, special Furthermore, hydrogen and water are removed as much as possible, and the interfacial characteristics with the gate insulating layer are improved as described above. This makes it possible to obtain transistors that are stable even under BT testing.

[0243] Furthermore, the gate insulating layer 397 includes a silicon oxide layer, a silicon nitride layer, and a silicon oxide nitride layer. Forming a silicon oxide layer, silicon nitride layer, or aluminum oxide layer as a single layer or in a laminated manner. It is possible.

[0244] Furthermore, the gate insulating layer 397 can be, for example, HfO x You can also use gates. HfO x By using methods such as the oxide semiconductor layer, the gate electrode can be accessed from the oxide semiconductor layer side. This can reduce the leakage current flowing toward the target.

[0245] Furthermore, the gate insulating layer 397 has a structure in which a silicon oxide layer and a silicon nitride layer are stacked. It is also possible to do so. In this embodiment, as an example, high density is achieved with a pressure of 30 Pa and microwave power of 6 kW. A silicon oxiditride layer with a thickness of 100 nm is formed by a plasma CVD method. The flow rate ratio of monosilane gas (SiH4) to nitrous oxide (N2O) introduced into the chamber is: The range should be between 1:10 and 1:200.

[0246] Furthermore, the gate insulating layer 397 and the oxide semiconductor film 393 contain as much hydrogen, hydroxyl groups, and moisture as possible. To prevent contamination, a substrate on which a gate electrode layer 391 is formed is used as a pretreatment for film deposition. The substrate 394, up to the gate insulating layer 394 or 397, is prepared for sputtering. The substrate 394 is preheated in a preheating chamber to remove impurities such as hydrogen and moisture adsorbed on it, and then exhausted. It is preferable to do so. The preheating temperature is preferably 100°C to 400°C. The temperature is between 150°C and 300°C. The exhaust means provided in the preheating chamber is, for example, A cryopump is preferred. Note that this preheating process can be omitted. Preheating is performed up to the source electrode layer and drain electrode layer before the oxide insulating layer is formed. The same procedure may be performed on substrate 394.

[0247] Next, an oxide semiconductor film 393 with a thickness of 2 nm to 200 nm is placed on the gate insulating layer 397. It forms (see Figure 11(A)).

[0248] Furthermore, before depositing the oxide semiconductor film 393, argon gas was introduced to generate plasma. Reverse sputtering is performed to remove particles adhering to the surface of the gate insulating layer 397. It is preferable to remove it.

[0249] The oxide semiconductor film 393 is deposited, for example, by sputtering. Examples include quaternary metal oxides such as In-Sn-Ga-Zn-O films and ternary metal oxides. These are In-Ga-Zn-O film, In-Sn-Zn-O film, In-Al-Zn-O film, S n-Ga-Zn-O film, Al-Ga-Zn-O film, Sn-Al-Zn-O film, and binary gold In-Zn-O film, Sn-Zn-O film, Al-Zn-O film, Zn-Mg- O film, Sn-Mg-O film, In-Mg-O film, In-Sn-O film, or In-O film, Sn- Oxide semiconductor films such as O films and Zn-O films can be used. The film may contain SiO2.

[0250] Furthermore, the oxide semiconductor film 393 is InMO3(ZnO) m (m>0) A membrane can be used. Here, M is one selected from Ga, Al, Mn, and Co. This indicates multiple metallic elements. For example, M could be Ga, Ga and Al, Ga and Mn, or G Examples include a and Co.

[0251] In this embodiment, as an example, the oxide semiconductor film 393 is made of an In-Ga-Zn-O metal oxide The film is deposited by sputtering using a material target. Furthermore, the oxide semiconductor film 393 is , under a noble gas (typically argon) atmosphere, under an oxygen atmosphere, or under a noble gas (typically argon) atmosphere It can be formed by sputtering in a gas and oxygen atmosphere. When using the sputtering method, the target contains 2% to 10% by weight of SiO2. Film deposition may be carried out using [a specific method / tool].

[0252] Furthermore, as a target for fabricating oxide semiconductor film 393 by sputtering, acid A metal oxide target with zinc oxide as the main component can be used. Other examples of targets include metal oxide targets (combinations) containing In, Ga, and Zn. The composition ratios are In2O3:Ga2O3:ZnO = 1:1:1 [mol%] or In:Ga A metal oxide target (Zn=1:1:0.5[atom%]) can be used. The packing density is 90% or more, preferably 95% or more. By using this method, the deposited oxide semiconductor film becomes a dense film.

[0253] In this embodiment, as an example, the substrate is held in a processing chamber that is maintained under reduced pressure, and the substrate is... Heat to room temperature or a temperature below 400°C. Then, remove residual moisture in the processing chamber while hydrogen is added. Then, a sputtering gas from which moisture has been removed is introduced, and a metal oxide is used as the target of the substrate. An oxide semiconductor film 393 is deposited on 394. In order to remove residual moisture in the processing chamber, It is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include, It is preferable to use a lyopump, ion pump, or titanium sublimation pump. Furthermore, as an exhaust method, for example, a turbo pump equipped with a cold trap can be used. This is possible. The deposition chamber, which is evacuated using a cryopump, can contain, for example, hydrogen atoms and water (H2 Compounds containing hydrogen atoms (more preferably compounds containing carbon atoms), such as O, are excluded. Therefore, by forming a film in the said deposition chamber, the concentration of impurities contained in the oxide semiconductor film is reduced. The temperature can be reduced. In addition, the cryopump removes residual moisture in the processing chamber while... By performing puttering deposition, the substrate temperature when depositing the oxide semiconductor film 393 is room temperature. The temperature can be kept below 400℃.

[0254] An example of film deposition conditions is a distance of 60 mm between the substrate and the target, a pressure of 0.6 Pa, and DC ( The following conditions apply: DC power supply 0.5kW, oxygen (oxygen flow rate ratio 100%) atmosphere. Oh, using a pulsed DC power supply can reduce particles and make the film thickness distribution more uniform. This is preferable for the following reasons. The thickness of the oxide semiconductor film is preferably 5 nm or more and 30 nm or less. Furthermore, the appropriate thickness of the oxide semiconductor film varies depending on the oxide semiconductor material used. You can choose the appropriate thickness depending on the material.

[0255] Next, the oxide semiconductor film is transformed into island-shaped oxide semiconductor layers 39 by a second photolithography process. Process to 9 (see Figure 11(B)). Also, in order to form island-shaped oxide semiconductor layers 399 The resist mask may be formed by an inkjet method. Using the T method can reduce manufacturing costs.

[0256] Furthermore, when forming contact holes in the gate insulating layer 397, the process is carried out in an oxide semiconductor. This can be done when forming layer 399.

[0257] Note that the etching of the oxide semiconductor film 393 here can be done by dry etching or wet etching. Etching can be used. Also, as etching of the oxide semiconductor film 393 This may involve using both dry etching and wet etching.

[0258] Etching gases used in dry etching include chlorine-containing gases (chlorine-based gases, for example) Chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC) l4) etc.) are preferable.

[0259] Furthermore, fluorine-containing gases (fluorine-based) are used as etching gases for dry etching. Gases, such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), Lifluoromethane (CHF3, etc.), hydrogen bromide (HBr), or oxygen (O2), These gases are obtained by adding noble gases such as helium (He) or argon (Ar) to them. You can use it.

[0260] As for dry etching methods, parallel plate type RIE (Reactive Ion Etching) Methods such as the ing method and ICP (Inductively Coupled Plasma: induction) A coupled plasma etching method can be used. The desired processing shape can be etched. To that end, etching conditions (amount of power applied to the coil-type electrode, amount of power applied to the electrode on the substrate side) Adjust the power consumption, electrode temperature on the substrate, etc., as appropriate.

[0261] For example, an etching solution used in wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Liquids can be used. ITO07N (manufactured by Kanto Chemical Co., Ltd.) may also be used.

[0262] Furthermore, the etching solution after wet etching is washed away along with the etched material. The material is removed. The waste etching solution containing the removed material is purified, and the material contained in it is removed. It may be reused. The indium contained in the oxide semiconductor layer can be extracted from the waste liquid after etching. By recovering and reusing certain materials, we can make effective use of resources and reduce costs. ru.

[0263] Furthermore, during etching, the material is adjusted to allow etching to the desired shape. Adjust the etching conditions (etching solution, etching time, temperature, etc.) as appropriate.

[0264] Furthermore, in this embodiment, reverse sputtering is performed before forming the conductive film in the next step, and oxidation Remove resist residue and other materials adhering to the surface of the semiconductor layer 399 and the gate insulating layer 397. It is preferable to do so.

[0265] Next, a conductive film is formed on the gate insulating layer 397 and the oxide semiconductor layer 399. The formation can be carried out by sputtering or vacuum deposition. Aluminum is used as the material for the conductive film. Elements selected from nium, chromium, copper, tantalum, titanium, molybdenum, and tungsten. Alternatively, using an alloy containing the above-mentioned elements, or an alloy film combining the above-mentioned elements. It is possible to do so. Furthermore, manganese, magnesium, and zirconium can be used as materials for the conductive film. Alternatively, one or more materials selected from beryllium and yttrium may be used. Furthermore, the conductive film may be a single-layer structure or a multilayer structure of two or more layers. As for a single-layer structure, For example, a single-layer structure of an aluminum film containing silicon can be cited. Also, a multilayer structure can be cited. This is a two-layer structure in which a titanium film is laminated on an aluminum film, or a Ti film and a layer on the Ti film. One example is a three-layer structure in which an aluminum film is layered, and then a Ti film is deposited on top of that. In addition, aluminum is combined with titanium, tantalum, tungsten, molybdenum, chromium, and A film made of one or more elements selected from odymium and scandium, or a single element or alloy films made by combining multiple elements, or nitride films made by combining one or more of the elements. You may use it.

[0266] Next, a resist mask is formed on the conductive film by a third photolithography step, selectively After etching is performed to form the source electrode layer 395a and the drain electrode layer 395b, Remove the dyst mask (see Figure 11(C)).

[0267] For exposure during resist mask formation in the third photolithography process, ultraviolet light and KrF light are used. A laser or ArF laser light is used. Below the adjacent source electrode layer on the oxide semiconductor layer 399. The gap width between the end and the lower end of the drain electrode layer determines the channel of the transistor that is later formed. The channel length L is determined. Note that when performing exposure with a channel length L = less than 25 nm, a few nm Extreme ultraviolet light, with wavelengths as short as tens of nanometers. Using this, exposure is performed during the resist mask formation in the third photolithography step. Linear exposure offers high resolution and a large depth of field. Therefore, transistors that were formed later... The channel length L can also be set to 10 nm or more and 1000 nm or less, and the operating speed of the circuit This allows for faster operation and extremely low off-current values, thus also contributing to lower power consumption. It is possible.

[0268] Furthermore, in order to prevent the oxide semiconductor layer 399 from being removed during etching of the conductive film, The materials and etching conditions for the oxide semiconductor film are adjusted as appropriate.

[0269] In this embodiment, as an example, a titanium film is used as the conductive film, and the oxide semiconductor layer 399 and An In-Ga-Zn-O oxide semiconductor layer is used, and ammonia peroxide is used as the etchant. Use water (a mixture of ammonia, water, and hydrogen peroxide).

[0270] In the third photolithography process, a portion of the oxide semiconductor layer 399 is etched. This may result in an oxide semiconductor layer 399 having grooves (recesses). Also, the source electrode layer... A resist mask for forming drain electrode layer 395a and drain electrode layer 395b is formed by inkjet method. It may be formed by the inkjet method. Forming the resist mask by the inkjet method reduces manufacturing costs. Cut.

[0271] Furthermore, in order to reduce the number of photomasks and processes used in the photolithography process, The resist mask formed by a multi-tone mask, which is an exposure mask where the light has multiple intensities, is formed by the light. The etching process may be performed using a mask. A resist mask formed using a multi-gradation mask. The ske will have a shape with multiple film thicknesses, and its shape can be further deformed by etching. Because it can do this, it can be used in multiple etching processes that process different patterns. Therefore, a single multi-tone mask can accommodate at least two different patterns. This allows for the formation of a resist mask. Therefore, the number of exposure masks can be reduced. Furthermore, the corresponding photolithography process can also be reduced, thus simplifying the overall process.

[0272] Exposed oxide semi-semi Adsorbed water and other substances adhering to the surface of the conductive layer may be removed. Alternatively, a mixed gas of oxygen and argon may be used. Plasma treatment may be performed using [a specific method / tool].

[0273] When plasma treatment is performed, a protective layer comes into contact with a portion of the oxide semiconductor layer without being exposed to the atmosphere. An oxide insulating layer 396 is formed as an oxide insulating layer that will serve as an insulating layer (see Figure 11(D)). In this embodiment, the oxide semiconductor layer 399 is the source electrode layer 395a, and the drain electrode layer 39 In the region that does not overlap with 5b, the oxide semiconductor layer 399 and the oxide insulating layer 396 are in contact. To form in that manner.

[0274] In this embodiment, the oxide insulating layer 396 is an island-shaped oxide semiconductor layer 399, and the source power The substrate 394, on which the electrode layer 395a and drain electrode layer 395b have been formed, is left at room temperature or at 100°C. The system is heated to a high temperature, hydrogen and moisture are removed, and a high-purity sputtering gas containing oxygen is introduced. A silicon oxide layer containing defects is deposited using a silicon semiconductor target.

[0275] In this embodiment, for example, a silicon target with a purity of 6N and doped with boron Using a resistivity of 0.01 Ω cm, the distance between the substrate and the target (TS distance) was set to 89 m. m, pressure 0.4 Pa, DC power supply 6 kW, under an oxygen atmosphere (oxygen flow rate 100%). Then, a silicon oxide film is deposited by pulsed DC sputtering. The wavelength will be 300 nm. Also, instead of a silicon target, a silicon oxide film will be deposited. Quartz (preferably synthetic quartz) can be used as the target. For example, oxygen or a mixture of oxygen and argon is used as the tarring gas.

[0276] When forming an oxide insulating layer 396 using any of the above materials and methods, It is preferable to form the oxide insulating layer 396 while removing residual moisture from the room. To ensure that hydrogen, hydroxyl groups, or moisture are not contained in the body layer 399 and the oxide insulating layer 396. That is the case.

[0277] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use a pressure pump. In addition, as an exhaust means, a pressure pump is used for the turbo pump. A device equipped with a rud trap can be used. Film deposition is performed using a cryopump. The room is exhausted with, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water), By forming the film in the said deposition chamber, the concentration of impurities in the oxide insulating layer 396 can be reduced. ru.

[0278] Furthermore, as the oxide insulating layer 396, instead of the silicon oxide layer, a silicon oxide nitride layer, or an oxide An aluminum layer or an aluminum oxide nitride layer can also be used.

[0279] Furthermore, with the oxide insulating layer 396 and the oxide semiconductor layer 399 in contact, the temperature is set to 100°C to 40°C. Heat treatment may be performed at 0°C. The oxide insulating layer 396 in this embodiment has many defects. Therefore, this heat treatment removes hydrogen, water, and hydroxyl groups contained in the oxide semiconductor layer 399. Alternatively, impurities such as hydrides are diffused into the oxide insulating layer 396, and into the oxide semiconductor layer 399 The amount of impurities contained can be further reduced.

[0280] In the above process, the oxide semiconductor layer 39 has a reduced concentration of hydrogen, water, hydroxyl groups, or hydrides. A transistor 390 having 2 can be formed (see Figure 11(E)).

[0281] As described above, when depositing an oxide semiconductor film, residual moisture in the atmosphere during film formation is removed. This makes it possible to reduce the concentration of hydrogen and hydrides in the oxide semiconductor film. This allows for greater stabilization of oxide semiconductor films.

[0282] A protective insulating layer may be provided on the oxide insulating layer. In this embodiment, protective insulating layer 39 8 is formed on the oxide insulating layer 396. The protective insulating layer 398 is a silicon nitride film, nitrile A silicon oxide film, an aluminum nitride film, or an aluminum nitride oxide film is used.

[0283] In this embodiment, as an example, the substrate 394 on which the oxide insulating layer 396 has been formed is 100 High-purity sputtering containing nitrogen, from which hydrogen and moisture have been removed by heating to a temperature of ℃ to 400℃. By introducing a sintering gas and using a silicon semiconductor target, a silicon nitride film is deposited. A protective insulating layer 398 is formed. In this case as well, similar to the oxide insulating layer 396, It is preferable to remove residual moisture in the processing chamber while forming the protective insulating layer 398.

[0284] When forming the protective insulating layer 398, the temperature during film formation of the protective insulating layer 398 is based on 100°C to 400°C. By heating the plate 394, the hydrogen or water contained in the oxide semiconductor layer 399 is oxidized. It can be diffused into the material insulating layer 396. In this case, after the formation of the oxide insulating layer 396 Heat treatment is not required.

[0285] Furthermore, a silicon oxide layer is formed as the oxide insulating layer 396, and a nitride is formed as the protective insulating layer 398. When stacking silicon layers, the silicon oxide layer and the silicon nitride layer are processed in the same processing chamber. It can be formed using a standard silicon target. First, sputtering containing oxygen is performed. By introducing gas, a silicon oxide layer is formed using a silicon target installed in the processing chamber. After that, the sputtering gas was switched to a sputtering gas containing nitrogen and the same silicon was used. A silicon nitride layer is formed using a target. The silicon oxide layer and the silicon nitride layer are Because it can be formed continuously without exposure to the atmosphere, hydrogen and moisture are not present on the surface of the silicon oxide layer. This prevents the adsorption of impurities such as the oxide insulating layer 396. After forming a silicon layer and laminating a silicon nitride layer as a protective insulating layer 398, an oxide semiconductor Heat treatment to diffuse hydrogen or moisture contained in the body layer into the oxide insulating layer 396 ( It is recommended to perform the procedure at a temperature of 100°C to 400°C.

[0286] Furthermore, when forming an oxide semiconductor layer having a channel formation region on the gate insulating layer, the atmosphere By removing residual moisture from the air, the concentrations of hydrogen and hydrides in the oxide semiconductor layer are reduced. It is possible.

[0287] The above process is carried out at a temperature of 400°C or less, so the thickness is 1 mm or less and the length of one side is 1 m. It can also be applied to manufacturing processes using glass substrates exceeding 400°C. All processes can be carried out at the optimal temperature.

[0288] Furthermore, regarding the conductivity mechanism of a transistor using an oxide semiconductor, Figures 12 to 15 are used. Let me explain. Note that the following explanation assumes an ideal situation for ease of understanding. Not all of this necessarily reflects reality. Furthermore, the following explanation is merely one perspective. I should add that this is merely speculation.

[0289] Figure 12 shows a longitudinal cross-sectional view of an inverse staggered transistor using an oxide semiconductor. The gate electrode is shown. An oxide semiconductor layer 1003 is provided on 1001 via a gate insulating film 1002, and Source electrode 1004a and drain electrode 1004b are provided, and source electrode 1004a And an oxide insulating layer 1005 is provided on the drain electrode 1004b, and oxide insulating layer 10 A conductive layer 1006 is provided on the oxide semiconductor layer 1003, with 05 in between.

[0290] Figure 13 shows the energy band diagram (schematic diagram) in the A-A' section shown in Figure 12. Figure 13(A) shows the case where the voltage between the source and drain is at the same potential (Vd=0V), as shown in the diagram. 13(B) applies a positive potential (Vd>0) to the drain relative to the source, and a positive potential to the gate. This shows the case where (Vg>0) is added.

[0291] Figure 14 is a schematic diagram of the energy bands in the cross-section B-B' in Figure 12. Figure 14(A) shows the state where a positive potential (+Vg) is applied to the gate (G1), and the source This shows the ON state where carriers (electrons) flow between the drain and the capacitor. Also, see Figure 14(B). This is a state where a negative potential (-Vg) is applied to the gate (G1), and is an off state (minority capacity). This indicates the case where the rear does not flow.

[0292] Figure 15 shows the relationship between the vacuum level, the work function (φM) of the metal, and the electron affinity (χ) of the oxide semiconductor. This indicates.

[0293] Because metals are degenerate, the Fermi level is located within the conduction band. On the other hand, conventional oxide semiconductors The field is generally N-type, and in that case, the Fermi level (Ef) is located in the center of the band gap. It is located away from the intrinsic Fermi level (Ei) and closer to the conduction band. In conductors, depending on the film deposition method, the oxide semiconductor layer contains some hydrogen or water. It is known that some of these atoms act as electron donors, supplying electrons and thus becoming N-type. It is being done.

[0294] In contrast, the oxide semiconductor applied to the transistor of a DC conversion circuit according to one aspect of the present invention is By removing hydrogen, which is an N-type impurity, from the oxide semiconductor, and removing impurities other than the main component of the oxide semiconductor... By purifying the material to minimize the presence of impurities, it becomes intrinsic (Type I) or substantially intrinsic semiconductor. It is a compound. In other words, instead of adding impurities to make it type I, it is made of hydrogen, water, etc. By removing impurities as much as possible, a highly purified type I (intrinsic semiconductor) or something close to it is obtained. This is a characteristic feature. As a result, the Fermi level is at the same level as the intrinsic Fermi level. It can be extended to this extent.

[0295] If the band gap (Eg) of an oxide semiconductor is 3.15 eV, then the electron affinity (χ) is It is said to be 4.3 eV. The titanium (Ti) that makes up the source electrode and drain electrode. The function is approximately equal to the electron affinity of the oxide semiconductor. In this case, the metal-oxide semiconductor interface... In this case, no Schottky barrier is formed for electrons.

[0296] In other words, if the work function of the metal and the electron affinity of the oxide semiconductor are equal, then when the two come into contact... Figure 13(A) shows an energy band diagram (schematic diagram).

[0297] In Figure 13(B), the black circles (●) represent electrons, and when a positive potential is applied to the drain, Electrons are injected into the oxide semiconductor, passing through the barrier (h), and flow towards the drain. In this case, the height of the barrier (h) changes depending on the gate voltage and drain voltage, but the positive drain When a rain voltage is applied, the height of the barrier in Figure 13(A) without voltage applied, that is, The barrier height (h) will be less than half of the band gap (Eg).

[0298] At this time, electrons are in the gate insulating film and the highly purified oxide semiconductor as shown in Figure 14(A). It moves along the lowest energetically stable point on the oxide semiconductor side at the interface with the body.

[0299] Furthermore, in Figure 14(B), a negative potential (reverse bias) is applied to the gate electrode 1001. Therefore, since the minority carriers, or holes, are practically zero, the current is extremely close to zero. It becomes a value.

[0300] For example, if the channel width W of the transistor is 1 × 10⁻⁶ 4 It is a device with a channel length of 3 μm in μm. However, the off-current is 10 -13 It is less than or equal to A, and the subthreshold swing value (S value) is The voltage is 0.1 V / dec. (gate insulating film thickness 100 nm).

[0301] Thus, simply applying a broad-bandgap oxide semiconductor to a transistor is not sufficient. Furthermore, impurities such as hydrogen that form donors are reduced as much as possible, and the carrier density is preferably 1 ×10 12 / cm 3 Less than, more preferably 1.45 × 10 10 / cm 3 To be less than By doing so, carriers that are thermally excited at practical operating temperatures are eliminated, and from the source side... The transistor can be operated solely by the injected carriers. Therefore, Off current is 1 × 10 -13 Lower it to below A, and reduce the off-current by almost no change in temperature. This allows us to obtain an extremely stable transistor that hardly changes.

[0302] As described above, in a transistor using an oxide semiconductor layer, stable electrical characteristics are obtained. We can provide highly reliable transistors.

[0303] This embodiment can be appropriately combined or replaced with other embodiments. ru.

[0304] (Embodiment 7) This embodiment is applicable to a transistor constituting a DC conversion circuit, which is one aspect of the present invention. Let's explain an example of a transistor.

[0305] An example of the transistor and method for manufacturing the transistor according to this embodiment is shown in Figure 16. explain.

[0306] Figures 16(A) to (E) show an example of a transistor fabrication method. The transistor shown is a bottom-gate structure and is also called an inverse staggered transistor. cormorant.

[0307] Furthermore, in this embodiment, transistor 310 is a single-gate transistor. The transistor is a multi-gate transistor having multiple channel formation regions. That's fine.

[0308] The following describes the process of fabricating a transistor 310 on substrate 300 using Figures 16(A) to (E). Let me explain the process.

[0309] First, a conductive film is formed on a substrate 300 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 311 is formed by the process. The resist mask is made by the inkjet method. It may be formed. Forming the resist mask using an inkjet method can reduce manufacturing costs. ru.

[0310] There are no major restrictions on the substrates that can be used for the substrate 300 having an insulating surface, however Both must have sufficient heat resistance to withstand heat treatment. For example, substrate 3 00 refers to glass substrates such as barium borosilicate glass or aluminoborosilicate glass. You can use it.

[0311] In addition, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used instead of the glass substrates mentioned above. A substrate made of edge material may also be used. Other materials such as crystallized glass can also be used. A semiconductor substrate such as silicon can also be used as the substrate.

[0312] An insulating film that serves as the underlayer may be provided between the substrate 300 and the gate electrode layer 311. It has the function of preventing the diffusion of impurity elements from the substrate 300, and the silicon nitride film, silicon oxide film, A laminated structure consisting of one or more films selected from silicon nitride or silicon oxidnitride films. It can be formed.

[0313] Furthermore, the gate electrode layer 311 is made of molybdenum, titanium, chromium, tantalum, tungsten, Metal materials such as aluminum, copper, neodymium, scandium, or compounds mainly composed of these materials It can be formed using gold material, either as a single layer or in layers.

[0314] For example, as a two-layer stacked structure of the gate electrode layer 311, molybdenum on an aluminum layer A two-layer laminated structure with layers stacked on top of each other, a two-layer laminated structure with a molybdenum layer stacked on top of a copper layer, copper layer A two-layer laminated structure with a titanium nitride layer or tantalum nitride layer laminated on top, titanium nitride layer and A two-layer laminated structure consisting of a ribdenum layer and a tungsten nitride layer and a tungsten layer. A two-layer laminated structure is preferred. As for a three-layer laminated structure, a tungsten layer or a nitrogen layer is preferred. A tungsten oxide layer and a layer of an aluminum-silicon alloy or an aluminum-titanium alloy. It is preferable to have a laminated structure in which a titanium nitride layer or a titanium layer is laminated.

[0315] Next, a gate insulating layer 302 is formed on the gate electrode layer 311.

[0316] Here, by removing impurities, the oxide semiconductor is converted to type I or substantially converted to type I (high Purified oxide semiconductors are extremely sensitive to interface states and interface charges, therefore, The interface with the insulating layer is important. Therefore, the gate in contact with the highly purified oxide semiconductor layer The insulating layer (GI) requires high quality.

[0317] For example, high-density plasma CVD using μ-wave (2.45 GHz) produces dense materials with high dielectric strength. It is preferable because it can form a high-quality insulating film. A highly purified oxide semiconductor layer and a high-quality gel By ensuring close contact with the insulating layer, the interface state can be reduced, resulting in improved interface properties. This is because it can do so. The high-density plasma device used here is 1 × 10 11 / cm 3 A device capable of achieving the above plasma density can be used.

[0318] For example, by applying microwave power of 3kW to 6kW to generate plasma, the insulating film is formed The film is made. Monosilane gas (SiH4) and nitrous oxide (N2) are used as material gases in the chamber. By introducing O and a noble gas, a high-density plasma is generated under a pressure of 10 Pa to 30 Pa. An insulating film is formed on a substrate having an insulating surface such as a slab. Then, monosilane gas is supplied. The process is stopped, and nitrous oxide (N2O) and a noble gas are introduced onto the insulating film surface without exposure to the atmosphere. A rasma treatment may be performed. At a minimum, nitrous oxide (N2O) and a noble gas may be introduced for insulation. The plasma treatment performed on the film surface is carried out after the deposition of the insulating film. The flow rate ratio of nosilane gas (SiH4) to nitrous oxide (N2O) is between 1:10 and 1:20. The range is set to 0. Furthermore, the noble gases introduced into the chamber are helium, argon, and chlorite. Lipton, xenon, etc. can be used, but argon is used because it is the cheapest. This is preferable.

[0319] Of course, if it can form a good insulating film as the gate insulating layer 302, sputtering Other film deposition methods such as the ring method and plasma CVD can be applied. Furthermore, after film deposition... This is an insulating film in which the film quality of the gate insulating film and the interface characteristics with the oxide semiconductor are modified by heat treatment. That's fine. In any case, it goes without saying that the film quality as a gate insulating film must be good. Any material that can reduce the interface state density with the oxide semiconductor and form a good interface is acceptable.

[0320] Furthermore, 85℃, 2×10 6 V / cm, 12-hour gate bias thermal stress test (B In the T test, if impurities are added to the oxide semiconductor, the impurities and the oxide semiconductor... The bonds with the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), and The resulting uncoupled hands induce a drift in the threshold voltage (Vth). Furthermore, the transistor used in a DC conversion circuit according to one aspect of the present invention is made of an oxide semiconductor. By removing impurities, especially hydrogen and water, as much as possible, the interfacial properties with the gate insulating layer are improved as described above. This makes it possible to obtain transistors that are stable even under BT testing. .

[0321] Furthermore, the gate insulating layer 302 includes a silicon oxide layer, a silicon nitride layer, and a silicon oxide nitride layer. Forming a silicon oxide layer, silicon nitride layer, or aluminum oxide layer as a single layer or in a laminated manner. It is possible.

[0322] Furthermore, the gate insulating layer 302 can be, for example, HfO x You can also use gates. HfO x By using methods such as the oxide semiconductor layer, the gate electrode can be accessed from the oxide semiconductor layer side. This can reduce the leakage current flowing toward the target.

[0323] Furthermore, the gate insulating layer 302 has a structure in which a silicon oxide layer and a silicon nitride layer are laminated. It is also possible to do so. In this embodiment, as an example, high density is achieved with a pressure of 30 Pa and microwave power of 6 kW. A silicon oxiditride layer with a thickness of 100 nm is formed by a plasma CVD method. The flow rate ratio of monosilane gas (SiH4) to nitrous oxide (N2O) introduced into the chamber is: The range should be between 1:10 and 1:200.

[0324] Next, an oxide semiconductor film 330 with a thickness of 2 nm to 200 nm is placed on the gate insulating layer 302. It forms.

[0325] Furthermore, before depositing the oxide semiconductor film 330 by sputtering, an argon gas is introduced. Reverse sputtering is performed to generate plasma by introducing material, and the material adheres to the surface of the gate insulating layer 302. It is preferable to remove the particles. Alternatively, nitrogen or helium can be used instead of an argon atmosphere. You may also use oxygen or other substances.

[0326] The oxide semiconductor film 330 is an In-Sn-Ga-Zn-O film, which is a quaternary metal oxide. or ternary metal oxides such as In-Ga-Zn-O film, In-Sn-Zn-O film, In- Al-Zn-O film, Sn-Ga-Zn-O film, Al-Ga-Zn-O film, Sn-Al-Z nO films, and binary metal oxides such as In-Zn-O films, Sn-Zn-O films, and Al-Zn -O film, Zn-Mg-O film, Sn-Mg-O film, In-Mg-O film, In-Sn-O film and Oxide semiconductor films such as In-O films, Sn-O films, and Zn-O films can be used. Furthermore, the above oxide semiconductor film may contain SiO2.

[0327] Furthermore, as the oxide semiconductor film 330, InMO3(ZnO) m (m>0) A membrane can be used. Here, M is one selected from Ga, Al, Mn, and Co. This indicates multiple metallic elements. For example, M could be Ga, Ga and Al, Ga and Mn, or G Examples include a and Co.

[0328] Furthermore, as a target for fabricating the oxide semiconductor film 330 by sputtering, acid A metal oxide target with zinc oxide as the main component can be used. Other examples of targets include metal oxide targets (combinations) containing In, Ga, and Zn. The composition ratios are In2O3:Ga2O3:ZnO = 1:1:1 [mol%] or In:Ga :Zn=1:1:0.5[atom%]) can be used. Also, In, Ga, and As a metal oxide target containing Zn, In:Ga:Zn=1:1:1[atom% ], or a target having a composition ratio of In:Ga:Zn=1:1:2[atom%] is used. It is also possible that the filling rate of the metal oxide target is 90% or higher, preferably 95% or higher. Therefore, by using a metal oxide target with a high packing density, the oxide semiconductor film can be formed. The membrane becomes dense.

[0329] The sputtering gas used when depositing the oxide semiconductor film 330 is hydrogen, water, water High-purity mineral from which impurities such as acid groups or hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use a gas.

[0330] The substrate is held in a processing chamber maintained under reduced pressure, and the substrate temperature is kept between 100°C and 600°C. The temperature should be between 200°C and 400°C. By depositing the film while heating the substrate, The concentration of impurities in the deposited oxide semiconductor film can be reduced. Damage caused by rinsing is reduced. And, while removing residual moisture in the processing chamber, hydrogen and moisture are removed. The removed sputtering gas is introduced, and the metal oxide is used as a target on the substrate 300. An oxide semiconductor film 330 is formed. To remove residual moisture in the processing chamber, an adsorption type is used. It is preferable to use an empty pump. Examples of adsorption-type vacuum pumps include cryopumps. It is preferable to use an ion pump and a titanium sublimation pump. Also, exhaust hand For example, a turbopump equipped with a cold trap can be used. The deposition chamber, which is evacuated using a cryopump, contains hydrogen atoms, water (H2O), etc. Because compounds containing atoms (more preferably compounds containing carbon atoms) are exhausted. By forming a film in the said deposition chamber, the concentration of impurities contained in the oxide semiconductor film can be reduced. .

[0331] One example of film deposition conditions is a distance of 100 mm between the substrate and the target, a pressure of 0.6 Pa, and direct current. The following conditions apply: a 0.5kW DC power supply and an oxygen atmosphere (oxygen flow rate ratio 100%). Furthermore, using a pulsed DC power supply can reduce particles and ensure a uniform film thickness distribution. It is preferable for this to happen. The thickness of the oxide semiconductor film is preferably 5 nm or more and 30 nm or less. The appropriate thickness of the oxide semiconductor film varies depending on the oxide semiconductor material used. The appropriate thickness can be selected depending on the material.

[0332] Next, the oxide semiconductor film 330 is transformed into island-shaped oxide semiconductors by a second photolithography process. The material is processed into layers. Additionally, a resist mask is used to form island-shaped oxide semiconductor layers. It may also be formed by the inkjet method. Forming the resist mask by the inkjet method increases manufacturing costs. It can be reduced.

[0333] Next, the oxide semiconductor layer is subjected to a first heat treatment. This first heat treatment causes the oxide semiconductor layer Dehydration or dehydrogenation of the body layer can be performed. The temperature of the first heat treatment is 400°C or higher. The temperature should be 750°C or lower, preferably 400°C or higher, and below the strain point of the substrate. Hereinafter, as an example... The substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the oxide semiconductor layer is subjected to a nitrogen atmosphere. After heat treatment at 450°C for 1 hour, the oxide semiconductor was removed without contact with the atmosphere. This prevents water and hydrogen from entering the body layer and obtains the oxide semiconductor layer 331 (see Figure 16(B)).

[0334] Furthermore, when cooling the heat treatment device from the heat treatment temperature, the atmosphere may be switched to oxygen. When the temperature is reduced, switching to an oxygen atmosphere replenishes oxygen in the oxygen-deficient areas of the oxide semiconductor layer. Oxygen deficiency generates carriers, but their elimination significantly reduces the number of carriers. This significantly reduces the carrier concentration, making it possible to obtain an oxide semiconductor layer with an extremely low carrier concentration.

[0335] Furthermore, the heating apparatus is not limited to electric furnaces, but also includes heat conduction or heat radiation from heat-generating elements such as resistance heating elements. The apparatus may include a device that heats the object to be processed by injection. For example, a GRTA apparatus, LR RTA devices such as TA devices can be used. LRTA devices use halogen lamps, etc. Tal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps The light (electromagnetic waves) emitted from lamps such as high-pressure mercury lamps can cause the material being processed to undergo radiation. It is a heating device. A GRTA device is a device that performs heat treatment using high-temperature gas. The body contains noble gases such as argon, or nitrogen, which react with the material being treated through heat treatment. An inert gas is used.

[0336] For example, as a first heat treatment, the base is placed in an inert gas heated to a high temperature of 650°C to 700°C. The board is moved and heated for several minutes, then the substrate is moved and removed from the hot inert gas. GRTA may also be used. Using GRTA allows for high-temperature heat treatment in a short time.

[0337] In the first heat treatment, nitrogen or noble gas such as helium, neon, or argon is used. It is preferable that it does not contain water, hydrogen, etc. Alternatively, nitrogen introduced into the heat treatment device, The purity of noble gases such as helium, neon, and argon is 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., an impurity concentration of 1 ppm or less is preferred) It is preferable that the concentration be 0.1 ppm or less.

[0338] Furthermore, the first heat treatment of the oxide semiconductor layer is performed on the oxide before it is processed into an island-shaped oxide semiconductor layer. This can also be done on the semiconductor film 330. In that case, after the first heat treatment, the heating device is used The substrate is removed, and the photolithography process is performed.

[0339] Heat treatments that produce dehydration and dehydrogenation effects on oxide semiconductor layers are used in oxide semiconductor layer formation After formation, a source electrode layer and a drain electrode layer are stacked on the oxide semiconductor layer, and then the source electrode... This may be done either after forming a protective insulating layer on the layer and the drain electrode layer.

[0340] Furthermore, when forming contact holes in the gate insulating layer 302, the process is carried out in an oxide semiconductor. This can be done before or after the dehydration or dehydrogenation treatment of the membrane 330.

[0341] Note that the etching of oxide semiconductor films here is not limited to wet etching, but also includes dry etching. Etching may be used.

[0342] Etching conditions (etching) can be adjusted according to the material so that the desired processing shape can be etched. Adjust the solution, etching time, temperature, etc. as appropriate.

[0343] Next, a conductive film is formed on the gate insulating layer 302 and the oxide semiconductor layer 331. A conductive film can be formed using sputtering or vacuum deposition. As for the material of the conductive film, aluminum... Elements selected from titanium, chromium, copper, tantalum, titanium, molybdenum, and tungsten. Examples include alloys containing the aforementioned elements, or alloy films combining the aforementioned elements. It can be made. Also, as materials for conductive films, manganese, magnesium, zirconium, and beryllium are used. Materials selected from one or more of um and yttrium may be used. The film may be a single-layer structure or a multilayer structure of two or more layers. For example, a single-layer structure can be: One example is a single-layer structure of an aluminum film containing silicon. Another example is a laminated structure of aluminum A two-layer structure in which a titanium film is stacked on top of a titanium film, a Ti film and an aluminum film stacked on top of the Ti film. Examples include a three-layer structure in which aluminum films are stacked and then a Ti film is deposited on top of them. Titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scan Using a film, alloy film, or nitride film made of one or more elements selected from zinc. It's okay to be there.

[0344] If heat treatment is performed after the conductive film is deposited, the conductive film must have heat resistance to withstand this heat treatment. It is preferable to do so.

[0345] A third photolithography step forms a resist mask on the conductive film, and selectively extracts the residue. After performing ching to form the source electrode layer 315a and drain electrode layer 315b, the resist Remove the mask (see Figure 16(C)).

[0346] For exposure during resist mask formation in the third photolithography process, ultraviolet light and KrF light are used. A laser or ArF laser light is used. Below the adjacent source electrode layer on the oxide semiconductor layer 331. The gap width between the end and the lower end of the drain electrode layer determines the channel of the transistor that is later formed. The channel length L is determined. Note that when performing exposure with a channel length L = less than 25 nm, a few nm Extreme ultraviolet light, with wavelengths as short as tens of nanometers. Using this, exposure is performed during the resist mask formation in the third photolithography step. Linear exposure offers high resolution and a large depth of field. Therefore, transistors that were formed later... The channel length L can also be set to 10 nm or more and 1000 nm or less, and the operating speed of the circuit This allows for faster operation and extremely low off-current values, thus also contributing to lower power consumption. It is possible.

[0347] Furthermore, in order to prevent the oxide semiconductor layer 331 from being removed during etching of the conductive film, The materials and etching conditions for the oxide semiconductor film are adjusted as appropriate.

[0348] In this embodiment, as an example, a titanium film is used as the conductive film, and the oxide semiconductor layer 331 and An In-Ga-Zn-O oxide semiconductor layer is used, and ammonia peroxide is used as the etchant. Use water (a mixture of ammonia, water, and hydrogen peroxide).

[0349] In the third photolithography process, a portion of the oxide semiconductor layer 331 is etched. This may result in an oxide semiconductor layer having grooves (recesses). Also, the source electrode layer 315 a. Form a resist mask for forming the drain electrode layer 315b using an inkjet method. This is also acceptable. Manufacturing costs can be reduced by forming the resist mask using an inkjet method.

[0350] Furthermore, an oxide conductive layer is formed between the oxide semiconductor layer and the source electrode layer and drain electrode layer. The metal layers for forming the oxide conductive layer, the source electrode layer, and the drain electrode layer may be: Continuous film deposition is possible. The oxide conductive layer can function as both a source region and a drain region.

[0351] The source region and drain region consist of an oxide conductive layer, an oxide semiconductor layer and a source electrode layer and By placing it between the drain electrode layer, the resistance of the source region and the drain region can be reduced. This allows for high-speed operation of transistors.

[0352] Furthermore, in order to reduce the number of photomasks and processes used in the photolithography process, The resist mask formed by a multi-tone mask, which is an exposure mask where the light has multiple intensities, is formed by the light. The etching process may be performed using a mask. A resist mask formed using a multi-gradation mask. The ske will have a shape with multiple film thicknesses, and its shape can be further deformed by etching. Because it can do this, it can be used in multiple etching processes that process different patterns. Therefore, a single multi-tone mask can accommodate at least two different patterns. This allows for the formation of a resist mask. Therefore, the number of exposure masks can be reduced. Furthermore, the corresponding photolithography process can also be reduced, thus simplifying the overall process.

[0353] Next, plasma treatment is performed using a gas such as N2O, N2, or Ar. This process removes adsorbed water and other substances adhering to the surface of the exposed oxide semiconductor layer. Plasma treatment may be performed using a mixed gas of oxygen and argon.

[0354] After plasma treatment, a protective insulation is applied to a portion of the oxide semiconductor layer without contact with the atmosphere. An oxide insulating layer 316, which forms the edge film, is created.

[0355] The oxide insulating layer 316 has a thickness of at least 1 nm, and is oxidized by sputtering or other methods. The material insulating layer 316 is formed using an appropriate method that prevents the incorporation of impurities such as water and hydrogen. Yes, it is possible. When hydrogen is present in the oxide insulating layer 316, the hydrogen penetrates into the oxide semiconductor layer. Alternatively, the abstraction of oxygen from the oxide semiconductor layer by hydrogen occurs, causing backcharging of the oxide semiconductor layer. Nell may become less resistant (N-type), potentially leading to the formation of parasitic channels. Therefore Therefore, hydrogen is used in the film formation method to ensure that the oxide insulating layer 316 is a film that contains as little hydrogen as possible. It is important that they are not there.

[0356] In this embodiment, as an example, a silicon oxide film with a thickness of 200 nm is used as the oxide insulating layer 316. The film is deposited using the sputtering method. The substrate temperature during film deposition is set to be between room temperature and 300°C. This is sufficient, and in this embodiment, it is set to 100°C. Film deposition by sputtering of silicon oxide film This is done under a noble gas (typically argon) atmosphere, an oxygen atmosphere, or a noble gas (typically argon) atmosphere. This can be carried out under an atmosphere of argone and oxygen. Furthermore, silicon dioxide can be used as a target. A target or a silicon target can be used. For example, using a silicon target A silicon oxide film can be formed by sputtering under an oxygen and nitrogen atmosphere. Oxides that form in contact with an oxide semiconductor layer that has become oxygen-deficient, resulting in low resistance, i.e., N-type oxides. The insulating layer 316 contains water, hydrogen ions, and OH - It does not contain impurities such as these, and these are not affected by external invasion. An inorganic insulating film that blocks entry is used, typically a silicon oxide film, or silicon oxidnitridation film. Cone film, aluminum oxide film, or aluminum oxide nitride film are used.

[0357] In this case, the oxide insulating layer 316 is formed while removing residual moisture in the processing chamber. Preferably, the oxide semiconductor layer 331 and the oxide insulating layer 316 contain hydrogen, hydroxyl groups, or water. This is to prevent them from getting sick.

[0358] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is exhausted with, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water), By forming the film in the said film deposition chamber, the concentration of impurities contained in the oxide insulating layer 316 can be reduced. ru.

[0359] The sputtering gas used when forming the oxide insulating layer 316 is hydrogen, water, and hydroxyl High-purity product in which impurities such as ions or hydrides have been removed to a concentration of approximately ppm or ppb. It is preferable to use gas.

[0360] Next, a second heat treatment (preferably 200°C) is performed under an inert gas atmosphere or an oxygen gas atmosphere. Perform the procedure at temperatures between 250°C and 400°C (for example, between 250°C and 350°C). For example, under a nitrogen atmosphere. A second heat treatment is performed at 250°C for 1 hour. After the second heat treatment, the oxide semiconductor layer It is heated while in contact with the oxide insulating layer 316.

[0361] By going through the above steps, the oxide semiconductor film after deposition undergoes dehydration or dehydrogenation. After performing a heat treatment to reduce resistance, a portion of the oxide semiconductor film is selectively subjected to an oxygen-rich state. This is the state. As a result, the channel formation region 313 that overlaps with the gate electrode layer 311 becomes type I. , a low-resistance source region 314a overlapping the source electrode layer 315a, and the drain electrode layer 315b The low-resistance drain region 314b that overlaps with it is formed in a self-aligned manner. Zista 310 is formed (see Figure 16(D)).

[0362] Furthermore, the oxide semiconductor layer superimposed on the drain electrode layer 315b (and source electrode layer 315a) To form a low-resistance drain region 314b (or low-resistance source region 314a) in this region. This can improve the reliability of transistors. Specifically, low-resistance drain By forming region 314b, the low-resistance drain region 314 is separated from the drain electrode layer 315b. b. The structure is designed so that the conductivity can be changed in steps in the channel formation region 313. Therefore, the wiring that supplies the high power supply potential VDD to the drain electrode layer 315b When connected and operated, a high electric field is present between the gate electrode layer 311 and the drain electrode layer 315b. Even when applied, the low-resistance drain region acts as a buffer, preventing a localized high electric field from being applied. This allows for a configuration that improves the dielectric strength of the inverter.

[0363] A protective insulating layer may be formed on the oxide insulating layer 316. For example, as a protective insulating layer A silicon nitride film is formed using the RF sputtering method. The RF sputtering method is suitable for mass production. Because of this, it is a preferred method for forming a protective insulating layer. The protective insulating layer is resistant to moisture and hydrogen ions. , OH - It does not contain impurities such as these, and is an inorganic insulator that blocks them from entering from the outside. Using films, silicon nitride film, aluminum nitride film, silicon nitride oxide film, aluminum nitride oxide film A nium film or the like is used. In this embodiment, the protective insulating layer 303 is nitrided as the protective insulating layer. It is formed using a silicon film (see Figure 16(E)).

[0364] In this embodiment, the substrate 300, which has an oxide insulating layer 316 formed on it, is heated at 100°C to 400°C. The gas is heated to a certain temperature, hydrogen and moisture are removed, and a high-purity sputtering gas containing nitrogen is introduced. Using a silicon semiconductor target, a silicon nitride film is formed as the protective insulating layer 303. A film is formed. In this case as well, similar to the oxide insulating layer 316, residual moisture in the processing chamber is removed. It is preferable to form a protective insulating layer 303 while doing so.

[0365] Alternatively, a planarizing insulating layer may be provided on the protective insulating layer 303 for planarization.

[0366] Furthermore, oxidation occurs on the protective insulating layer 303 (or on the planar insulating layer if a planar insulating layer is provided). A conductive layer may be provided that overlaps with the semiconductor layer. The conductive layer has a potential equal to the gate of transistor 310. It may be the same as or different from the electrode layer 311, and functions as a second gate electrode layer. It is also possible to make it so. Furthermore, the potential of the conductive layer may be fixed at GND, 0V. .

[0367] The conductive layer allows for control over the electrical characteristics of transistor 310.

[0368] As described above, in a transistor using an oxide semiconductor layer, stable electrical characteristics are obtained. We can provide highly reliable transistors.

[0369] This embodiment can be appropriately combined with or substituted with other embodiments.

[0370] (Embodiment 8) This embodiment is applicable to a transistor constituting a DC conversion circuit, which is one aspect of the present invention. Let's explain an example of a transistor.

[0371] An example of the transistor and the method for manufacturing the transistor according to this embodiment is shown in Figure 17. explain.

[0372] Figures 17(A) to (D) show an example of a method for fabricating a transistor. The transistor shown is called a channel-protected type (also called a channel-stopped type). It is a type of Tom-gate structure, also known as an inverse staggered transistor.

[0373] Furthermore, in this embodiment, transistor 360 is a single-gate transistor. The transistor is a multi-gate transistor having multiple channel formation regions. That's fine.

[0374] The following describes the process of fabricating a transistor 360 on substrate 320 using Figures 17(A) to (D). Let me explain the process.

[0375] First, a conductive film is formed on a substrate 320 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 361 is formed by the process. The resist mask is made by the inkjet method. It may be formed. If the resist mask is formed by the inkjet method, a photomask is used. Therefore, manufacturing costs can be reduced.

[0376] Furthermore, the gate electrode layer 361 is made of molybdenum, titanium, chromium, tantalum, tungsten, Metal materials such as aluminum, copper, neodymium, scandium, or compounds mainly composed of these materials It can be formed using gold material, either as a single layer or in layers.

[0377] Next, a gate insulating layer 322 is formed on the gate electrode layer 361.

[0378] Here, by removing impurities, the oxide semiconductor is converted to type I or substantially converted to type I (high Purified oxide semiconductors are extremely sensitive to interface states and interface charges, therefore, The interface with the insulating layer is important. Therefore, the gate in contact with the highly purified oxide semiconductor layer The insulating layer (GI) requires high quality.

[0379] For example, high-density plasma CVD using μ-wave (2.45 GHz) produces dense materials with high dielectric strength. It is preferable because it can form a high-quality insulating film. A highly purified oxide semiconductor layer and a high-quality gel By ensuring close contact with the insulating layer, the interface state can be reduced, resulting in improved interface properties. This is because it can do so. The high-density plasma device used here is 1 × 10 11 / cm 3 A device capable of achieving the above plasma density can be used.

[0380] For example, by applying microwave power of 3kW to 6kW to generate plasma, the insulating film is formed The film is made. Monosilane gas (SiH4) and nitrous oxide (N2) are used as material gases in the chamber. By introducing O and a noble gas, a high-density plasma is generated under a pressure of 10 Pa to 30 Pa. An insulating film is formed on a substrate having an insulating surface such as a slab. Then, monosilane gas is supplied. The process is stopped, and nitrous oxide (N2O) and a noble gas are introduced onto the insulating film surface without exposure to the atmosphere. A rasma treatment may be performed. At a minimum, nitrous oxide (N2O) and a noble gas may be introduced for insulation. The plasma treatment performed on the film surface is carried out after the deposition of the insulating film. The flow rate ratio of nosilane gas (SiH4) to nitrous oxide (N2O) is between 1:10 and 1:20. The range is set to 0. Furthermore, the noble gases introduced into the chamber are helium, argon, and chlorite. Lipton, xenon, etc. can be used, but argon is used because it is the cheapest. This is preferable.

[0381] Of course, if it can form a good insulating film as the gate insulating layer 322, sputtering Other film deposition methods such as the ring method and plasma CVD can be applied. Furthermore, after film deposition... This is an insulating film in which the film quality of the gate insulating film and the interface characteristics with the oxide semiconductor are modified by heat treatment. That's fine. In any case, it goes without saying that the film quality as a gate insulating film must be good. Any material that can reduce the interface state density with the oxide semiconductor and form a good interface is acceptable.

[0382] Furthermore, 85℃, 2×10 6 V / cm, 12-hour gate bias thermal stress test (B In the T test, if impurities are added to the oxide semiconductor, the impurities and the oxide semiconductor... The bonds with the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), and The resulting uncoupled hands induce a drift in the threshold voltage (Vth). Furthermore, the transistor used in a DC conversion circuit according to one aspect of the present invention is made of an oxide semiconductor. By removing impurities, especially hydrogen and water, as much as possible, the interfacial properties with the gate insulating layer are improved as described above. This makes it possible to obtain transistors that are stable even under BT testing. .

[0383] Furthermore, the gate insulating layer 322 includes a silicon oxide layer, a silicon nitride layer, and a silicon oxide nitride layer. Forming a silicon oxide layer, silicon nitride layer, or aluminum oxide layer as a single layer or in a laminated manner. It is possible.

[0384] Furthermore, the gate insulating layer 322 can be, for example, HfO x You can also use gates. HfO x By using methods such as the oxide semiconductor layer, the gate electrode can be accessed from the oxide semiconductor layer side. This can reduce the leakage current flowing toward the target.

[0385] Furthermore, the gate insulating layer 322 has a structure in which a silicon oxide layer and a silicon nitride layer are laminated. It is also possible to do so. In this embodiment, as an example, high density is achieved with a pressure of 30 Pa and microwave power of 6 kW. A silicon oxiditride layer with a thickness of 100 nm is formed by a plasma CVD method. The flow rate ratio of monosilane gas (SiH4) to nitrous oxide (N2O) introduced into the chamber is: The range should be between 1:10 and 1:200.

[0386] Next, an oxide semiconductor film with a thickness of 2 nm to 200 nm is formed on the gate insulating layer 322. Then, a second photolithography process is used to process the material into island-shaped oxide semiconductor layers. In this case, as an example, sputtering is performed using an In-Ga-Zn-O metal oxide target. An oxide semiconductor film is deposited using the galvanic process.

[0387] In this case, it is preferable to deposit the oxide semiconductor film while removing residual moisture in the processing chamber. This is to prevent hydrogen, hydroxyl groups, or water from being present in the oxide semiconductor film.

[0388] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Also, as an exhaust means, for example, a turbo pump It may also be equipped with a cold trap. A deposition chamber evacuated using a cryopump. For example, hydrogen atoms and compounds containing hydrogen atoms (such as water) are exhausted, By forming a film in this deposition chamber, the concentration of impurities in the oxide semiconductor film can be reduced.

[0389] The sputtering gas used when depositing oxide semiconductor films includes hydrogen, water, hydroxyl group, and This is a high-purity gas from which impurities such as hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use [this].

[0390] Next, the oxide semiconductor layer is subjected to a first heat treatment. The temperature of the first heat treatment is 400°C or higher. The temperature should be 750°C or lower, preferably 400°C or higher, and below the strain point of the substrate. Here, the heat treatment equipment The substrate is introduced into an electric furnace, one of the furnaces, and the oxide semiconductor layer is subjected to a nitrogen atmosphere at 450°C. After heating for 1 hour, water is added to the oxide semiconductor layer without contact with the atmosphere. This prevents the inclusion of hydrogen and obtains the oxide semiconductor layer 332 (see Figure 17(A)).

[0391] Next, plasma treatment is performed using a gas such as N2O, N2, or Ar. This process removes adsorbed water and other substances adhering to the surface of the exposed oxide semiconductor layer. Plasma treatment may be performed using a mixed gas of oxygen and argon.

[0392] Next, an oxide insulating layer is formed on the gate insulating layer 322 and the oxide semiconductor layer 332. A third photolithography step forms a resist mask, and selective etching is performed. After forming the oxide insulating layer 366, the resist mask is removed.

[0393] In this embodiment, as an example of the oxide insulating layer 366, a silicon oxide film with a thickness of 200 nm is spat The film is deposited using the dermatization method. The substrate temperature during film deposition should be between room temperature and 300°C. In this embodiment, the temperature is set to 100°C. The deposition of silicon oxide films by sputtering is rare. Under a gaseous atmosphere (typically argon), under an oxygen atmosphere, or under a noble gas atmosphere (typically argon) ) and can be carried out under an oxygen atmosphere. Also, silicon dioxide can be used as a target. A silicon target or a stencil can be used. For example, using a silicon target, oxygen Furthermore, a silicon oxide film can be formed by sputtering under a nitrogen atmosphere. The oxide insulating layer 366, formed in contact with the low-resistance oxide semiconductor layer, is resistant to moisture and hydrogen ions. Hmm, OH - It does not contain impurities such as these, and it blocks them from entering from the outside. Using a border film, typically silicon oxide film, silicon oxide nitride film, aluminum oxide film, This uses aluminum oxide nitride film, etc.

[0394] In this case, the oxide insulating layer 366 is formed while removing residual moisture in the processing chamber. Preferably, the oxide semiconductor layer 332 and the oxide insulating layer 366 contain hydrogen, hydroxyl groups, or water. This is to prevent them from getting sick.

[0395] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is exhausted with, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water), By forming the film in the said film deposition chamber, the concentration of impurities contained in the oxide insulating layer 366 can be reduced. ru.

[0396] The sputtering gas used when forming the oxide insulating layer 366 is hydrogen, water, and hydroxyl High-purity product in which impurities such as ions or hydrides have been removed to a concentration of approximately ppm or ppb. It is preferable to use gas.

[0397] Next, a second heat treatment (preferably 200°C) is performed under an inert gas atmosphere or an oxygen gas atmosphere. The temperature may be between 250°C and 400°C, for example between 250°C and 350°C. For example, nitrogen A second heat treatment is performed at 250°C for 1 hour under atmospheric conditions. After the second heat treatment, the oxide A portion of the semiconductor layer (the channel formation region) is heated while in contact with the oxide insulating layer 366.

[0398] This embodiment further provides an oxide insulating layer 366, and a portion of the oxide semiconductor is exposed. The layer 332 is subjected to heat treatment under nitrogen, an inert gas atmosphere, or under reduced pressure. The region of the exposed oxide semiconductor layer 332 that is not covered by the marginal layer 366 contains nitrogen, Heating treatment under an active gas atmosphere or reduced pressure can reduce resistance. For example, The material is then subjected to a heat treatment at 250°C for 1 hour under a nitrogen atmosphere.

[0399] Heat treatment of an oxide semiconductor layer 332 provided with an oxide insulating layer 366 under a nitrogen atmosphere As a result, the exposed region of the oxide semiconductor layer 332 has reduced resistance, and regions with different resistances (Figure 17) In B), the oxide semiconductor layer 362 has the shaded region and the white region.

[0400] Next, conductive material is applied to the gate insulating layer 322, the oxide semiconductor layer 362, and the oxide insulating layer 366. After the film is formed, a resist mask is formed by a fourth photolithography step, selectively After etching is performed to form the source electrode layer 365a and the drain electrode layer 365b, Remove the dyst mask (see Figure 17(C)).

[0401] The materials for the source electrode layer 365a and the drain electrode layer 365b are aluminum and chromium. , elements selected from copper, tantalum, titanium, molybdenum, tungsten, or the elements mentioned above Examples include alloys composed of the aforementioned elements, or alloy films combining the elements mentioned above. The film may have a single-layer structure or a laminated structure of two or more layers.

[0402] By going through the above steps, the oxide semiconductor film after deposition undergoes dehydration or dehydrogenation. After performing a heat treatment to reduce resistance, a portion of the oxide semiconductor film is selectively subjected to an oxygen-rich state. This is the state. As a result, the channel formation region 363 that overlaps with the gate electrode layer 361 becomes type I. Furthermore, the low-resistance source region 364a overlaps the source electrode layer 365a, and the drain electrode layer 365 The low-resistance drain region 364b overlapping b is formed in a self-aligned manner. A generator 360 is formed.

[0403] Furthermore, the oxide semiconductor layer superimposed on the drain electrode layer 365b (and source electrode layer 365a) To form a low-resistance drain region 364b (or low-resistance source region 364a) in this configuration. This can improve the reliability of transistors. Specifically, low-resistance drain By forming region 364b, the low-resistance drain region 364b is separated from the drain electrode layer. In the flannel-forming region 363, a structure can be created that allows for a stepwise change in conductivity. Therefore, it is connected to the wiring that supplies the high power potential VDD to the drain electrode layer 365b. When operating, a high electric field is applied between the gate electrode layer 361 and the drain electrode layer 365b. Even if this occurs, the low-resistance drain region acts as a buffer, preventing a localized high electric field from being applied to the transistor. This allows for a configuration with improved dielectric strength.

[0404] Source electrode layer 365a, drain electrode layer 365b, and protective insulating layer 3 on top of oxide insulating layer 366 Form 23. In this embodiment, the protective insulating layer 323 is formed using a silicon nitride film. (See Figure 17(D)).

[0405] Furthermore, on top of the source electrode layer 365a, drain electrode layer 365b, and oxide insulating layer 366, An oxide insulating layer may be formed, and a protective insulating layer 323 may be laminated on the oxide insulating layer.

[0406] As described above, in a transistor using an oxide semiconductor layer, stable electrical characteristics are obtained. We can provide highly reliable transistors.

[0407] Furthermore, this embodiment can be implemented in appropriate combination with other embodiments.

[0408] (Embodiment 9) In this embodiment, it is applicable to the transistors constituting a DC conversion circuit, which is one aspect of the present invention. Let's describe an example of a capable transistor.

[0409] An example of the transistor and method for fabricating the transistor according to this embodiment is shown in Figure 18. Let me explain. Figure 18 is a cross-sectional view showing the method for fabricating the transistor according to this embodiment.

[0410] Furthermore, in this embodiment, transistor 350 is a single-gate transistor. The transistor is a multi-gate transistor having multiple channel formation regions. That's fine.

[0411] The following describes the process of fabricating a transistor 350 on substrate 340 using Figures 18(A) to (D). Let me explain the process.

[0412] First, a conductive film is formed on a substrate 340 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 351 is formed by the process. In this embodiment, the gate electrode layer 351 is formed To achieve this, a tungsten film with a thickness of 150 nm was used as the conductive film, employing the sputtering method. To form.

[0413] Next, a gate insulating layer 342 is formed on the gate electrode layer 351.

[0414] Here, by removing impurities, the oxide semiconductor is converted to type I or substantially converted to type I (high Purified oxide semiconductors are extremely sensitive to interface states and interface charges, therefore, The interface with the insulating layer is important. Therefore, the gate in contact with the highly purified oxide semiconductor layer The insulating layer (GI) requires high quality.

[0415] For example, high-density plasma CVD using μ-wave (2.45 GHz) produces dense materials with high dielectric strength. It is preferable because it can form a high-quality insulating film. A highly purified oxide semiconductor layer and a high-quality gel By ensuring close contact with the insulating layer, the interface state can be reduced, resulting in improved interface properties. This is because it can do so. The high-density plasma device used here is 1 × 10 11 / cm 3 A device capable of achieving the above plasma density can be used.

[0416] For example, by applying microwave power of 3kW to 6kW to generate plasma, the insulating film is formed The film is made. Monosilane gas (SiH4) and nitrous oxide (N2) are used as material gases in the chamber. By introducing O and a noble gas, a high-density plasma is generated under a pressure of 10 Pa to 30 Pa. An insulating film is formed on a substrate having an insulating surface such as a slab. Then, monosilane gas is supplied. The process is stopped, and nitrous oxide (N2O) and a noble gas are introduced onto the insulating film surface without exposure to the atmosphere. A rasma treatment may be performed. At a minimum, nitrous oxide (N2O) and a noble gas may be introduced for insulation. The plasma treatment performed on the film surface is carried out after the deposition of the insulating film. The flow rate ratio of nosilane gas (SiH4) to nitrous oxide (N2O) is between 1:10 and 1:20. The range is set to 0. Furthermore, the noble gases introduced into the chamber are helium, argon, and chlorite. Lipton, xenon, etc. can be used, but argon is used because it is the cheapest. This is preferable.

[0417] Of course, if it can form a good insulating film as the gate insulating layer 342, sputtering Other film deposition methods such as the ring method and plasma CVD can be applied. Furthermore, after film deposition... This is an insulating film in which the film quality of the gate insulating film and the interface characteristics with the oxide semiconductor are modified by heat treatment. That's fine. In any case, it goes without saying that the film quality as a gate insulating film must be good. Any material that can reduce the interface state density with the oxide semiconductor and form a good interface is acceptable.

[0418] Furthermore, 85℃, 2×10 6 V / cm, 12-hour gate bias thermal stress test (B In the T test, if impurities are added to the oxide semiconductor, the impurities and the oxide semiconductor... The bonds with the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), and The resulting uncoupled hands induce a drift in the threshold voltage (Vth). Furthermore, the transistor used in a DC conversion circuit according to one aspect of the present invention is made of an oxide semiconductor. By removing impurities, especially hydrogen and water, as much as possible, the interfacial properties with the gate insulating layer are improved as described above. This makes it possible to obtain transistors that are stable even under BT testing. .

[0419] Furthermore, the gate insulating layer 342 includes a silicon oxide layer, a silicon nitride layer, and a silicon oxide nitride layer. n layer (SiO x N y Also called, however x>y>0), silicon nitride (SiN) x O y Also called, however x>y>0), or formed by forming a single or laminated layer of aluminum oxide. It is possible.

[0420] Furthermore, the gate insulating layer 342 can be, for example, HfO x You can also use gates. HfO x By using methods such as the oxide semiconductor layer, the gate electrode can be accessed from the oxide semiconductor layer side. This can reduce the leakage current flowing toward the target.

[0421] Furthermore, the gate insulating layer 342 has a structure in which a silicon oxide layer and a silicon nitride layer are laminated. It is also possible to do so. In this embodiment, as an example, high density is achieved with a pressure of 30 Pa and microwave power of 6 kW. A silicon oxiditride layer with a thickness of 100 nm is formed by a plasma CVD method. The flow rate ratio of monosilane gas (SiH4) to nitrous oxide (N2O) introduced into the chamber is: The range should be between 1:10 and 1:200.

[0422] Next, a conductive film is formed on the gate insulating layer 342, and then a conductive film is formed by a second photolithography process. A resist mask is formed on the film, and selective etching is performed to create the source electrode layer 355a. After forming the drain electrode layer 355b, the resist mask is removed (see Figure 18(A)). .

[0423] Next, an oxide semiconductor film 345 is formed (see Figure 18(B)). In this embodiment, an oxide As the semiconductor film 345, an InGa-Zn-O-based metal oxide target is used for sputtering. The film is formed by a photolithography process. The oxide semiconductor film 345 is formed by a third photolithography process. It is processed into a crystalline oxide semiconductor layer.

[0424] In this case, the oxide semiconductor film 345 is formed while removing residual moisture in the processing chamber. This is preferable. To ensure that the oxide semiconductor film 345 does not contain hydrogen, hydroxyl groups, or water. It is.

[0425] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is exhausted with, for example, hydrogen atoms and compounds containing hydrogen atoms (such as water), By forming the film in this deposition chamber, the concentration of impurities in the oxide semiconductor film 345 can be reduced. Cut.

[0426] The sputtering gas used when depositing the oxide semiconductor film 345 is hydrogen, water, water High-purity mineral from which impurities such as acid groups or hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use a gas.

[0427] Next, the oxide semiconductor layer is subjected to a first heat treatment. The temperature of the first heat treatment is 400°C or higher. The temperature should be 750°C or lower, preferably 400°C or higher, and below the strain point of the substrate. Here, the heat treatment equipment The substrate is introduced into an electric furnace, one of the furnaces, and the oxide semiconductor layer is subjected to a nitrogen atmosphere at 450°C. After a 1-hour heat treatment, water and water are removed from the oxide semiconductor layer without exposure to the atmosphere. This prevents the inclusion of elemental particles and obtains the oxide semiconductor layer 346 (see Figure 18(C)). The first heat treatment is performed Further dehydration or dehydrogenation occurs.

[0428] Furthermore, as a first heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650°C to 700°C. Move the substrate, heat it for several minutes, then move the substrate out of the heated inert gas. GRTA may be used. Using GRTA allows for high-temperature heat treatment in a short time.

[0429] Furthermore, an oxide insulating layer 356 is formed, which serves as a protective insulating film in contact with the oxide semiconductor layer 346. .

[0430] The oxide insulating layer 356 has a thickness of at least 1 nm, and is formed by an oxidation process such as sputtering. The material insulating layer 356 is formed using an appropriate method that prevents the incorporation of impurities such as water and hydrogen. Yes, it is possible. When hydrogen is present in the oxide insulating layer 356, the hydrogen penetrates into the oxide semiconductor layer. Alternatively, the abstraction of oxygen from the oxide semiconductor layer by hydrogen occurs, causing backcharging of the oxide semiconductor layer. Nell may become less resistant (N-type), potentially leading to the formation of parasitic channels. Therefore Therefore, hydrogen is used in the film formation method to ensure that the oxide insulating layer 356 is a film that contains as little hydrogen as possible. It is important that they are not there.

[0431] In this embodiment, a silicon oxide film with a thickness of 200 nm is sputtered as the oxide insulating layer 356. The film is deposited using the densitometry method. The substrate temperature during film deposition should be between room temperature and 300°C. In this embodiment, the temperature is set to 100°C. The silicon oxide film is deposited by sputtering using a rare gas ( Typically under an argon atmosphere, an oxygen atmosphere, or a noble gas (typically argon) and It can be carried out under an oxygen atmosphere. Furthermore, silicon oxide targets can be used as targets. A silicon target can be used. For example, using a silicon target, oxygen and A silicon oxide film can be formed by sputtering under a nitrogen atmosphere. An oxide insulating layer 356 is formed in contact with the oxide semiconductor layer, which has been modified to have low resistance, i.e., N-type oxide semiconductor layer. It consists of water, hydrogen ions, and OH -It does not contain impurities such as these, and prevents them from entering from the outside. Using an inorganic insulating film to block, typically silicon oxide film, silicon oxide nitride film, and oxide An aluminum film or an aluminum oxide-nitride film is used.

[0432] In this case, the oxide insulating layer 356 is formed while removing residual moisture in the processing chamber. Preferably, the oxide semiconductor layer 346 and the oxide insulating layer 356 contain hydrogen, hydroxyl groups, or water. This is to prevent them from getting sick.

[0433] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is designed to exhaust gases such as hydrogen atoms and compounds containing hydrogen atoms, such as water (H2O). Therefore, the concentration of impurities in the oxide insulating layer 356 deposited in the deposition chamber can be reduced.

[0434] The sputtering gas used when forming the oxide insulating layer 356 is hydrogen, water, and hydroxyl High-purity product in which impurities such as ions or hydrides have been removed to a concentration of approximately ppm or ppb. It is preferable to use gas.

[0435] Next, a second heat treatment (preferably 200°C) is performed under an inert gas atmosphere or an oxygen gas atmosphere. Perform the procedure at temperatures between 250°C and 400°C (for example, between 250°C and 350°C). For example, under a nitrogen atmosphere. A second heat treatment is performed at 250°C for 1 hour. After the second heat treatment, the oxide semiconductor layer A portion of it (the channel-forming region) is heated while in contact with the oxide insulating layer 356.

[0436] As described above, by performing a heat treatment for dehydration or dehydrogenation, the oxide semiconductor layer After reducing its resistance by creating an oxygen-deficient state, i.e., converting it to an N-type state, it is then oxidized so that it comes into contact with the oxide semiconductor layer. By forming a material insulating layer, the oxide semiconductor layer is made into an oxygen-rich state. As a result, high resistance A type I oxide semiconductor layer 352 is formed. The transistor 350 is formed through the above process. It will be done.

[0437] Furthermore, a protective insulating layer may be formed on the oxide insulating layer 356. For example, RF Spa A silicon nitride film is formed using the taring method. In this embodiment, a protective insulating layer is used. The marginal layer 343 is formed using a silicon nitride film (see Figure 18(D)).

[0438] Alternatively, a planarizing insulating layer may be provided on the protective insulating layer 343 for planarization.

[0439] As described above, in transistors using oxide semiconductor layers, stable electrical characteristics and reliability We can provide highly reliable transistors.

[0440] This embodiment can be appropriately combined with or substituted with other embodiments.

[0441] (Embodiment 10) This embodiment is applicable to a transistor constituting a DC conversion circuit, which is one aspect of the present invention. Let's explain an example of a transistor.

[0442] In this embodiment, Figure 19 shows an example where part of the transistor manufacturing process differs from that of Embodiment 7. As shown, Figure 19 is the same as Figure 16 except that the process is slightly different, so the same parts are the same. Symbols are used, and detailed explanations of the same section are omitted.

[0443] First, a gate electrode layer 381 is formed on the substrate 370, and a first gate insulating layer 372a and a second gate insulating layer 372a are formed. The gate insulating layer 372b is laminated. In this embodiment, the gate insulating layer has a two-layer structure. A nitride insulating layer is provided on the first gate insulating layer 372a, and an oxide insulating layer is provided on the second gate insulating layer 372b. Use the marginal layer.

[0444] Examples of oxide insulating layers include silicon oxide layers, silicon oxide nitride layers, or aluminum oxide layers. A um layer or an aluminum oxide nitride layer can be used. In addition, a nitride insulating layer and For example, a silicon nitride layer, a silicon oxide nitride layer, an aluminum nitride layer, or an aluminum oxide nitride layer. A titanium layer or similar material can be used.

[0445] Furthermore, the first gate insulating layer 372a or the second gate insulating layer 372b may be, for example, H fO x The following can also be used: First gate insulating layer 372a or second gate insulating layer 372b is HfO x By using methods such as those described above, the direction from the oxide semiconductor layer to the gate electrode is This can reduce the leakage current that flows in the circuit.

[0446] In this embodiment, the silicon nitride layer and the silicon oxide layer are laminated from the gate electrode layer 381 side. The structure is as follows. The first gate insulating layer 372a is made with a film thickness of 50n by sputtering. A silicon nitride layer (SiN) with a thickness of m or more and 200 nm or less (50 nm in this embodiment). y (y> 0)) is formed, and a film is formed on the first gate insulating layer 372a as the second gate insulating layer 372b. A silicon oxide layer (SiO) with a thickness of 5 nm to 300 nm (100 nm in this embodiment) x Layers (x>0) are stacked to form a gate insulating layer with a thickness of 150 nm.

[0447] Next, an oxide semiconductor film is formed, and the oxide semiconductor film is then processed using a photolithography process to create islands. The material is processed into an oxide semiconductor layer. In this embodiment, as an example, an In-Ga-Zn-O system is used. An oxide semiconductor film is deposited using a metal oxide target by sputtering.

[0448] In this case, it is preferable to deposit the oxide semiconductor film while removing residual moisture in the processing chamber. This is to prevent hydrogen, hydroxyl groups, or water from being present in the oxide semiconductor film.

[0449] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is designed to exhaust gases such as hydrogen atoms and compounds containing hydrogen atoms, such as water (H2O). Therefore, the concentration of impurities in the oxide semiconductor film deposited in the deposition chamber can be reduced.

[0450] The sputtering gas used when depositing oxide semiconductor films includes hydrogen, water, hydroxyl group, and This is a high-purity gas from which impurities such as hydrides have been removed to concentrations of approximately ppm or ppb. It is preferable to use [this].

[0451] Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The heat treatment temperature shall be between 400°C and 750°C, preferably between 425°C and 750°C. Furthermore, if the temperature is 425°C or higher, the heat treatment time can be 1 hour or less, but if it is below 425°C... If so, the heat treatment time shall be longer than 1 hour. Here, one of the heat treatment apparatuses The substrate is introduced into an electric furnace, and the oxide semiconductor layer is heat-treated under a nitrogen atmosphere. After this process, the oxide semiconductor layer is prevented from being exposed to the atmosphere and from being contaminated with water or hydrogen. In the same furnace, high-purity oxygen gas, high-purity N2O gas, or ultra-dry air (with a dew point of -40°C or lower) is used. Cooling is performed by introducing a temperature below (preferably below -60°C). Water is added to oxygen gas or N2O gas. It is preferable that it does not contain hydrogen or other similar substances. Alternatively, oxygen gas or N2 introduced into the heat treatment apparatus may be used. The purity of O gas should be 6N (99.9999%) or higher, preferably 7N (99.99999%). ) or more (i.e., the impurity concentration in oxygen gas or N2O gas is 1 ppm or less, preferably 0 ppm. It is preferable to keep the concentration at 1 ppm or less.

[0452] Furthermore, the heat treatment apparatus is not limited to electric furnaces; for example, GRTA apparatus, LRTA apparatus, etc. A TA device can be used. The LRTA device uses halogen lamps and metal halide lamps. Xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps This device heats an object to be processed by radiating light (electromagnetic waves) from lamps such as lamps. Furthermore, heat conduction or heat from heat-generating elements such as LRTA devices, lamps, and resistive heating elements can also contribute to heat loss. A device that heats the object to be processed by radiation may also be used. GRTA uses high-temperature gas. This method involves heat treatment. The gas used is a noble gas such as argon, or a gas such as nitrogen. An inert gas that does not react with the material being treated during heat treatment is used. Using the RTA method, 60 Heat treatment at 0°C to 750°C for several minutes may also be performed.

[0453] Furthermore, after the first heat treatment in which dehydration or dehydrogenation is performed, it is preferable to heat it at 200°C to 400°C. Alternatively, heat treatment at a temperature of 200°C to 300°C under an oxygen gas or N2O gas atmosphere. You may go.

[0454] Furthermore, the first heat treatment of the oxide semiconductor layer is performed on the oxide before it is processed into an island-shaped oxide semiconductor layer. This can also be done on semiconductor films. In that case, after the first heat treatment, the substrate is removed from the heating device. The material is removed and the photolithography process is performed.

[0455] By going through the above process, the entire oxide semiconductor layer is made into an oxygen-rich state, The material is converted to type I, thus obtaining an oxide semiconductor layer 382 that is entirely type I.

[0456] Next, a conductive film is formed on the oxide semiconductor layer 382, ​​and then resist is removed by a photolithography process. A mask is formed, and selective etching is performed on the source electrode layer 385a and the drain electrode layer. 385b is formed, and an oxide insulating layer 386 is formed by sputtering.

[0457] In this case, the oxide insulating layer 386 is formed while removing residual moisture in the processing chamber. Preferably, the oxide semiconductor layer 382 and the oxide insulating layer 386 contain hydrogen, hydroxyl groups, or water. This is to prevent them from getting sick.

[0458] To remove residual moisture from the processing chamber, it is preferable to use an adsorption-type vacuum pump. Examples of adsorption-type vacuum pumps include cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use an exhaust pump. Furthermore, as an exhaust means, for example, a turbo pump. It may also be equipped with a cold trap. Film deposition using a cryopump. The room is designed to exhaust gases such as hydrogen atoms and compounds containing hydrogen atoms, such as water (H2O). Therefore, the concentration of impurities in the oxide insulating layer 386 deposited in the said deposition chamber can be reduced.

[0459] The sputtering gas used when forming the oxide insulating layer 386 is hydrogen, water, hydroxyl group or water High-purity gas is used, from which impurities such as nitrates have been removed to concentrations of approximately ppm or ppb. It is preferable that they be present.

[0460] By following the above steps, transistor 380 can be formed.

[0461] Furthermore, in order to reduce variations in the electrical characteristics of transistors, under an inert gas atmosphere, or Heat treatment (preferably between 150°C and 350°C) may be performed under a nitrogen gas atmosphere. For example, a heat treatment is performed at 250°C for 1 hour under a nitrogen atmosphere.

[0462] Furthermore, heat treatment is performed in air at temperatures between 100°C and 200°C for between 1 hour and 30 hours. This may also be done. In this embodiment, the heat treatment is performed at 150°C for 10 hours. This heat treatment is constant The heat treatment may be carried out by maintaining the temperature at the heating point, or by heating from room temperature to a temperature between 100°C and 200°C. A heat treatment method that involves repeatedly raising the temperature to a thermal temperature and then lowering it back to room temperature multiple times is also acceptable. By performing the heat treatment under reduced pressure, the heating time can be shortened. Hydrogen is incorporated from the oxide semiconductor layer into the oxide insulating layer, resulting in a normally-off transistor. This allows us to obtain a transistor, thereby improving its reliability.

[0463] A protective insulating layer 373 is formed on the oxide insulating layer 386. In this embodiment, the protective insulating layer 3 As part of step 73, a silicon nitride film with a thickness of 100 nm is formed using the sputtering method.

[0464] The protective insulating layer 373 and the first gate insulating layer 372a, which are made of a nitride insulating layer, are resistant to moisture and water. It does not contain impurities such as elements, hydrides, and hydroxides, and blocks their entry from the outside. It has a locking effect.

[0465] Therefore, in the manufacturing process after the formation of the protective insulating layer 373, impurities such as moisture from the outside This can prevent intrusion and improve the long-term reliability of the device.

[0466] Furthermore, between the protective insulating layer 373, which is made of a nitride insulating layer, and the first gate insulating layer 372a, A portion of the insulating layer is removed, and the protective insulating layer 373 and the first gate insulating layer 372a are in contact. It may also be a structure that does this.

[0467] Therefore, the ultimate goal is to remove impurities such as water, hydrogen, hydrides, and hydroxides from the oxide semiconductor layer. To reduce the amount of impurities and prevent their inclusion, thereby maintaining a low impurity concentration in the oxide semiconductor layer. It is possible.

[0468] Alternatively, a planarizing insulating layer may be provided on the protective insulating layer 373 for planarization.

[0469] Furthermore, a conductive layer may be provided on the protective insulating layer 373, overlapping with the oxide semiconductor layer. The potential may be the same as or different from that of the gate electrode layer 381 of transistor 380. It can also function as a second gate electrode layer. Furthermore, the potential of the conductive layer can be GND, 0 A fixed potential of V is also acceptable.

[0470] The conductive layer allows for control over the electrical characteristics of transistor 380.

[0471] As described above, in a transistor using an oxide semiconductor layer, stable electrical characteristics are obtained. We can provide highly reliable transistors.

[0472] This embodiment can be appropriately combined with or substituted with other embodiments.

[0473] (Embodiment 11) A DC conversion circuit according to one aspect of the present invention can be used in combination with various other energy storage devices to form a power supply circuit. This can be achieved. In this embodiment, an electric current is converted using a DC conversion circuit which is one aspect of the present invention. Let's explain the source circuit.

[0474] An example of the configuration of the power supply circuit of this embodiment will be explained with reference to Figure 20. This is a diagram showing an example of the configuration of a power supply circuit in a given form.

[0475] The power supply circuit shown in Figure 20 includes an energy storage device 601 and a DC conversion circuit 602.

[0476] The energy storage device 601 has the function of supplying power. The energy storage device 601 is, for example, a photoelectric device. Conversion devices, lithium-ion secondary batteries, lithium-ion capacitors, electric double-layer capacitors One or more of the following can be used: a redox capacitor, etc. By using lithium-ion secondary batteries and lithium-ion capacitors in combination, high-speed charging and discharging can be achieved. It can be made into an energy storage device that is capable of generating electricity and supplying power for a long period of time. Furthermore, the energy storage device 601 is not limited to lithium-ion secondary batteries, but may also include other alkali metals. A secondary battery using ions or alkaline earth metal ions as mobile ions may also be used. Furthermore, not limited to lithium-ion capacitors, other alkaline capacitors may be used as the energy storage device 601. A capacitor is used that employs metal ions or alkaline earth metal ions as movable ions. It's okay to be there.

[0477] The DC conversion circuit 602 is electrically connected to the energy storage device 601. For example, the DC conversion circuit described in Embodiment 1 or Embodiment 2 above can be used. Cut.

[0478] As shown in Figure 20, an example of the power supply circuit of this embodiment includes a power storage device and a DC conversion circuit. Furthermore, by boosting or lowering the voltage of the power supplied by the energy storage device using a DC conversion circuit, This generates a power supply voltage that is suitable for the specifications of the power supply device. In a power supply circuit of this form, a DC conversion circuit according to one aspect of the present invention is used as the DC conversion circuit. This improves the reliability of the power supply circuit.

[0479] This embodiment can be appropriately combined or replaced with other embodiments. ru.

[0480] (Embodiment 12) This embodiment describes an electronic device to which the power supply circuit shown in Embodiment 11 above can be applied. An example will be explained using Figure 21.

[0481] Figure 21(A) shows a notebook-type personal computer, consisting of a main unit 3001 and a casing 300 2. It consists of a display unit 3003, a keyboard 3004, etc. Note that Figure 21( To generate the power supply voltage to the notebook personal computer shown in A), the above The power supply circuit of Embodiment 11 can be applied.

[0482] Figure 21(B) shows a mobile phone, which consists of two housings, housing 2800 and housing 2801. The enclosure 2801 contains a display panel 2802, a speaker 2803, and a microphone. 2804, pointing device 2806, camera lens 2807, external connection terminal It is equipped with 2808, etc. Also, the 2800 housing has a solar cell for charging mobile phones. It features a 2810 chip, an external memory slot 2811, and other components. The antenna is located on the casing 28. It is built into 01.

[0483] Furthermore, the display panel 2802 is equipped with a touch panel, and the image displayed in Figure 21(B) is The multiple operation keys 2805 are indicated by dotted lines. Note that the mobile phone shown in Figure 21(B) This involves the solar cell 2810 and the voltage output from the solar cell 2810, which is required for each circuit. It implements a power supply circuit that uses a DC conversion circuit to convert to a suitable voltage.

[0484] As described above, the power supply circuit in Embodiment 11 can be applied to various electronic devices. Furthermore, by applying the power supply circuit in Embodiment 11 to electronic equipment, reliability can be improved. We can provide high-quality electronic equipment.

[0485] This embodiment can be appropriately combined or replaced with other embodiments. ru. [Explanation of symbols]

[0486] 101 Induction element 102 transistors 103 Rectifier element 104 Control circuits 201 Coil 202 transistors 203 Diode 204 Capacitive element 205 Hysteresis Comparator 221 Comparator 222 Comparator 223 Inverter 224 Inverter 225 NOR Gate 226 NOR Gate 300 circuit boards 302 Gate Insulation Layer 303 Protective insulating layer 310 transistors 311 Grid gate layer 313 Channel formation region 314a Low-resistance source region 314b Low-resistance drain region 315a Source electrode layer 315b Drain electrode layer 316 Oxide insulating layer 320 circuit boards 322 Gate Insulation Layer 323 Protective insulating layer 330 Oxide semiconductor film 331 Oxide semiconductor layer 332 Oxide semiconductor layer 340 circuit boards 342 Gate Insulation Layer 343 Protective insulating layer 345 Oxide semiconductor film 346 Oxide semiconductor layer 350 transistors 351 Grid gate layer 352 Oxide semiconductor layer 355a Source electrode layer 355b Drain electrode layer 356 Oxide Insulating Layer 360 transistors 361 Grid control layer 362 Oxide semiconductor layer 363 Channel formation region 364a Low-resistance source region 364b Low-resistance drain region 365a Source electrode layer 365b Drain electrode layer 366 Oxide insulating layer 370 circuit boards 372a Gate Insulation Layer 372b Gate insulating layer 373 Protective insulating layer 380 transistors 381 Grid Unit Layer 382 Oxide semiconductor layer 385a Source electrode layer 385b Drain electrode layer 386 Oxide insulating layer 390 transistors 391 Grid gate layer 392 Oxide semiconductor layer 393 Oxide semiconductor film 394 circuit boards 395a Source electrode layer 395b Drain electrode layer 396 Oxide insulating layer 397 Gate Insulation Layer 398 Protective insulating layer 399 Oxide semiconductor layer 400 circuit boards 402 Gate Insulation Layer 407 Insulating layer 410 transistors 411 Guard Layer 412 Oxide semiconductor layer 414a wiring layer 414b wiring layer 415a Source electrode layer 415b Drain electrode layer 420 silicon substrate 421a aperture 421b aperture 422 Insulating layer 423 Aperture 424 Conductive layer 425 transistors 426 transistors 427 Conductive layer 450 circuit boards 452 Gate Insulation Layer 457 Insulating layer 460 transistors 461 Guard Layer 461a Guardgate layer 461b Guard gate layer 462 Oxide semiconductor layer 464 Wiring layer 465a Electrode layer 465b Electrode layer 465a1 Electrode layer 465a2 Electrode layer 468 Wiring layer 601 Energy Storage Device 602 DC Conversion Circuit 1001 Guard Station 1002 Gate Insulator 1003 Oxide semiconductor layer 1004a Source electrode 1004b Drain electrode 1005 Oxide insulating layer 1006 Conductive layer 2800 cabinets 2801 enclosure 2802 Display Panel 2803 Speaker 2804 Microphone 2805 Operation Keys 2806 Pointing device 2807 Camera Lens 2808 External connection terminal 2810 solar cells 2811 External memory slot 3001 Main Unit 3002 enclosure 3003 Display section 3004 Keyboard

Claims

[Claim 1] An inductive element that generates an electromotive force in response to a change in the flowing current, and has a gate, source, and drain, A transistor that controls the generation of electromotive force in the inductive element by being in an ON or OFF state, A rectifier element that conducts when the transistor is in the off state, The system comprises a control circuit for controlling the on or off state of the transistor, The aforementioned transistor has a channel formation layer with a hydrogen concentration of 5 × 10 １９ atoms / cm ３ A DC conversion circuit having the following oxide semiconductor layer.

Images