Image processing device
Patent Information
- Application Number
- JP2025058063
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2026-10-14
AI Technical Summary
【0013】 本発明によれば、状況データを要求に応じて外部装置へ送信する処理に起因する省電力効果の低減を抑制できる画像処理装置を提供することが可能になる。
Smart Images

Figure 2026165600000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an image processing apparatus that transmits status data to an external apparatus in response to a request.
Background Art
[0002] Image processing apparatuses such as printers, copiers, or multifunction peripherals include a plurality of processors that execute control or data processing related to image processing.
[0003] It is known that part or all of the plurality of processors execute processing of transmitting counter data indicating the consumption amount of consumables to an external apparatus in response to a request (for example, refer to Patent Document 1). The counter data is an example of status data that changes according to the situation.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of Invention
Problems to be Solved by the Invention
[0005] Meanwhile, the plurality of processors include a first processor that executes specific processing related to the image processing, and a second processor that can communicate with an external apparatus and the first processor. For example, the specific processing is print control that causes an image forming apparatus to execute print processing.
[0006] The first processor stores the status data that changes due to execution of the specific processing or elapse of time in a storage device. The second processor receives a request for the status data from the external apparatus. Furthermore, the second processor relays transmission of the status data between the external apparatus and the first processor.
[0007] Furthermore, the first processor has a function to selectively switch between an active state and a dormant state in order to conserve power of the image processing device. The dormant state consumes less power than the active state.
[0008] For example, when a pause condition is met, which is that no request for image processing is input through the operating device or communication device for a predetermined period of time, the first processor transitions from the active state to the pause state.
[0009] Furthermore, when a request for image processing is received through the operating device or the communication device, the first processor transitions from the dormant state to the active state.
[0010] If the first processor is in the idle state, and the second processor receives a request for status data from the external device, the first processor will return to the active state each time the second processor receives a request for status data, which reduces the power saving effect of the image processing device.
[0011] The object of the present invention is to provide an image processing apparatus that can suppress the reduction in power saving effect caused by the process of transmitting situational data to an external device upon request. [Means for solving the problem]
[0012] An image processing apparatus according to one aspect of the present invention comprises a non-volatile first storage device, a first processor, a non-volatile second storage device, and a second processor. The first processor selectively transitions from an active state and a dormant state which consumes less power than the active state to the other, and in the active state, it is able to access the first storage device. The second processor is able to communicate with the first processor and external devices and is able to access the second storage device. The first processor performs processing related to image processing and stores a plurality of situation data that change according to the situation in the first storage device. The second processor performs target data selection and storage processing. The target data selection and storage processing includes: selecting a portion of the plurality of situation data as target data according to selection rules, provided that the number of data does not exceed a predetermined allowable number or allowable size; requesting the target data from the first processor and obtaining the target data from the first processor when the first processor is in the active state; and storing the target data in the second storage device. When the second processor receives a request from the external device for specified data, which is part or all of the plurality of status data, and the first processor is in the active state, it executes a relay transmission process. The relay transmission process includes the process of requesting the specified data from the first processor and obtaining the specified data from the first processor, and the process of transmitting the specified data to the external device. When the second processor receives a request for specified data from the external device, and the first processor is in the hibernation state and the specified data is stored in the second storage device, it executes a stored data transmission process to transmit the specified data stored in the second storage device to the external device. When the second processor receives a request for specified data from the external device, and the first processor is in the hibernation state and at least part of the specified data is not stored in the second storage device, it transitions the first processor from the hibernation state to the active state and then executes the relay transmission process. [Effects of the Invention]
[0013] According to the present invention, it is possible to provide an image processing device that can suppress the reduction in power saving effect caused by the process of transmitting situational data to an external device upon request. [Brief explanation of the drawing]
[0014] [Figure 1] Figure 1 is a block diagram showing the configuration of an image processing apparatus according to an embodiment. [Figure 2] Figure 2 is a flowchart showing an example of the procedure for target data selection and storage processing and requested data provision processing in the image processing apparatus according to the embodiment. [Figure 3] Figure 3 is a flowchart showing an example of the procedure for relay transmission processing in the image processing apparatus according to the embodiment. [Figure 4] Figure 4 is a flowchart showing an example of the procedure for pause response processing in the image processing apparatus according to the embodiment. [Figure 5] Figure 5 is a flowchart showing an example of the procedure for managing stored data in the image processing apparatus according to the embodiment. [Modes for carrying out the invention]
[0015] Embodiments of the present invention will be described below with reference to the drawings. Note that the following embodiments are merely examples of the present invention and do not limit the technical scope of the present invention.
[0016] [Configuration of the image processing device 10] In the example shown in Figure 1, the image processing apparatus 10 includes an image reading device 1, an image forming apparatus 2, a user interface device 3, a communication device 4, and a main board 5, among others.
[0017] The image processing apparatus 10 can communicate with an external apparatus such as a host apparatus 8a or a server 8b on the Internet via a network 80. The network 80 includes a LAN (Local Area Network), the Internet, and the like. The host apparatus 8a and the server 8b are each a computer capable of communicating with the image processing apparatus 10.
[0018] The image reading apparatus 1 executes the image reading processing. The image reading processing is processing of reading an image from a document 91 and outputting data of a read image. The read image is an image read from the document 91 by the image reading apparatus 1.
[0019] The image forming apparatus 2 executes print processing for forming an image on a sheet 92. The image forming apparatus 2 includes a sheet conveyance mechanism that conveys the sheet 92, and a printing apparatus that forms an image on the conveyed sheet 92. The printing apparatus executes the print processing by a predetermined method such as an electrophotographic method or an inkjet method.
[0020] When the image forming apparatus 2 is an apparatus that executes the print processing by the electrophotographic method, the image forming apparatus 2 includes an image carrier, a charging device, an optical scanning device, a developing device, and a transfer device.
[0021] The charging device charges the surface of the image carrier which is a photoconductor. The optical scanning device forms an electrostatic latent image on the surface of the image carrier by scanning beam light. The developing device develops the electrostatic latent image into a toner image. The transfer device transfers the image on the image carrier to the sheet 92.
[0022] The user interface device 3 includes an operation device 3a and a display device 3b. The operation device 3a is a device that receives a human operation. For example, the operation device 3a includes operation buttons, a touch panel, and the like. The display device 3b can display information. For example, the display device 3b includes a display panel such as a liquid crystal panel.
[0023] The communication device 4 is a communication interface device that communicates with external devices such as the host device 8a or server 8b via the network 80.
[0024] The image forming apparatus 2 performs the print processing based on the data of the read image or the received print data. The received print data is the data included in the print request received from the host device 8a via the communication device 4.
[0025] The main board 5 is the board on which the main processor 5a is mounted. In the example shown in Figure 1, the memory elements 5b accessible by the main processor 5a are also mounted on the main board 5.
[0026] The main processor 5a performs various processes by executing the program stored in the memory element 5b.
[0027] The memory element 5b is, for example, a non-volatile storage device such as flash memory or EEPROM (Electrically Erasable Programmable Read-Only Memory). Alternatively, an SSD (Solid State Drive) or similar device, which is not mounted on the main board 5, may be used instead of the memory element 5b.
[0028] The image reading device 1 and the image forming device 2 are equipped with a plurality of engine boards 6. Each engine board 6 is fitted with an engine processor 6a and a memory element 6b accessible by the engine processor 6a.
[0029] The memory element 6b is, for example, a non-volatile memory device such as flash memory or EEPROM. Alternatively, an SSD or similar device, not mounted on each engine board 6, may be used instead of the memory element 6b.
[0030] Each engine processor 6a on the engine board 6 performs various processes by executing the program stored in the memory element 6b.
[0031] Each memory element 6b on the engine board 6 is a data rewritable memory device. The memory elements 6b are, for example, flash memory or non-volatile memory devices such as EEPROM (Electrically Erasable Programmable Read-Only Memory).
[0032] The main board 5 and the engine board 6 each include a device communication interface 7. The device communication interface 7 is an interface for device communication performed between the main processor 5a and the engine processor 6a. The device communication is, for example, serial communication.
[0033] In other words, the main processor 5a can communicate with the engine processor 6a through the device communication interface 7. Furthermore, the main processor 5a can communicate with the external device through the communication device 4.
[0034] Incidentally, the engine processor 6a, one of the multiple processors, performs specific processing related to the image processing.
[0035] Specifically, the engine processor 6a primarily controls the image processing equipment provided in the image processing device 10. For example, the engine processor 6a performs print control.
[0036] The print control is a control that causes the image forming apparatus 2 to perform the print process. The print control includes continuous print control. The continuous print control is a control that causes the image forming apparatus 2 to perform a continuous print process in which images are sequentially formed on each of the multiple sheets 92.
[0037] Furthermore, the engine processor 6a stores multiple status data in the memory element 6b, which changes due to the specific processing or the passage of time. For example, the multiple status data include data such as the cumulative number of prints, the cumulative number of images read, and the amount of consumables consumed or remaining. The consumables include developer and sheets 92, etc.
[0038] Furthermore, the engine processor 6a performs a request data provision process, which will be described later (see Figure 2). This request data provision process provides some or all of the multiple status data stored in the memory element 6b in response to a request from the main processor 5a.
[0039] On the other hand, the main processor 5a among the plurality of processors can communicate with the external device and the engine processor 6a. Therefore, the main processor 5a performs processing that requires communication with the external device through the communication device 4.
[0040] For example, the main processor 5a receives a request for specified data from the external device. The specified data is some or all of the multiple status data. In the following description, the request for specified data received from the external device will be referred to as a specified data request.
[0041] Furthermore, when the main processor 5a receives the specified data request, it executes relay transmission processing (see Figure 3). This relay transmission processing is a process that relays the data request from the external device to the engine processor 6a and the transmission of data from the engine processor 6a to the external device.
[0042] The engine processor 6a is an example of a first processor that performs the image processing related to the image processing. Each engine board 6 is an example of a first board on which the first processor is mounted. The memory element 6b is an example of a non-volatile first memory device accessible by the first processor.
[0043] The main processor 5a is an example of a second processor capable of communicating with the engine processor 6a and the external device. The main board 5 is an example of a second board on which the second processor is mounted. The memory element 5b is an example of a non-volatile second memory device accessible by the second processor.
[0044] Furthermore, the engine processor 6a has a function to selectively transition from one of the normal state and the sleep state to the other in order to conserve power of the image processing device 10. The sleep state is a state in which power consumption is lower than that of the normal state.
[0045] For example, when a sleep condition is met, which is that no request for image processing is input through the operating device 3a or the communication device 4 for a predetermined period of time, the engine processor 6a transitions from the normal state to the sleep state.
[0046] The normal state is an example of an active state in which the specific processing and the processing of saving the multiple status data can be executed. The sleep state is an example of a hibernation state that consumes less power than the normal state. The sleep condition is an example of a hibernation condition that transitions from the active state to the hibernation state.
[0047] Furthermore, when a request for image processing is input through the operating device 3a or the communication device 4, the engine processor 6a transitions from the sleep state to the normal state in response to a start command from the main processor 5a.
[0048] If the engine processor 6a is in the sleep state and the main processor 5a receives the specified data request, the power saving effect of the image processing device 10 is reduced when the engine processor 6a returns to the normal state each time the main processor 5a receives the specified data request.
[0049] In the image processing device 10, the engine processor 6a performs the target data selection and saving process and the pause response process, which will be described later (see Figures 2 and 4). These processes include processes to suppress the reduction in power saving effect caused by the process of transmitting the multiple status data to the external device as requested.
[0050] [Setting priority information] When the main processor 5a receives a priority setting request through the operating device 3a or the communication device 4, it sets priority designation information according to the input information. The input information is received through the operating device 3a or the communication device 4. The operating device 3a and the communication device 4 are examples of input devices.
[0051] The priority information represents the priority of some or all of the multiple status data. Among the multiple status data, data that is expected to be requested more frequently from the external device is assigned a higher priority.
[0052] The priority designation information is set before the aforementioned target data selection and saving process is executed.
[0053] [Request frequency derivation process] Each time the main processor 5a receives a designated data request, it derives the request frequency for each of the multiple status data and stores the request frequency information representing the request frequency in the memory element 5b. The request frequency is the frequency at which each of the multiple status data is requested as designated data per unit time or per unit number of designated data requests.
[0054] [Select and save target data] Below, we will explain an example of the procedure for selecting and saving the target data, referring to the flowchart shown in Figure 2.
[0055] The main processor 5a executes the target data selection and saving process each time a predetermined saving execution condition is met.
[0056] For example, the save execution condition includes some or all of the first save execution condition, the second save execution condition, and the third save execution condition. For example, the save execution condition is the logical OR condition of the first save execution condition, the second save execution condition, and the third save execution condition.
[0057] The first save execution condition is the sleep condition. When the sleep condition is adopted as the save execution condition, the main processor 5a executes the target data selection and save process before the engine processor 6a transitions from the normal state to the sleep state in response to the fulfillment of the sleep condition.
[0058] The second save execution condition is that the relay transmission process was executed by the main processor 5a while the engine processor 6a was in the normal state.
[0059] The third save execution condition is the condition that the specific process has been executed by the engine processor 6a. When the third save execution condition is adopted as the save execution condition, the main processor 5a executes the target data selection and save process while the engine processor 6a is in the normal state.
[0060] In the following description, S101, S102, ... represent identification codes for multiple processes executed by the main processor 5a in the target data selection and storage process. In the target data selection and storage process, the process of process S101 is executed first.
[0061] <Process S101> In step S101, the main processor 5a selects some of the multiple status data as target data, in accordance with predetermined selection rules, such that the number or size does not exceed a predetermined allowable limit.
[0062] In this embodiment, the selection rule includes a priority designation rule and a frequency rule.
[0063] The aforementioned priority designation rule is a rule that selects the data with the highest priority in the priority designation information from among the multiple status data as the target data.
[0064] The frequency rule is a rule that selects the target data from among the multiple situation data, prioritizing the data with the highest requested frequency in the requested frequency information. More specifically, the frequency rule is a rule that selects the target data from among the multiple situation data, in descending order of requested frequency, from data whose requested frequency exceeds the standard frequency.
[0065] For example, the main processor 5a first selects the target data from the plurality of status data according to the frequency rule. If the number or size of the target data selected according to the frequency rule is less than the allowable number or size, the main processor 5a selects the remaining target data within the allowable number or size according to the priority rule.
[0066] The main processor 5a executes the process of step S101, and then executes the process of step S102.
[0067] <Process S102> In step S102, the main processor 5a executes a target data acquisition process. This target data acquisition process involves requesting the target data selected in step S101 from the engine processor 6a and acquiring the target data provided by the engine processor 6a.
[0068] The main processor 5a requests and acquires the target data through the device communication.
[0069] For example, the main processor 5a divides the target data into multiple unit target data that can be transmitted in a single device communication. Furthermore, the main processor 5a performs requests to and receives data from the engine processor 6a for each of the multiple unit target data.
[0070] The main processor 5a executes the process of step S102, and then executes the process of step S103.
[0071] The engine processor 6a then provides the requested data to the main processor 5a by executing the requested data provision process (see step S200 in Figure 2).
[0072] <Process S103> In step S103, the main processor 5a stores the target data obtained in step S102 in the memory element 5b.
[0073] If old target data saved by a past target data selection and saving process exists in the memory element 5b, the main processor 5a deletes the old target data and then saves the new target data to the memory element 5b.
[0074] After executing the process in step S103, the main processor 5a terminates the target data selection and saving process.
[0075] [Request data provision processing] Next, an example of the procedure for the requested data provision process will be described with reference to the flowchart shown in Figure 2.
[0076] The engine processor 6a starts the request data provision process when it begins operating in the normal state. The request data provision process is the process of step S200 in Figure 2.
[0077] In the following description, S201 and S202 represent identification codes for two processes executed by the engine processor 6a in the request data provision process. In the request data provision process, the process of process S201 is executed first.
[0078] <Process S201> In process S201, the engine processor 6a checks whether there is a data request from the main processor 5a. The engine processor 6a continues to execute the process in process S201 until it receives a data request from the main processor 5a.
[0079] For example, the processing of step S201 is realized by interrupt processing for the equipment communication. The engine processor 6a executes the processing of step S202 when it receives a data request from the main processor 5a.
[0080] <Process S202> In process S202, the engine processor 6a reads the data requested by the main processor 5a from the memory element 6b and transmits the read data to the main processor 5a.
[0081] When the main processor 5a is executing the target data selection and saving process, the data requested by the main processor 5a is the target data (see step S102).
[0082] After executing process S202, the engine processor 6a executes process S201. As a result, the engine processor 6a sends the requested data to the main processor 5a whenever data is requested from the main processor 5a.
[0083] [Relay transmission process] Next, an example of the procedure for the relay transmission process will be described with reference to the flowchart shown in Figure 3.
[0084] When the main processor 5a receives a request for the specified data from the external device, and the engine processor 6a is in the normal state, it executes the relay transmission process.
[0085] In the following description, S301 and S302 represent identification codes for two processes executed by the main processor 5a in the relay transmission process. In the relay transmission process, the process of process S301 is executed first.
[0086] <Process S301> In step S301, the main processor 5a executes a specified data acquisition process. This specified data acquisition process involves requesting the specified data requested from the external device from the engine processor 6a and acquiring the specified data provided by the engine processor 6a.
[0087] The main processor 5a requests and obtains the specified data via the device communication.
[0088] For example, the main processor 5a divides the specified data into a plurality of unit specification data that can be transmitted in a single device communication. Furthermore, the main processor 5a performs a request to the engine processor 6a and receives data from the engine processor 6a for each of the plurality of unit specification data.
[0089] The main processor 5a executes the process of step S301, and then executes the process of step S302.
[0090] Furthermore, the engine processor 6a provides the requested data to the main processor 5a by executing the requested data provision process (see step S200 in Figure 3).
[0091] <Process S302> In step S302, the main processor 5a transmits the specified data obtained in step S301 to the external device via the communication device 4.
[0092] After executing the process in step S302, the main processor 5a terminates the relay transmission process.
[0093] [Pause response processing] Next, an example of the procedure for the pause response processing will be described with reference to the flowchart shown in Figure 4.
[0094] When the main processor 5a receives a request for the specified data from the external device, and the engine processor 6a is in the sleep state, it executes the pause response processing.
[0095] In the following description, S401, S402, ... represent identification codes for multiple processes executed by the main processor 5a in the pause response processing. In the pause response processing, the processing of process S401 is executed first.
[0096] <Process S401> In step S401, the main processor 5a selects the following processing depending on whether all of the specified data requested from the external device is stored in the memory element 5b as the target data.
[0097] The main processor 5a executes the process of step S402 if all of the specified data is stored in the memory element 5b. On the other hand, the main processor 5a executes the process of step S403 if at least a portion of the specified data is not stored in the memory element 5b.
[0098] <Process S402> In step S402, the main processor 5a reads the specified data from the memory element 5b and transmits the read specified data to the external device via the communication device 4.
[0099] The main processor 5a executes the process of step S402 without transitioning the engine processor 6a to the normal state.
[0100] After executing the process in step S402, the main processor 5a terminates the pause response processing.
[0101] <Process S403> In step S403, the main processor 5a starts the engine processor 6a which is in sleep mode. That is, the main processor 5a transitions the engine processor 6a from sleep mode to normal mode.
[0102] After executing the process in step S403, the main processor 5a executes the process in step S404. That is, the main processor 5a transitions the engine processor 6a from the sleep state to the normal state and then executes the process in step S404.
[0103] <Process S404> In step S404, the main processor 5a executes the relay transport process (see Figure 3).
[0104] The main processor 5a processes step S404, thereby acquiring the specified data from the engine processor 6a and transmitting the specified data to the external device.
[0105] The engine processor 6a then provides the specified data to the main processor 5a by executing the request data provision process (see step S200 in Figure 3).
[0106] After executing the process in step S404, the main processor 5a terminates the pause response processing.
[0107] By performing the aforementioned target data selection and saving process and the pause response process, the reduction in power saving effect caused by the process of transmitting the specified data to the external device in response to a request is suppressed in the image processing device 10.
[0108] In this embodiment, the main processor 5a further performs data storage management processing (see Figure 5). For example, the main processor 5a performs the data storage management processing at predetermined intervals.
[0109] [Saved Data Management Processing] Below, an example of the procedure for the data storage management process will be described with reference to the flowchart shown in Figure 5.
[0110] In the following description, S501 and S502 represent identification codes for two processes executed by the main processor 5a in the data storage management process. In the data storage management process, the process of process S501 is executed first.
[0111] <Process S501> In step S501, the main processor 5a executes a time limit determination process. This time limit determination process determines whether or not there is any data among the target data whose elapsed time from the time it was stored in the memory element 5b exceeds a predetermined time limit.
[0112] For example, the time limit may be set individually for each of the multiple status data. Alternatively, the time limit may be set for only some of the multiple status data.
[0113] The main processor 5a executes the process in step S502 if there is any overdue data. On the other hand, the main processor 5a terminates the stored data management process if there is no overdue data.
[0114] <Process S502> In step S502, the main processor 5a deletes the expired data from the memory element 5b and excludes the expired data from the target data.
[0115] After executing the process in step S502, the main processor 5a terminates the saved data management process.
[0116] When the aforementioned multiple status data include data with an expiration date, the storage data management process is executed to prevent expired data from being transmitted to the external device.
[0117] In this embodiment, the save execution condition may include a fourth save execution condition. The fourth save execution condition is that the number or size of the reduction in the target data stored in the memory element 5b due to the deletion of the expired data has reached a predetermined number or size.
[0118] When the fourth save execution condition is met, the main processor 5a executes the target data selection and save process (see Figure 2).
[0119] [Notes on the invention] The following is an overview of the invention extracted from the above-described embodiments. Note that each configuration and processing function described below can be selected and combined as desired.
[0120] <Note 1> A non-volatile first memory device, A first processor that can access the first storage device, selectively transitions from an active state and a sleep state which consumes less power than the active state to the other, and in the active state, A non-volatile second memory device, The system comprises a second processor that can communicate with the first processor and an external device and can access the second storage device, The first processor performs image processing and stores multiple situational data that change according to the situation in the first storage device. The second processor executes a target data selection and storage process which includes: selecting some of the multiple status data as target data according to selection rules, such that the number or size does not exceed a predetermined allowable limit; requesting the target data from the first processor and obtaining the target data from the first processor when the first processor is in the active state; and storing the target data in the second storage device. When the second processor receives a request from the external device for specified data which is part or all of the plurality of status data, and the first processor is in the active state, it executes a relay transmission process which includes the process of requesting the specified data from the first processor and obtaining the specified data from the first processor, and the process of transmitting the specified data to the external device. When the second processor receives a request for the specified data from the external device, and the first processor is in the hibernation state and the specified data is stored in the second storage device, it executes a stored data transmission process to send the specified data stored in the second storage device to the external device. The second processor is an image processing device that, when it receives a request for the specified data from the external device, and the first processor is in the hibernation state and at least a portion of the specified data is not stored in the second storage device, transitions the first processor from the hibernation state to the active state and then executes the relay transmission process.
[0121] <Note 2> The image processing apparatus according to Appendix 1, wherein the selection rule includes a frequency rule that prioritizes selecting data from among the plurality of situation data that are frequently requested by the external device as the target data.
[0122] <Note 3> The second processor sets priority designation information that represents the priority of some or all of the multiple status data according to the input information received through the input device, The selection rule includes a priority rule that selects the data with the highest priority in the priority designation information from among the multiple status data as the target data, The image processing apparatus according to Appendix 2, wherein the second processor selects the remaining target data according to the priority designation rule when the number or size of the target data selected according to the frequency rule is less than the allowable number or allowable size.
[0123] <Note 4> The image processing apparatus according to any one of the appendices 1 to 3, wherein the second processor deletes from the second storage device any data that has exceeded a predetermined time limit since it was stored in the second storage device and excludes it from the target data.
[0124] <Note 5> The image processing apparatus according to Appendix 4, wherein the second processor executes the target data selection and saving process when the number or size of the target data stored in the second storage device due to the deletion of the overdue data reaches a predetermined number or size.
[0125] <Note 6> The image processing apparatus according to any one of the appendices 1 to 5, wherein the second processor executes the target data selection and storage process in part or all of the following cases: whenever the conditions for the first processor to transition from the active state to the idle state are met; whenever the relay transmission process is executed by the second processor while the first processor is in the active state; or whenever a specific process related to the image processing is executed by the first processor. [Explanation of Symbols]
[0126] 1: Image reading device 2: Image forming apparatus 5: Main board 5a: Main processor (second processor) 5b: Memory element (second memory device) 6: Engine board 6a: Engine Processor (First Processor) 6b: Memory element (first memory device) 10: Image processing device
Claims
1. A non-volatile first memory device, A first processor that can access the first storage device, selectively transitions from an active state and a sleep state which consumes less power than the active state to the other, and in the active state, A non-volatile second memory device, The system comprises a second processor that can communicate with the first processor and an external device and can access the second storage device, The first processor performs image processing and stores multiple situation data, each of which changes according to the situation, in the first storage device. The second processor executes a target data selection and saving process which includes: a process of selecting some of the multiple status data as target data according to a selection rule, such that the number or size does not exceed a predetermined allowable limit; a process of requesting the target data from the first processor and obtaining the target data from the first processor when the first processor is in the active state; and a process of saving the target data to the second storage device. When the second processor receives a request from the external device for specified data which is part or all of the plurality of status data, and the first processor is in the active state, it executes a relay transmission process which includes the process of requesting the specified data from the first processor and obtaining the specified data from the first processor, and the process of transmitting the specified data to the external device. When the second processor receives a request for the specified data from the external device, and the first processor is in the idle state and the specified data is stored in the second storage device, it executes a stored data transmission process to send the specified data stored in the second storage device to the external device. The second processor is an image processing device that, when it receives a request for the specified data from the external device, and the first processor is in the hibernation state and at least a portion of the specified data is not stored in the second storage device, transitions the first processor from the hibernation state to the active state and then executes the relay transmission process.
2. The image processing apparatus according to claim 1, wherein the selection rule includes a frequency rule that prioritizes selecting data from among the plurality of situation data that are frequently requested by the external device as the target data.
3. The second processor sets priority designation information representing the priority of some or all of the multiple status data according to the input information received through the input device, The selection rule includes a priority rule that selects the data with the highest priority in the priority designation information from among the multiple status data as the target data, The image processing apparatus according to claim 2, wherein the second processor selects the remaining target data according to the priority designation rule if the number or size of the target data selected according to the frequency rule is less than the allowable number or allowable size.
4. The image processing apparatus according to claim 1 or 2, wherein the second processor deletes from the second storage device any data that has exceeded a predetermined time limit since it was stored in the second storage device and excludes it from the target data.
5. The image processing apparatus according to claim 4, wherein the second processor executes the target data selection and saving process when the number or size of the target data stored in the second storage device due to the deletion of the overdue data reaches a predetermined number or size.
6. The image processing apparatus according to claim 1 or 2, wherein the second processor executes the target data selection and storage process in part or all of the following cases: whenever the conditions for the first processor to transition from the active state to the idle state are met; whenever the relay transmission process is executed by the second processor while the first processor is in the active state; or whenever a specific process related to the image processing is executed by the first processor.
Citation Information
Patent Citations
Image forming apparatus and management system
JP2009110390A