Multilayer ceramic electronic components and methods for manufacturing the same
Patent Information
- Application Number
- JP2025059002
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2026-10-14
AI Technical Summary
【0017】 本発明によれば、信頼性を確保することができる積層セラミック電子部品および誘電体磁器組成物を提供することができる。
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Figure 2026166199000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to multilayer ceramic electronic components and a method for manufacturing the same. [Background technology]
[0002] In recent years, multilayer ceramic electronic components, such as multilayer ceramic capacitors, have been used in a variety of applications. For example, multilayer ceramic electronic components with the lowest possible profile have been developed (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2005-117004 [Patent Document 2] Japanese Patent Publication No. 2021-13008 [Overview of the project] [Problems that the invention aims to solve]
[0004] When vias for via electrodes are formed on such low-profile components, the thinness of the component can cause shrinkage during firing, resulting in indentations on the non-mounted surface. If high-temperature and high-humidity testing is performed in this state, water can accumulate in the indentations for extended periods, causing various trace additives added for characteristic control to dissolve. This can impair the uniformity within the component, leading to localized insulation degradation (leakage) and cracking, and ultimately reducing reliability.
[0005] This invention has been made in view of the above problems, and aims to provide a multilayer ceramic electronic component and a method for manufacturing the same that can ensure reliability. [Means for solving the problem]
[0006] The multilayer ceramic electronic component according to the present invention includes a capacitance portion having a plurality of internal electrode layers facing each other and a dielectric layer sandwiched between the plurality of internal electrode layers; a first cover layer and a second cover layer provided on either side of the capacitance portion in a first direction in which the plurality of internal electrode layers face each other; a via electrode penetrating the capacitance portion in the first direction and electrically connected to the plurality of internal electrode layers, with its first end located at the boundary between the first cover layer and the capacitance portion and its second end exposed from the second cover layer; a small-diameter conductive portion provided within the first cover layer, in contact with the first end of the via electrode, and having a width smaller than the via electrode in a second direction perpendicular to the first direction; and an external electrode covering and electrically connected to at least a portion of the first end of the via electrode.
[0007] In the multilayer ceramic electronic component described above, the via electrode has a tapered shape in a cross-section including the first and second directions, with the width increasing from the first end to the second end, and the small-diameter conductive portion may have a step difference with the via electrode in the second direction, or have a tapered shape with the width increasing from the first end to the side opposite to the second end.
[0008] In the second direction of the multilayer ceramic electronic component described above, the width of the small-diameter conductive portion may be 0.2 times or more and 0.8 times or less the width of the first end of the via electrode.
[0009] In the above-described multilayer ceramic electronic component, the diameter of the first end of the via electrode may be 10 μm or more and 100 μm or less, and the diameter of the second end may be 10 μm or more and 100 μm or less.
[0010] In the first direction of the above-mentioned multilayer ceramic electronic component, the combined thickness of the capacitance portion, the first cover layer, and the second cover layer may be 30 μm or more and 150 μm or less.
[0011] In the above-described multilayer ceramic electronic component, the via electrode may have a large-diameter conductive portion on the second cover layer side in the first direction, having a width greater than the width of the second end in the second direction.
[0012] In the above-described multilayer ceramic electronic component, the via electrode may have a retracted portion in which at least a part of its side surface is retracted toward the internal electrode layer.
[0013] In the above-described multilayer ceramic electronic component, the distance over which the retracted portion is retracted toward the internal electrode layer may be 0.1 μm or more and 3 μm or less.
[0014] The multilayer ceramic electronic component may further have a flange portion located on the opposite side of the via electrode from the first end via the small-diameter conductive portion, in contact with the small-diameter conductive portion, and having a wider width than the small-diameter conductive portion in the second direction.
[0015] The method for manufacturing a multilayer ceramic electronic component according to the present invention comprises the steps of: preparing a first ceramic green sheet and a second ceramic green sheet; forming an internal electrode pattern on the second ceramic green sheet; stacking the second ceramic green sheet on the first ceramic green sheet, and then stacking the first ceramic green sheet to obtain a laminate; using a thermal processing laser to form small-diameter via holes in one of the first ceramic green sheets and via holes penetrating the other first ceramic green sheet and the second ceramic green sheet; filling the small-diameter via holes and via holes with a conductor to form small-diameter conductive parts and via electrodes; firing the laminate to obtain a base body; and forming external electrodes electrically connected to the via electrodes on the base body.
[0016] In the above manufacturing method, the thermal processing laser may be a UV laser, a CO2 laser, or a YAG laser. [Effects of the Invention]
[0017] According to the present invention, it is possible to provide a multilayer ceramic electronic component and a dielectric ceramic composition that can ensure reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] [Figure 1] It is a perspective view of the multilayer ceramic capacitor according to the embodiment. [Figure 2] (a) is a plan view illustrating the first lamination unit constituting the element body, (b) is a plan view illustrating the second lamination unit constituting the element body, and (c) is a transmission view when the first lamination unit and the second lamination unit are laminated and viewed through. [Figure 3] It is a diagram illustrating the laminated structure of each layer constituting the element body. [Figure 4] It is the A-A line cross-sectional view of FIG. 1. [Figure 5] (a) to (c) are diagrams for explaining the recesses when via holes are formed in the element body before firing. [Figure 6] It is a diagram for explaining the effects of the embodiment. [Figure 7] It is a diagram for explaining the respective sizes of the first via electrode and the small-diameter conductor portion. [Figure 8] (a) to (c) are diagrams illustrating the case where the filler is attached with a film. [Figure 9] (a) and (b) are diagrams for explaining the extension distance d of the lead-in portion [Figure 10] It is a diagram illustrating the shape of the small-diameter conductor portion. [Figure 11] It is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor. [Figure 12] It is a diagram illustrating the lamination step. [Figure 13] It is a diagram illustrating the via forming step. DETAILED DESCRIPTION OF EMBODIMENTS
[0019] The embodiments will be described below with reference to the drawings.
[0020] (Embodiment) Figure 1 is a perspective view of a multilayer ceramic capacitor 100 according to an embodiment. As illustrated in Figure 1, the multilayer ceramic capacitor 100 comprises a substantially flat plate-shaped base body 10 and four external electrodes (first external electrode 20a, second external electrode 20b, third external electrode 20c, and fourth external electrode 20d).
[0021] The base body 10 has two main surfaces, an upper surface 40a and a lower surface 40b, in the stacking direction. The upper surface 40a and the lower surface 40b face each other. The base body 10 has four other surfaces besides the upper surface 40a and the lower surface 40b, namely side surfaces 50a to 50d. Side surfaces 50a and 50c face each other. Side surfaces 50b and 50d face each other.
[0022] The Z-axis (first direction) is defined as the thickness direction of the base body 10, in which the stacking direction of each layer inside is defined. The X-axis is perpendicular to the Z-axis and parallel to the sides 50a and 50c. The Y-axis is perpendicular to the Z-axis and parallel to the sides 50b and 50d. The direction perpendicular to the Z-axis direction is sometimes referred to as the second direction. The X-axis, Y-axis, and Z-axis are all perpendicular to each other. The length of the base body 10 in the X-axis direction is defined as length L. The width of the base body 10 in the Y-axis direction is defined as width W. The thickness of the base body 10 in the Z-axis direction is defined as thickness T. In a plan view from the Z-axis direction, the base body 10 has a roughly rectangular shape. Length L and width W correspond to the lengths of two adjacent sides of this roughly rectangular shape.
[0023] For example, the upper surface 40a and the lower surface 40b have a roughly square shape when viewed in a plan view from the Z-axis direction. The thickness T of the base body 10 in the stacking direction is, for example, 150 μm or less, 120 μm or less, and 90 μm or less. Also, the thickness T is, for example, 30 μm or more. The length L is, for example, 1.2 mm, 0.6 mm, 0.5 mm, 0.4 mm, 0.3 mm, etc. The width W is, for example, 1.2 mm, 0.6 mm, 0.5 mm, 0.4 mm, 0.3 mm, etc. In this embodiment, it is roughly square, but it may also be rectangular. The ratio of either the length L or width W to the height T is approximately 54:46 to 95:5.
[0024] The first external electrode 20a is provided on the upper surface 40a at the first corner 60a formed by the upper surface 40a, lower surface 40b, and side surfaces 50a, 50b. The second external electrode 20b is provided on the upper surface 40a at the second corner 60b formed by the upper surface 40a, lower surface 40b, and side surfaces 50b, 50c. The third external electrode 20c is provided on the upper surface 40a at the third corner 60c formed by the upper surface 40a, lower surface 40b, and side surfaces 50c, 50d. The fourth external electrode 20d is provided on the upper surface 40a at the fourth corner 60d formed by the upper surface 40a, lower surface 40b, and side surfaces 50d, 50a. The first external electrode 20a, the second external electrode 20b, the third external electrode 20c, and the fourth external electrode 20d are spaced apart from each other. In this embodiment, each of the first external electrode 20a, the second external electrode 20b, the third external electrode 20c, and the fourth external electrode 20d has a substantially rectangular shape when viewed in a plan view from the Z-axis direction.
[0025] Figure 2(a) is a plan view illustrating the first stacking unit 30a that constitutes the base body 10. Figure 2(b) is a plan view illustrating the second stacking unit 30b that constitutes the base body 10. Figure 2(c) is a transparency view of the first stacking unit 30a and the second stacking unit 30b stacked and transparent.
[0026] As illustrated in Figure 2(a), in the first stacked unit 30a, a first internal electrode layer 12a is stacked on the first dielectric layer 11a. The first dielectric layer 11a includes a first via electrode 70a that penetrates in the thickness direction at the first corner 60a, a second via electrode 70b that penetrates in the thickness direction at the second corner 60b, a third via electrode 70c that penetrates in the thickness direction at the third corner 60c, and a fourth via electrode 70d that penetrates in the thickness direction at the fourth corner 60d.
[0027] The first internal electrode layer 12a extends to the first via electrode 70a and is electrically connected to the first via electrode 70a. The first internal electrode layer 12a does not extend to the second via electrode 70b and is not electrically connected to the second via electrode 70b. The first internal electrode layer 12a extends to the third via electrode 70c and is electrically connected to the third via electrode 70c. The first internal electrode layer 12a does not extend to the fourth via electrode 70d and is not electrically connected to the fourth via electrode 70d. The first via electrode 70a and the third via electrode 70c penetrate the first internal electrode layer 12a in the thickness direction.
[0028] Furthermore, on the first dielectric layer 11a, an inverse pattern having a pattern opposite to that of the first internal electrode layer 12a may be provided around the first internal electrode layer 12a. The inverse pattern is, for example, a dielectric layer that shares the same main component ceramic as the first dielectric layer 11a.
[0029] As illustrated in Figure 2(b), in the second stacking unit 30b, a second internal electrode layer 12b is stacked on the second dielectric layer 11b. The second dielectric layer 11b includes a first via electrode 70a that penetrates in the thickness direction at the first corner 60a, a second via electrode 70b that penetrates in the thickness direction at the second corner 60b, a third via electrode 70c that penetrates in the thickness direction at the third corner 60c, and a fourth via electrode 70d that penetrates in the thickness direction at the fourth corner 60d.
[0030] The second internal electrode layer 12b does not extend to the first via electrode 70a and is not electrically connected to the first via electrode 70a. The second internal electrode layer 12b extends to the second via electrode 70b and is electrically connected to the second via electrode 70b. The second internal electrode layer 12b does not extend to the third via electrode 70c and is not electrically connected to the third via electrode 70c. The second internal electrode layer 12b extends to the fourth via electrode 70d and is electrically connected to the fourth via electrode 70d. The second via electrode 70b and the fourth via electrode 70d penetrate the second internal electrode layer 12b in the thickness direction.
[0031] Furthermore, on the second dielectric layer 11b, an inverse pattern having a pattern opposite to that of the second internal electrode layer 12b may be provided around the second internal electrode layer 12b. The inverse pattern is, for example, a dielectric layer that shares the same main component ceramic as the second dielectric layer 11b.
[0032] As illustrated in Figure 2(c), in a plan view, the outlines of the first internal electrode layer 12a and the second internal electrode layer 12b overlap, except at the corners. Also, in a plan view, the positions of the first via electrode 70a to the fourth via electrode 70d overlap with each other.
[0033] Figure 3 illustrates the laminated structure of each layer constituting the base body 10. As illustrated in Figure 3, in the base body 10, the first laminated unit 30a illustrated in Figure 2(a) and the second laminated unit 30b illustrated in Figure 2(b) are laminated alternately multiple times. In this embodiment, the laminate of the first laminated unit 30a and the second laminated unit 30b is referred to as the capacity section. The first cover layer 13a is laminated on the lower surface of the capacity section, and the second cover layer 13b is laminated on the upper surface of the capacity section.
[0034] In this configuration, the first external electrode 20a and the third external electrode 20c are electrically connected to the respective first internal electrode layer 12a, and the second external electrode 20b and the fourth external electrode 20d are electrically connected to the respective second internal electrode layer 12b.
[0035] With the above structure, the first external electrode 20a and the third external electrode 20c function as electrodes of the first polarity. The second external electrode 20b and the fourth external electrode 20d function as electrodes of the second polarity. In this embodiment, pairs of external electrodes located diagonally opposite each other have the same polarity, but their polarity may differ depending on the pattern of the internal electrode layer.
[0036] The first internal electrode layer 12a and the second internal electrode layer 12b are mainly composed of metal. For example, the first internal electrode layer 12a and the second internal electrode layer 12b are mainly composed of base metals such as nickel (Ni), copper (Cu), tin (Sn), or alloys containing these. Precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these may be used as the first internal electrode layer 12a and the second internal electrode layer 12b. Ceramic particles may be added as a co-material to the first internal electrode layer 12a and the second internal electrode layer 12b. The thicknesses of the first internal electrode layer 12a and the second internal electrode layer 12b are, for example, 1.5 μm or less, 1.0 μm or less, and 0.7 μm or less. The thickness of the first internal electrode layer 12a can be measured by observing the cross-section of the multilayer ceramic capacitor 100 with an SEM (scanning electron microscope), measuring the thickness at 10 points for each of the 10 different first internal electrode layers 12a, and deriving the average value of all measurement points. The thickness of the second internal electrode layer 12b can be measured using a similar method.
[0037] The first via electrodes 70a to the fourth via electrodes 70d are mainly composed of metal. The material of the first via electrodes 70a to the fourth via electrodes 70d is not particularly limited as long as it is mainly composed of metal. For example, if the first via electrodes 70a to the fourth via electrodes 70d are made of the same metal material as the first internal electrode layer 12a and the second internal electrode layer 12b, the magnitude of shrinkage caused by firing during the manufacturing of the multilayer ceramic capacitor 100 will be uniform, suppressing deformation, and the resistivity of the conductive path of the multilayer ceramic capacitor 100 will be uniform, thereby suppressing localized heat generation during use. Ceramic particles may be added as a co-material to the first via electrodes 70a to the fourth via electrodes 70d.
[0038] The first external electrode 20a to the fourth external electrode are not particularly limited as long as they have conductivity, and examples thereof include metals such as nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au), alloys containing any one of these as a main component element, and conductive resins and the like. Alternatively, each of the first external electrode 20a to the fourth external electrode may have a structure in which a plating layer is formed on a base layer obtained by sintering powder of a conductive material.
[0039] The first dielectric layer 11a and the second dielectric layer 11b are mainly composed of, for example, a ceramic material having a perovskite structure represented by the general formula ABO3. The perovskite structure includes ABO deviating from the stoichiometric composition 3-α . For example, as the ceramic material, barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), Ba that forms a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≦x≦1, 0≦y≦1, 0≦z≦1) and the like, and at least one selected therefrom can be used. Ba 1-x-y Ca x Sr y Ti 1-z Zr zO3 includes barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, and barium calcium zirconate titanate. The thickness of the first dielectric layer 11a and the second dielectric layer 11b is, for example, 3 μm or less, or 1 μm or less. The thickness of the first dielectric layer 11a can be measured by observing the cross-section of the multilayer ceramic capacitor 100 with an SEM (scanning electron microscope), measuring the thickness at 10 points for each of 10 different first dielectric layers 11a, and deriving the average value of all measurement points. The thickness of the second dielectric layer 11b can be measured using a similar method.
[0040] The first cover layer 13a and the second cover layer 13b are mainly composed of ceramic material. For example, the main components of the ceramic material of the first cover layer 13a and the second cover layer 13b are the same as those of the first dielectric layer 11a and the second dielectric layer 11b.
[0041] Figure 4 is a cross-sectional view along line AA in Figure 1. As illustrated in Figure 4, the first via electrode 70a penetrates the second cover layer 13b, with its lower end, the first end 71a, located at the top surface of the first cover layer 13a (the boundary between the capacitance portion and the first cover layer 13a). The second end 72a, located at the top end of the first via electrode 70a, is exposed from the top surface of the second cover layer 13b. The first external electrode 20a is electrically connected to the first via electrode 70a by covering at least a portion of the second end 72a of the first via electrode 70a. The first via electrode 70a is electrically connected to each first internal electrode layer 12a at various points along the Z-axis.
[0042] Furthermore, within the first cover layer 13a, a small-diameter conductive portion 80a is provided that is in contact with the first end 71a of the first via electrode 70a and has a width smaller than the first end 71a in a direction perpendicular to the Z-axis direction. For example, by providing a step relative to the first end 71a of the first via electrode 70a, the small-diameter conductive portion 80a may have a width smaller than the first end 71a of the first via electrode 70a.
[0043] Here, the effects of this embodiment will be explained. Figures 5(a) to 5(c) are diagrams illustrating the indentation that occurs when vias (via holes) are formed in the raw material 10 before firing. In order to provide via electrodes, vias 201 are formed in the raw material 10 before firing, as illustrated in Figure 5(a). Since the raw material 10 is formed thinly before firing, shrinkage occurs when the raw material 10 is fired, resulting in an indentation 202 on the surface of the raw material 10, around the tip of the via 201, as illustrated in Figure 5(b). As illustrated in Figure 5(c), when this raw material 10 is mounted on a mounting substrate 203 and subjected to a high-temperature, high-humidity test, moisture accumulates in the indentation 202, causing various trace additive components added for characteristic control to dissolve, impairing the uniformity within the raw material 10, which may lead to localized insulation degradation (leakage) and cracking, potentially reducing reliability.
[0044] In contrast, because the small-diameter conductive portion 80a has a smaller width than the first via electrode 70a, even if the base body 10 shrinks during firing, the recess 202 in Figure 5(b) can be eliminated or reduced, as illustrated in Figure 6. Therefore, even when high-temperature and high-humidity tests are performed, localized water accumulation is less likely to occur, suppressing the dissolution of material within the base body 10, maintaining the uniformity of the base body 10, and suppressing a decrease in reliability.
[0045] Furthermore, since the first end 71a of the first via electrode 70a reaches the upper surface of the first cover layer 13a, and a small-diameter conductive portion 80a is provided within the second cover layer 13b from the first end 71a, sufficient electrical connection can be obtained down to the bottommost first internal electrode layer 12a.
[0046] As illustrated in Figure 4, a flange portion 81a may be further provided, located opposite the first end 71a of the first via electrode 70a via the small-diameter conductive portion 80a, in contact with the small-diameter conductive portion 80a, and having a width greater than the small-diameter conductive portion 80a in a direction perpendicular to the Z-axis direction. The provision of the flange portion 81a provides the effect of suppressing the detachment of the via electrode 70a during the formation of the first via electrode 70a. The material of the flange portion 81a is not particularly limited as long as it is conductive, but for example, it may be the same material as the small-diameter conductive portion 80a.
[0047] As illustrated in Figure 4, in a cross-section including the Z-axis direction, the first via electrode 70a may have a tapered shape such that its width gradually increases from the first end 71a to the second end 72a. Having a tapered shape for the first via electrode 70a increases the cross-sectional area of the first via electrode 70a in the region close to the first external electrode 20a, thereby reducing the ESL compared to a straight shape. Furthermore, the via hole on the first end 71a side becomes smaller, increasing the suppression effect of the recess 202 described in Figure 5(b).
[0048] Next, the details of the sizes of the first via electrode 70a and the small-diameter conductive portion 80a will be described. Figure 7 is a diagram illustrating the sizes of the first via electrode 70a and the small-diameter conductive portion 80a. As illustrated in Figure 7, the width of the first end portion 71a in the direction perpendicular to the Z-axis direction is referred to as width H1. The width of the second end portion 72a in the direction perpendicular to the Z-axis direction is referred to as width H2. The width of the small-diameter conductive portion 80a in the direction perpendicular to the Z-axis direction is referred to as width H3. The width of the flange portion 81a in the direction perpendicular to the Z-axis direction is referred to as width H4.
[0049] From the viewpoint of sufficiently reducing the width of the small-diameter conductive portion 80a, it is preferable to set an upper limit on the width H3 of the small-diameter conductive portion 80a. In this embodiment, in the direction perpendicular to the Z-axis direction, the width H3 of the small-diameter conductive portion 80a is preferably 0.8 times or less, more preferably 0.7 times or less, and even more preferably 0.6 times or less, the width H3 of the first end 71a of the first via electrode 70a. Note that the width H3 of the small-diameter conductive portion 80a is the minimum width of the small-diameter conductive portion 80a.
[0050] On the other hand, if the width of the small-diameter conductive portion 80a is too small, the conductor filled during the formation of the first via electrode 70a may easily detach from the via. Therefore, it is preferable to set a lower limit on the width H3 of the small-diameter conductive portion 80a. In this embodiment, in the direction perpendicular to the Z-axis direction, the width H3 of the small-diameter conductive portion 80a is preferably 0.2 times or more, more preferably 0.3 times or more, and even more preferably 0.4 times or more.
[0051] If the width H1 of the first end 71a of the first via electrode 70a is too small in the direction perpendicular to the Z-axis, there is a risk that a sufficient connection with the first internal electrode 12a cannot be made. Therefore, it is preferable to set a lower limit on the width H1 of the first end 71a of the first via electrode 70a in the direction perpendicular to the Z-axis. In this embodiment, the width H1 of the first end 71a of the first via electrode 70a in the direction perpendicular to the Z-axis is preferably 10 μm or more, more preferably 20 μm or more, and even more preferably 30 μm or more.
[0052] On the other hand, if the width H1 of the first end 71a of the first via electrode 70a is too large in the direction perpendicular to the Z-axis, there is a risk of short-circuiting by making contact with the second internal electrode 12b. Therefore, it is preferable to set an upper limit on the width H1 of the first end 71a of the first via electrode 70a in the direction perpendicular to the Z-axis. In this embodiment, the width H1 of the first end 71a of the first via electrode 70a in the direction perpendicular to the Z-axis is preferably 100 μm or less, more preferably 80 μm or less, and even more preferably 60 μm or less.
[0053] If the width H2 of the second end 72a of the first via electrode 70a is too small in the direction perpendicular to the Z-axis, the contact area with the signal wiring on the circuit board via the external electrode will be reduced after mounting on the circuit board, or the position of the signal wiring and the first via electrode 70a may be misaligned, potentially leading to a deterioration of ESL (Electron Slip Level). Therefore, it is preferable to set a lower limit on the width H2 of the second end 72a of the first via electrode 70a in the direction perpendicular to the Z-axis. In this embodiment, the width H2 of the second end 72a of the first via electrode 70a in the direction perpendicular to the Z-axis is preferably 10 μm or more, more preferably 20 μm or more, and even more preferably 30 μm or more.
[0054] On the other hand, if the width H2 of the second end 72a of the first via electrode 70a is too large in the direction perpendicular to the Z-axis, there is a risk of short-circuiting by making contact with the second internal electrode 12b. Therefore, it is preferable to set an upper limit on the width H2 of the second end 72a of the first via electrode 70a in the direction perpendicular to the Z-axis. In this embodiment, the width H2 of the second end 72a of the first via electrode 70a in the direction perpendicular to the Z-axis is preferably 100 μm or less, more preferably 90 μm or less, and even more preferably 80 μm or less.
[0055] Furthermore, it is preferable to set lower and upper limits on the ratio (aspect ratio) of the thickness T of the base body 10 to each width H1 to H3. In this embodiment, it is preferable that T / H1, T / H2, and T / H3 are each 0.5 or more and 15 or less, and more preferably 0.5 or more and 6 or less.
[0056] The width H4 of the flange portion 81a is preferably smaller than the width H2 of the second end portion 72a. This is because if H4 is too large, it will deviate from the desired capacitance of the capacitor.
[0057] As illustrated in Figure 4, the first via electrode 70a may have a large-diameter conductive portion 73a on the second cover layer 13b side in the Z-axis direction, having a width greater than the width of the second end portion 72a in the direction perpendicular to the Z-axis direction. By providing a large-diameter conductive portion 73a with a larger width on the second cover layer 13b side, the cross-sectional area of the first via electrode 70a becomes larger in the region close to the first external electrode 20a, thereby further reducing the ESL. For example, it is preferable that the large-diameter conductive portion 73a is connected to the first internal electrode layer 12a of multiple layers. By providing the large-diameter conductive portion 73a, detachment of the first via electrode 70a can be suppressed during the formation of the first via electrode 70a.
[0058] If the inclination angle θ of the first via electrode 70a is too small, the conductive material may not adhere properly during the formation of the first via electrode 70a. Therefore, it is preferable to set a lower limit on the inclination angle θ of the first via electrode 70a. In this embodiment, the inclination angle θ is preferably 45° or more, preferably 50° or more, and preferably 60° or more.
[0059] On the other hand, if the inclination angle θ of the first via electrode 70a is too large, there is a risk that the first via electrode 70a may detach during its formation. Therefore, it is preferable to set an upper limit on the inclination angle θ of the first via electrode 70a. In this embodiment, the inclination angle θ is preferably 90° or less, preferably 85° or less, and preferably 80° or less.
[0060] Here, we will explain the definition of the inclination angle θ. As illustrated in Figure 7, in a cross-section including the Z-axis direction, the starting point is the point where the side surface of the first via electrode 70a in the second cover layer 13b protrudes furthest inward. The ending point is the end of the inner electrode layer of the lowest layer. The line connecting this starting point and the ending point is the inclination line. The line connecting the inner electrode layers of the lowest layer is the baseline. The angle of the inclination line with respect to this baseline is the inclination angle θ.
[0061] As illustrated in Figure 4, it is preferable that the first via electrode 70a has a pull-in portion 74 in which at least a part of its side surface is pulled towards the first internal electrode layer 12a. The presence of the pull-in portion 74 on the first via electrode 70a increases the surface area of the first via electrode 70a, generating friction, which can suppress the detachment of the first via electrode 70a. When the pull-in portion 74 is provided, the first via electrode 70a is connected to the first internal electrode layer 12a via the pull-in portion 74.
[0062] For example, as illustrated in Figure 8(a), vias 201 can be formed on the raw material 10 before firing, and a film 204 to be used as a mask can be attached. In this case, as illustrated in Figure 8(b), a filler 205, which will become the first via electrode 70a, will be filled into the via 201. However, if sufficient friction is not generated between the via 201 and the filler 205, the filler 205 may detach when the film 204 is peeled off, as illustrated in Figure 8(c). To counteract this, the detachment of the filler 205 can be suppressed by providing a retraction section 74 to generate sufficient friction.
[0063] From the viewpoint of fully obtaining the effect of the retraction portion 74, it is preferable to set a lower limit on the extension distance d of the retraction portion 74. In this embodiment, the extension distance d of the retraction portion 74 is preferably 0.1 μm or more, more preferably 0.2 μm or more, and even more preferably 0.3 μm or more.
[0064] If the retraction portion 74 is too long, the laminated structure of the ceramic green sheet and the internal electrode pattern may collapse or break down due to the filling pressure of the conductive material. Therefore, it is preferable to set an upper limit on the length of the retraction portion 74. In this embodiment, the extension distance d of the retraction portion 74 is preferably 3 μm or less, more preferably 2.5 μm or less, and even more preferably 2.0 μm or less.
[0065] Figures 9(a) and 9(b) are diagrams illustrating the extension distance d of the pull-in portion 74. As illustrated in Figure 9(a), the inclined line described in Figure 7 is shifted in parallel to the innermost part of the first via electrode 70a. As illustrated in Figure 7(b), the distance between this shifted inclined line and the first internal electrode layer 12a is defined as the extension distance d.
[0066] As illustrated in Figure 10, in a cross-section including the Z-axis direction, the small-diameter conductive portion 80a may have a tapered shape such that its width gradually increases from the upper side to the lower side of the second cover layer 13b. In other words, the small-diameter conductive portion 80a may have a tapered shape opposite to that of the first via electrode 70a. Having a tapered shape in the small-diameter conductive portion 80a provides the effect of suppressing the detachment of the first via electrode 70a during its formation.
[0067] In this embodiment, the via electrode connected to the first external electrode 20a (the first via electrode 70a and the small-diameter conductive portion 80a) has been described, but the second external electrode 20b to the fourth external electrode 70d may also be provided with via electrodes having a similar structure.
[0068] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 11 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100.
[0069] (Process for producing raw material powder) First, dielectric materials are prepared to form the first dielectric layer 11a and the second dielectric layer 11b. The A-site and B-site elements contained in the first dielectric layer 11a and the second dielectric layer 11b are usually contained in the dielectric layer 11 in the form of a sintered body of ABO3 particles. For example, BaTiO3 is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been conventionally known for synthesizing the ceramics constituting the first dielectric layer 11a and the second dielectric layer 11b, such as the solid-phase method, the sol-gel method, and the hydrothermal method. In this embodiment, any of these can be used.
[0070] A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Examples of additive compounds include oxides of Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Sm (samarium), Eu (europium), Gd (gadolinium), Tb (terbium), Dy (dysprosium), Ho (holomium), Er (erbium), Tm (thulium), and Yb (ytterbium)), as well as oxides or glasses of Co (cobalt), Ni, Li (lithium), B (boron), Na (sodium), K (potassium), and Si (silicon).
[0071] In this embodiment, preferably, first, a compound containing the additive compound is mixed with ceramic particles constituting the first dielectric layer 11a and the second dielectric layer 11b, and calcined at 820 to 1150°C. Subsequently, the obtained ceramic particles are wet-mixed with the additive compound, dried, and pulverized to prepare ceramic powder. For example, the average particle size of the ceramic powder is preferably 50 to 300 nm from the viewpoint of thinning the first dielectric layer 11a and the second dielectric layer 11b. For example, the ceramic powder obtained as described above may be pulverized as needed to adjust the particle size, or the particle size may be adjusted by combining this with a classification process.
[0072] (Coating process) Next, the obtained dielectric material is wet-mixed with a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. Using the resulting slurry, a ceramic green sheet is coated onto a substrate using, for example, a die coater or doctor blade method, and then dried.
[0073] The first ceramic green sheet 51 is used as a green sheet for forming the first cover layer 13a and the second cover layer 13b.
[0074] (Internal electrode formation process) An internal electrode pattern 53a or internal electrode pattern 53b is formed on the surface of the second ceramic green sheet 52 by screen printing, gravure printing, or the like, using a metal conductive paste containing an organic binder for forming internal electrodes. Ceramic particles are added to the metal conductive paste as a co-material. The main component of the ceramic particles is not particularly limited, but it is preferable that it is the same as the main component ceramic of the first dielectric layer 11a and the second dielectric layer 11b. The internal electrode pattern 53a has the shape of the first internal electrode layer 12a described in Figure 2(a). The internal electrode pattern 53b has the shape of the second internal electrode layer 12b described in Figure 2(b).
[0075] (Lamination process) As illustrated in Figure 12, multiple second ceramic green sheets 52 are stacked on a first ceramic green sheet 51 such that the internal electrode patterns 53a and 53b are arranged alternately, and then other first ceramic green sheets 51 are stacked thereafter.
[0076] (Via formation process) Subsequently, as illustrated in Figure 13, a thermal processing laser is used to form small-diameter vias 54 within one of the first ceramic green sheets 51, and vias 55 that penetrate the other first ceramic green sheet 51 and the second ceramic green sheet 52. The vias 55 have a tapered shape. UV lasers, CO2 lasers, YAG lasers, etc., can be used as thermal processing lasers. When the thermal processing laser changes from processing the ceramic green sheet to processing the internal electrode pattern, the vertical engraving speed slows down. As a result, heat is transferred horizontally, and the retracted portion 74a is formed. After that, the small-diameter vias 54 and vias 55 are filled with a conductive material.
[0077] (Crimping process) Subsequently, the first ceramic green sheet 51 and the second ceramic green sheet 52 are pressed together to obtain a laminate. At this time, because the via 55 has a tapered shape, the filling of the conductor does not easily reach the tip of the small diameter via 54, resulting in a low density of the conductor. As the ceramic green sheets 51 and 52 are pressed together, the small diameter via 54 is pushed in, and the diameter of the small diameter via 54 is reduced.
[0078] (Firing process) The laminate is then fired. For example, with an oxygen partial pressure of 10 -7 ~10 -10 The material is fired in an atm reducing atmosphere at 1100-1300°C for 10 minutes to 2 hours. In this way, the base material 10 is obtained. The conductor inside via 55 becomes the via electrode, and the conductor inside small-diameter via 54 becomes the small-diameter conductor portion.
[0079] (Re-oxidation process) Subsequently, a re-oxidation treatment may be performed in an N2 gas atmosphere at 600°C to 1000°C.
[0080] (External electrode formation process) Next, a metal paste containing a metal filler, glass frit, binder, and solvent is applied by dipping to the region where the first external electrodes 20a to the fourth external electrodes 20d of the base body 10 are to be formed, dried, and baked. After that, a plating layer may be formed by a plating process.
[0081] Alternatively, the first external electrodes 20a to the fourth external electrodes 20d may be fired simultaneously with the base body 10, and then the plating layer may be formed.
[0082] In the embodiments described above, multilayer ceramic capacitors were explained as an example of ceramic electronic components, but the invention is not limited to them. For example, other electronic components such as varistors and thermistors may be used. [Examples]
[0083] (Example 1) In Example 1, as explained in Figure 6, a tapered via electrode was provided that penetrated the second cover layer and reached the upper surface of the first cover layer, and a small-diameter conductive portion was provided within the second cover layer. This multilayer ceramic capacitor was attached to a glass epoxy substrate (FR4) using solder paste (SMIC; manufactured by Senju Metal Industries Co., Ltd., Eco Solder Paste = M705-GRN-360-K2-V) and mounted in a reflow oven at 250°C to 270°C, 0.9 m / min, and an N2 atmosphere.
[0084] (Comparative Example 1) In Comparative Example 1, the small-diameter conductive portion was not provided. All other conditions were the same as in Example 1.
[0085] For both Example 1 and Comparative Example 1, a magnifying glass was used to visually inspect 1000 samples before testing to check for any dents. The mounted samples were then tested in a reliability test chamber (85°C, 85% humidity) at a voltage of 4V for approximately 2 hours. After the test, the number of samples with a leakage current exceeding 100 μA (NG count) was counted. The samples were then visually inspected again with a magnifying glass. The results are shown in Table 1. [Table 1]
[0086] As shown in Table 1, in Comparative Example 1, discoloration occurred in a portion of each sample. This is thought to be because the absence of a small-diameter conductive section caused indentations during firing. In addition, in Comparative Example 1, 5 out of 1000 samples resulted in a "NG" (Not Good) result. This is thought to be because water accumulated in the aforementioned indentations, causing the components to leach out. In contrast, in Example 1, no discoloration occurred in any of the samples. This is thought to be because the presence of a small-diameter conductive section prevented indentations during firing. Furthermore, in Example 1, no "NG" results occurred in any of the 1000 samples. This is thought to be because no indentations occurred and no water accumulated.
[0087] (Example 2) In Example 2, a large-diameter conductive section, as illustrated in Figure 4, was provided. All other conditions were the same as in Example 1.
[0088] For the samples from Example 2 and Comparative Example 1, ESL@100Hz was measured after mounting to the substrate. The results are shown in Table 2. [Table 2]
[0089] As shown in Table 2, in Comparative Example 1, the ESL@100Hz was 22 pH. In contrast, in Example 1, the ESL@100Hz decreased to 20 pH. This is thought to be because the cross-sectional area of a part of the via electrode increased due to the provision of a large-diameter conductive section.
[0090] (Example 3) In Example 3, as illustrated in Figures 8(a) to 8(c), a 0.1 mm thick PET film was applied to the surface of the raw material before firing, excluding the areas where via electrodes were to be provided, and via electrodes were formed using a thermal processing laser. The use of a thermal processing laser resulted in the formation of the retraction portion illustrated in Figure 4 on the via electrodes. All other conditions were the same as in Example 1.
[0091] (Comparative Example 2) In Comparative Example 2, a 0.1 mm thick PET film was applied to the surface of the raw material before firing, except for the areas where via electrodes were to be provided, and via electrodes were formed using a non-thermal processing laser. Because a non-thermal processing laser was used, no indentations were formed in the via electrodes. Furthermore, no small-diameter conductive portion was provided. All other conditions were the same as in Example 1.
[0092] For Example 3 and Comparative Example 2, electrode paste was filled into 500 sample vias, and then the PET film was peeled off. After peeling off the PET film, the feasibility of filling the vias was evaluated using transmitted light with a magnifying glass (×20). The results are shown in Table 3. [Table 3]
[0093] As shown in Table 3, in Comparative Example 2, detachment of the conductive paste (NG) was observed in 50 out of 500 samples. This is thought to be because friction did not occur due to the absence of a retraction section, causing the conductive paste to detach. In contrast, in Example 3, no detachment of the conductive paste was observed in any of the 500 samples. This is thought to be because friction occurred due to the presence of a retraction section, preventing the conductive paste from detaching.
[0094] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of Symbols]
[0095] 10 Base Body 11a First dielectric layer 11b Second dielectric layer 12a 1st internal electrode layer 12b Second internal electrode layer 13a First Cover Layer 13b Second Cover Layer 20a 1st external electrode 20b 2nd external electrode 20c 3rd external electrode 20d 4th external electrode 30a First layer unit 30b Second layer unit 51. Ceramic Green Sheet No. 1 52. Second Ceramic Green Sheet 53a, 53b Internal electrode patterns 54 Small Diameter Vias 55 Beer 70a First via electrode 70b Second via electrode 70c Third via electrode 70d Fourth via electrode 71a First end 72a 2nd end 73a Large diameter conductive part 74a Entrance 80a Small diameter conductive part 81a Flange section 100 Multilayer Ceramic Capacitors
Claims
1. A capacitive section having a plurality of internal electrode layers facing each other and a dielectric layer sandwiched between the plurality of internal electrode layers, In the first direction in which the plurality of internal electrode layers face each other, a first cover layer and a second cover layer are provided sandwiching the capacitance portion, A via electrode that penetrates the capacitance portion in the first direction, is electrically connected to the plurality of internal electrode layers, has a first end located at the boundary between the first cover layer and the capacitance portion, and has a second end exposed from the second cover layer, A small-diameter conductive portion is provided within the first cover layer, is in contact with the first end of the via electrode, and has a width smaller than that of the via electrode in a second direction perpendicular to the first direction, A multilayer ceramic electronic component having an external electrode that covers at least a portion of the first end of the via electrode and is electrically connected to it.
2. The via electrode has a tapered shape in a cross-section including the first and second directions, with the width increasing from the first end to the second end. The multilayer ceramic electronic component according to claim 1, wherein the small-diameter conductive portion has a step difference with respect to the via electrode in the second direction, or has a tapered shape in which the width increases from the first end to the side opposite to the second end.
3. In the second direction, the width of the small-diameter conductive portion is 0.2 times or more and 0.8 times or less the width of the first end of the via electrode, as described in claim 1.
4. The multilayer ceramic electronic component according to claim 1, wherein the diameter of the first end of the via electrode is 10 μm or more and 100 μm or less, and the diameter of the second end is 10 μm or more and 100 μm or less.
5. The multilayer ceramic electronic component according to claim 1, wherein in the first direction, the combined thickness of the capacitance portion, the first cover layer, and the second cover layer is 30 μm or more and 150 μm or less.
6. The multilayer ceramic electronic component according to claim 1, wherein the via electrode has a large-diameter conductive portion having a width greater than the width of the second end in the second direction on the second cover layer side in the first direction.
7. The multilayer ceramic electronic component according to claim 1, wherein the via electrode has a retracted portion in which at least a part of its side surface is retracted toward the internal electrode layer.
8. The multilayer ceramic electronic component according to claim 7, wherein the distance to which the pull-in portion is pulled towards the internal electrode layer is 0.1 μm or more and 3 μm or less.
9. The multilayer ceramic electronic component according to claim 1, further comprising a flange portion located on the opposite side of the via electrode from the first end via the small-diameter conductive portion, in contact with the small-diameter conductive portion, and having a wider flange portion than the small-diameter conductive portion in the second direction.
10. The process involves preparing the first ceramic green sheet and the second ceramic green sheet, The process of forming an internal electrode pattern on the second ceramic green sheet, A step of obtaining a laminate by laminating the second ceramic green sheet onto the first ceramic green sheet, and then laminating the first ceramic green sheet thereafter, A process of forming small-diameter via holes in one of the first ceramic green sheets using a thermal processing laser, and forming via holes that penetrate the other first ceramic green sheet and the second ceramic green sheet, The process of filling the small-diameter via hole and the via hole with a conductor to form a small-diameter conductive portion and a via electrode, The process of firing the laminate to obtain a base body, A method for manufacturing a multilayer ceramic electronic component, comprising the step of forming an external electrode electrically connected to the via electrode on the substrate.
11. The aforementioned thermal processing laser is a UV laser, CO2 laser. 2 A method for manufacturing a multilayer ceramic electronic component according to claim 10, wherein the laser is a laser or a YAG laser.
Citation Information
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