Multilayer ceramic electronic components and their manufacturing methods
Patent Information
- Application Number
- JP2025059361
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2026-10-14
Smart Images

Figure 2026166432000001_ABST
Abstract
Description
[Technical Field]
[0001] This disclosure relates to multilayer ceramic electronic components and methods for manufacturing the same. [Background technology]
[0002] Multilayer ceramic capacitors can develop cracks after being mounted on a circuit board due to stress caused by board deflection or temperature changes. Multilayer ceramic capacitors with such cracks are prone to problems such as reduced capacitance, decreased insulation resistance, and reduced connection strength to the circuit board.
[0003] Examples of multilayer ceramic capacitors capable of suppressing crack formation include, for instance, a multilayer ceramic capacitor having a flexible conductive resin layer on a portion of the external electrode, in which the conductive resin layer acts to alleviate stress applied to the ceramic body and external electrode (see Patent Document 1), and a multilayer chip component in which the outer surface of the ceramic body is sandwiched between oxide layers with higher strength than the ceramic layer (see Patent Document 2). [Prior art documents] [Patent Documents]
[0004] [Patent Document 1] Japanese Patent Publication No. 2021-034440 [Patent Document 2] Japanese Patent Application Publication No. 6-124807
[0005] When the external electrode has a conductive resin layer, the resin has a property that allows hydrogen to pass through easily, which can cause the insulation of the ceramic body to deteriorate due to hydrogen entering from the outside. Also, when the entire outer surface of the ceramic body is covered with an oxide layer mainly composed of glass, sintering aids such as Si in the oxide layer tend to diffuse into the body, which leads to a problem of decreased dielectric constant. [Overview of the Initiative] [Problems that the invention aims to solve]
[0006] The purpose of this disclosure is to provide multilayer ceramic electronic components with excellent mechanical strength and high reliability, as well as a method for manufacturing the same. [Means for solving the problem]
[0007] Embodiments of the present disclosure are multilayer ceramic electronic components comprising: a base body having a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic alternately laminated, having opposing end faces and four faces adjacent to the end faces; a base metal layer provided on the end faces and a portion of the four faces so as to contact at least a portion of the plurality of internal electrodes exposed from the end faces; a glass layer provided on the four faces from the leading edge of the base metal layer to the opposite side of the end faces; a conductive resin layer provided so as to cover at least a portion of the glass layer and the base metal layer; and a plating layer provided on the conductive resin layer such that its leading edge is in contact with the glass layer.
[0008] Embodiments of the present disclosure are methods for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing a base body having a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic alternately laminated, and having opposing end faces and four faces adjacent to the end faces; forming a base metal layer on the end faces and parts of the four faces of the base body so as to contact at least a portion of the plurality of internal electrodes exposed from the end faces of the base body; forming a glass layer on the four faces from the leading edge of the base metal layer to the opposite side of the end faces; forming a conductive resin layer so as to cover at least a portion of the glass layer and the base metal layer; and forming a plating layer on the conductive resin layer such that its leading edge is in contact with the glass layer. [Effects of the Invention]
[0009] According to this disclosure, it is possible to provide multilayer ceramic electronic components with excellent mechanical strength and high reliability, as well as a method for manufacturing the same. [Brief explanation of the drawing]
[0010] [Figure 1] FIG. 1 is a partial cross-sectional perspective view showing an example of the multilayer ceramic capacitor according to the first embodiment of the present disclosure. [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating a cross section taken along line A-A in FIG. 1. [Figure 3] FIG. 3 is a schematic cross-sectional view illustrating a cross section taken along line B-B in FIG. 1. [Figure 4] FIG. 4 is a schematic cross-sectional view showing an example of the multilayer ceramic capacitor according to the second embodiment of the present disclosure. [Figure 5A] FIG. 5A is a schematic cross-sectional view showing an example of the multilayer ceramic capacitor according to a comparative embodiment. [Figure 5B] FIG. 5B is an enlarged cross-sectional view of region VB in FIG. 5A. [Figure 6] FIG. 6 is a flowchart showing an example of the method for manufacturing the multilayer ceramic capacitor according to the first embodiment of the present disclosure. [Figure 7] FIG. 7 is a flowchart showing an example of the method for manufacturing the multilayer ceramic capacitor according to the second embodiment of the present disclosure. [Figure 8] FIG. 8 is a flowchart showing an example of the method for manufacturing the multilayer ceramic capacitor according to the third embodiment of the present disclosure. [Description of Embodiments]
[0011] Hereinafter, embodiments of the present disclosure will be described in detail. The embodiments are not limited by the following description, and can be appropriately modified within the scope not departing from the gist of the present disclosure. In this specification, "~" indicating a numerical range means that the numerical values stated before and after it are included as the lower limit value and the upper limit value, unless otherwise specified.
[0012] Furthermore, in this specification and drawings, components having substantially the same functional configuration may be denoted by the same reference numerals, thereby omitting redundant descriptions. Also, in this specification and drawings, the number, position, size, shape, etc., of each component are not limited to the embodiments of this disclosure, and may be set to a number, position, size, shape, etc., that is preferable for the embodiments of this disclosure. In addition, the drawings show mutually orthogonal X, Y, and Z axes as appropriate. The X, Y, and Z axes define a fixed coordinate system fixed to the multilayer ceramic electronic component.
[0013] [Multilayer ceramic electronic components] The multilayer ceramic electronic component of the present disclosure comprises a base body having a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic alternately laminated, with opposing end faces and four faces adjacent to the end faces; a base metal layer provided on the end faces and a portion of the four faces so as to contact at least a portion of the plurality of internal electrodes exposed from the end faces; a glass layer provided on the four faces from the leading edge of the base metal layer to the opposite side of the end faces; a conductive resin layer provided so as to cover at least a portion of the glass layer and the base metal layer; and a plating layer provided on the conductive resin layer such that its leading edge is in contact with the glass layer. The multilayer ceramic electronic component according to the first embodiment may further have other layers or members as needed.
[0014] (First Embodiment) As an example of a multilayer ceramic electronic component according to the first embodiment, a multilayer ceramic capacitor will be described. Figure 1 is a partial cross-sectional perspective view illustrating a multilayer ceramic capacitor 100 according to the first embodiment. Figure 2 is a cross-sectional view illustrating a cross-section cut along line AA in Figure 1. Figure 3 is a cross-sectional view illustrating a cross-section cut along line BB in Figure 1.
[0015] In Figures 1 to 3, the X-axis direction is the longitudinal direction of the base body 10, and is the direction in which the end faces 51 and 52 of the base body 10 face each other. The Z-axis direction is the stacking direction in which the dielectric layer 14 and the internal electrodes 12A and 12B are stacked, and is the direction in which the lower surface 55 and upper surface 56 of the base body 10 face each other. The Y-axis direction is the width direction of the internal electrodes 12A and 12B, and is the direction in which the side surfaces 53 and 54 of the base body 10 face each other. The four surfaces adjacent to the end faces 51 and 52 are the lower surface 55, the upper surface 56, and the side surfaces 53 and 54 of the base body 10. The X-axis direction, the Y-axis direction, and the Z-axis direction intersect or are perpendicular to each other.
[0016] The multilayer ceramic capacitor 100 comprises a substantially rectangular parallelepiped base body 10 and external electrodes 20A and 20B. The base body 10 has a plurality of dielectric layers 14, a plurality of internal electrodes 12A and 12B, and a cover dielectric layer 16. The plurality of internal electrodes 12A and the plurality of internal electrodes 12B are stacked alternately. One of the plurality of dielectric layers 14 is provided between one of the plurality of internal electrodes 12A and one of the plurality of internal electrodes 12B. The outermost layer in the Z-axis direction of the laminate formed by stacking the dielectric layers 14 and internal electrodes 12A and 12B is the internal electrodes 12A and 12B, and the bottom and top surfaces of the laminate are covered by the cover dielectric layer 16. The region sandwiching the plurality of internal electrodes 12A and 12B in the Y-axis direction is the side margin region 18.
[0017] The internal electrodes 12A and 12B are alternately exposed at end faces 51 and 52. Internal electrode 12A is exposed from end face 51, while internal electrode 12B is not. Internal electrode 12B is exposed from end face 52, while internal electrode 12A is not. In other words, internal electrodes 12A and 12B are connected to different end faces 51 and 52.
[0018] The external electrode 20A contacts the internal electrode 12A exposed from the base body 10 at the end face 51. The external electrode 20B contacts the internal electrode 12B exposed from the base body 10 at the end face 52. In addition to the end face 51, the external electrode 20A covers the ends 40 in the -X direction of the side surfaces 53 and 54, and the bottom surface 55 and top surface 56. The ends 40 are the parts of the surface of the base body 10 that are connected to the end faces 51 and 52, on the side of the end faces 51 and 52. The external electrode 20B contacts the internal electrode 12B at the end face 52. In addition to the end face 52, the external electrode 20B covers the ends 40 in the +X direction of the side surfaces 53 and 54, and the bottom surface 55 and top surface 56.
[0019] For example, external electrode 20A can be used as the anode and external electrode 20B can be used as the cathode. It is preferable to distinguish external electrode 20A and external electrode 20B by marking them with markers or other visual distinguishing features.
[0020] Each of the external electrodes 20A and 20B comprises a base metal layer 21, a glass layer 22, a conductive resin layer 23, and a plating layer 24.
[0021] In the base body 10, the side facing the circuit board when mounting the multilayer ceramic capacitor on the circuit board is sometimes referred to as the bottom surface. However, any of the bottom surface 55 and top surface 56, which connect to the end surfaces 51 and 52, and the side surfaces 53 and 54 may be used as the surface facing the circuit board.
[0022] The base metal layer 21 is provided on the end faces 51 and 52, as well as on parts of the four surfaces: the bottom surface 55, the top surface 56, and the side surfaces 53 and 54, so as to contact at least some of the multiple internal electrodes 12A and 12B that are exposed from the end faces 51 and 52.
[0023] The glass layer 22 is provided on the four surfaces, namely the bottom surface 55, the top surface 56, and the sides 53 and 54, from the leading edge of the base metal layer 21 to the opposite side of the end surfaces 51 and 52, i.e., towards the center of the base body 10. The glass layer 22 is provided continuously on the four surfaces on the end surface 51 side, namely the bottom surface 55, the top surface 56, and the sides 53 and 54, and on the four surfaces on the end surface 52 side, namely the bottom surface 55, the top surface 56, and the sides 53 and 54. The glass layer 22 is spaced apart in the longitudinal direction (X-axis direction) of the base body 10 on the end surface 51 side and the end surface 52 side. Furthermore, it is preferable that the leading edge of the glass layer 22 opposite to the end surfaces 51 and 52 side is exposed from the plating layer 24. This effectively suppresses the intrusion of moisture and corrosive components through the interface between the glass layer 22 and the base metal layer 21.
[0024] The leading edges of the glass layer 22, on the end faces 51 and 52, are provided between the base metal layer 21 and the base body 10. Therefore, the base body 10, the leading edges of the glass layer 22 on the end faces 51 and 52, and the leading edge of the base metal layer 21 form a laminated section 60 in which these are stacked in this order in any region of the end 40. There are no particular restrictions on the length of the laminated section 60 in the longitudinal direction (X-axis direction) of the base body 10, and it can be appropriately selected according to the purpose. As long as the laminated section 60 is present, the intrusion of moisture and corrosive components through the interface between the glass layer 22 and the base metal layer 21 can be effectively suppressed.
[0025] The conductive resin layer 23 is provided so as to cover at least a portion of the glass layer 22 and the underlying metal layer 21. The leading edge of the conductive resin layer 23 is in contact with the glass layer 22 outside the leading edge of the underlying metal layer 21.
[0026] The plating layer 24 is provided on the conductive resin layer 23 such that its tip is in contact with the glass layer 22. The tip of the plating layer 24 is in contact with the glass layer 22 outside the tip of the conductive resin layer 23.
[0027] The plating layer 24 may be one layer or two or more layers. In the multilayer ceramic capacitor 100 according to the first embodiment, a case with two layers is shown as an example, but it is not limited to this.
[0028] In this disclosure, the outer edges defining each member are preferably configured as flat surfaces, but they do not have to be strictly planar as long as they are perceived as flat when viewed as a whole. For example, surfaces with minute irregularities on the surface or gently curved shapes within a predetermined range are also included.
[0029] The size of the multilayer ceramic capacitor 100 is not particularly limited, but for example, it may be 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height; 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height; 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height; 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height; 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height; or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height. However, the sizes listed above for the multilayer ceramic capacitor 100 are merely examples, and the multilayer ceramic capacitor 100 is not limited to the above sizes. The size of the multilayer ceramic capacitor 100 may be, for example, length > width ≥ height, width > length ≥ height, height > length ≥ width, or height > width ≥ length. For example, length represents the size in the X-axis direction, width represents the size in the Y-axis direction, and height represents the size in the Z-axis direction.
[0030] <Dielectric layer 14> The dielectric layer 14 mainly contains ceramic. Examples of ceramics included in the dielectric layer 14 are those with the general formula ABO 3-α The dielectric layer 14 contains a compound having a perovskite-type structure represented by (0 ≤ α ≤ 1). The dielectric layer 14 may further contain additives as needed.
[0031] A compound having a perovskite-type structure, in the case of a stoichiometric composition, has α, which represents the amount deviating from the stoichiometric composition, being 0, and is represented by the general formula ABO3. In the compound having a perovskite-type structure represented by the aforementioned general formula, α may be greater than 0 and 1 or less. That is, the compound having a perovskite-type structure represented by the aforementioned general formula may be oxygen-deficient compared to the stoichiometric composition.
[0032] The aforementioned general formula ABO 3-α wherein "A" is preferably one or more elements selected from the group consisting of Ba (barium), Sr (strontium), Ca (calcium), and Mg (magnesium). The aforementioned general formula ABO 3-α wherein "B" is preferably one or more elements selected from the group consisting of Ti (titanium), Zr (zirconium), and Hf (hafnium). The aforementioned general formula ABO 3-α In the compound having a perovskite-type structure represented by the formula, the elements "A" and "B" are located at the A-site and B-site of the perovskite-type structure, respectively.
[0033] Specific examples of the compound having a perovskite-type structure include barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and Ba that forms a perovskite-type structure 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≦x≦1, 0≦y≦1, 0≦z≦1), one or more selected from the group consisting of these may be mentioned.
[0034] Ba 1-x-y Ca x Sr y Ti 1-z Zr zExamples of O3 include barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, and barium calcium zirconate titanate. Note that compounds having a perovskite structure may contain oxygen deficiencies in any of these materials.
[0035] The dielectric layer 14 preferably contains barium titanate as a compound having a perovskite-type structure, as it has particularly excellent dielectric properties. It may contain barium titanate as the main component, or it may be composed solely of barium titanate. Barium titanate has an extremely high relative permittivity and low dielectric loss, among other excellent dielectric properties. Therefore, by including barium titanate as a compound having a perovskite-type structure in the dielectric layer 14, the capacitance of the multilayer ceramic capacitor 100 can be increased.
[0036] In this disclosure, "main component" means the component that is present in the largest proportion of the total amount of substance among the components contained.
[0037] Furthermore, the dielectric layer 14 may contain a compound having a perovskite-type structure as a main component. The dielectric layer 14 may contain, for example, 50 mol% or more of a compound having a perovskite-type structure, or 90 mol% or more, or may consist solely of a compound having a perovskite-type structure.
[0038] The dielectric layer 14 may also contain additives as optional components.
[0039] The additives contained in the dielectric layer 14 are not particularly limited, and include, for example, zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), Examples include oxides containing one or more elements selected from the group consisting of thulium (Tm) and ytterbium (Yb); oxides containing one or more elements selected from the group consisting of cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si); or glasses containing one or more elements selected from the group consisting of cobalt, nickel, lithium, boron, sodium, potassium, and silicon.
[0040] The average thickness of the dielectric layer 14 is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers to increase capacitance, it is preferably 1.0 μm or less, more preferably 0.8 μm or less, and even more preferably 0.5 μm or less. Also, from the viewpoint of improving productivity and yield, the average thickness of the dielectric layer 14 is preferably 0.2 μm or more, and more preferably 0.4 μm or more. The lower limit and upper limit of the average thickness of the dielectric layer 14 can be combined as appropriate, and it is preferably 0.2 μm or more and 1.0 μm or less, more preferably 0.2 μm or more and 0.8 μm or less, even more preferably 0.4 μm or more and 0.8 μm or less, and particularly preferably 0.4 μm or more and 0.5 μm or less.
[0041] To evaluate the average thickness of the dielectric layer 14, as shown in Figures 1 and 2, a multilayer ceramic capacitor 100 is polished or cut along the Y-axis, and polished or cut up to the center along the Y-axis to prepare a sample in which the XZ plane, where the dielectric layer 14 and internal electrodes 12A and 12B are stacked, is exposed. From the exposed XZ plane, two dielectric layers 14 located in the center along the Z-axis are selected, and then two dielectric layers 14 located at the upper and lower ends along the Z-axis are selected.
[0042] Then, for the selected dielectric layer 14, the thickness is measured at the center along the first direction, the X-axis, and this is taken as the thickness of the dielectric layer 14. The same procedure is used to measure the thickness of all six selected dielectric layers 14 and calculate the average value. This average value is taken as the average thickness of the dielectric layers 14 in the multilayer ceramic capacitor 100. The thickness of the dielectric layer 14 can be measured, for example, with a microscope.
[0043] <Internal electrodes 12A and 12B> The internal electrodes 12A and 12B contain a conductive material. The internal electrodes 12A and 12B may further contain a common material as needed.
[0044] There are no particular restrictions on the conductive material, and it can be appropriately selected depending on the purpose. Examples include base metals such as Ni (nickel), Cu (copper), and Sn (tin), or alloys containing them; and precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing them. These may be used individually or in combination of two or more. Among these, materials containing base metals or alloys containing them as the main component are preferred because they can suppress manufacturing costs even when high-layer construction is performed, and Ni is more preferred because it can be fired together with the dielectric layer 14 and has good manufacturing efficiency.
[0045] The content of each metal in internal electrodes 12A and 12B can be confirmed by performing elemental analysis of internal electrodes 12A and 12B using various measuring instruments and calculating the atomic ratio of each component to the total number of elements detected. Measuring instruments for elemental analysis include energy dispersive X-ray spectrometers (EDS) or wavelength dispersive X-ray spectrometers (WDS) mounted on scanning electron microscopes (SEM) or transmission electron microscopes (TEM), electron probe microanalyzers (EPMA), and laser-irradiated inductively coupled plasma mass spectrometers (LA-ICP-MS).
[0046] The co-material is not particularly limited, but for example, it is the same as the ceramic that is the main component of the dielectric layer 14, and is preferably spherical particles. The co-material is of general formula ABO 3-α It is preferable to include a compound having a perovskite-type structure represented by (0 ≤ α ≤ 1).
[0047] Specific examples of co-materials include barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and Ba that form a perovskite-type structure. 1-x-y Ca x Sr y Ti 1-z Zr z One or more of the following can be selected from the group O3 (0≦x≦1, 0≦y≦1, 0≦z≦1).
[0048] Ba 1-x-y Ca x Sr y Ti 1-z Zr zExamples of O3 include barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, and barium calcium zirconate titanate. Note that compounds having a perovskite structure may contain oxygen deficiencies in any of these materials.
[0049] The particle size of the co-material is not particularly limited, but is preferably smaller than the thickness of the internal electrodes 12A and 12B, and more preferably 10 nm to 100 nm, and even more preferably 10 nm to 50 nm, from the viewpoint of thinning the internal electrodes 12A and 12B.
[0050] There are no particular restrictions on the content of the common material in the internal electrodes 12A and 12B, and it can be appropriately selected according to the purpose.
[0051] The content of the common material in internal electrodes 12A and 12B is the mass ratio of the common material when the content of the conductive material in internal electrodes 12A and 12B is set to 100% by mass. The content of the common material in internal electrodes 12A and 12B can be calculated from the amount of raw materials used when manufacturing internal electrodes 12A and 12B.
[0052] The average thickness of the internal electrodes 12A and 12B is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers and thus increasing the capacitance, it is preferably 0.8 μm or less, more preferably 0.6 μm or less, and even more preferably 0.4 μm or less. Also, from the viewpoint of improving productivity and yield, the average thickness of the internal electrodes 12A and 12B is preferably 0.2 μm or more, and more preferably 0.3 μm or more. The upper and lower limits of the average thickness of the internal electrodes 12A and 12B can be appropriately combined, with 0.2 μm or more and 0.8 μm or less being preferred, 0.2 μm or more and 0.6 μm or less being more preferred, 0.3 μm or more and 0.6 μm or less being even more preferred, and 0.4 μm or less and 0.6 μm or less being particularly preferred.
[0053] To evaluate the average thickness of internal electrodes 12A and 12B, as shown in Figures 1 and 2, a multilayer ceramic capacitor 100 is polished or cut along the Y-axis, and polished or cut up to the center along the Y-axis, to prepare a sample in which the XZ plane, where the dielectric layer 14 and internal electrodes 12A and 12B are stacked, is exposed. From the exposed XZ plane, two layers of internal electrodes 12A and 12B located in the center along the Z-axis are selected, and then two layers each of internal electrodes 12A and 12B located at the upper and lower ends along the Z-axis are selected. In this case, the internal electrodes 12A and 12B to be selected are selected from within the capacitance portion.
[0054] Then, for the selected internal electrodes 12A and 12B, the thickness is measured at the center along the first direction, the X-axis, and this is taken as the thickness of internal electrodes 12A and 12B. Using the same procedure, the thickness of internal electrodes 12A and 12B is measured for all six selected layers of internal electrodes 12A and 12B, and the average value is calculated. This average value is taken as the average thickness of internal electrodes 12A and 12B in the multilayer ceramic capacitor 100. The thickness of internal electrodes 12A and 12B can be measured, for example, with a microscope.
[0055] <Cover dielectric layer 16> The composition of the main component ceramic of the cover dielectric layer 16 may be the same as or different from the main component ceramic of the dielectric layer 14.
[0056] <Underlayment metal layer 21> There are no particular restrictions on the metal that forms the main component of the base metal layer 21, but it is preferable that the metal improves the conductivity between the internal electrodes 12A and 12B and the base metal layer 21. Examples include metals such as copper (Cu), nickel (Ni), aluminum (Al), and zinc (Zn), or alloys of two or more of these (for example, an alloy of copper and nickel). These may be used individually or in combination of two or more. Among these, it is more preferable that the base metal layer 21 contains copper as its main component, as it is less permeable to hydrogen.
[0057] The base metal layer 21 preferably contains glass components for densification in addition to the main components mentioned above. Examples of glass components contained in the base metal layer 21 include oxides of barium (Ba), strontium (Sr), calcium (Ca), zinc (Zn), aluminum (Al), silicon (Si), and boron (B). These may be used individually or in combination of two or more.
[0058] The base metal layer 21 preferably contains, in addition to the main components, a glass component for densification and a ceramic material such as a co-material for controlling the firing properties of the external electrodes 20A and 20B. Examples of glass components contained in the base metal layer 21 include oxides of barium (Ba), strontium (Sr), calcium (Ca), zinc (Zn), aluminum (Al), silicon (Si), and boron (B). These may be used individually or in combination of two or more.
[0059] The average thickness of the base metal layer 21 is not particularly limited, but is preferably 5 μm to 50 μm.
[0060] <Glass layer 22> The glass layer 22 is preferably mainly composed of silicon dioxide (SiO2). There are no particular restrictions on the silicon dioxide content in the glass layer 22, and it can be appropriately selected depending on the purpose, but 60 mol% or more is preferred, 70 mol% or more is more preferred, 80 mol% or more is even more preferred, and 90 mol% or more is particularly preferred. The glass layer 22, which is mainly composed of silicon dioxide, has good adhesion to the underlying metal layer 21 and the base body 10. For this reason, when the silicon dioxide content in the glass layer 22 is 60 mol% or more, the penetration of moisture and corrosive components through the interface between the glass layer 22 and the base body 10, and the interface between the glass layer 22 and the underlying metal layer 21 can be effectively suppressed.
[0061] In this disclosure, the silicon dioxide content in the glass layer 22 is measured using the STEM (Scanning Transmission Electron Microscope)-EDS (Energy Dispersive X-ray Spectroscopy) method. The glass layer 22 is irradiated with an electron beam, and the molar ratio of SiO2 in the glass is calculated from the silicon and metal element peaks in the glass layer 22. The silicon dioxide content in the glass layer 22 is the average value of the values measured and calculated using the above method at 10 arbitrarily selected locations in the glass layer 22.
[0062] The average thickness of the glass layer 22 is not particularly limited, but is preferably 0.1 μm to 10 μm, and more preferably 0.5 μm to 5 μm.
[0063] <Conductive resin layer 23> The conductive resin layer 23 is mainly composed of resin. There are no particular restrictions on the resin that is the main component of the conductive resin layer 23; it may be a thermoplastic resin or a thermosetting resin, but a thermosetting resin is preferred.
[0064] There are no particular restrictions on the thermosetting resin, and any known resin can be appropriately selected, such as epoxy resin, phenolic resin, urethane resin, silicone resin, and polyimide resin. These may be used individually or in combination of two or more. Among these, epoxy resin and phenolic resin are preferred as the main component of the conductive resin layer 23 because they offer excellent heat resistance, moisture resistance, and adhesion to the glass layer 22.
[0065] The conductive resin layer 23 further contains conductive fillers. When the conductive resin layer 23 contains conductive fillers, current-carrying paths are formed inside the conductive resin layer 23 by the conductive mechanisms of the conductive adhesive, such as direct contact between the conductive fillers and / or the tunneling effect.
[0066] There are no particular restrictions on the conductive filler, and it can be appropriately selected from known materials, such as Ag powder, Cu powder, Ni powder, or alloys thereof. These may be used individually or in combination of two or more.
[0067] As a conductive filler, metal particles coated with Ag may be used. When using metal particles coated with Ag, it is preferable to use Cu or Ni as the metal particles. Alternatively, Cu that has been treated to prevent oxidation can also be used.
[0068] There are no particular restrictions on the shape of the conductive filler; for example, spherical or flattened shapes are used. These may be used individually or in combination of two or more types.
[0069] There are no particular restrictions on the average particle size of the conductive filler, but it is preferable that it be smaller than the average thickness of the conductive resin layer 23, and more preferably 0.3 μm or more and 10.0 μm or less.
[0070] Here, the average particle size of the conductive filler refers to the number-based arithmetic mean area diameter. First, a multilayer ceramic capacitor 100 having a conductive resin layer 23 is processed into a thin section by focused ion beam (FIB) processing. Next, this thin section sample is imaged with a transmission electron microscope (TEM) or a scanning electron microscope (SEM). Subsequently, the boundaries of the conductive fillers in the conductive resin layer 23 are detected by analyzing the captured TEM or SEM images. Note that either a transmission electron microscope (TEM) or a scanning electron microscope (SEM) appropriate for the sample may be used. Next, the area equivalent diameter based on the cross-sectional area of the conductive filler whose boundary was detected is calculated as the particle diameter of the conductive filler. Then, the particle diameters of multiple conductive fillers present in the measurement area are calculated, and their number-based arithmetic mean is calculated as the average particle diameter. Note that the measurement area can be appropriately set so that the number of conductive fillers within the measurement area is between 30 and 300. Then, the average particle diameter is calculated based on the particle diameters of 30 or more conductive fillers.
[0071] The average thickness of the conductive resin layer 23 is not particularly limited, but is preferably 3 μm to 100 μm, and more preferably 5 μm to 50 μm.
[0072] The conductive resin layer 23 may further contain a curing agent. There are no particular restrictions on the curing agent, and it can be appropriately selected from known ones, such as phenolic curing agents, amine curing agents, acid anhydride curing agents, and imidazole curing agents. These may be used individually or in combination of two or more.
[0073] <Plating layer 24> The composition of the plating layer 24 may be the same as or different from the composition of the base metal layer 21. By having different hardnesses for the base metal layer 21 and the plating layer 24, stress can be easily relieved and mechanical strength can be improved. Therefore, it is preferable that the main metal component of the plating layer 24 has a different composition from the main metal component of the base metal layer 21.
[0074] Examples of metals that make up the main component of the plating layer 24 include base metals such as copper (Cu), nickel (Ni), and tin (Sn), or alloys containing them; and precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing them. These may be used individually or in combination of two or more.
[0075] In the multilayer ceramic capacitor 100 according to the first embodiment, a two-layer plating layer 24 is provided, comprising a first plating layer 24a provided on the conductive resin layer 23 such that its tip contacts the glass layer 22, and a second plating layer 24b provided on the first plating layer 24a such that its tip contacts the glass layer 22. Note that the plating layer 24 may consist of only one layer, or it may consist of three or more layers.
[0076] The first plating layer 24a is preferably mainly composed of Ni. Furthermore, if the first plating layer 24a is mainly composed of Ni, the second plating layer 24b is preferably mainly composed of a metal element other than Ni, and more preferably mainly composed of Sn.
[0077] The total average thickness of the plating layer 24 is not particularly limited, but is preferably 2 μm to 20 μm, and more preferably 7 μm to 13 μm.
[0078] The average thickness of the first plating layer 24a is not particularly limited, but is preferably 1 μm to 10 μm, and more preferably 3 μm to 5 μm.
[0079] The average thickness of the second plating layer 24b is not particularly limited, but is preferably 1 μm to 10 μm, and more preferably 4 μm to 8 μm.
[0080] The content of each metal in the base metal layer 21, the conductive resin layer 23, and the plating layer 24 can be confirmed by performing elemental analysis of each layer using various measuring instruments and calculating the atomic ratio of each component to the total elements detected. Examples of measuring instruments for elemental analysis include those used in the measurement of the content of each metal in the internal electrodes 12A and 12B.
[0081] The content of non-metallic components in the base metal layer 21, the conductive resin layer 23, and the plating layer 24 can be calculated from the amount of raw materials used when producing each layer.
[0082] To evaluate the average thickness of the base metal layer 21, glass layer 22, conductive resin layer 23, and plating layer 24, as shown in Figures 1 and 2, a multilayer ceramic capacitor 100 is prepared by polishing or cutting along the Y-axis, continuing to the center along the Y-axis, to expose the surface having the base metal layer 21, glass layer 22, conductive resin layer 23, and plating layer 24. In the exposed cross-section, three arbitrary points are selected from the base metal layer 21, glass layer 22, conductive resin layer 23, and plating layer 24 to be measured, and the thickness is measured and the average value is calculated. This average value is taken as the average thickness of the base metal layer 21, glass layer 22, conductive resin layer 23, and plating layer 24 in the multilayer ceramic capacitor 100. The thicknesses of the base metal layer 21, glass layer 22, conductive resin layer 23, and plating layer 24 can be measured, for example, with a microscope.
[0083] The multilayer ceramic electronic component according to the first embodiment has a conductive resin layer 23, and therefore has excellent mechanical strength against stress caused by substrate deflection and temperature changes. This makes it possible to suppress the occurrence of cracks when mounting on a circuit board and during use. In addition, conventionally, when resin is used for the external electrodes 20A and 20B, there is a problem that the resin allows hydrogen to pass through, but since there is a glass layer 22 extending from the tip of the base metal layer 21 on the four surfaces of the base body 10 to the opposite side of the end faces 51 and 52, it is possible to prevent hydrogen that penetrates the interior through the conductive resin layer 23 from entering the interface between the interior of the base body 10 and the base metal layer 21, thereby improving reliability. When the plating layer 24 is mainly composed of Ni, water or corrosive components, especially hydrogen, are generated in the plating solution when the plating layer 24 is formed, but since the tip of the plating layer 24 is in contact with the glass layer 22, it is possible to prevent water or corrosive components generated from the plating layer 24 from entering the interface between the interior of the base body 10 and the base metal layer 21. Furthermore, the glass layer 22 can prevent solder flux from penetrating the interface between the base body 10 and the underlying metal layer 21 when mounting the multilayer ceramic capacitor 100. Also, since the leading edges of the glass layer 22 on the end faces 51 and 52 are provided between the underlying metal layer 21 and the base body 10, the adhesion between the glass layer 22 and the underlying metal layer 21, and the adhesion between the glass layer 22 and the base body 10 are excellent. As a result, the multilayer ceramic electronic component according to the first embodiment can particularly effectively prevent moisture or corrosive components from penetrating the interface between the inside of the base body 10 and the underlying metal layer 21. Moreover, if the underlying metal layer 21 is mainly composed of Cu, which is impermeable to hydrogen, the effect of suppressing the penetration of hydrogen into the inside of the base body 10 is high. Therefore, the multilayer ceramic electronic component according to the first embodiment has excellent mechanical strength and improved reliability.
[0084] The multilayer ceramic electronic component according to the first embodiment can be suitably manufactured by the manufacturing method of the multilayer ceramic electronic component according to the first embodiment or the manufacturing method of the multilayer ceramic electronic component according to the second embodiment, as described later.
[0085] (Second Embodiment) The multilayer ceramic electronic component according to the second embodiment is the same as the multilayer ceramic electronic component according to the first embodiment, except that the arrangement of the glass layer 22 is different. Specifically, in the multilayer ceramic electronic component according to the second embodiment, the leading edges of the glass layer 22 on the end faces 51 and 52 are provided between the base metal layer 21 and the conductive resin layer 23.
[0086] Figure 4 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to the second embodiment of this disclosure. The base body 10, the leading edge of the base metal layer 21, and the leading edges 51 and 52 of the glass layer 22 are stacked in this order in any region of the end 40 to form a laminated portion 61. There are no particular restrictions on the length of the laminated portion 61 in the longitudinal direction (X-axis direction) of the base body 10, and it can be appropriately selected according to the purpose.
[0087] Even when the leading edges of the glass layer 22 on the end faces 51 and 52 are located between the underlying metal layer 21 and the conductive resin layer 23, i.e., in the configuration of the laminated portion 61, the same effects as those of the multilayer ceramic capacitor according to the first embodiment can be obtained.
[0088] The multilayer ceramic electronic component according to the second embodiment can be suitably manufactured by the method for manufacturing the multilayer ceramic electronic component according to the third embodiment, which will be described later.
[0089] (Comparative Implementation) Figure 5A is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a comparative embodiment. Figure 5B is an enlarged cross-sectional view of region VB in Figure 5A.
[0090] In the multilayer ceramic capacitor 200 according to the comparative embodiment, there is no glass layer 22, and the leading edges of the base metal layer 21, the leading edges of the conductive resin layer 23, and the leading edges of the plating layer 24 are in contact with the four surfaces of the base body 10: the bottom surface 55, the top surface 56, and the side surfaces 53 and 54. When forming the plating layer 24, as shown by arrow 70, moisture or corrosive components in the plating solution, especially hydrogen, penetrate the interface between the base body 10 and the base metal layer 21 and enter the end surface 51. Also, as shown by arrow 71, corrosive components from outside the multilayer ceramic capacitor 200 also penetrate the interface between the base body 10 and the base metal layer 21 and enter the end surface 51. As a result, the internal electrodes 12A, etc., corrode. Furthermore, when mounting the multilayer ceramic capacitor 200, solder flux may penetrate the interface between the base body 10 and the base metal layer 21. Thus, the resistance to the plating solution and moisture resistance are reduced. Although only the external electrode 20A side has been shown as an example, the same thing happens on the external electrode 20B side as well.
[0091] [Manufacturing method for multilayer ceramic capacitors] (First Embodiment) The method for manufacturing a multilayer ceramic electronic component according to the first embodiment preferably includes the steps of preparing a base body, forming a base metal layer, forming a glass layer, forming a conductive resin layer, and forming a plating layer, and may further include other steps as needed.
[0092] Figure 6 is a flowchart showing an example of a method for manufacturing a multilayer ceramic electronic component according to the first embodiment.
[0093] <Process S101: Process of preparing the base model> In the process of preparing the base body (process S101), a base body 10 is prepared in which multiple internal electrodes 12A and 12B and multiple dielectric layers 14 mainly composed of ceramic are alternately stacked, and the base body 10 has opposing end faces 51 and 52, as well as four faces adjacent to the end faces 51 and 52, namely the bottom surface 55, the top surface 56, and the side surfaces 53 and 54.
[0094] The process of preparing the base material may include a dielectric layer precursor sheet formation process, an internal electrode pattern formation process, a lamination process, a crimping process, a cutting process, and a firing process.
[0095] <<Process S10: Dielectric layer precursor sheet formation process>> In the dielectric layer precursor sheet formation process (step S10), a dielectric material is prepared by adding various additive compounds (such as firing aids) to, for example, ceramic raw material powder. The ceramic raw material powder used as the dielectric material is, for example, of the general formula ABO 3-α Examples include materials that can produce ceramics containing compounds having a perovskite-type structure represented by (0 ≤ α ≤ 1). For example, barium titanate (BaTiO3) is a tetragonal compound having a perovskite-type structure and exhibiting a high dielectric constant. Barium titanate can generally be obtained by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate.
[0096] Conventionally, various methods are known for synthesizing ceramic raw material powders, such as the solid-phase method, the sol-gel method, and the hydrothermal method. Any of these methods can be employed in the embodiments of this disclosure.
[0097] From the viewpoint of thinning the dielectric layer 14, the average particle size of the ceramic raw material powder is preferably 50 nm to 200 nm.
[0098] As a dielectric material, certain additives can be added to the ceramic raw material powder depending on the purpose. The additive compounds include one or more elements selected from the group consisting of zirconium (Zr), niobium (Nb), molybdenum (Mo), tantalum (Ta), tungsten (W), magnesium (Mg), manganese (Mn), vanadium (V), and chromium (Cr); scandium (Sc), yttrium (Y), cerium (Ce), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), and erbium (Er). Examples include oxides containing one or more rare earth elements selected from the group consisting of thulium (Tm) and ytterbium (Yb); oxides containing one or more elements selected from cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si); and glasses containing one or more elements selected from the group consisting of cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si). These may be used individually or in combination of two or more. Of these, silicon dioxide (SiO2), which is mainly an oxide of silicon (Si), functions suitably as a calcination aid.
[0099] One method for preparing dielectric materials is to wet-mix ceramic raw material powder with a compound containing additives and additive compounds as needed, then dry and pulverize the mixture. Alternatively, the raw material powder may be further pulverized after drying and pulverizing to adjust its particle size, or combined with a classification process to adjust its particle size.
[0100] Next, a slurry is produced by wet mixing of the prepared dielectric material with an organic binder, an organic solvent, a plasticizer, etc. The organic binder is not particularly limited, and known resins such as polyvinyl butyral (PVB) resin can be used. The organic solvent is not particularly limited, and examples include ethanol and toluene.
[0101] The method for preparing the slurry is not particularly limited, and one example is a wet mixing method in which a dielectric material, an organic binder, an organic solvent, and a plasticizer are added. When preparing the dielectric material, the organic binder may also be added at the same time as mixing ceramic raw material powder, etc., and then wet mixing may be performed.
[0102] Next, the slurry is applied to the substrate. For example, the obtained slurry can be applied to the substrate by a die coater or a doctor blade. After that, the substrate coated with the slurry is dried to form a dielectric layer precursor sheet. A ceramic precursor sheet is an example of a dielectric layer precursor sheet. The thickness of the dielectric layer precursor sheet can be appropriately selected according to the average thickness of the target dielectric layer 14.
[0103] The substrate is not particularly limited, but it is preferably made of a material that allows the dielectric layer precursor sheet to be peeled off, for example, polyethylene terephthalate (PET) film.
[0104] <<Process S11: Internal electrode pattern formation process>> In the internal electrode pattern formation step (step S11), metal patterns that will become internal electrodes 12A and 12B are formed on the dielectric layer precursor sheet. Specifically, a conductive paste for forming internal electrodes, containing an organic binder, is printed onto the dielectric layer precursor sheet, for example, using gravure printing. This forms multiple metal patterns corresponding to the internal electrodes 12 on the dielectric layer precursor sheet, spaced apart from each other.
[0105] The conductive paste may contain metal powders that are the main components of base metals such as Ni (nickel), Cu (copper), and Sn (tin) or alloys containing them; or precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au) or alloys containing them, a binder, and an organic solvent. In addition, the conductive paste may contain a compound of the general formula ABO as a co-material. 3-α The material may contain ceramic particles such as compounds having a perovskite-type structure represented by (0 ≤ α ≤ 1).
[0106] Conductive paste can be prepared by kneading together a main metal component and, if necessary, other components such as complementary materials.
[0107] The conductive paste can be printed using printing methods such as screen printing or gravure printing. Furthermore, the method for forming the internal electrode pattern in the internal electrode pattern formation step (step S11) is not limited to printing, and plating, vacuum deposition, sputtering, or CVD methods may also be used. This forms an internal electrode pattern for internal electrode 12A or an internal electrode pattern for internal electrode 12B on the surface of the dielectric layer precursor sheet.
[0108] Alternatively, an organic binder such as ethylcellulose and an organic solvent such as terpineol can be added to the dielectric material obtained in the dielectric layer precursor sheet formation process (step S10), and the mixture can be kneaded in a roll mill to obtain a dielectric pattern paste for the reverse pattern layer. Then, the dielectric pattern paste can be formed in the peripheral region on the dielectric layer precursor sheet where the first and second internal electrode patterns have not been formed, thereby arranging the dielectric pattern and filling the step difference between the first and second internal electrode patterns. The dielectric layer precursor sheet on which the internal electrode pattern and dielectric pattern have been formed is referred to as a stacking unit.
[0109] <<Process S12: Lamination Process>> The lamination process (step S12) involves forming a laminate by stacking two or more dielectric layer precursor layers, each having an internal electrode pattern, along the Z-axis direction.
[0110] While peeling the substrate from the dielectric layer precursor sheet, a dielectric layer precursor layer with an internal electrode pattern and dielectric pattern for internal electrode 12A formed on it, and a dielectric layer precursor layer with an internal electrode pattern and dielectric pattern for internal electrode 12B formed on it are stacked in sequence. At this time, it is preferable to stack the stacking units such that the internal electrodes 12 and the dielectric layer 14 are staggered, and the edges of the internal electrodes 12A and 12B are alternately exposed on both end faces 51 and 52 in the longitudinal direction of the dielectric layer 14, and alternately drawn out to a pair of base metal layers 21 with different polarities.
[0111] The number of layers in a layering unit is not particularly limited and can be appropriately selected according to the purpose; for example, it can be between 100 and 500 layers.
[0112] Furthermore, cover dielectric layers 16 may be further laminated on the upper and lower surfaces of the dielectric layer precursor layer laminate. The number of cover dielectric layers 16 is not particularly limited and can be appropriately selected depending on the purpose, for example, it can be 2 to 10 layers. The cover dielectric layers 16 may have the same composition as the dielectric layer precursor layer, or the additives and additive compounds added to the ceramic raw material powder may be different.
[0113] <<Process S13: Crimping Process>> In the crimping step (step S13), the laminate formed in the lamination step (step S12) is pressed to crimp the multiple dielectric layer precursors together. In the lamination step (step S12), the laminate obtained as described above, preferably a laminate of dielectric layer precursors with the upper and lower surfaces covered by a cover dielectric layer 16, can be formed by thermocompression bonding. As a crimping means, for example, a hydrostatic press can be used.
[0114] <<Process S14: Cutting process>> In the cutting process (process S14), the laminate obtained in the crimping process (process S13) is cut in the stacking direction to form individual pieces. As a result, multiple internal electrode patterns and multiple dielectric layer precursor layers mainly composed of ceramic are alternately stacked, and multiple laminates are prepared, each having opposing end faces 51 and 52, as well as four faces adjacent to the end faces 51 and 52.
[0115] The method for cutting the laminate is not particularly limited, and existing methods such as cutting with a cutting blade, dicing with a dicer, or laser cutting can be used.
[0116] The size of the individual pieces is not particularly limited and can be appropriately selected according to the desired size of the multilayer ceramic capacitor 100.
[0117] In the cutting process (process S14), the laminate obtained has the internal electrode pattern for internal electrode 12A exposed from end face 51 and the internal electrode pattern for internal electrode 12B exposed from end face 52. After cutting, the laminate may be polished by a method such as barrel polishing. This rounds the corners of the laminate.
[0118] <<Process S15: Firing Process>> In the firing process (step S15), the laminate is fired. The firing process (step S15) may be a process in which only the base body 10 is fired by combining the main component metal in the conductive paste used in the internal electrode pattern formation process (step S11) and the main component metal in the metal paste used in the base metal layer formation process (step S102), or it may be a process in which the base body 10 and the base metal layer precursor are fired together after the base metal layer formation process (step S102).
[0119] There are no particular restrictions on the temperature at which the laminate is fired, but it is preferable to debinder it in a nitrogen gas atmosphere at 250°C to 500°C, and then fire it in a reducing atmosphere at 1300°C to 1400°C for about 1 hour. This fires the laminate, as well as the particles of the internal electrode pattern for internal electrode 12A and internal electrode pattern for internal electrode 12B.
[0120] Based on the above, a base body 10 is prepared in which multiple internal electrodes 12A and 12B and multiple dielectric layers 14 mainly composed of ceramic are alternately stacked, and which has opposing end faces 51 and 52, as well as four adjacent surfaces to the end faces 51 and 52, namely the bottom surface 55, the top surface 56, and the side surfaces 53 and 54.
[0121] <Process S102: Process for forming a glass layer, and Process S103: Process for forming a base metal layer> In the glass layer formation step (step S102), the glass layer 22 is formed on the four surfaces of the base body 10, namely the bottom surface 55, the top surface 56, and the sides 53 and 54, from the leading edge of the base metal layer 21 to the opposite side of the end surfaces 51 and 52. In the base metal layer formation step (step S103), the base metal layer 21 is formed on the end surfaces 51 and 52 and parts of the four surfaces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end surfaces 51 and 52 of the base body 10. Through the glass layer formation step (step S102) and the base metal layer formation step (step S103), the leading edge of the glass layer 22 on the end surfaces 51 and 52 side is provided between the base metal layer 21 and the base body 10.
[0122] In the manufacturing method of the multilayer ceramic electronic component according to the first embodiment, the steps of forming a glass layer (step S102) and forming a base metal layer (step S103) are performed simultaneously.
[0123] The step of forming the glass layer (step S102) may include a glass paste application step and a glass paste firing step. By firing the glass paste, the glass layer 22 is formed. The step of forming the base metal layer (step S103) may also include a base metal layer paste application step and a base metal layer paste firing step. By firing the base metal layer paste, the base metal layer 21 is formed.
[0124] In the manufacturing method of a multilayer ceramic electronic component according to the first embodiment, the firing process of the glass paste and the firing process of the base metal layer paste may be performed simultaneously or separately. When the base metal layer paste contains a glass component and the firing process of the glass paste and the firing process of the base metal layer paste are performed simultaneously, it is preferable to use glass with the same composition as the glass layer 22 for the glass component in the base metal layer paste. Also, when the base metal layer paste contains a glass component and the firing process of the glass paste and the firing process of the base metal layer paste are performed separately, the glass component of the base metal layer paste may be glass with a different composition than that of the glass layer 22. Whether to perform the firing process of the glass paste and the firing process of the base metal layer paste simultaneously or separately may be determined according to the firing temperature based on the composition of the glass paste and the firing temperature based on the composition of the base metal layer paste.
[0125] <<Process S20: Glass paste application process>> In the glass paste application process (process S20), glass paste is applied to parts of the four surfaces of the base body 10: the bottom surface 55, the top surface 56, and the sides 53 and 54.
[0126] The glass paste preferably contains glass powder (glass frit) mainly composed of silicon dioxide, a binder, and an organic solvent. The glass powder may also contain metal oxides such as barium oxide, zinc oxide, calcium oxide, aluminum oxide, magnesium oxide, lithium oxide, sodium oxide, potassium oxide, and boron oxide. These metal oxides may be used individually or in combination of two or more.
[0127] There are no particular restrictions on the silicon dioxide content in the glass paste, but it is preferably 40 mol% or more, and more preferably 50 mol% or more.
[0128] The glass paste is applied to the end 40 and end faces 51 and 52 of the base body 10, for example, using a dipping method. Then, the glass paste applied to the end faces 51 and 52 is removed by repeatedly pressing the metal surface that has not been coated with the glass paste onto it, leaving only a portion of the four surfaces of the base body 10. Alternatively, the glass paste applied to the end faces 51 and 52 may be removed using blotting paper or the like. As a result, the glass paste is applied only to the end 40.
[0129] The thickness of the glass layer 22 can be adjusted by the amount of glass paste applied. The number of times the glass paste is applied to adjust the thickness of the glass layer 22 may be one time or two or more times.
[0130] <<Process S30: Application process for the base metal layer paste>> In the application process for the base metal layer paste (process S30), the base metal layer paste is applied to the end faces 51 and 52 and parts of the four faces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10. At this time, the base metal layer paste is applied so as to cover the part of the glass paste provided only at the end 40 on the end faces 51 and 52 of the base body 10.
[0131] There are no particular restrictions on the main components of the paste for forming the base metal layer; components commonly used in the base metal layer of multilayer ceramic capacitors can be appropriately selected according to the purpose. Examples include metals such as copper (Cu), nickel (Ni), aluminum (Al), and zinc (Zn), or alloys of two or more of these (for example, an alloy of copper and nickel).
[0132] The paste for forming the base metal layer is applied, for example, from the end faces 51 and 52 of the base body 10 using a dipping method.
[0133] The thickness of the base metal layer 21 can be adjusted by the amount of base metal layer forming paste applied. The number of times the base metal layer forming paste is applied to adjust the thickness of the base metal layer 21 may be one time or two or more times.
[0134] <<Process S31: Firing process for glass paste and base metal layer paste>> In the firing process for the glass paste and the paste for the base metal layer (process S31), the glass paste and the paste for the base metal layer are fired.
[0135] There are no particular restrictions on the firing conditions in the firing process (step S31) for the glass paste and the paste for the base metal layer, but it is preferable to fire them in a nitrogen atmosphere at a firing temperature of 700°C to 950°C.
[0136] This causes the glass paste to be baked onto parts of the four surfaces of the base body 10. By baking the glass paste, a glass layer 22 is formed from the glass paste. The glass layer 22 is in contact with the base body 10 and is mainly composed of silicon dioxide. In addition to silicon dioxide, the glass layer 22 may also contain components of the glass powder in the glass paste and oxides of elements in the base body 10. The glass layer 22 is an inorganic insulator containing silicon dioxide and, optionally, metal oxides, and is amorphous.
[0137] Furthermore, the base metal layer paste is baked onto the end faces 51 and 52 of the base body 10, as well as onto parts of the four faces, so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10, and so as to cover a portion of the glass layer 22 on the end face 51 and 52 side of the base body 10. By baking the base metal layer paste, the base metal layer 21 is formed from the base metal layer paste.
[0138] As a result, the base body 10, the tip of the glass layer 22 opposite to the end faces 51 and 52, and the tip of the base metal layer 21 form a laminated portion 60 in any region of the end 40, stacked in this order.
[0139] <Process S104: Process for forming a conductive resin layer> In the step of forming a conductive resin layer (step S104), the conductive resin layer 23 is formed so as to cover at least a portion of the glass layer 22 and the underlying metal layer 21.
[0140] The step of forming the conductive resin layer (step S104) may include a resin coating step and a resin curing step. If the main component of the conductive resin layer is a thermosetting resin, the conductive resin layer 23 is formed by curing the resin. If the main component of the conductive resin layer is a thermoplastic resin, only the resin coating step may be performed.
[0141] <<Process S40: Conductive resin coating process>> In the conductive resin coating step (step S40), the conductive resin composition is applied so as to cover at least a portion of the glass layer 22 and the underlying metal layer 21.
[0142] There are no particular restrictions on the main components of the conductive resin composition, and they can be appropriately selected depending on the purpose. Examples include epoxy resins, phenolic resins, urethane resins, silicone resins, and polyimide resins. These may be used individually or in combination of two or more.
[0143] The conductive resin composition may contain conductive fillers and may further contain curing agents, solvents, etc. These can be those listed under the [Multilayer Ceramic Electronic Components] section.
[0144] The conductive resin composition is applied, for example, from the end faces 51 and 52 of the base body 10 using a dipping method. At this time, the tip of the glass layer 22 opposite to the end faces 51 and 52 is left exposed from the conductive resin composition.
[0145] <<Process S41: Curing process of conductive resin>> In the conductive resin curing step (step S41), the conductive resin composition that was applied in the conductive resin coating step (step S40) to cover at least a portion of the glass layer 22 and the underlying metal layer 21 is cured.
[0146] There are no particular restrictions on the conditions for curing the conductive resin composition; known conditions can be applied depending on the type of conductive resin and curing agent used as the main components in the conductive resin composition.
[0147] (Process S105: Process for forming the plating layer) In the process of forming the plating layer (process S105), the plating layer 24 is formed on the conductive resin layer 23 such that the tip is in contact with the glass layer 22.
[0148] The plating layer 24 is preferably formed by a plating process. The step of forming the plating layer (step S105) is preferably performed using a plating solution containing a metal such as copper (Cu), nickel (Ni), aluminum (Al), zinc (Zn), tin (Sn), or an alloy of two or more of these.
[0149] The step of forming the plating layer (step S105) may include steps such as forming a first plating layer and forming a second plating layer if there are multiple plating layers. When multiple plating layers are formed in this way, the process is carried out by repeating the same method except for changing the plating solution.
[0150] For example, in the process of forming the first plating layer, a plating treatment is performed on the conductive resin layer 23 using a plating solution containing nickel (Ni) so that the tip is in contact with the glass layer 22, thereby forming a first plating layer 24a containing Ni. Also, for example, in the process of forming the second plating layer, a plating treatment is performed on the first plating layer 24a using a plating solution containing tin (Sn) so that the tip is in contact with the glass layer 22, thereby forming a second plating layer 24b containing Sn.
[0151] Through the above process, a multilayer ceramic electronic component is manufactured comprising: a base body 10 having opposing end faces 51 and 52, and four faces adjacent to the end faces 51 and 52, with multiple internal electrodes 12A and 12B and multiple dielectric layers 14 mainly composed of ceramic alternately stacked; a base metal layer 21 provided on the end faces 51 and 52 and parts of the four faces so as to contact at least a portion of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52; a glass layer 22 provided from between the leading edge of the base metal layer 21 on the four faces and the base body 10 to the opposite side of the end faces 51 and 52; a conductive resin layer 23 provided so as to cover at least a portion of the glass layer 22 and the base metal layer 21; and a plating layer 24 provided on the conductive resin layer 23 so as to be in contact with the glass layer 22 at its leading edge.
[0152] (Second Embodiment) The method for manufacturing a multilayer ceramic electronic component according to the second embodiment is the same as the method for manufacturing a multilayer ceramic electronic component according to the first embodiment, except that the steps for forming the glass layer (step S102) and forming the underlying metal layer (step S103) are modified as follows. In the method for manufacturing a multilayer ceramic electronic component according to the second embodiment, the steps for forming the glass layer (step S102) and forming the underlying metal layer (step S103) are performed separately.
[0153] Figure 7 is a flowchart showing an example of a method for manufacturing a multilayer ceramic electronic component according to the second embodiment.
[0154] <Process S102: Process for forming a glass layer> In the process of forming the glass layer (process S102), the glass layer 22 is formed from the leading edge of the base metal layer 21 on the four surfaces of the base body 10, namely the bottom surface 55, the top surface 56, and the sides 53 and 54, to the opposite side of the end surfaces 51 and 52.
[0155] In the manufacturing method of a multilayer ceramic electronic component according to the second embodiment, in the step of forming a glass layer (step S102), a glass film mainly composed of silicon dioxide is attached to a part of the four surfaces of the base body 10. As a method of attaching the glass film, for example, a glass film is attached in advance to a position corresponding to the edge 40 of the cover dielectric layer 16, and the glass layer 22 is formed at the same time as the formation of the cover dielectric layer 16.
[0156] <Process S103: Process for forming the base metal layer> In the process of forming the base metal layer (process S103), the base metal layer 21 is formed on the end faces 51 and 52 and parts of the four faces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10. At this time, the paste for the base metal layer is applied so as to cover the part of the end faces 51 and 52 of the glass plate base body 10 that is provided only at the end 40.
[0157] The step of forming the base metal layer (step S103) may include a step of applying the paste for the base metal layer and a step of firing the paste for the base metal layer.
[0158] <<Process S30: Application process for the base metal layer paste>> In the manufacturing method of the multilayer ceramic electronic component according to the second embodiment, the process is the same as the manufacturing method of the multilayer ceramic electronic component according to the first embodiment, except that in the application step of the base metal layer paste (step S30), the base metal layer paste is applied to the end faces 51 and 52 and parts of the four surfaces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10, and so as to cover a part of the glass layer 22 provided only at the end 40 on the end face 51 and 52 side of the base body 10.
[0159] <<Process S31: Firing process for the base metal layer paste>> In the method for manufacturing a multilayer ceramic electronic component according to the second embodiment, the process is the same as the method for manufacturing a multilayer ceramic electronic component according to the first embodiment, except that in the firing process for the base metal layer paste (step S31), only the base metal layer paste is fired.
[0160] (Third embodiment) The manufacturing method for the multilayer ceramic electronic component according to the third embodiment is the same as the manufacturing method for the multilayer ceramic electronic component according to the first embodiment, except that the order of the steps for forming the glass layer (step S102) and forming the base metal layer (step S103) is reversed. The differences from the manufacturing method for the multilayer ceramic electronic component according to the first embodiment will be explained below.
[0161] Figure 8 is a flowchart showing an example of a method for manufacturing a multilayer ceramic electronic component according to the second embodiment.
[0162] <Process S103: Process for forming the base metal layer> In the step of forming the base metal layer (step S103), the base metal layer 21 is formed on the end faces 51 and 52 and parts of the four faces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10.
[0163] The process of forming the base metal layer (process S103) is performed before the process of forming the glass layer (process S102).
[0164] <<Process S30: Application process for the base metal layer paste>> In the application process for the base metal layer paste (process S30), the base metal layer paste is applied to the end faces 51 and 52 and parts of the four faces of the base body 10 so as to contact at least some of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52 of the base body 10, and so as to cover a portion of the glass paste provided only at the end 40 on the end faces 51 and 52 of the base body 10.
[0165] <<Process S31: Firing process for the base metal layer paste>> In the manufacturing method of a multilayer ceramic electronic component according to the third embodiment, the firing process for the base metal layer paste (step S31) is the same as the firing process for the glass paste and base metal layer paste (step S31) in the manufacturing method of a multilayer ceramic electronic component according to the first embodiment, except that only the base metal layer paste is fired in the firing process for the base metal layer paste (step S31).
[0166] <Process S102: Process for forming a glass layer> In the process of forming the glass layer (process S102), the glass layer 22 is formed such that one end portion, the end portion on the end face 51 and 52 side of the glass layer 22, is provided between the base metal layer 21 and the conductive resin layer 23.
[0167] <<Process S20: Glass paste application process>> In the glass paste application process (process S20), glass paste is applied to parts of the four surfaces of the base body 10, namely the bottom surface 55, the top surface 56, and the sides 53 and 54, so as to cover the edges of the base metal layer 21.
[0168] <<Process S21: Glass paste firing process>> In the manufacturing method of a multilayer ceramic electronic component according to the third embodiment, the firing process of the glass paste and the paste for the base metal layer (step S31) in the manufacturing method of a multilayer ceramic electronic component according to the first embodiment is the same as in the firing process of the glass paste and the paste for the base metal layer (step S31) in the firing process of the glass paste (step S21).
[0169] As a result, the base body 10, the leading edge of the base metal layer 21, and the leading edge of the glass layer 22 opposite to the end faces 51 and 52 form a laminated portion 61 in any region of the end 40, stacked in this order.
[0170] Through the above process, a multilayer ceramic electronic component is manufactured comprising: a base body 10 having opposing end faces 51 and 52, and four faces adjacent to the end faces 51 and 52, with multiple internal electrodes 12A and 12B and multiple dielectric layers 14 mainly composed of ceramic alternately stacked, and having opposing end faces 51 and 52; a base metal layer 21 provided on the end faces 51 and 52 and parts of the four faces so as to contact at least a portion of the multiple internal electrodes 12A and 12B exposed from the end faces 51 and 52; a glass layer 22 provided such that one end of the base metal layer 21 is sandwiched between the four faces of the base body 10, and the other end of the glass layer 22 extends to the opposite side of the end faces 51 and 52; a conductive resin layer 23 provided so as to cover at least a portion of the glass layer 22 and the base metal layer 21; and a plating layer 24 provided on the conductive resin layer 23 so as to be in contact with the glass layer 22.
[0171] As described above, this disclosure has been explained based on specific embodiments and examples, but these embodiments and examples are merely presented as examples, and this disclosure is not limited to the above embodiments and examples. The above embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, additions, modifications, etc., are possible without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.
[0172] Examples of the types of disclosures include the following: <1> A substrate having multiple internal electrodes and multiple dielectric layers mainly composed of ceramic alternately stacked, with opposing end faces and four faces adjacent to the end faces, A base metal layer is provided on the end face and a portion of the four faces so as to contact at least a portion of the plurality of internal electrodes exposed from the end face, A glass layer provided on the four surfaces extending from the leading edge of the base metal layer to the opposite side of the end face, A conductive resin layer is provided so as to cover at least a portion of the glass layer and the underlying metal layer, A plating layer is provided on the conductive resin layer such that the tip portion is in contact with the glass layer, It is a multilayer ceramic electronic component equipped with [the following features]. <2> The tip of the glass layer opposite to the end face is exposed from the plating layer, <1> This is a multilayer ceramic electronic component as described above. <3> The tip of the glass layer on the end face side is provided between the base metal layer and the base body, <1> or <2> This is a multilayer ceramic electronic component as described above. <4> The tip of the glass layer on the end face side is provided between the underlying metal layer and the conductive resin layer, <1> or <2> This is a multilayer ceramic electronic component as described above. <5> The glass layer is mainly composed of silicon dioxide, <1> from <4> It is a multilayer ceramic electronic component as described in any one of the items. <6> The silicon dioxide content in the glass layer is 60 mol% or more. <5> This is a multilayer ceramic electronic component as described above. <7> The silicon dioxide content in the glass layer is 90 mol% or more. <5> This is a multilayer ceramic electronic component as described above. <8> The aforementioned plating layer has a first plating layer mainly composed of Ni, <1> from <7> It is a multilayer ceramic electronic component as described in any one of the items. <9> The plating layer has a second plating layer provided on the first plating layer, the second plating layer having a metal element other than Ni as its main component. <8> This is a multilayer ceramic electronic component as described above. <10> A step of preparing a base body having opposing end faces and four faces adjacent to the end faces, in which multiple internal electrodes and multiple dielectric layers mainly composed of ceramic are alternately stacked, A step of forming a base metal layer on the end face and a portion of the four faces of the base body so as to contact at least a portion of the plurality of internal electrodes exposed from the end face of the base body, A step of forming a glass layer on the four surfaces from the leading edge of the base metal layer to the opposite side of the end face, A step of forming a conductive resin layer so as to cover at least a portion of the glass layer and the underlying metal layer, A step of forming a plating layer on the conductive resin layer such that the tip portion is in contact with the glass layer, This is a method for manufacturing multilayer ceramic electronic components, including [the specified element]. <11> In the process of forming the glass layer, a glass paste containing glass powder mainly composed of silicon dioxide is applied to the four surfaces of the base body from the leading edge of the underlying metal layer to the opposite side of the end face. <10> This is a method for manufacturing multilayer ceramic electronic components as described above. <12> In the process of forming the plating layer, the tip of the glass layer opposite to the end face is exposed from the plating layer when the plating layer is formed. <10> or <11> This is a method for manufacturing multilayer ceramic electronic components as described above. [Explanation of Symbols]
[0173] 100, 200 Multilayer Ceramic Capacitors 10 Base Body 12A, 12B internal electrode 14 Dielectric layer 16 Cover dielectric layer 18 Side margin area 20A, 20B external electrode 21 Underlayment metal layer 22 glass layer 23 Conductive resin layer 24 Plating layer 24a First plating layer 24b Second plating layer 40 End 51, 52 End face 53, 54 Side view 55 Bottom side 56 Top 60, 61 Laminated section 70, 71 Arrows
Claims
1. A base body having multiple internal electrodes and multiple dielectric layers mainly composed of ceramics stacked alternately, and having opposing end faces and four faces adjacent to the end faces, A base metal layer is provided on the end face and a portion of the four faces so as to contact at least a portion of the plurality of internal electrodes exposed from the end face, A glass layer provided on the four surfaces extending from the leading edge of the base metal layer to the opposite side of the end face, A conductive resin layer is provided so as to cover at least a portion of the glass layer and the underlying metal layer, A plating layer is provided on the conductive resin layer such that the tip portion is in contact with the glass layer, A multilayer ceramic electronic component equipped with the following features.
2. The tip of the glass layer opposite to the end face is exposed from the plating layer, as described in claim 1.
3. The tip of the end face side of the glass layer is provided between the underlying metal layer and the base body, as described in claim 1.
4. The multilayer ceramic electronic component according to claim 1, wherein the tip of the end face side of the glass layer is provided between the underlying metal layer and the conductive resin layer.
5. The multilayer ceramic electronic component according to claim 1, wherein the glass layer is mainly composed of silicon dioxide.
6. The multilayer ceramic electronic component according to claim 5, wherein the silicon dioxide content in the glass layer is 60 mol% or more.
7. The multilayer ceramic electronic component according to claim 5, wherein the silicon dioxide content in the glass layer is 90 mol% or more.
8. The multilayer ceramic electronic component according to claim 1, wherein the plating layer has a first plating layer mainly composed of Ni.
9. The multilayer ceramic electronic component according to claim 8, wherein the plating layer has a second plating layer provided on the first plating layer and mainly composed of a metal element other than Ni.
10. A step of preparing a base body having opposing end faces and four faces adjacent to the end faces, in which multiple internal electrodes and multiple dielectric layers mainly composed of ceramic are alternately stacked, A step of forming a base metal layer on the end face and a portion of the four faces of the base body so as to contact at least a portion of the plurality of internal electrodes exposed from the end face of the base body, A step of forming a glass layer on the four surfaces from the leading edge of the base metal layer to the opposite side of the end face, A step of forming a conductive resin layer so as to cover at least a portion of the glass layer and the underlying metal layer, A step of forming a plating layer on the conductive resin layer such that the tip portion is in contact with the glass layer, A method for manufacturing multilayer ceramic electronic components, including [the specified element].
11. A method for manufacturing a multilayer ceramic electronic component according to claim 10, wherein in the step of forming the glass layer, a glass paste containing glass powder mainly composed of silicon dioxide is applied to the four surfaces of the base body from the leading edge of the underlying metal layer to the opposite side of the end face.
12. A method for manufacturing a multilayer ceramic electronic component according to claim 10, wherein in the step of forming the plating layer, the plating layer is formed such that the tip opposite to the end face of the glass layer is exposed from the plating layer.
Citation Information
Patent Citations
Laminated chip component
JP1994124807A
Multilayer ceramic electronic part
JP2021034440A