Multilayer ceramic electronic components

Abstract

To provide multilayer ceramic electronic components with excellent dielectric layer reliability. [Solution] Multiple dielectric layers stacked along the first axis, It comprises a plurality of internal electrode layers, each disposed between adjacent dielectric layers along the first axis, The dielectric layer mainly contains elements A and B, and has the general formula ABO 3-α The material comprises a first crystalline particle containing a compound having a perovskite structure, represented by (0≦α≦1), and a second crystalline particle containing silicon and the aforementioned element A as minor components, wherein the molar content ratio of element A to silicon is 1.5 times or less. The internal electrode layer is a multilayer ceramic electronic component containing a base metal element as its main component.

Description

[Technical Field]

[0001] This disclosure relates to multilayer ceramic electronic components. [Background technology]

[0002] Multilayer ceramic electronic components have a structure in which dielectric layers and internal electrode layers are alternately stacked. Examples of multilayer ceramic electronic components include multilayer ceramic capacitors (MLCCs).

[0003] Multilayer ceramic electronic components, such as multilayer ceramic capacitors, are used in various electronic devices, including high-frequency communication systems like mobile phones and in-vehicle electronic control devices. Therefore, there is a demand for various performance improvements in multilayer ceramic electronic components, and these have been studied for some time (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] International Publication No. 2006 / 132086 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] As mentioned above, multilayer ceramic electronic components are used in various electronic devices, and there is a demand for various performance improvements. In particular, in recent years, there has been a need to reduce the failure rate of multilayer ceramic electronic components due to damage to the dielectric layer when an electric field is applied at temperatures higher than room temperature. In other words, there is a growing demand for multilayer ceramic electronic components with superior dielectric layer reliability.

[0006] This disclosure aims to provide multilayer ceramic electronic components with excellent dielectric layer reliability. [Means for solving the problem]

[0007] The multilayer ceramic electronic component of the present disclosure comprises: a plurality of dielectric layers stacked along a first axis, and a plurality of internal electrode layers respectively disposed between the dielectric layers adjacent to each other along the first axis; The dielectric layer contains, as a main component, element A and element B, and is represented by the general formula ABO 3-α (0≦α≦1), including first crystal particles containing a compound having a perovskite structure, and as an auxiliary component, second crystal particles containing silicon and the element A, in which the content ratio of the element A to silicon in terms of substance amount is 1.5 times or less. The internal electrode layer contains a base metal element as a main component. [Advantageous Effects of the Invention]

[0008] According to the present disclosure, a multilayer ceramic electronic component with excellent dielectric layer reliability can be provided. [Brief Description of the Drawings]

[0009] [Figure 1] FIG. 1 is a partial cross-sectional perspective view illustrating a multilayer ceramic capacitor according to one aspect of the present disclosure. [Figure 2] FIG. 2 is a cross-sectional view illustrating a multilayer ceramic capacitor according to one aspect of the present disclosure. [Figure 3] FIG. 3 is a cross-sectional view illustrating a multilayer ceramic capacitor according to one aspect of the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view illustrating details of an element body according to one aspect of the present disclosure. [Figure 5] FIG. 5 is an explanatory view of the core-shell structure of the first crystal particle. [Figure 6] FIG. 6 is a flowchart of a method for manufacturing a multilayer ceramic capacitor according to one aspect of the present disclosure. [Figure 7] FIG. 7 is a diagram illustrating a method for manufacturing a multilayer ceramic capacitor according to one aspect of the present disclosure. [Detailed Description of the Invention]

[0010] Hereinafter, embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In the present specification and the drawings, components having substantially the same functional configuration may be denoted by the same reference numerals to omit redundant description. In addition, the drawings appropriately show an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other. The X-axis, Y-axis, and Z-axis define a fixed coordinate system fixed to a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component. The X-axis, Y-axis, and Z-axis can correspond to the length, width, and height of the multilayer ceramic capacitor, which is an example of the multilayer ceramic electronic component, when the outer shape thereof is a substantially rectangular parallelepiped. Hereinafter, the multilayer ceramic electronic component of the present embodiment will be described using a multilayer ceramic capacitor which is an example of the multilayer ceramic electronic component.

[0011] [Multilayer Ceramic Electronic Component] (1) Structure of Multilayer Ceramic Electronic Component Figure 1 is a partial cross-sectional perspective view illustrating a multilayer ceramic capacitor 100. Figures 2 and 3 are cross-sectional views illustrating a multilayer ceramic capacitor. Figure 2 is a cross-sectional view along line AA in Figure 1. Figure 3 is a cross-sectional view along line BB in Figure 1. As illustrated in Figures 1 to 3, the multilayer ceramic capacitor 100 comprises a body 10 having a substantially rectangular parallelepiped shape. In the body 10, two opposing surfaces are referred to as the top surface and the bottom surface, and the four surfaces connecting the top surface and the bottom surface are referred to as sides. Usually, the surface on the circuit board side when the multilayer ceramic capacitor is mounted on a circuit board is referred to as the bottom surface, but this is not limited to this. In the example of Figures 1 to 3, the body 10 has a first external electrode 20a and a second external electrode 20b provided on the two opposing sides, the first side 10a and the second side 10b (see Figure 2). The first external electrode 20a extends from the first side 10a to the four adjacent surfaces. The second external electrode 20b extends from the second side surface 10b to four adjacent surfaces. However, the first external electrode 20a and the second external electrode 20b are spaced apart from each other. The external electrodes may be provided on any surface of the base body 10, not limited to two opposing sides.

[0012] The stacking direction in which the dielectric layer 11 and the internal electrode layer 12 are stacked is the first axis. In Figures 1 to 3, the first axis, which is the stacking direction between the dielectric layer 11 and the internal electrode layer 12, is the Z axis, and is the direction in which each internal electrode layer faces the other.

[0013] The axis perpendicular to the first axis, which is the stacking direction, is the second axis. In Figures 1 to 3, the second axis, which is perpendicular to the first axis, which is the stacking direction, is the X-axis. The second axis runs along the length of the base body 10 and is the axis that runs along the direction in which the first side surface 10a and the second side surface 10b of the base body 10 face each other, and the direction in which the first external electrode 20a and the second external electrode 20b face each other.

[0014] The axis perpendicular to the first axis, which is the stacking direction, and perpendicular to the second axis is the third axis. The third axis is the axis along the width of the internal electrode layer 12. In Figures 1 to 3, the third axis, which is perpendicular to the first axis, which is the stacking direction, and perpendicular to the second axis, is the Y axis. The third axis is the axis along the direction in which the third side 10c and the fourth side 10d, which are two of the four sides of the base body 10 other than the first side 10a and the second side 10b, face each other (see Figure 3). The X axis, Y axis, and Z axis are orthogonal to each other.

[0015] The stacking direction is not limited to the Z direction, but can be any direction. For example, the first axis, which is the stacking direction, may be the X-axis in the X direction, or the Y-axis in the Y direction.

[0016] In this specification, for the purpose of describing general embodiments, figures illustrating a specific embodiment may be used. However, the coordinate system described in one embodiment should be interpreted and applied in general embodiments as a general coordinate system with the stacking direction as the first axis. For example, what is described as the X-axis, Y-axis, and Z-axis in Figures 1 to 3, which are used in a specific embodiment where the stacking direction coincides with the Z-axis, can be interpreted and applied in general embodiments as the second axis, third axis, and first axis.

[0017] The element 10 has a structure in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 are alternately stacked. The internal electrode layers 12 comprise a plurality of first internal electrode layers 12a and a plurality of second internal electrode layers 12b. The first internal electrode layers 12a and the second internal electrode layers 12b are alternately stacked. The edges of the first internal electrode layers 12a are led out to the surface of the element 10 on which the first external electrode 20a is provided, in the example of Figures 1 to 3, to the first side surface 10a. The edges of the second internal electrode layers 12b are led out to the surface of the element 10 on which the second external electrode 20b is provided, in the example of Figures 1 to 3, to the second side surface 10b. As a result, the first internal electrode layers 12a and the second internal electrode layers 12b are alternately conductive to the first external electrode 20a and the second external electrode 20b. Therefore, the multilayer ceramic capacitor 100 has a structure in which capacitor units are stacked. Furthermore, in the laminate of the dielectric layer 11 and the internal electrode layer 12, the internal electrode layer 12 is arranged as the outermost layer in the stacking direction, and the outer surfaces of the laminate in the stacking direction, in the examples of Figures 1 to 3, the top and bottom surfaces, are covered by a cover layer 13. The cover layer 13 mainly consists of a ceramic material. For example, the composition of the cover layer 13 may be the same as or different from that of the dielectric layer 11. Note that the configuration is not limited to that shown in Figures 1 to 3, as long as the first internal electrode layer 12a and the second internal electrode layer 12b are exposed in different regions of the surface of the laminate and conduct to different external electrodes. Different regions of the surface of the laminate may be the respective surface regions of opposing faces of the laminate, the respective surface regions of adjacent faces of the laminate, or different surface regions of the same face of the laminate. As long as the different external electrodes are spaced apart from each other, the first internal electrode layer 12a and the second internal electrode layer 12b may extend from the surface exposed to the surface region of the laminate to other surfaces.

[0018] The size of the multilayer ceramic capacitor 100 is not particularly limited, but for example, it may be 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height; 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height; 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height; 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height; 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height; or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height. However, the sizes listed above for the multilayer ceramic capacitor 100 are merely examples, and the multilayer ceramic capacitor is not limited to the above sizes. The size of the multilayer ceramic capacitor 100 may be, for example, length > width ≥ height, width > length ≥ height, height > length ≥ width, or height > width ≥ length. For example, length represents the size in the X-axis direction, width represents the size in the Y-axis direction, and height represents the size in the Z-axis direction.

[0019] As described above, the multilayer ceramic capacitor 100 of this embodiment has a plurality of dielectric layers 11 stacked along the first axis, the Z axis, and a plurality of internal electrode layers 12 each arranged between adjacent dielectric layers 11 along the first axis. The dielectric layers 11 and internal electrode layers 12 will be described below.

[0020] In this specification, component names may be given numbers such as "1st internal electrode layer" and "2nd internal electrode layer." However, these numbers are added solely to identify the component being described and to avoid confusion; they do not indicate priority or arrangement. Therefore, when there is no risk of confusion or when referring to them collectively, they may simply be written as "internal electrode layer." (2) Regarding the dielectric layer Figure 4 shows a magnified view of a portion of the dielectric layer 11 and internal electrode layer 12 of the base body 10. Figure 4 is, for example, a magnified view of region C in Figure 3.

[0021] As shown in Figure 4, the dielectric layer 11 may include first crystalline particles 41 and second crystalline particles 42. The dielectric layer 11 may contain first crystalline particles 41 as the main component and second crystalline particles 42 as a minor component. That is, the dielectric layer 11 may contain the first crystalline particles 41 in the largest proportion of substance, and the amount of second crystalline particles 42 may be less than that of first crystalline particles 41.

[0022] The number of first crystal particles 41 in the dielectric layer 11 may be greater than the number of second crystal particles 42. Since the number of first crystal particles 41 in the dielectric layer 11 can be relatively large, individual first crystal particles 41 are omitted in Figure 4. The first crystal particles 41 can be arranged to fill the dielectric layer 11 around the second crystal particles 42.

[0023] The first crystal grain 41 contains elements A and B, and its general formula is ABO 3-α This includes compounds having a perovskite structure represented by (0 ≤ α ≤ 1).

[0024] The second crystal particle 42 contains silicon and element A, with the molar ratio of element A to silicon being 1.5 times or less. Note that element A in the first crystal particle and element A in the second crystal particle can be the same element. (2-1) Components contained in the dielectric layer (2-1-1) First crystal grain (Compounds having a perovskite structure) The first crystalline grain contains a compound having a perovskite structure as described above. The first crystalline grain may consist only of compounds having a perovskite structure, but even in this case, the presence of unavoidable impurities is not excluded.

[0025] A compound having a perovskite structure, in the case of a stoichiometric composition, has α representing the amount deviating from the stoichiometric composition being 0, and is represented by the general formula ABO₃. In the compound having a perovskite structure represented by the above general formula, α may be greater than 0 and 1 or less. That is, the compound having a perovskite structure represented by the above general formula may have oxygen vacancies relative to the stoichiometric composition.

[0026] As the compound having a perovskite structure, barium titanate (BaTiO₃), calcium zirconate (CaZrO₃), calcium titanate (CaTiO₃), strontium titanate (SrTiO₃), magnesium titanate (MgTiO₃), and Ba that forms a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z (O₃ where 0≦x≦1, 0≦y≦1, 0≦z≦1) and the like, one or more selected therefrom can be used.

[0027] Ba 1-x-y Ca x Sr y Ti 1-z Zr z O₃ is, for example, barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, and barium calcium zirconate titanate. Note that the compound having a perovskite structure may contain oxygen vacancies in any of the materials.

[0028] The dielectric layer 11 preferably contains barium titanate as a compound having a perovskite structure, as it has particularly excellent dielectric properties. It may contain barium titanate as the main component, or it may consist solely of barium titanate. Barium titanate has excellent dielectric properties, such as an extremely high dielectric constant and low dielectric loss. Therefore, by containing barium titanate as a compound having a perovskite structure in the dielectric layer 11, the capacitance of the multilayer ceramic capacitor 100 can be increased. In this specification, "contained as the main component" means that it is contained in the largest proportion of the substance among the contained components.

[0029] Therefore, the first crystal grain may contain barium titanate as a compound having a perovskite structure. (Core-shell structure) The morphology of the first crystal grain 41 is not particularly limited, but may have a core portion 411 and a shell portion 412, for example, as schematically shown in Figure 5. The core portion 411 may include, for example, a compound having a perovskite structure. The shell portion 412 covers the core portion 411 and may include rare earth elements.

[0030] The core portion 411 is a crystalline portion in which the added compound is not solid-dissolved or the amount of added compound solid-dissolved is small. The shell portion 412 is a crystalline portion in which the added compound is solid-dissolved and has a higher concentration of the added compound than that of the core portion 411. The rare earth elements contained in the shell portion 412 are not particularly limited, and one or more selected from scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb) can be used. For example, the elemental concentration of the rare earth element in the shell portion 412 may be higher than the elemental concentration of the rare earth element in the core portion 411. The shell portion 412 may contain trace amounts of elements other than rare earth elements and elements derived from compounds having a perovskite structure, such as manganese (Mn) and magnesium (Mg), and may also contain trace amounts of other elements such as molybdenum (Mo). In this context, "trace amount" means that the content ratio of elements derived from the compounds having a perovskite structure can be less than 0.1 times the total amount of substance of the elements.

[0031] The shell portion 412 may be formed, for example, by adding an additive compound containing rare earth elements to the raw material powder used to form the dielectric layer 11, and then firing it, thereby diffusing and solid-solving the rare earth elements from the surface to the interior of the particles of the compound having a perovskite structure. The thickness of the shell portion 412 can be controlled, for example, by the amount of additive compound containing rare earth elements added, the firing temperature, etc.

[0032] The first crystal grain having a core portion 411 and a shell portion 412 allows the emergence of a large capacitance near the Curie temperature, where the perovskite compound contained in the core portion 411 transitions from a ferroelectric phase to a paraelectric phase, to be lowered to a lower temperature. Therefore, it becomes possible to design a device with higher capacitance in the practical temperature range around room temperature. (2-1-2) Second crystal grain The second crystalline particles are thought to function as a sintering aid when firing and sintering the dielectric layer. In other words, the second crystalline particles can promote the densification of the dielectric layer 11.

[0033] Conventionally, silicon dioxide and the like were used as sintering aids for the dielectric layer 11. However, these reacted with compounds having a perovskite structure contained in the first crystal grains, sometimes extracting large amounts of elements such as element A, which could destabilize the composition of the first crystal grains. When the composition of the first crystal grains contained in the dielectric layer 11 becomes unstable, it leads to a decrease in the reliability of the dielectric layer 11.

[0034] In contrast, by including a second crystal particle 42 in the dielectric layer 11 that contains silicon and has a molar content ratio of element A to silicon of 1.5 times or less, the composition of the first crystal particle can be stabilized, and the reliability of the dielectric layer 11 can be improved.

[0035] In this specification, "excellent reliability of the dielectric layer" means that in the "(1-5) Reliability Test" section of "(1) Evaluation Method" in the examples described later, the result is A, B, or C, and the material passes the test. In other words, it means that the failure rate is low when an electric field is applied at 150°C.

[0036] In the second crystal grain, the molar content ratio of element A to silicon (A / Si) may be 1.45 times or less, 1.2 times or less, 1 time or less, 0.75 times or less, or 0.5 times or less.

[0037] The lower limit of the molar content ratio of element A to silicon in the second crystal grain is not particularly limited, but a lower value is preferable, so it may be 0 or more, 0.05 or more, 0.1 or less, or 0.12 or more.

[0038] Therefore, the molar content ratio of element A to silicon in the second crystal grain may be 0 to 1.5 times, 0.05 to 1.45 times, 0.1 to 1.2 times, 0.12 to 1 time, 0.12 to 0.75 times, or 0.12 to 0.5 times.

[0039] The second crystalline grain may also contain one or more elements C selected from manganese and magnesium, in addition to silicon and element A. The inclusion of element C in the second crystalline grain reduces the incorporation of element A into the second crystalline grain. Therefore, the molar ratio of element A to silicon in the second crystalline grain can be particularly reduced.

[0040] The second crystal grain is, for example, general formula A x C y SiO z It can be expressed as follows, where x can satisfy the above-mentioned ratio of the amount of substance of element A to silicon, and may be, for example, 1.5 or less. In the general formula, A means element A, C means element C, Si means silicon, and O means oxygen. The second crystal grain represented by the above compositional formula contains only trace amounts of element B contained in the first crystal grain, or substantially no element B. Containing only trace amounts of element B means that the ratio of the amount of substance of element B to element A is less than 0.1, and substantially no element B means that the ratio of the amount of substance of element B to element A is less than 0.05. Note that if the second crystal grain may contain element B, the second crystal grain can be expressed as, for example, in the general formula A x B a C y SiO z It can be expressed as follows, and it is also possible that 0≦a / x<0.1 or 0≦a / x<0.05.

[0041] y is not particularly limited, but for example, y may be between 0.1 and 2.2, between 0.3 and 2.0, between 0.6 and 2.0, between 1.2 and 2.0, or between 1.5 and 1.9.

[0042] z can be selected according to the proportions of element A, element C, and silicon, and can be, for example, within the range of 4 ± 0.2, i.e., between 3.8 and 4.2.

[0043] The size of the second crystal grains is not particularly limited, but for at least a portion of the second crystal grains 42, the length L42 along the first axis may be 1 / 3 or more the thickness T11 of the dielectric layer 11. That is, the dielectric layer 11 may contain second crystal grains whose length along the first axis is 1 / 3 or more the thickness T11 of the dielectric layer 11.

[0044] Conventionally, as the size of the second crystal particles derived from the sintering aid increased, the composition of the first crystal particles containing the dielectric became unstable, meaning that the variation in composition increased, and the reliability of the dielectric layer 11 tended to decrease. In contrast, in the multilayer ceramic capacitor of this embodiment, the variation in the composition of the first crystal particles can be reduced regardless of the size of the second crystal particles. Therefore, in the multilayer ceramic capacitor of this embodiment, the larger the size of the second crystal particles, the more effective it is in terms of the reliability of the dielectric layer 11 compared to the conventional technology. Accordingly, for at least a portion of the second crystal particles 42 contained in the dielectric layer 11, the length L42 along the first axis may be 1 / 3 or more of the thickness T11 of the dielectric layer 11, or it may be 1 / 2 or more.

[0045] The upper limit of the length L42 of the second crystal grains 42 contained in the dielectric layer 11 along the first axis is not particularly limited, but may be less than or equal to the thickness T11 of the dielectric layer 11, or it may exceed the thickness T11 of the dielectric layer 11. Of the length L42 along the first axis, the portion of the second crystal grains 42 that exceeds the thickness of the dielectric layer 11 may be embedded in a part of the internal electrode layer 12, or it may penetrate the internal electrode layer 12.

[0046] The method for measuring the thickness T11 of the dielectric layer 11 will be described later.

[0047] The length L42 of the second crystal grain 42 along the first axis is evaluated in a cross-section that includes the first axis equal to the stacking direction. For example, it is preferable to evaluate in a cross-section that further includes the second axis set perpendicular to the stacking direction, or a cross-section that further includes the third axis set perpendicular to both the stacking direction and the second axis, due to the ease of polishing and measurement. In the former case, the multilayer ceramic capacitor 100 is polished in the direction of the third axis, and in the latter case, in the direction of the second axis. Then, in any cross-section that includes the exposed first axis, the length of the second crystal grain 42 contained in the dielectric layer 11 along the first axis can be measured and evaluated. (2-1-3) Additive compound The dielectric layer 11 may also contain an additive compound as an optional component.

[0048] The additive compounds that the dielectric layer 11 can contain are not particularly limited, but examples include oxides or carbonates containing one or more elements selected from zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), and rare earth elements; or oxides or carbonates containing one or more elements selected from cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si); or glass containing one or more elements selected from cobalt, nickel, lithium, boron, sodium, potassium, and silicon.

[0049] Rare earth elements include one or more selected from scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb). (2-2) Regarding the thickness of the dielectric layer The thickness of the dielectric layer 11 is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers to increase capacitance, it may be, for example, 1.0 μm or less, 0.8 μm or less, 0.6 μm or less, less than 0.6 μm, 0.5 μm or less, or 0.4 μm or less.

[0050] The minimum thickness of the dielectric layer 11 is not particularly limited, but from the viewpoint of improving productivity and yield, it can be set to a minimum of 2 to 4 times the average diameter of the dielectric material particles used. For example, if the average diameter of the dielectric material particles used is 0.1 μm, the minimum thickness of the dielectric layer 11 can be 0.2 μm or more and 0.4 μm or less, and the thickness of the dielectric layer 11 may be, for example, 0.2 μm or more, or 0.4 μm or more.

[0051] The average diameter of dielectric material particles can be determined by measuring the particle size of each dielectric material particle in a cross-section of the multilayer ceramic capacitor 100 that includes a first axis equal to the stacking direction, and taking the average of these measurements. Optical microscopes, microscopes, scanning electron microscopes (SEMs), etc., can be used as appropriate to measure the particle size of dielectric material particles. The particle size of dielectric material particles can be defined as the Heywood diameter (the diameter of a circle with an area equal to the area of ​​the dielectric material particle being evaluated) at the observed cross-section. The average diameter, which is the average value of the dielectric material particle size, can be the arithmetic mean of the particle sizes of 50 to 200 arbitrarily selected dielectric material particles. In this specification, unless otherwise specified, "average value" refers to the arithmetic mean.

[0052] When evaluating the thickness of the dielectric layer 11, the evaluation is performed in a cross-section that includes the first axis, which is equal to the stacking direction. For example, it is preferable to evaluate in a cross-section that further includes the second axis set perpendicular to the stacking direction, or a cross-section that further includes the third axis set perpendicular to both the stacking direction and the second axis, due to the ease of polishing and measurement. In the former case, the multilayer ceramic capacitor 100 is polished in the third axis direction, and in the latter case, in the second axis direction. Five layers are selected from the central part, upper end, and lower end of the exposed dielectric layer 11 in the first axis direction. If the number of dielectric layers 11 is even, six layers are selected from the central part. Then, the thickness of each selected dielectric layer is measured at three locations: the central part, the left end, and the right end, and the average of the measured thicknesses is taken as the thickness of each dielectric layer 11. Furthermore, the average of the thicknesses of all the selected and evaluated dielectric layers 11 can be taken as the thickness of the dielectric layer 11 in the multilayer ceramic capacitor 100.

[0053] In the examples shown in Figures 1 and 2, the first axis, which is the stacking direction, is the Z-axis direction. Therefore, the multilayer ceramic capacitor 100 is polished along the third axis, the Y-axis, to expose the XZ plane where the dielectric layer 11 and the internal electrode layer 12 are stacked.

[0054] In this case, five dielectric layers 11 located in the center along the first axis (Z axis) of the exposed XZ plane are selected, and five dielectric layers 11 each are selected at the upper and lower ends along the first axis (Z axis). If the number of dielectric layers 11 is even, six layers may be selected for the central part. In this case, the dielectric layers 11 to be selected are selected from within the capacitance section 14.

[0055] Then, for each of the selected dielectric layers 11, the thickness is measured at three points along the second axis, the X-axis, at distances of 1 / 4, 1 / 2, and 3 / 4 of the length of the dielectric layer 11 along the X-axis from the edge, and the average value of these measurements is taken as the thickness of the dielectric layer 11. By the same procedure, the thickness of all the selected dielectric layers 11 is measured, and the average value of all the selected and evaluated dielectric layers 11 can be taken as the thickness of the dielectric layers 11 in the evaluated multilayer ceramic capacitor 100. (3) Regarding the internal electrode layer (3-1) Components contained in the internal electrode layer As illustrated in Figure 2, the region where the first internal electrode layer 12a connected to the first external electrode 20a and the second internal electrode layer 12b connected to the second external electrode 20b face each other is a region in the multilayer ceramic capacitor 100 where capacitance is generated. Therefore, the region where capacitance is generated is referred to as the capacitance region 14. In other words, the capacitance region 14 is a region where adjacent internal electrode layers face each other across a dielectric layer 11 connected to different external electrodes.

[0056] The region where the first internal electrode layers 12a connected to the first external electrode 20a face each other in the stacking direction without passing through the second internal electrode layer 12b connected to the second external electrode 20b is referred to as the first end margin 15a (see Figure 2). Similarly, the region where the second internal electrode layers 12b connected to the second external electrode 20b face each other in the stacking direction without passing through the first internal electrode layer 12a connected to the first external electrode 20a is referred to as the second end margin 15b. Each end margin is a region where internal electrode layers connected to the same external electrode face each other in the stacking direction without passing through internal electrode layers connected to different external electrodes. The first end margin 15a and the second end margin 15b are regions where internal electrodes with equal potential face each other and do not generate any substantial capacitance.

[0057] The side margin 16 is a region located outside the capacitance portion 14 in the third axis perpendicular to the stacking direction and the second axis, and in the example of Figure 3, in the direction along the Y axis. That is, the side margin 16 is the outer region adjacent to the capacitance portion 14 when viewed from the stacking direction, and is the outer region adjacent to the capacitance portion 14 on the side from which the internal electrode layer 12 is not drawn out. The side margin 16 is also a region that does not generate capacitance.

[0058] The internal electrode layer 12 can contain base metal elements as its main component.

[0059] The internal electrode layer 12 may contain components used in the internal electrode layer of a multilayer ceramic capacitor. In particular, the internal electrode layer 12 may mainly consist of a base metal such as nickel (Ni), tin (Sn), or tungsten (W), or an alloy containing one or more selected from the group of base metals, that is, it may contain the largest amount in terms of molar volume.

[0060] Because it offers excellent electrical properties and reduces costs, the internal electrode layer 12 may contain nickel as a base metal element, or it may contain nickel as the main component.

[0061] The main component of the first internal electrode layer 12a and the main component of the second internal electrode layer 12b may be the same or different. For example, the main components of both the first internal electrode layer 12a and the second internal electrode layer 12b may be the same, namely nickel. (3-2) Regarding the thickness of the internal electrode layer The thickness of the internal electrode layer 12 is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers to increase capacitance, it is preferably 0.8 μm or less, and more preferably 0.6 μm or less.

[0062] The lower limit of the thickness of the internal electrode layer 12 is not particularly limited, but for example, when it is formed by printing a metal conductive paste using a printing method such as screen printing or gravure printing, it can be 0.4 μm or more. For example, when it is formed by a thin-film process such as sputtering or vapor deposition, it can be thinner than that of the printing method, 0.1 μm or more.

[0063] When evaluating the thickness of the internal electrode layer 12, the evaluation is performed in a cross-section that includes a first axis equal to the stacking direction, similar to the evaluation of the thickness of the dielectric layer 11. For example, it is preferable to evaluate in a cross-section that further includes a second axis set perpendicular to the stacking direction, or a cross-section that further includes a third axis set perpendicular to both the stacking direction and the second axis, due to the ease of polishing and measurement.

[0064] Five layers are selected from the central part, upper end, and lower end of the exposed internal electrode layer 12 in the first axial direction. If the number of layers in the internal electrode layer 12 is even, six layers are selected from the central part. Then, the thickness of each selected internal electrode layer 12 is measured at three locations: the central part, the left end, and the right end, and the average of the measured thicknesses is taken as the thickness of each internal electrode layer 12. Furthermore, the average of the thicknesses of all the selected and evaluated internal electrode layers 12 can be taken as the thickness of the internal electrode layer 12 in the multilayer ceramic capacitor 100.

[0065] In the examples shown in Figures 1 and 2, the first axis, which is the stacking direction, is the Z-axis direction. Therefore, the multilayer ceramic capacitor 100 is polished along the third axis, the Y-axis, to expose the XZ plane where the dielectric layer 11 and the internal electrode layer 12 are stacked.

[0066] In this case, of the exposed XZ plane, five internal electrode layers 12 located in the center along the first axis (Z axis) are selected, and five internal electrode layers 12 located at the upper and lower ends along the first axis (Z axis) are selected. If the number of internal electrode layers 12 is even, six layers may be selected for the central part. In this case, the selected internal electrode layers 12 are selected from within the capacitance section 14.

[0067] Then, for each selected internal electrode layer 12, the thickness is measured at three points along the second axis, the X-axis, at distances of 1 / 4, 1 / 2, and 3 / 4 of the length of the internal electrode layer 12 along the X-axis from the edge, and the average value of these measurements is taken as the thickness of the internal electrode layer 12. By the same procedure, the thickness of all selected internal electrode layers 12 is measured, and the average value of the thicknesses of all selected and evaluated internal electrode layers 12 can be taken as the thickness of the internal electrode layers 12 in the evaluated multilayer ceramic capacitor 100.

[0068] [Manufacturing method for multilayer ceramic capacitors] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 6 is a flowchart 60 illustrating the manufacturing method of the multilayer ceramic capacitor 100. Figure 7 is a diagram illustrating the manufacturing method of the multilayer ceramic capacitor 100.

[0069] The manufacturing method for the multilayer ceramic capacitor of this embodiment may include a dielectric green sheet formation step, an internal electrode layer pattern formation step, and a firing step. The manufacturing method for the multilayer ceramic capacitor of this embodiment will be described below, including any other steps besides those mentioned above. (1) Raw material powder preparation process (S1) In the raw material powder preparation process, raw material powder for forming the dielectric layer 11 can be prepared.

[0070] The dielectric layer 11 of the multilayer ceramic capacitor 100 manufactured by the manufacturing method of the multilayer ceramic capacitor of this embodiment is of the general formula ABO 3-α It can contain dielectric materials that are compounds having a perovskite structure represented by (0≦α≦1). General formula ABO 3-α Since dielectric materials, which are compounds having a perovskite structure represented by (0 ≤ α ≤ 1), have already been explained, we will omit further explanation.

[0071] The dielectric material contained in the dielectric layer 11 contains A-site elements (element A) and B-site elements (element B), which are usually ABO. 3-α The dielectric layer 11 is contained in the form of a sintered body of particles with (0≦α≦1). For example, barium titanate is a tetragonal compound having a perovskite structure and exhibiting a high dielectric constant. Barium titanate can generally be obtained by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been conventionally known for synthesizing dielectric materials that can be used as the main component of the dielectric layer 11, such as the solid-phase method, the sol-gel method, and the hydrothermal method. In this embodiment, any of these can be employed.

[0072] In the raw material powder preparation process, predetermined additive compounds can be added to the dielectric material depending on the purpose. Examples of additive compounds include oxides or carbonates containing one or more elements selected from zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), and rare earth elements; oxides or carbonates containing one or more elements selected from cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si); and glasses containing one or more elements selected from cobalt, nickel, lithium, boron, sodium, potassium, and silicon.

[0073] Examples of the rare earth elements mentioned above include one or more selected from scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb).

[0074] The raw material powder preferably contains a sintering aid as an additive compound. As the sintering aid, a compound that produces second crystal particles containing silicon and element A after firing, in which the molar content of element A relative to silicon is 1.5 times or less, may be used. As the sintering aid, a compound containing one or more elements C selected from manganese and magnesium, and silicon may be used. The compound containing element C and silicon may be an oxide, and as the sintering aid, for example, one or more selected from Mg2SiO4, Mn2SiO4, MnCO3, and MgO may be used.

[0075] The raw material powder can be prepared, for example, by wet-mixing an additive compound with a dielectric material, followed by drying and pulverization. For example, the raw material powder obtained as described above may be subjected to pulverization to adjust the particle size as needed, or the particle size may be adjusted by combining this with a classification process. Through the above steps, a raw material powder that is a ceramic material is obtained. (2) Dielectric green sheet formation process (S2) The dielectric green sheet formation process can be carried out by wet mixing the raw material powder obtained in the raw material powder preparation process with a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. Alternatively, the binder may be added at the same time as mixing the raw material powder in the raw material powder preparation process (S1), and then wet mixing may be performed.

[0076] In the dielectric green sheet formation process, the obtained slurry can be used to coat a substrate with the slurry, for example, by a die coater or doctor blade method, and then dried to form the dielectric green sheet 71. For example, polyethylene terephthalate (PET) film can be used as the substrate. A diagram illustrating the dielectric green sheet formation process has been omitted.

[0077] Therefore, in the dielectric green sheet formation process (S2), the general formula ABO 3-α A dielectric green sheet can be formed containing a compound having a perovskite structure represented by (0≦α≦1) or an additive compound. In addition to the dielectric with a perovskite structure represented by the above general formula, the dielectric green sheet can also contain the additive compound as described above. (3) Internal electrode layer formation process (S3) The first internal electrode layer 12a and the second internal electrode layer 12b may be primarily composed of one or more base metals selected from nickel (Ni), tin (Sn), tungsten (W), or alloys containing these metals.

[0078] The main component of the first internal electrode layer 12a and the main component of the second internal electrode layer 12b may be the same or different. For example, the main components of both the first internal electrode layer 12a and the second internal electrode layer 12b may be the same, namely nickel.

[0079] A metal conductive paste for forming the precursors of the first internal electrode layer 12a and the second internal electrode layer 12b can be prepared by kneading a selected main component, an organic binder, and a solvent.

[0080] In the internal electrode layer formation process, as illustrated in Figure 7(A), a metal conductive paste for forming the internal electrode layer, containing an organic binder, can be printed onto the surface of the dielectric green sheet 71 by screen printing, gravure printing, or the like. Examples of organic binders include ethyl cellulose (EC) and polyvinyl butyral (PVB) resin. This arranges a first internal electrode layer pattern 72a for the first internal electrode layer 12a or a second internal electrode layer pattern 72b for the second internal electrode layer 12b on the surface of the dielectric green sheet 71. Various auxiliary agents, such as dispersants, and ceramic particles as co-materials can also be added to the metal conductive paste. The main component of the ceramic particles is not particularly limited, but it is preferable that it be the same as the main ceramic component of the dielectric layer 11. When ceramic particles are added as co-materials, they can be added during the mixing of the metal conductive paste. The method for forming the internal electrode layer is not limited to printing; plating, vacuum deposition, sputtering, and CVD methods may also be used.

[0081] Alternatively, a dielectric pattern paste for the reverse pattern layer can be obtained by adding a binder such as ethyl cellulose and an organic solvent such as terpineol to the dielectric pattern material obtained in the raw material powder preparation process and kneading it in a roll mill. Then, as illustrated in Figure 7(A), the dielectric pattern 73 may be placed on the dielectric green sheet 71 by printing the dielectric pattern paste in the peripheral area where the internal electrode layer pattern is not printed, thereby filling the step difference with the internal electrode layer pattern. The dielectric green sheet 71 with the internal electrode layer pattern and dielectric pattern 73 printed on it is referred to as a laminated unit. (4) Lamination process (S4) In the lamination process, as illustrated in Figure 7(B), the lamination units can be stacked such that the internal electrode layers and dielectric layers are staggered, and the edges of the internal electrode layers are alternately exposed on both ends of the dielectric layer in the longitudinal direction, alternately leading out to a pair of external electrodes. Specifically, a dielectric green sheet 71 printed with a first internal electrode layer pattern 72a and a dielectric pattern 73 is stacked in sequence with a dielectric green sheet 71 printed with a second internal electrode layer pattern 72b and a dielectric pattern 73. For example, the number of layers in the lamination unit can be 100 to 500. (5) Crimping process (S5) In the heat-sealing process, a predetermined number of cover sheets, for example, 2 to 10 layers, can be heat-sealed to the top and bottom of the laminated body in which the laminated units are stacked. (6) Singulation process (S6) In the individualization process, the crimped body is separated into individual pieces, and a laminate of individual pieces can be obtained. Existing methods such as dicing with a dicer or laser cutting can be used as appropriate for individualization. (7) Firing process (S7) In the firing process, the individual laminated pieces can be degreased and then fired. The degreasing and firing processes may be performed consecutively or separately. The conditions for degreasing and firing are not particularly limited. For example, degreasing may be performed in a nitrogen atmosphere at a temperature between 250°C and 500°C.

[0082] For firing, for example, if the oxygen partial pressure is 10 -12atm over 10 -8 The firing may be carried out in a weakly oxidizing atmosphere or a reducing atmosphere with a temperature range of 1100°C to 1350°C, below atm, for 5 minutes to 10 hours. The oxygen partial pressure is preferably 10 -12 atm over 10 -10 It may also be set to atm or less.

[0083] When creating a reducing atmosphere, one or more reducing gases selected from hydrogen and carbon monoxide can be used. The reducing gas may also be an inert gas, such as nitrogen, or a mixture with a noble gas. Examples of noble gases include helium and argon.

[0084] The firing temperature range may preferably be 1150°C to 1350°C. The firing time may preferably be 5 minutes to less than 15 minutes.

[0085] (8) External electrode formation process (S8) In the external electrode formation process, a metal conductive paste for forming an external electrode layer, containing a base metal such as nickel as a main component, a metal such as copper, and an organic binder, is formed by screen printing, dipping, etc., and then baked to form the external electrode. The method of forming the external electrode is not limited to printing or dipping; plating, vacuum deposition, sputtering, or CVD methods may also be used. Alternatively, the external electrode may be formed by printing or coating a conductive resin paste by screen printing, dipping, etc., and then curing the resin. If necessary, layers of copper, nickel, or tin may be formed by plating or other treatments. This allows for the formation of the first external electrode 20a and the second external electrode 20b. Through the above process, a multilayer ceramic capacitor 100 can be manufactured.

[0086] The above process is merely an example, and the manufacturing method of the multilayer ceramic capacitor of this embodiment is not limited to the above configuration. For example, the base layer for the external electrodes can be provided on the surface of the fragmented laminate, and the base layer can be formed by firing the ceramic simultaneously with firing the base layer for the external electrodes. In this case, in the external electrode formation process after firing, the external electrodes are formed by forming layers of copper, nickel, or tin on top of this base layer through a plating process.

[0087] [Other embodiments] Although embodiments have been described in detail above, this disclosure is not limited to any particular embodiment, and various modifications and changes are possible within the scope of the claims.

[0088] For example, although the above embodiment is applied to a multilayer ceramic capacitor with two terminal electrodes, it may also be applied to a multilayer ceramic capacitor with three or more terminals. [Examples]

[0089] The present invention will be described with specific examples below, but it is not limited to these examples. (1) Evaluation method (1-1) Dielectric layer thickness The thickness of the dielectric layer was evaluated using the procedure already described. The evaluation results are shown in the "Dielectric Layer Thickness" column of Table 1. (1-2) Average crystal grain size For each example and comparative example, a cross-section along the BB line in Figure 1 was exposed for the multilayer ceramic capacitors fabricated. Osmium conductive material was deposited onto the exposed cross-section, and images of the crystalline particles present in the dielectric layer were taken using SEM observation. The average particle diameter of the first crystalline particles contained in the dielectric layer was then calculated. For the calculation of the average particle diameter, six layers were selected from the center of the exposed dielectric layer 11 in the first axial direction, and five layers each were selected from the upper and lower ends. Then, ten present first crystalline particles were selected from each selected dielectric layer, and the diameter of a circle with an area equal to the area of ​​the first crystalline particle was taken as the particle diameter (Heywood diameter) of each first crystalline particle. Next, the arithmetic mean of the particle diameters of all selected first crystalline particles was taken as the average crystalline particle diameter of the first crystalline particles. (1-3) Composition of the second crystal grains and the ratio of the length of the second crystal grains along the first axis to the thickness of the dielectric layer. When performing SEM observation to evaluate the average crystal grain size, the presence of second crystal grains 42 within the dielectric layer 11 was confirmed by the difference in brightness in the backscattered electron image. Areas that appeared relatively low in brightness and dark were identified as second crystal grains 42.

[0090] The composition of the second crystal grain was analyzed using EDS (Energy Dispersive X-ray Spectrometer).

[0091] For the composition evaluation of the second crystal grains, six layers were selected from the central part of the exposed dielectric layer 11 in the first axial direction, and five layers each were selected from the upper and lower ends. Then, two second crystal grains were selected from each of the selected dielectric layers. If the number of second crystal grains in each dielectric layer was less than two, all of the second crystal grains contained in the dielectric layer were selected.

[0092] For the compositional analysis of each second crystal grain, a line analysis was performed on the second crystal grain along the diameter of its smallest inclusion circle, and the average value of the obtained evaluation results was used to determine the composition of the second crystal grain.

[0093] The above compositional analysis was performed on all second crystal grains selected from each dielectric layer. The arithmetic mean of the compositions of all selected second crystal grains was then defined as the composition of the second crystal grain.

[0094] The molar ratios of barium, magnesium, and manganese to silicon were calculated from the composition of the obtained second crystal grains.

[0095] The evaluation results are shown in the "Elemental Ratio of Second Crystal Particle to Si" column of Table 1, specifically in the "Ba / Si Elemental Ratio," "Mg / Si Elemental Ratio," and "Mn / Si Elemental Ratio" columns.

[0096] For example, the "Ba / Si elemental ratio" indicates the ratio of the amount of barium, which is element A contained in the perovskite structure compound barium titanate in the following examples and comparative examples, to silicon in the second crystal grain.

[0097] The "Mg / Si elemental ratio" and "Mn / Si elemental ratio" represent the proportions of magnesium and manganese to silicon in the second crystal grain, respectively.

[0098] Furthermore, the length of the second crystal grains contained within the dielectric layer 11 along the first axis was measured in the evaluated cross-section. Then, the ratio of the second crystal grain with the longest length along the first axis to the thickness of the dielectric layer 11 was calculated.

[0099] The thickness of the dielectric layer 11 was determined using the results evaluated in "(1-1) Dielectric layer thickness".

[0100] The evaluation results are shown in the column "Ratio of the length of the second crystal grain along the first axis to the thickness of the dielectric layer" in Table 1. (1-4) Dielectric constant The dielectric constant was measured for the multilayer ceramic capacitors fabricated in each example and comparative example.

[0101] In this embodiment, the dielectric constant was measured at a room temperature of 25°C, with a measurement frequency of 1 kHz and a measurement electric field of 0.5 Vrms / μm, i.e., 1 Vrms when the dielectric layer thickness was 2 μm.

[0102] The measurement results are shown in the "ε" column of Table 1. Furthermore, a value of ε of 3000 or higher is judged as ○, and a value less than 3000 is judged as ×, with the result shown in the "Judgment" column. A judgment of ○ indicates that the dielectric constant is sufficiently high, meaning it is a multilayer ceramic capacitor capable of increasing capacitance. (1-5) Reliability testing Twenty samples were prepared for each example and comparative example of the multilayer ceramic capacitor fabricated. Each sample was then subjected to a reliability test at 150°C with a 20V DC electric field. The MTTF (Mean Time To Failure) was determined for all 20 samples by Weibull analysis, where the failure time was defined as the time from the start of voltage application until the insulation resistance dropped by an order of magnitude. Using Comparative Example 1 (conventional conditions) as the baseline, an MTTF of twice or more the baseline was judged as "A," an MTTF of 1.5 times or more the baseline was judged as "B," and an MTTF equal to or greater than the baseline was judged as "C." A judgment of A, B, or C indicated a dielectric layer with superior reliability and a pass to the reliability test. Note that A is more reliable than B, B is more reliable than C, and so on. An MTTF below the baseline was judged as a failure ("D"), indicating a dielectric layer with inferior reliability.

[0103] The results are shown in the "Reliability" column of Table 1. (1-6) Overall Judgment For experimental examples where the dielectric constant was judged as ○, a rating from A to D was assigned according to the results of the reliability test. For experimental examples where the dielectric constant was judged as ×, a rating of D was assigned.

[0104] The rating is A, with B, C, and D being the lowest.

[0105] A rating of A, B, or C indicates high capacitance and excellent reliability. A rating of D indicates low capacitance or poor reliability. (2) Regarding the conditions for preparing the sample [Comparative Example 1 to Comparative Example 4] (2-1) Raw material powder preparation process A multilayer ceramic capacitor was manufactured according to the flowchart 60 shown in Figure 6.

[0106] Specifically, a slurry was first obtained by wet-mixing barium titanate powder, an additive compound, polyvinyl butyral (PVB) resin, a solvent, and a plasticizer.

[0107] In Comparative Examples 1 to 4, the additive compounds were added such that, when barium titanate was used as 100 mol, the amounts were 30.75 mol of Dy2O, 1.0 mol of MnCO3, and 0.5 mol of MgO. In addition, SiO2 was added as a Si-containing additive in the proportions shown in Table 1 when barium titanate was used as 100 mol. (2-2) Dielectric Green Sheet Formation Process The obtained slurry was coated onto a base film, and the slurry coated onto the base film was dried to obtain a dielectric green sheet. Comparative Examples 2 to 4 differed in that the thickness of the dielectric green sheet was varied. (2-3) Internal electrode layer formation process Next, nickel powder, the main component metal element, was wet-mixed with a binder such as ethyl cellulose (EC) or polyvinyl butyral (PVB) resin, a solvent, and a plasticizer to obtain a metal conductive paste for forming the internal electrode layer. Then, the metal conductive paste was printed onto a portion of the surface of a dielectric green sheet to form an internal electrode layer pattern on each dielectric green sheet, containing nickel, a base metal element, as the main component.

[0108] A laminated unit was fabricated by the dielectric green sheet formation process and the internal electrode layer formation process described above. The obtained laminated unit comprises a dielectric green sheet and an internal electrode layer pattern formed on the surface of the dielectric green sheet. (2-4) Lamination process Next, 500 stacking units were stacked to form a laminate. (2-5) Crimping process, individualization process Then, after the laminate was compressed, it was separated into individual pieces to obtain chip-shaped green laminates. (2-6) Firing process Next, this chip-shaped green laminate was degreased in a nitrogen atmosphere at 500°C.

[0109] After degreasing, a metal conductive paste containing nickel-based metal fillers, a binder, and a solvent was applied to the green laminate from both ends to each side as a base layer, and then dried. Subsequently, the green laminate with the base layer for the external electrodes was placed in a firing furnace and fired.

[0110] During the firing process, the oxygen partial pressure is 1.0 × 10⁻⁶. -10 The samples were fired at a reduced atmosphere consisting of a mixture of hydrogen and nitrogen at an atm temperature, maintaining the firing temperature at 1200°C or 1300°C (as shown in Table 1) for 300 seconds. During the heating process, the supply rate of the green laminate and the oxygen partial pressure were adjusted to prevent abrupt changes in the firing atmosphere due to gases generated from the green laminate and to prevent cracking of the fired product. (2-7) External electrode formation process A first external electrode 20a and a second external electrode 20b were formed on the laminated body after firing by plating.

[0111] The obtained multilayer ceramic capacitor had a chip shape of 1.0 mm × 0.5 mm × 0.5 mm, an internal electrode layer 12 thickness of 0.6 μm, and 500 layers. The thickness of the dielectric layer 11 was the value shown in the "Dielectric Layer Thickness" column of Table 1. The thicknesses of the dielectric layer 11 and the internal electrode layer 12 were evaluated using the procedure already described.

[0112] The obtained multilayer ceramic capacitors were evaluated as described above. The evaluation results are shown in Table 1. [Example 1] In the raw material powder preparation process, the additive compounds were added such that, when barium titanate was used as 100 mol, the amounts were 30.75 mol of Dy2O, 1.0 mol of MnCO3, and 0.5 mol of MgO. Furthermore, when barium titanate was used as 100 mol, the Si-containing additives shown in Table 1 were added in the proportions shown in Table 1. Specifically, Mg2SiO4 was added in the proportions shown in Table 1, replacing a portion of the SiO2.

[0113] In the firing process, the firing temperature was set to 1200°C as shown in Table 1. Except for the points mentioned above, the multilayer ceramic capacitor was manufactured and evaluated using the same procedure as in Comparative Example 1. The evaluation results are shown in Table 1.

[0114] Furthermore, the cover layer, end margin, side margin, and external electrodes of the obtained multilayer ceramic capacitor were separated to leave only the capacitance portion. The dielectric layer contained in the capacitance portion was then pulverized into powder. When the diffraction line profile of the obtained dielectric layer powder was measured using an X-ray diffractometer (XRD) with Cu-Kα rays, diffraction peaks of barium titanate having a perovskite structure, and oxides containing barium and silicon were confirmed. In other words, it was confirmed that the dielectric layer contained first and second crystalline particles. In addition, Rietveld analysis confirmed that barium titanate, which corresponds to the first crystalline particles, was the most abundant substance, meaning it was included as the main component.

[0115] In Examples 2 through 11 below, it was confirmed using XRD that the dielectric layer contains first crystalline particles as the main component and second crystalline particles as a secondary component.

[0116] To confirm the composition of the shell and core portions of the first crystal grain of the dielectric layer, a sample for EDS observation using TEM was prepared by cutting it out using focused ion beam processing (FIB). Composition evaluation using EDS confirmed that the first crystal grain had a core-shell structure, and the shell portion contained the rare earth element Dy. In Examples 2 through 11 below, it was also confirmed that the first crystal grain had a core-shell structure and that the shell portion contained Dy. [Examples 2 to 11] In the raw material powder preparation process, the compounds shown in Table 1 were added as Si-containing additives, and the firing temperature was set to the temperature shown in Table 1. Except for the above, multilayer ceramic capacitors were manufactured and evaluated using the same procedure as in Example 1. The evaluation results are shown in Table 1.

[0117] [Table 1]

[0118] In Comparative Examples 2, 3, and 4, in which the dielectric layer thickness was reduced compared to Comparative Example 1, the amount of element A in the perovskite structure compound relative to silicon in the second crystalline grains contained in the dielectric layer was greater than 1.5 times. Furthermore, in the above comparative examples, the dielectric constant was judged as "X" or the reliability test result was "D," confirming that they were inferior. Therefore, it was shown that the dielectric thickness is limited to 0.6 μm in the conventional design, and it is difficult to make it any thinner.

[0119] Compared to Comparative Example 3, reducing the amount of Si added while maintaining the same dielectric layer thickness significantly degrades sinterability. Therefore, it is necessary to increase the firing temperature. However, even in Comparative Example 4, where the firing temperature was increased from 1200°C to 1300°C, it was found that the dielectric constant did not reach the desired level due to poor crystallinity. Thus, when the dielectric thickness is less than 0.6 μm, if the amount of A in the perovskite-structured compound relative to silicon in the second crystalline grains of the dielectric layer is greater than 1.5 times, the reliability test result is D. Reducing the amount of Si added improves reliability but degrades the dielectric constant, resulting in a × rating. This confirms that conventional methods result in a low evaluation of either reliability or dielectric constant.

[0120] As shown in Table 1, in Experimental Examples 1 to 5, Mg2SiO4 was added in place of some or all of the SiO2. In Experimental Examples 6 to 10, Mn2SiO4 was added in place of some or all of the SiO2. In Example 11, both Mg2SiO4 and Mn2SiO4 were added in place of all of the SiO2. In these examples, it was confirmed that the second crystalline particles contained in the dielectric layer contained silicon and element A, and that the amount of element A in the perovskite structure compound relative to silicon was 1.5 times or less. Furthermore, in Examples 1 to 11, the MTFE in the reliability test was longer than in Comparative Example 1, and it was confirmed that the judgment was one of A, B, or C.

[0121] In other words, the multilayer ceramic capacitors of Examples 1 to 11 were found to have excellent reliability of the dielectric layer.

[0122] In particular, in Examples 4, 5, 9, 10, and 11, the reliability test results were 1.5 times or more the lifespan of Comparative Example 1, and it was confirmed that the evaluation rating was A or B.

[0123] In Examples 4 and 5, Mg2SiO4 was added in such a way that the amount added was 0.7% or more relative to the molar content of element A in the compound having a perovskite structure.

[0124] Furthermore, in Examples 9 and 10, Mn2SiO4 was added in such a way that the amount added was 0.7% or more relative to the molar content of element A in the compound having a perovskite structure.

[0125] In Example 11, both Mg2SiO4 and Mn2SiO4 were added.

[0126] In particular, in Examples 5 and 10, where more than 0.8% of Mg2SiO4 or Mn2SiO4 was added relative to the molar content of element A in the perovskite structure, and in Example 11, where both Mg2SiO4 and Mn2SiO4 were added, the reliability test results were more than twice the lifetime of Comparative Example 1, confirming that the rating was A.

[0127] The aspects of this disclosure are, for example, as follows:

[0128] <1> Multiple dielectric layers stacked along the first axis, It comprises a plurality of internal electrode layers, each disposed between adjacent dielectric layers along the first axis, The dielectric layer mainly contains elements A and B, and has the general formula ABO 3-α The material comprises a first crystalline particle containing a compound having a perovskite structure, represented by (0≦α≦1), and a second crystalline particle containing silicon and the aforementioned element A as minor components, wherein the molar content ratio of element A to silicon is 1.5 times or less. The internal electrode layer is a multilayer ceramic electronic component containing a base metal element as its main component.

[0129] <2> The dielectric layer includes the second crystal grains whose length along the first axis is 1 / 3 or more the thickness of the dielectric layer. <1> Multilayer ceramic electronic components as described above.

[0130] <3> The thickness of the dielectric layer is less than 0.6 μm. <1> or <2> Multilayer ceramic electronic components as described above.

[0131] <4> The amount of substance of element A relative to silicon in the second crystal grain is 0.5 times or less. <1> from <3> A multilayer ceramic electronic component as described in any of the following.

[0132] <5> The second crystal grain contains one or more elements selected from manganese and magnesium. <1> from <4> A multilayer ceramic electronic component as described in any of the following.

[0133] <6> The first crystalline particle comprises a core portion containing the compound having the perovskite structure, and a shell portion covering the core portion and containing a rare earth element. <1> from <5> A multilayer ceramic electronic component as described in any of the following.

[0134] <7> The dielectric layer contains barium titanate as the compound having the perovskite structure. <1> from <6> A multilayer ceramic electronic component as described in any of the following. [Explanation of Symbols]

[0135] 100 Multilayer Ceramic Capacitors 10 Base Body 10a First side 10b Second side 11 Dielectric layer T11 Thickness 12 Internal electrode layer 12a 1st internal electrode layer 12b Second internal electrode layer 13. Cover layer 14 Capacity part 15a First end margin 15b Second End Margin 16 Side margins 20a 1st external electrode 20b 2nd external electrode C area 41. First crystal particle 411 Core section 412 Shell section 42 Second Crystal Particle L42 Length 60 Flowcharts S1 Raw material powder preparation process S2 Dielectric Green Sheet Formation Process S3 Internal electrode layer formation process S4 Lamination process S5 Crimping process S6 singulation process S7 Firing Process S8 External electrode formation process 71 Dielectric Green Sheet 72a First internal electrode layer pattern 72b Second internal electrode layer pattern

Claims

1. Multiple dielectric layers stacked along the first axis, It comprises a plurality of internal electrode layers, each disposed between adjacent dielectric layers along the first axis, The dielectric layer mainly contains elements A and B, and has the general formula ABO ３－α The material comprises a first crystalline particle containing a compound having a perovskite structure, represented by (0 ≤ α ≤ 1), and a second crystalline particle containing silicon and the aforementioned element A as minor components, wherein the molar content ratio of element A to silicon is 1.5 times or less. The internal electrode layer is a multilayer ceramic electronic component containing a base metal element as its main component.

2. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layer includes the second crystalline grain whose length along the first axis is 1 / 3 or more of the thickness of the dielectric layer.

3. The multilayer ceramic electronic component according to claim 1 or claim 2, wherein the thickness of the dielectric layer is less than 0.6 μm.

4. The multilayer ceramic electronic component according to claim 1 or claim 2, wherein the amount of substance of element A relative to silicon in the second crystal grain is 0.5 times or less.

5. The multilayer ceramic electronic component according to claim 1 or claim 2, wherein the second crystalline grain comprises one or more elements selected from manganese and magnesium.

6. The multilayer ceramic electronic component according to claim 1 or claim 2, wherein the first crystal grain comprises a core portion containing the compound having the perovskite structure and a shell portion covering the core portion and containing a rare earth element.

7. The multilayer ceramic electronic component according to claim 1 or claim 2, wherein the dielectric layer contains barium titanate as the compound having the perovskite structure.

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