Semiconductor device and photodetector

Abstract

This system suppresses rapid current changes in monitored wiring connected to the controlled circuit using a simple method. [Solution] The semiconductor device comprises a plurality of power consumption circuits that consume power without affecting the operation of the controlled circuit, a voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, and a control circuit that controls the number of power consumption circuits to consume power based on the voltage detected by the voltage detection circuit.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a photodetection device.

Background Art

[0002] There are various circuit blocks inside an image sensor, and each circuit block has a different current consumption. For this reason, while some of the circuit blocks are performing heavy processing, the current flowing from the power supply line to these circuit blocks increases sharply, and the voltage of the power supply line temporarily drops. In order to suppress such fluctuations in the power supply voltage, a toggle circuit that suppresses fluctuations in the current flowing through the power supply line may be provided inside the image sensor. Regardless of the operation of the image sensor, the toggle circuit repeatedly performs signal inversion operations, thereby acting to intentionally cause a current to flow through the power supply line. By operating the toggle circuit when the voltage of the power supply line temporarily rises, voltage fluctuations of the power supply line can be suppressed. In addition, in order to suppress power supply fluctuations, a power supply fluctuation suppression device that variably adjusts the number of circuits to be operated has been proposed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Recent image sensors have become more sophisticated and incorporate numerous circuit blocks. Consequently, the number of toggle circuits also needs to be increased. Because the current flowing through each circuit block of the image sensor fluctuates constantly, controlling whether or not each toggle circuit operates is time-consuming. For example, one could monitor the current consumption of each circuit block of the image sensor in advance and pre-set the timing of each toggle circuit's operation in registers based on the monitoring results. However, setting appropriate values ​​in the registers is labor-intensive, and errors in register settings could cause the image sensor to malfunction.

[0005] Furthermore, whether or not to operate each toggle circuit is determined by comparing the amount of current flowing through the power supply line with a threshold value. However, the threshold value needs to be changed depending on the object being imaged by the image sensor, and setting an appropriate threshold value is not easy.

[0006] The aforementioned problem applies not only to image sensors, but also to the monitored wiring connected to the controlled circuit located inside various semiconductor devices. The current may fluctuate rapidly due to changes in the load of the controlled circuit.

[0007] Therefore, this disclosure provides a semiconductor device and an optical detection device that can suppress rapid current changes in a monitored wiring connected to a controlled circuit using a simple method. [Means for solving the problem]

[0008] To solve the above problems, according to this disclosure, there are multiple power consumption circuits that consume power without affecting the operation of the controlled circuit, A voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, The system includes a control circuit that controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit. Semiconductor equipment is provided.

[0009] Regardless of the operating state of the controlled circuit, the control circuit may control the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit, so that the voltage of the monitored wiring reaches a predetermined voltage level.

[0010] The control circuit may control the number of power consumption circuits based on a table showing the correspondence between the voltage detected by the voltage detection circuit and the number of power consumption circuits that consume power.

[0011] The voltage detection circuit includes a time-to-digital converter that converts the time it takes for the monitored wiring to reach a predetermined voltage level into a digital signal. The table may register the correspondence between the digital signal and the number of power consumption circuits that consume power.

[0012] The control circuit may automatically generate the table when the controlled circuit is started.

[0013] The table is erased when the power supply voltage to the controlled circuit is stopped. The control circuit may automatically generate the table each time it starts the controlled circuit.

[0014] Each of the aforementioned power consumption circuits includes a MOS transistor and a resistive element that allows current to flow from the monitored wiring when the MOS transistor is on. The control circuit may control whether or not to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit.

[0015] The control circuit individually switches the on or off of the plurality of MOS transistors in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. Each of the aforementioned power consumption circuits may consume power by passing current from the monitored wiring through the corresponding resistor element.

[0016] At least some of the plurality of MOS transistors included in the plurality of power consumption circuits may be arranged in a staggered pattern.

[0017] The monitored wiring may be a power supply line supplied to the controlled target circuit, or a local power supply line branched from the power supply line.

[0018] According to the present disclosure, a pixel array section in which a plurality of pixels each having a photoelectric conversion element are arranged, a signal processing circuit that converts analog pixel signals photoelectrically converted by the plurality of pixels into digital pixel signals, an image processing circuit that performs image processing on the digital pixel signals generated by the signal processing circuit, a plurality of power consumption circuits that consume power without affecting the operation of the controlled target circuit included in the image processing circuit, a voltage detection circuit that detects the voltage of the monitored wiring connected to the controlled target circuit, and a control circuit that controls the number of the power consumption circuits that consume power based on the voltage detected by the voltage detection circuit, A photodetection device is provided.

[0019] The controlled target circuit may include at least one of a demosaicing processing circuit or a defect correction circuit.

[0020] The monitored wiring may be a power supply line that supplies a power supply voltage to the controlled target circuit, or a local power supply line branched from the power supply line.

[0021] The control circuit may control the amount of current flowing through the monitored wiring based on the voltage detected by the voltage detection circuit so that fluctuations in the power supply voltage supplied to the controlled target circuit are suppressed.

[0022] The control circuit may control the number of the power consumption circuits based on a table indicating a correspondence relationship between the voltage detected by the voltage detection circuit and the number of the power consumption circuits that consume power.

[0023] The control circuit may automatically generate the table when the image processing circuit is started up.

[0024] The table is erased when the supply of the power supply voltage to the image processing circuit is stopped, The control circuit may automatically generate the table each time the image processing circuit is started up.

[0025] Each of the plurality of power consumption circuits includes a MOS transistor, and a resistive element through which a current from the monitored wiring flows when the MOS transistor is turned on, The control circuit may control whether to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit.

[0026] The control circuit individually performs switching control to turn on or off the plurality of MOS transistors included in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit, Each of the power consumption circuits may consume power by causing a current from the monitored wiring to flow through the corresponding resistive element.

[0027] At least some of the plurality of MOS transistors included in the plurality of power consumption circuits may be arranged in a staggered pattern. Brief Description of the Drawings

[0028] [Figure 1] A block diagram showing a schematic configuration of a photodetection device according to the present disclosure. [Figure 2] A block diagram showing an example of an internal configuration of an image processing unit. [Figure 3] A diagram showing connections between a power supply line and a plurality of local power supply lines. [Figure 4] A block diagram of the main components of a semiconductor device according to the first embodiment. [Figure 5] A block diagram of the main components of a semiconductor device according to the second embodiment. [Figure 6] A circuit diagram showing an example of a MOS array. [Figure 7] A diagram showing an example of a table referenced by a control circuit. [Figure 8] Waveform diagrams showing the voltage of the monitored wiring and the current flowing through the MOS array. [Figure 9] A diagram showing an example of a MOS array layout. [Figure 10] A block diagram showing an example of a general configuration of a vehicle control system. [Figure 11] An explanatory diagram showing an example of the installation location of the external information detection unit and the imaging unit. [Modes for carrying out the invention]

[0029] Embodiments of the semiconductor device and photodetector will be described below with reference to the drawings. While the main components of the semiconductor device and photodetector will be described below, there may be components and functions not shown or described. The following description does not exclude any components or functions not shown or described.

[0030] Figure 1 is a block diagram illustrating the schematic configuration of the photodetector 1 according to this disclosure. The photodetector 1 shown in Figure 1 illustrates the schematic configuration of an image sensor. The photodetector 1 according to this disclosure is not necessarily limited to an image sensor that acquires grayscale information converted photoelectrically at each pixel to generate an image, but can also be applied to an EVS (Event-Based Vision Sensor) that detects event information at each pixel to generate an event image. In this specification, examples of applying the photodetector 1 according to this disclosure to an image sensor or an EVS or other photodetector 1 will be mainly described, but the photodetector 1 according to this disclosure can also be applied to various electronic devices other than photodetector 1.

[0031] As shown in Figure 1, the photodetector 1 comprises a pixel array section 2a and a peripheral circuit section 2b. The peripheral circuit section 2b includes, for example, a vertical drive section 3, a column signal processing section 4, a horizontal drive section 5, a system control section 6, an image processing section 7, and a data storage section 8. The image processing section 7 and the data storage section 8 may be mounted on the same substrate as the pixel array section 2a and the vertical drive section 3, or they may be placed on a separate substrate. The processing of the image processing section 7 and the data storage section 8 may also be performed by an external signal processing section, such as a DSP (Digital Signal Processor), provided on a semiconductor chip 50 separate from the photodetector 1. In this specification, the vertical drive section 3, column signal processing section 4, horizontal drive section 5, system control section 6, image processing section 7, and data storage section 8 shown in Figure 1 may each be referred to as a circuit block.

[0032] The pixel array section 2a has a configuration in which unit pixels px, each having a photoelectric conversion unit that generates and stores charge according to the amount of light received, are arranged in a two-dimensional matrix in a first direction (e.g., row direction) X and a second direction (e.g., column direction) Y. Here, the row direction refers to the pixel rows of the pixel array section 2a, i.e., the arrangement direction in the row direction, and the column direction refers to the pixel columns of the pixel array section 2a, i.e., the arrangement direction in the column direction. The specific circuit configuration of the unit pixels px will be described later. Hereafter, unit pixels px may be abbreviated as pixels px.

[0033] In the pixel array section 2a, a pixel drive wiring L is routed along the row direction as a row signal line for each pixel row, and a vertical signal line VSL is routed along the column direction as a column signal line for each pixel column. The pixel drive wiring L transmits drive signals for driving when reading signals from pixels px. In Figure 1, each pixel drive wiring L is shown as a single wire, but it is not limited to one wire. One end of the pixel drive wiring L is connected to the output terminal corresponding to each row of the vertical drive section 3.

[0034] The vertical drive unit 3 is composed of a shift register, an address decoder, and the like, and drives each pixel px of the pixel array unit 2a simultaneously or row by row. Together with the system control unit 6, the vertical drive unit 3 constitutes a drive unit that controls the operation of each pixel px of the pixel array unit 2a. The specific configuration of the vertical drive unit 3 is not shown in the diagram, but generally it has two scanning systems: a read scanning system and a sweep scanning system.

[0035] The readout scanning system sequentially selects and scans the pixels px of the pixel array 2a row by row in order to read signals from the pixels px. The signals read from the pixels px are analog signals. The sweep scanning system performs a sweep scan ahead of the readout scan performed by the readout scanning system by the exposure time.

[0036] This sweep scanning system resets the photoelectric converter of each pixel px by sweeping away unwanted charges from the photoelectric converter of the read row. This sweeping away (resetting) of unwanted charges by the sweep scanning system then performs what is known as an electronic shutter operation. Here, the electronic shutter operation refers to the operation of discarding the charge in the photoelectric converter and starting a new exposure (starting charge accumulation).

[0037] The signal read out by the readout scanning system corresponds to the amount of light received since the previous readout operation or electronic shutter operation. The period from the readout timing of the previous readout operation or the sweep timing of the electronic shutter operation to the readout timing of the current readout operation is the exposure period for the pixel (px).

[0038] The signals output from each pixel px in the pixel row selected and scanned by the vertical drive unit 3 are input to the column signal processing unit 4 through each of the vertical signal lines VSL for each pixel column. The column signal processing unit 4 performs predetermined signal processing on the signals output from each pixel px in the selected row through the vertical signal lines VSL for each unit pixel column of the pixel array unit 2a, and temporarily holds the pixel signals after signal processing.

[0039] Specifically, the column signal processing unit 4 performs at least noise reduction processing, such as CDS (Correlated Double Sampling) processing or DDS (Double Data Sampling) processing, as part of its signal processing. For example, CDS processing removes pixel-specific fixed pattern noise such as reset noise and threshold variations of amplification transistors within a unit pixel. In addition to noise reduction processing, the column signal processing unit 4 also has, for example, an AD (analog-to-digital) conversion function, which converts analog pixel signals into digital signals and outputs them.

[0040] The horizontal drive unit 5 is composed of a shift register, an address decoder, and the like, and sequentially selects the unit circuits corresponding to the pixel rows of the column signal processing unit 4. Through this selective scanning by the horizontal drive unit 5, the pixel signals processed for each unit circuit in the column signal processing unit 4 are output sequentially.

[0041] The system control unit 6 is composed of a timing generator that generates various timing signals, and controls the drive of the vertical drive unit 3, column signal processing unit 4, and horizontal drive unit 5 based on the various timings generated by the timing generator.

[0042] The image processing unit 7 performs various image processing on the pixel signals output from the column signal processing unit 4. Since the image processing unit 7 mainly handles digital signals, it is sometimes referred to as a logic circuit in this specification. The data storage unit 8 temporarily stores the data necessary for signal processing in the image processing unit 7. The pixel signals processed by the image processing unit 7 are converted to a predetermined format and output from the output unit 9 to the outside of the light detection device 1.

[0043] The light detection device 1 according to this embodiment may be composed of a single substrate or of a laminated structure formed by stacking two or more substrates. When the light detection device 1 according to this embodiment is composed of a laminated structure, for example, at least a portion of the pixel array section 2a may be placed on the first substrate, and the circuit blocks not placed on the first substrate may be placed on the second substrate. Alternatively, at least a portion of the pixel array section 2a may be placed on the first substrate, the image processing section 7 and data storage section 8 may be placed on the third substrate, and the remaining circuit blocks may be placed on the second substrate.

[0044] Figure 2 is a block diagram showing an example of the internal configuration of the image processing unit 7 (logic circuit) in Figure 1. The image processing unit 7 includes a pixel defect correction processing unit 11, a remosaic processing unit 12, and a camera signal processing unit 13.

[0045] The pixel defect correction processing unit 11 detects pixel defects from the captured image captured by the image sensor and performs a process to correct the pixel defects. The pixel defect correction processing unit 11 includes a pixel defect evaluation unit 14 and a pixel defect correction unit 15.

[0046] The pixel defect evaluation unit 14 evaluates defects in the pixels of interest in the captured image and supplies the evaluation results to the pixel defect correction unit 15.

[0047] The pixel defect correction unit 15, based on the defect evaluation results supplied from the pixel defect evaluation unit 14, interpolates the pixel data of the pixel of interest that was evaluated as defective using the pixel data of the surrounding pixels to generate corrected image data. The generated corrected image data is supplied to the remosaic processing unit 12.

[0048] The remosaic processing unit 12 converts the image data corrected by the pixel defect correction unit 15 into, for example, Bayer array image data. The converted image data is supplied to the camera signal processing unit 13.

[0049] The camera signal processing unit 13 performs predetermined camera signal processing on the image data converted by the remosaic processing unit 12. This predetermined camera signal processing includes, for example, white balance, demosaicing, linear matrix correction, and gamma correction.

[0050] The various circuit blocks in the photodetector 1 shown in Figure 1 are supplied with power voltage from the power supply line VCC. The power supply line VCC is branched into multiple local power supply lines VCCL. Figure 3 shows the connections between the power supply line VCC and the multiple local power supply lines VCCL. Each of the multiple local power supply lines VCCL supplies power voltage to the corresponding circuit block 16. The processing load of each circuit block 16 in Figure 3 fluctuates over time. A larger current flows from the corresponding local power supply line VCCL to the circuit block 16 with a larger processing load. The voltage level of the local power supply line VCCL through which a large current flows temporarily drops. A drop in the voltage level of the local power supply line VCCL may adversely affect the operation of other circuit blocks 16.

[0051] Of the multiple circuit blocks 16 provided by the photodetector 1 shown in Figure 1, the pixel defect correction unit 15 and the remosaic processing unit 12 shown in Figure 2 consume particularly large amounts of current. Therefore, it is desirable to take measures to suppress sudden current fluctuations in some local power supply lines VCCL, including the local power supply line VCCL connected to the pixel defect correction unit 15 and the remosaic processing unit 12.

[0052] (First embodiment) Figure 4 is a block diagram of the main parts of the semiconductor device 20 according to the first embodiment. The semiconductor device 20 according to the first embodiment shown in Figure 4 can be applied to the photodetector 1 shown in Figure 1. Alternatively, the semiconductor device 20 according to the first embodiment shown in Figure 4 can be applied to various devices with different configurations than the photodetector 1 shown in Figure 1.

[0053] The semiconductor device 20 according to the first embodiment shown in Figure 4 includes a power consumption circuit 21, a voltage detection circuit 22, and a control circuit 23.

[0054] The power consumption circuit 21 is a circuit that consumes power without affecting the operation of the controlled circuit 24. The controlled circuit 24 includes, for example, circuits with high power consumption. Consuming power means, for example, passing current. The power consumption circuit 21 is a circuit that can pass current from the monitored wiring 25 regardless of the operation of the controlled circuit 24. For example, the power consumption circuit 21 passes current from the monitored wiring 25 to the ground wire VSS. This can lower the voltage of the monitored wiring 25.

[0055] The voltage detection circuit 22 is a circuit that detects the voltage of the monitored wiring 25 connected to the controlled circuit 24. The monitored wiring 25 is, for example, a power supply line VCC. If the power supply line VCC is branched into multiple local power supply lines VCCL, the monitored wiring 25 includes at least one local power supply line VCCL.

[0056] The voltage detection circuit 22 may directly or indirectly detect the voltage of the monitored wiring 25. Indirect detection means, for example, detecting the time it takes for the voltage level to return to its original level after a temporary drop in voltage level.

[0057] The control circuit 23 controls the number of power-consuming circuits 21 that consume power from among the multiple power-consuming circuits 21 based on the voltage detected by the voltage detection circuit 22. For example, if the voltage drop of the monitored wiring 25 is small, the control circuit 23 increases the number of power-consuming circuits 21 that consume power compared to when the power drop is large.

[0058] Regardless of the operating state of the controlled circuit 24, the control circuit 23 controls the number of power-consuming circuits 21 that consume power, based on the voltage detected by the voltage detection circuit 22, so that the voltage of the monitored wiring 25 reaches a predetermined voltage level. For example, the control circuit 23 may control the number of power-consuming circuits 21 based on a table showing the correspondence between the voltage detected by the voltage detection circuit 22 and the number of power-consuming circuits 21 that consume power. A specific example of the table will be described later.

[0059] When applying the semiconductor device 20 according to the first embodiment to the photodetector 1 in Figure 1, it is desirable to provide the power consumption circuit 21, voltage detection circuit 22, and control circuit 23 shown in Figure 4 to the local power supply line VCCL to which the circuit block with a large processing load is connected within the photodetector 1 in Figure 1.

[0060] Thus, in the first embodiment, the number of power consumption circuits 21 that consume power is controlled based on the voltage detection result of the monitored wiring 25, making it possible to suppress voltage fluctuations of the monitored wiring 25 accurately with low power consumption and space saving.

[0061] (Second embodiment) Figure 5 is a block diagram of the main components of the semiconductor device 20a according to the second embodiment. The semiconductor device 20a according to the second embodiment shown in Figure 5 comprises a MOS (Metal Oxide Semiconductor) array 21a, a TDC (Time Digital Converter) 22a, and a control circuit 23a. The semiconductor device 20a according to the second embodiment can be applied to various devices, including, for example, the photodetector 1. Below, an example of applying the semiconductor device 20a according to the second embodiment to the photodetector 1 shown in Figure 1 will be mainly described.

[0062] The MOS array 21a is a power-consuming circuit that supplies current without affecting the operation of the controlled circuit 24. The MOS array 21a has multiple MOS circuits. Each MOS circuit can be individually configured to either supply current from the monitored wiring 25 or not. The number of MOS circuits that supply current is controlled by the control circuit 23a. A specific example of the circuit configuration of the MOS array 21a will be described later. In this embodiment, the current supplied by each MOS circuit is assumed to be equal.

[0063] The TDC22a outputs a digital signal correlated with the voltage level of the monitored wiring 25. Specifically, the TDC22a converts the time it takes for the monitored wiring 25 to reach a predetermined voltage level into a digital signal and outputs it. For example, when the voltage level of the monitored wiring 25 temporarily drops, the TDC22a converts the time it takes to return to the original voltage level into a digital signal. The digital signal output from the TDC22a is equivalent to the voltage level of the monitored wiring 25. Hereafter, the voltage level of the monitored wiring 25 may be referred to as the monitored voltage.

[0064] The control circuit 23a controls the number of MOS circuits that supply current based on the digital signal output from TDC22a, by referring to a table that registers the correspondence between the monitored voltage corresponding to the digital signal output from TDC22a and the number of MOS circuits that supply current.

[0065] Figure 6 is a circuit diagram showing an example of a MOS array 21a. As shown in Figure 6, the MOS array 21a has multiple MOS circuits 21b arranged in a two-dimensional direction. Each MOS circuit 21b has a MOS transistor 21c and a resistor 21d. The conductivity type of the MOS transistor 21c is arbitrary. Figure 6 shows an example of an NMOS transistor 21c.

[0066] In the MOS circuit 21b shown in Figure 6, the resistor 21d is connected, for example, between the local power supply line VCCL and the drain of the MOS transistor 21c. The source of the MOS transistor 21c is connected to the ground line VSS. The gate of the MOS transistor 21c is supplied with a control signal from the control circuit 23a. When the control signal reaches a high level, the MOS transistor 21c turns on, and current flows from the local power supply line VCCL through the resistor 21d to the ground line VSS. The control circuit 23a controls whether or not to turn on each MOS transistor 21c in the MOS array 21a based on the monitored voltage detected by TDC 22a. Note that the circuit configuration of the MOS circuit 21b is not necessarily limited to Figure 6.

[0067] The MOS array 21a is not connected to the controlled circuit 24. Therefore, the current flowing through the resistive elements 21d of each MOS circuit 21b is simply consumed and does not affect the operation of the controlled circuit 24.

[0068] The resistance values ​​of the resistor elements 21d in each MOS circuit 21b are the same. Also, the electrical characteristics of the MOS transistors 21c in each MOS circuit 21b are the same. As a result, when the MOS transistors 21c of each MOS circuit 21b are turned on, the current flowing through the resistor elements 21d is common to all MOS circuits 21b. Therefore, the control circuit 23a can accurately control the current consumption by determining how many resistor elements 21d of MOS circuits 21b are being supplied with current.

[0069] Figure 7 shows an example of a table 23b referenced by the control circuit 23a. The table 23b in Figure 7 is stored, for example, in a volatile memory unit 23c (see Figure 5). For example, the table 23b in Figure 7 is automatically generated when the semiconductor device 20a according to the second embodiment is started up. When the semiconductor device 20a according to the second embodiment is started up, the control circuit 23a monitors the voltage of the monitored wiring 25 (monitored voltage) and repeatedly adjusts the current consumption of the MOS array 21a so that the monitored voltage becomes the target voltage. The monitored voltage and the number of MOS circuits 21b turned on during this adjustment process are automatically registered in the table 23b.

[0070] Table 23b in Figure 7 shows the correspondence between the number of rounds, the monitored voltage (V_normal), the target voltage (V_target), and the number of MOS circuits 21b that turn on the MOS transistor 21c to supply current to the resistor element 21d (#turn on MOS). Initially, the monitored voltage is X80mV, and the number of MOS circuits 21b to be turned on is zero. The target voltage is X15mV, which is higher than the monitored voltage, so the control circuit 23a turns on five MOS circuits 21b in the first round. This lowers the monitored voltage to X70mV. Then, in the second round, the control circuit 23a supplies current to the resistor element 21d of ten MOS circuits 21b. This lowers the monitored voltage to X60mV. Thereafter, the control circuit 23a repeats the same adjustment process.

[0071] As described above, since table 23b in Figure 7 is stored in the volatile memory unit 23c, it is automatically erased when the power supply to the semiconductor device 20a according to this embodiment is stopped. Therefore, each time the semiconductor device 20a is started up, the control circuit 23a automatically generates table 23b and stores it again in the memory unit 23c. In this way, since table 23b is updated each time the semiconductor device 20a is started up, the accuracy of controlling the current consumption of the MOS array 21a by referring to table 23b can be improved.

[0072] Figure 8 shows the waveforms of the voltage (monitoring voltage) of the monitored wiring 25 and the current flowing through the MOS array 21a. The monitored wiring 25 is, for example, a local power supply line VCCL, and its voltage level fluctuates depending on the processing load of the circuit block connected to the local power supply line VCCL. The greater the processing load of the circuit block, the lower the voltage level of the local power supply line VCCL becomes, and the lighter the processing load of the circuit block, the higher the voltage level of the local power supply line VCCL becomes.

[0073] Assuming that the control circuit 23a starts operating at time t1 in Figure 8, the processing load on the controlled circuit 24 is high at times t1-t2 and t3-t4, while the processing load on the circuit block is low at times t2-t3 and t4-t5. In this example, the control circuit 23a increases the current flowing through the MOS array 21a at times t2-t3 and t4-t5. This allows the voltage level of the local power supply line VCCL to approach the target voltage.

[0074] As integration density increases, the number of circuit blocks and local power supply lines (VCCL) mounted on the semiconductor device 20a increases. An increase in the number of local power supply lines (VCCL) necessitates an increase in the number of MOS circuits 21b within the MOS array 21a. Since each MOS circuit 21b is controlled by a control circuit 23a, space must be secured for the control wiring connecting the control circuit 23a to each MOS circuit 21b. Additionally, wiring connecting multiple circuit blocks also exists.

[0075] For example, if multiple MOS circuits 21b are arranged in a line, it becomes difficult to secure space for multiple wires between two adjacent MOS circuits 21b in the line direction. Therefore, it is desirable to arrange multiple MOS circuits 21b in a staggered pattern.

[0076] Figure 9 shows an example of the layout arrangement of the MOS array 21a. Multiple local power supply lines VCCL and multiple circuit blocks are arranged on the board, and multiple MOS circuits 21b that make up the MOS array 21a need to be arranged between these local lines and circuit blocks. Figure 9 shows the flip-flops (F / F) that make up the circuit blocks and the MOS transistors 21c(SW) that make up the MOS circuits 21b. The MOS transistors 21c(SW) are arranged in a staggered pattern. By arranging the MOS transistors 21c(SW) in a staggered pattern, the spacing between two adjacent MOS transistors 21c(SW) in the column direction can be increased, making it easier to arrange multiple lines in that space.

[0077] It is not necessary to arrange all MOS transistors 21c in the MOS array 21a in a staggered pattern. Depending on the density of circuit blocks and other wiring on the substrate, it is sufficient to arrange at least some of the MOS transistors 21c in the MOS array 21a in a staggered pattern.

[0078] The MOS array 21a according to this embodiment is effective when provided on a local power supply line VCCL that supplies power voltage to circuit blocks with high processing loads, and it is not necessarily required to provide a MOS array 21a on all local power supply lines VCCL. For example, in the case of the photodetector 1 in Figure 1, the processing load of the pixel defect correction processing unit 11 and the remosaic processing unit 12 of the image processing unit 7 is particularly high, so it is desirable to connect the MOS array 21a to the local power supply line VCCL that supplies power voltage to these circuit blocks.

[0079] Thus, in the second embodiment, the voltage of the monitored wiring 25, such as the local power supply line VCCL (monitored voltage), is detected by TDC22a, and the current flowing through the MOS array 21a is dynamically controlled so that the monitored voltage matches the target voltage. This makes it possible to suppress voltage fluctuations of the monitored wiring 25 with a small circuit size and low power consumption.

[0080] In particular, in the second embodiment, when the semiconductor device 20a starts up, it automatically detects the voltage of the monitored wiring 25 (monitored voltage), adjusts the current flowing through the MOS array 21a, performs control to match the monitored voltage to the target voltage, and automatically generates a table 23b that registers this control process. Thereafter, by referring to table 23b, the monitored voltage can be adjusted quickly and accurately.

[0081] In the semiconductor device 20a according to the second embodiment, the control of the MOS array 21a is simplified because the decision of whether or not to supply current to each MOS circuit 21b in the MOS array 21a can be controlled by referring to a table that is automatically generated when the semiconductor device 20a is started up. Furthermore, since the table is updated each time the semiconductor device 20a is started up, the current supplied to the monitored wiring 25 can be controlled in accordance with the latest current fluctuations of the monitored wiring 25, thereby improving the accuracy of current correction. In addition, each MOS circuit 21b in the MOS array 21a is a circuit that switches whether or not to supply current to the resistive element 21d, and the current of the monitored wiring 25 can be controlled with low power consumption. Furthermore, since each MOS circuit 21b in the MOS array 21a has a simple circuit configuration, the current of the monitored wiring 25 can be controlled in a small area. Moreover, by arranging each MOS circuit 21b in a staggered pattern as needed, the layout design, such as the routing of various wires on the board, becomes easier.

[0082] <Examples of applications to mobile devices> The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0083] Figure 10 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0084] The vehicle control system 12000 comprises multiple electronic control units connected via a communication network 12001. In the example shown in Figure 10, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0085] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0086] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0087] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0088] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0089] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0090] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking system based on information from inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0091] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0092] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0093] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example in Figure 10, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0094] Figure 11 shows an example of the installation position of the imaging unit 12031.

[0095] In Figure 11, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0096] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0097] Figure 11 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0098] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0099] For example, the microcomputer 12051, based on distance information obtained from imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to vehicle 12100). In particular, it can extract the nearest object on the vehicle 12100's path that is traveling in approximately the same direction as vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0100] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, heavy vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0101] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0102] The above describes an example of a vehicle control system to which the technology described herein may be applied. The technology described herein may be applied to the imaging unit 12031, etc., among the configurations described above.

[0103] Furthermore, this technology can take the following configuration. (1) Multiple power consumption circuits that consume power without affecting the operation of the controlled circuit, A voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, The system includes a control circuit that controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit. Semiconductor equipment. (2) Regardless of the operating state of the controlled circuit, the control circuit controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit so that the voltage of the monitored wiring reaches a predetermined voltage level. (1) The semiconductor device described above. (3) The control circuit controls the number of power consumption circuits based on a table showing the correspondence between the voltage detected by the voltage detection circuit and the number of power consumption circuits that consume power. The semiconductor device described in (1) or (2). (4) The voltage detection circuit has a time-to-digital converter that converts the time it takes for the monitored wiring to reach a predetermined voltage level into a digital signal. The table registers the correspondence between the digital signal and the number of power consumption circuits that consume power. (3) Semiconductor device as described above. (5) The control circuit automatically generates the table when the controlled circuit is started. The semiconductor device described in (3) or (4). (6) The table is erased when the supply of power voltage to the controlled circuit is stopped. The control circuit automatically generates the table each time the controlled circuit is started. (5) Semiconductor device as described above. (7) Each of the plurality of power consumption circuits comprises a MOS transistor and a resistive element that allows current to flow from the monitored wiring when the MOS transistor is on, The control circuit controls whether or not to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. (1) A semiconductor device as described in any one of items (1) through (6). (8) The control circuit individually switches on or off the plurality of MOS transistors in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. Each of the aforementioned power consumption circuits consumes power by passing current from the monitored wiring through the corresponding resistor element. (7) Semiconductor device as described above. (9) At least some of the plurality of MOS transistors in the plurality of power consumption circuits are arranged in a staggered pattern. The semiconductor device described in (7) or (8). (10) The monitored wiring is a power supply line supplied to the controlled circuit, or a local power line branched from the power supply line. (1) to (9) The semiconductor device described in any one of these items. (11) A pixel array section in which a plurality of pixels, each having a photoelectric conversion element, are arranged A signal processing circuit that converts the analog pixel signals converted photoelectrically by the plurality of pixels into digital pixel signals, An image processing circuit that performs image processing on the digital pixel signals generated by the signal processing circuit, Multiple power consumption circuits that consume power without affecting the operation of the controlled circuit included in the image processing circuit, A voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, The system includes a control circuit that controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit. Light detection device. (12) The controlled circuit includes at least one of a remosaic processing circuit or a defect correction circuit. (11) The light detection device described above. (13) The monitored wiring is a power supply line that supplies power voltage to the controlled circuit, or a local power line branched from the power supply line. The light detection device described in (11) or (12). (14) The control circuit controls the amount of current flowing through the monitored wiring based on the voltage detected by the voltage detection circuit, such that fluctuations in the power supply voltage supplied to the controlled circuit are suppressed. (12) The light detection device described above. (15) The control circuit controls the number of power consumption circuits based on a table showing the correspondence between the voltage detected by the voltage detection circuit and the number of power consumption circuits that consume power. A light detection device as described in any one of items (11) to (14). (16) The control circuit automatically generates the table when the image processing circuit is started. (15) The light detection device described above. (17) The table is erased when the power supply voltage to the image processing circuit is stopped. The control circuit automatically generates the table each time the image processing circuit is started. (16) The light detection device described above. (18) Each of the plurality of power consumption circuits comprises a MOS transistor and a resistive element that allows current to flow from the monitored wiring when the MOS transistor is ON, The control circuit controls whether or not to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. A light detection device as described in any one of items (11) to (17). (19) The control circuit individually switches on or off the plurality of MOS transistors in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. Each of the aforementioned power consumption circuits consumes power by passing current from the monitored wiring through the corresponding resistor element. (18) The light detection device described above. (20) At least some of the plurality of MOS transistors in the plurality of power consumption circuits are arranged in a staggered pattern. The light detection device described in (18) or (19).

[0104] The aspects of this disclosure are not limited to the individual embodiments described above, but include various modifications that a person skilled in the art could conceive, and the effects of this disclosure are not limited to those described above. In other words, various additions, modifications, and partial deletions are possible, as long as they do not depart from the conceptual idea and spirit of this disclosure derived from the claims and their equivalents. [Explanation of Symbols]

[0105] 1. Light detection device, 2a. Pixel array section, 2b. Peripheral circuit section, 3. Vertical drive section, 4. Column signal processing section, 5. Horizontal drive section, 6. System control section, 7. Image processing section, 8. Data storage section, 9. Output section, 11. Pixel defect correction processing section, 12. Remosaic processing section, 13. Camera signal processing section, 14. Pixel defect evaluation section, 15. Pixel defect correction section, 16. Circuit block, 20. Semiconductor device, 20a. Semiconductor device, 21. Power consumption circuit, 21a. MOS array, 21b. MOS circuit, 21c. MOS transistor, 21d. Resistor element, 22. Voltage detection circuit, 23a. Control circuit, 23b. Table, 23c. Memory section, 24. Controlled circuit, 25. Monitored wiring, 50. Semiconductor chip

Claims

1. Multiple power consumption circuits that consume power without affecting the operation of the controlled circuit, A voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, The system includes a control circuit that controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit. Semiconductor equipment.

2. Regardless of the operating state of the controlled circuit, the control circuit controls the number of power-consuming circuits that consume power based on the voltage detected by the voltage detection circuit, so that the voltage of the monitored wiring reaches a predetermined voltage level. The semiconductor device according to claim 1.

3. The control circuit controls the number of power consumption circuits based on a table showing the correspondence between the voltage detected by the voltage detection circuit and the number of power consumption circuits that consume power. The semiconductor device according to claim 1.

4. The voltage detection circuit includes a time-to-digital converter that converts the time it takes for the monitored wiring to reach a predetermined voltage level into a digital signal. The table registers the correspondence between the digital signal and the number of power consumption circuits that consume power. The semiconductor device according to claim 3.

5. The control circuit automatically generates the table when the controlled circuit is started. The semiconductor device according to claim 3.

6. The table is erased when the power supply voltage to the controlled circuit is stopped. The control circuit automatically generates the table each time the controlled circuit is started. The semiconductor device according to claim 5.

7. Each of the aforementioned power consumption circuits includes a MOS transistor and a resistive element that allows current to flow from the monitored wiring when the MOS transistor is on. The control circuit controls whether or not to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. The semiconductor device according to claim 1.

8. The control circuit individually switches the on or off of the plurality of MOS transistors in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. Each of the aforementioned power consumption circuits consumes power by passing current from the monitored wiring through the corresponding resistor element. The semiconductor device according to claim 7.

9. At least some of the multiple MOS transistors in the multiple power consumption circuits are arranged in a staggered pattern. The semiconductor device according to claim 7.

10. The monitored wiring is a power supply line supplied to the controlled circuit, or a local power line branched from the power supply line. The semiconductor device according to claim 1.

11. A pixel array section in which multiple pixels, each having a photoelectric conversion element, are arranged, A signal processing circuit that converts the analog pixel signals converted photoelectrically by the plurality of pixels into digital pixel signals, An image processing circuit that performs image processing on the digital pixel signals generated by the signal processing circuit, Multiple power consumption circuits that consume power without affecting the operation of the controlled circuit included in the image processing circuit, A voltage detection circuit that detects the voltage of a monitored wiring connected to the controlled circuit, The system includes a control circuit that controls the number of power consumption circuits that consume power based on the voltage detected by the voltage detection circuit. Light detection device.

12. The controlled circuit includes at least one of a remosaic processing circuit or a defect correction circuit. The light detection device according to claim 11.

13. The monitored wiring is a power supply line that supplies power voltage to the controlled circuit, or a local power line branched from the power supply line. The light detection device according to claim 11.

14. The control circuit controls the amount of current flowing through the monitored wiring based on the voltage detected by the voltage detection circuit, so as to suppress fluctuations in the power supply voltage supplied to the controlled circuit. The light detection device according to claim 12.

15. The control circuit controls the number of power consumption circuits based on a table showing the correspondence between the voltage detected by the voltage detection circuit and the number of power consumption circuits that consume power. The light detection device according to claim 11.

16. The control circuit automatically generates the table when the image processing circuit is started. The light detection device according to claim 15.

17. The table is erased when the power supply voltage to the image processing circuit is stopped. The control circuit automatically generates the table each time the image processing circuit is started. The light detection device according to claim 16.

18. Each of the aforementioned power consumption circuits includes a MOS transistor and a resistive element that allows current to flow from the monitored wiring when the MOS transistor is on. The control circuit controls whether or not to turn on the MOS transistor in each of the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. The light detection device according to claim 11.

19. The control circuit individually switches the on or off of the plurality of MOS transistors in the plurality of power consumption circuits based on the voltage detected by the voltage detection circuit. Each of the aforementioned power consumption circuits consumes power by passing current from the monitored wiring through the corresponding resistor element. The light detection device according to claim 18.

20. At least some of the multiple MOS transistors in the multiple power consumption circuits are arranged in a staggered pattern. The light detection device according to claim 18.

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