Multiplexer and filter device

Abstract

The present invention provides a multiplexer that improves isolation and a filter device that increases out-of-band attenuation. [Solution] The multiplexer 10 includes a transmit filter 1A and a receive filter 1B having input terminals 4A, 4B and output terminals 5A, 5B, a first reference potential terminal 6A and a second reference potential terminal 6B, a first parallel arm resonator P1, a plurality of second parallel arm resonators P2 to P4, a capacitance C connected between the first reference potential terminal 6A and the second reference potential terminal 6B, a first reference potential electrode 26A, a first external reference potential electrode 26G, a second reference potential electrode 26B, a second external reference potential electrode 26H, and an inductor L connected between the second reference potential electrode and the second external reference potential electrode H. The sum of the inductances between the first reference potential electrode and the first external reference potential electrode is smaller than the sum of the inductances between the second reference potential electrode and the second external reference potential electrode.

Description

Technical Field

[0001] The present invention relates to a multiplexer including an acoustic wave resonator and a filter device.

[0002] Conventionally, filter devices and multiplexers have been widely used as filters for mobile phones and the like. Patent Document 1 below discloses an acoustic wave filter device having a transmission-side filter unit and a reception-side filter unit. In the transmission-side filter unit of this acoustic wave filter device, a plurality of parallel arm resonators are commonly connected to a ground potential.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When a plurality of parallel arm resonators are commonly connected to a ground potential as in the transmission-side filter unit of Patent Document 1, the inductance tends to increase in the path from the plurality of parallel arm resonators to the ground potential. Therefore, there is a possibility that part of the signal that has passed through the parallel arm resonators does not flow to the external ground potential, and the phenomenon that the signal passes through other parallel arm resonators and wraps around to the output side cannot be sufficiently suppressed. As a result, the amount of out-of-band attenuation in the transmission-side filter unit cannot be sufficiently increased, and there is a possibility that the isolation in the acoustic wave filter device cannot be sufficiently improved.

[0005] An object of the present invention is to provide a multiplexer capable of improving isolation. Another object of the present invention is to provide a filter device capable of increasing the amount of out-of-band attenuation.

Means for Solving the Problems

[0006] The multiplexer according to the present invention comprises an input terminal and an output terminal, a first reference potential terminal and a second reference potential terminal connected to a reference potential, a first parallel arm resonator connected to the first reference potential terminal, a plurality of second parallel arm resonators located on the output terminal side of the first parallel arm resonator in the circuit configuration and commonly connected to the second reference potential terminal, a capacitor connected between the first reference potential terminal and the second reference potential terminal, a first reference potential electrode connected to the first reference potential terminal and located on the reference potential side of the capacitor, and an electrical connection to the first reference potential electrode. A transmitting filter and a receiving filter are provided, each having a first external reference potential electrode, a second reference potential electrode connected to the second reference potential terminal and located on the reference potential side of the capacitance, a second external reference potential electrode electrically connected to the second reference potential electrode, and an inductor connected between the second reference potential electrode and the second external reference potential electrode, wherein the total inductance between the first reference potential electrode and the first external reference potential electrode is smaller than the total inductance between the second reference potential electrode and the second external reference potential electrode.

[0007] The filter device according to the present invention comprises an input terminal and an output terminal, a first reference potential terminal and a second reference potential terminal connected to a reference potential, a first parallel arm resonator connected to the first reference potential terminal, a plurality of second parallel arm resonators located on the output terminal side of the first parallel arm resonator in the circuit configuration and commonly connected to the second reference potential terminal, a capacitance connected between the first reference potential terminal and the second reference potential terminal, a first reference potential electrode connected to the first reference potential terminal and located on the reference potential side of the capacitance, and the first reference potential The device comprises a first external reference potential electrode electrically connected to the electrode, a second reference potential electrode connected to the second reference potential terminal and located on the reference potential side of the capacitance, a second external reference potential electrode electrically connected to the second reference potential electrode, and an inductor connected between the second reference potential electrode and the second external reference potential electrode, wherein the total inductance between the first reference potential electrode and the first external reference potential electrode is smaller than the total inductance between the second reference potential electrode and the second external reference potential electrode. [Effects of the Invention]

[0008] The multiplexer according to the present invention can improve isolation. The filter device according to the present invention can increase out-of-band attenuation. [Brief explanation of the drawing]

[0009] [Figure 1] This is a circuit diagram of a multiplexer according to the first embodiment of the present invention. [Figure 2] This is the circuit diagram of the multiplexer in the first comparative example. [Figure 3] This figure shows the isolation in the multiplexer of the first embodiment of the present invention and the first comparative example. [Figure 4] This diagram schematically shows an example of a path through which a portion of a signal is transmitted when a signal is input to the transmission filter in the first embodiment of the present invention. [Figure 5] This diagram schematically shows an example of the path through which some of the signal is transmitted when a signal is input to the transmit filter in the first comparative example. [Figure 6] This diagram shows the relationship between the capacitance between the first reference potential terminal and the second reference potential terminal and the isolation. [Figure 7] This figure shows the relationship between the capacitance between the first and second reference potential terminals and the isolation around 1855 MHz. [Figure 8] This is a schematic plan view of the transmitting filter in the first embodiment of the present invention. [Figure 9] This is a schematic plan view of the series arm resonator of the transmitting filter in the first embodiment of the present invention. [Figure 10] This is a schematic plan view showing an enlarged view of the vicinity of the portion where the capacitance is provided in the transmitting filter according to the first embodiment of the present invention. [Figure 11] This is a schematic cross-sectional view along line II in Figure 10. [Figure 12] This is a schematic cross-sectional view along the line II-II in Figure 10. [Figure 13] This is a schematic plan view illustrating the positional relationship between the first parallel arm resonator and the capacitance in a first embodiment of the present invention. [Figure 14] This is a schematic plan view showing an enlarged view of the vicinity of the portion where the capacitance is provided in the transmitting filter in the first modified example of the first embodiment of the present invention. [Figure 15] This is a schematic cross-sectional view along line II in Figure 14. [Figure 16] This is a schematic plan view of a transmitting filter in a second modified example of the first embodiment of the present invention. [Figure 17] This is a schematic cross-sectional view along the line III-III in Figure 16. [Figure 18] This is a schematic cross-sectional view showing a cross-section passing through the first reference potential terminal and the second reference potential terminal in a multiplexer according to the first embodiment of the present invention. [Figure 19] This is a circuit diagram of a multiplexer according to a second embodiment of the present invention. [Figure 20] FIG. 20(a) and FIG. 20(b) are schematic plan views for explaining a method of measuring the total length of a plurality of electrodes. FIG. 20(c) is a schematic perspective plan view for explaining a method of measuring the total length of a plurality of electrodes. FIG. 20(d) is a schematic cross-sectional view for explaining a method of measuring the total length of a plurality of electrodes. [Figure 21] This is a schematic cross-sectional view showing a cross section passing through a first reference potential terminal and a second reference potential terminal in the multiplexer according to the third embodiment of the present invention. [Description of Embodiments]

[0010] Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

[0011] It should be noted that each embodiment described in the present specification is illustrative, and partial substitution or combination of configurations is possible between different embodiments.

[0012] FIG. 1 is a circuit diagram of the multiplexer according to the first embodiment of the present invention.

[0013] The multiplexer 10 of the present embodiment is a duplexer. The multiplexer 10 has a common connection terminal 2, a transmission filter 1A and a reception filter 1B. The transmission filter 1A and the reception filter 1B are commonly connected to the common connection terminal 2. The common connection terminal 2 is an antenna terminal in the present embodiment. The antenna terminal is connected to an antenna.

[0014] Note that the multiplexer according to the present invention is not limited to a duplexer. The multiplexer according to the present invention may be, for example, a triplexer, a quadplexer or the like. The multiplexer according to the present invention only needs to have at least one transmission filter and at least one reception filter.

[0015] The transmitting filter 1A in the multiplexer 10 shown in Figure 1 is a filter device according to one embodiment of the present invention. Specifically, the transmitting filter 1A has a first input terminal 4A and a first output terminal 5A, a plurality of resonators, a first reference potential terminal 6A and a second reference potential terminal 6B. The transmitting filter 1A further has a first reference potential electrode 26A, a second reference potential electrode 26B, a first external reference potential electrode 26G, a second external reference potential electrode 26H, and an inductor L.

[0016] In this specification, a reference potential terminal is a terminal connected to a reference potential. A reference potential electrode is an electrode connected to a reference potential terminal and also connected to a reference potential. An external reference potential electrode is an electrode that is electrically connected to a reference potential electrode and also connected to a reference potential, and is located furthest to the reference potential. In other words, the external reference potential electrode is located closer to the reference potential than the reference potential electrode.

[0017] The receiving filter 1B has a second input terminal 4B and a second output terminal 5B, a plurality of resonators, and reference potential terminals 6C and 6D.

[0018] Each of the above terminals may be configured as an electrode pad or as wiring. Each of the above reference potential electrodes and each of the above external reference potential electrodes may also be configured as an electrode pad or as wiring. In this embodiment, the common connection terminal 2, the first input terminal 4A, the second output terminal 5B, the first reference potential terminal 6A, the second reference potential terminal 6B, the reference potential terminal 6C, and the reference potential terminal 6D are configured as electrode pads. The first reference potential electrode 26A, the second reference potential electrode 26B, the first external reference potential electrode 26G, and the second external reference potential electrode 26H are also configured as electrode pads. On the other hand, the first output terminal 5A and the second input terminal 4B are configured as wiring. The first output terminal 5A and the second input terminal 4B are connected to the common connection terminal 2.

[0019] The transmitting filter 1A is a ladder-type filter. The transmitting filter 1A has multiple series arm resonators and multiple parallel arm resonators. In this embodiment, all of the multiple series arm resonators and multiple parallel arm resonators in the transmitting filter 1A are elastic wave resonators.

[0020] The multiple series arm resonators of the transmitting filter 1A are specifically series arm resonators S1a, S1b, S2, S3, and S4. The multiple series arm resonators are connected in series with each other between the first input terminal 4A and the first output terminal 5A. More specifically, in the circuit configuration, the series arm resonators S1a, S1b, S2, S3, and S4 are arranged in this order from the first input terminal 4A side.

[0021] The multiple parallel arm resonators of the transmitting filter 1A are specifically parallel arm resonators P1, P2, P3, and P4. Parallel arm resonator P1 is the first parallel arm resonator in this invention. Parallel arm resonators P2, P3, and P4 are the multiple second parallel arm resonators in this invention. In terms of circuit configuration, the multiple second parallel arm resonators are located closer to the first output terminal 5A than the first parallel arm resonator.

[0022] More specifically, a parallel arm resonator P1 is connected between the first input terminal 4A and the first reference potential terminal 6A. A parallel arm resonator P2 is connected between the connection point between the series arm resonators S1b and S2 and the second reference potential terminal 6B. A parallel arm resonator P3 is connected between the connection point between the series arm resonators S2 and S3 and the second reference potential terminal 6B. A parallel arm resonator P4 is connected between the connection point between the series arm resonators S3 and S4 and the second reference potential terminal 6B. Note that the parallel arm resonators P2, P3, and P4, which are multiple second parallel arm resonators, are all commonly connected to the same second reference potential terminal 6B. On the other hand, the first parallel arm resonator P1 is not commonly connected to the first reference potential terminal 6A with the other parallel arm resonators.

[0023] A capacitance C is connected between the first reference potential terminal 6A and the second reference potential terminal 6B. A first reference potential electrode 26A is further connected to the first reference potential terminal 6A. Specifically, the first reference potential electrode 26A is located on the reference potential side of capacitance C. A first external reference potential electrode 26G is electrically connected to the first reference potential electrode 26A. A second reference potential electrode 26B is connected to the second reference potential terminal 6B. Specifically, the second reference potential electrode 26B is located on the reference potential side of capacitance C. A second external reference potential electrode 26H is electrically connected to the second reference potential electrode 26B. More specifically, an inductor L is connected between the second reference potential electrode 26B and the second external reference potential electrode 26H.

[0024] However, the circuit configuration of the transmitting filter 1A is not limited to the above. It is sufficient that the first parallel arm resonator is connected to the first reference potential terminal 6A, and a plurality of second parallel arm resonators are commonly connected to the second reference potential terminal 6B. In addition, it is sufficient that a capacitance C is connected between the first reference potential terminal 6A and the second reference potential terminal 6B. Furthermore, it is sufficient that the first reference potential electrode 26A and the first external reference potential electrode 26G are electrically connected to the first reference potential terminal 6A, and the second reference potential electrode 26B and the second external reference potential electrode 26H are electrically connected to the second reference potential terminal 6B. And, it is sufficient that an inductor L is connected between the second reference potential electrode 26B and the second external reference potential electrode 26H.

[0025] In this specification, the term "inductor" includes not only surface-mount inductor elements and chip components, but also coils composed of electrodes such as wiring, and wiring with a meander shape. Electrodes such as wiring have inductance as a parameter.

[0026] The multiple resonators of the receiving filter 1B are, specifically, a series arm resonator S11, a series arm resonator S12, a series arm resonator S13, a parallel arm resonator P11, a parallel arm resonator P12, and a longitudinally coupled resonator type elastic wave filter 7. In this embodiment, all resonators in the receiving filter 1B other than the longitudinally coupled resonator type elastic wave filter 7 are elastic wave resonators.

[0027] A longitudinally coupled resonator elastic wave filter 7 is connected between the second input terminal 4B and the second output terminal 5B. A series arm resonator S11 and a series arm resonator S12 are connected in series between the second input terminal 4B and the longitudinally coupled resonator elastic wave filter 7. A series arm resonator S13 is connected between the longitudinally coupled resonator elastic wave filter 7 and the second output terminal 5B. A parallel arm resonator P11 is connected between the connection point between the series arm resonators S11 and S12 and the reference potential terminal 6C. A parallel arm resonator P12 is connected between the second output terminal 5B and the reference potential terminal 6D. Note that the circuit configuration of the receiving filter 1B is not limited to the above.

[0028] The multiplexer 10 has multiple inductors other than inductor L. Specifically, these multiple inductors are inductor M1, inductor M2, and inductor M3. Inductor M1 is connected between the common connection terminal 2 and the ground potential. Inductor M2 is connected between the reference potential terminal 6C in the receiving filter 1B and the reference potential. Inductor M3 is connected between the reference potential terminal 6D in the receiving filter 1B and the reference potential. Note that the multiplexer 10 does not necessarily have to have inductors other than inductor L.

[0029] Figure 1 shows an example of the external configuration of the multiplexer 10. Specifically, an inductor M4 is connected between the second output terminal 5B of the receiving filter 1B and the reference potential. An inductor M5 is connected to the first input terminal 4A of the transmitting filter 1A. A capacitor D is connected between the inductor M5 and the reference potential. However, the external configuration of the multiplexer 10 is not limited to the above.

[0030] The features of this embodiment are as follows: 1) A capacitance C is connected between the first reference potential terminal 6A and the second reference potential terminal 6B. 2) The sum of the inductances between the first reference potential electrode 26A and the first external reference potential electrode 26G is smaller than the sum of the inductances between the second reference potential electrode 26B and the second external reference potential electrode 26H. This makes it possible to increase the out-of-band attenuation in the transmitting filter 1A as a filter device according to the present invention. This makes it possible to improve isolation in the multiplexer 10. This will be explained below by comparing this embodiment with the first comparative example.

[0031] The multiplexer 100 of the first comparative example shown in Figure 2 is configured similarly to the multiplexer 10 of the first embodiment, except that the transmitting filter 101A does not have a capacitance C. The isolation was compared in the first embodiment and the first comparative example.

[0032] Figure 3 shows the isolation in the multiplexer of the first embodiment and the first comparative example. The vertical axis in Figure 3 represents the attenuation. The smaller the attenuation in the passband of the filter included in the multiplexer, the worse the isolation.

[0033] As shown in Figure 3, in the bandwidth indicated by the double arrow W, the minimum attenuation in the first embodiment is greater than the minimum attenuation in the first comparative example. Thus, in the first embodiment, the out-of-band attenuation can be increased in the transmitting filter 1A, and the isolation in the multiplexer 10 can be improved. The reason for this will be explained below.

[0034] Figure 4 is a schematic diagram showing an example of the path through which some of the signal is transmitted when a signal is input to the transmit filter in the first embodiment.

[0035] When a signal is input from the first input terminal 4A of the transmitting filter 1A in the first embodiment, for example, as shown by the dashed arrow in Figure 4, some of the signal passes through the series arm resonators S1a and S1b and the parallel arm resonator P2. Some of this signal passes through the capacitance C and flows to the outside from the first reference potential terminal 6A. Another portion flows to the outside through the second reference potential terminal 6B. On the other hand, some of the signal does not flow to the outside from the second reference potential terminal 6B, but passes through the other parallel arm resonators P3 or P4 and may leak to the first output terminal 5A. However, in the first embodiment, such leakage can be suppressed. The details of this will be explained below.

[0036] The inductance tends to be large in the portion where multiple parallel arm resonators are commonly connected. Therefore, in conventional configurations, some signals tend to leak to the output terminal side instead of flowing out from the reference potential terminal where multiple parallel arm resonators are commonly connected.

[0037] The first embodiment also includes such a configuration. Specifically, a plurality of second parallel arm resonators, namely parallel arm resonators P2, P3, and P4, are connected to the second reference potential terminal 6B. In addition, in the first embodiment, a capacitance C is connected between the first reference potential terminal 6A and the second reference potential terminal 6B. Furthermore, the sum of the inductances between the first reference potential electrode 26A and the first external reference potential electrode 26G is smaller than the sum of the inductances between the second reference potential electrode 26B and the second external reference potential electrode 26H. As a result, signals passing through any of the second parallel arm resonators are more likely to flow to the first reference potential terminal 6A than to the second reference potential terminal 6B or other second parallel arm resonators. Therefore, leakage of signals passing through the second parallel arm resonators to the first output terminal 5A can be suppressed.

[0038] Furthermore, in the first embodiment, by connecting a capacitance C between the first reference potential terminal 6A and the second reference potential terminal 6B, the attenuation pole can be positioned within the bandwidth indicated by the double arrow W in Figure 3. This allows for a larger out-of-band attenuation in the transmitting filter 1A and effectively improves isolation in the multiplexer 10.

[0039] Figure 5 schematically shows an example of the path through which some of the signal is transmitted when a signal is input to the transmit filter in the first comparative example.

[0040] In the first comparative example, capacitance C is not connected between the first reference potential terminal 6A and the second reference potential terminal 6B. Furthermore, multiple second parallel arm resonators are connected to the second reference potential terminal 6B. As a result, the sum of the inductances between the second reference potential terminal 6B and the second reference potential electrode 26B, and between the second reference potential electrode 26B and the second external reference potential electrode 26H is large. Consequently, leakage of the signal that has passed through the second parallel arm resonators to the first output terminal 5A cannot be sufficiently suppressed.

[0041] In the first embodiment, the relationship between the capacitance of capacitor C and isolation was derived by simulation. Specifically, the capacitance of capacitor C was set to 0.1pF, 0.3pF, 0.5pF, 0.7pF, or 0.9pF. As a second comparative example, isolation was also derived when the capacitance between the first reference potential terminal 6A and the second reference potential terminal 6B was set to 0pF.

[0042] Figure 6 shows the relationship between the capacitance between the first and second reference potential terminals and isolation. Figure 7 shows the relationship between the capacitance between the first and second reference potential terminals and isolation around 1855 MHz.

[0043] As shown in Figures 6 and 7, the isolation is better in the first embodiment, where the capacitance is greater than 0 pF, than in the second comparative example, where the capacitance between the first reference potential terminal 6A and the second reference potential terminal 6B is 0 pF. Furthermore, in the first embodiment, it can be seen that the isolation improves as the capacitance of capacitance C increases towards 0.9 pF.

[0044] The capacitance of capacitor C is preferably 0.1 pF or more, and more preferably 0.3 pF or more. This further improves isolation. On the other hand, it is preferable that the capacitance is 1.0 pF or less. This prevents the size of the transmitting filter 1A from increasing.

[0045] Generally, the smaller a multiplexer such as a duplexer becomes, the shorter the distance between the multiple filters contained within the multiplexer becomes. Therefore, as the multiplexer is miniaturized, its isolation tends to deteriorate. In contrast, the present invention can improve isolation. Thus, the present invention facilitates miniaturization of the multiplexer.

[0046] The configuration of the first embodiment will be described in more detail below.

[0047] Figure 8 is a schematic plan view of the transmitting filter in the first embodiment. In Figure 8, each series arm resonator and each parallel arm resonator are shown by a schematic diagram of a rectangle with two diagonals. The same applies to the schematic plan views other than Figure 8.

[0048] The multiplexer 10 has a piezoelectric substrate 9. Although not shown in Figure 8, the transmitting filter 1A and the receiving filter 1B in the multiplexer 10 share the same piezoelectric substrate 9. A piezoelectric substrate is a substrate that has piezoelectric properties. In the first embodiment, the piezoelectric substrate 9 is a substrate made only of piezoelectric material. Examples of piezoelectric materials that can be used include lithium tantalate, lithium niobate, zinc oxide, aluminum nitride, quartz, or PZT (lead zirconate titanate). It is preferable that lithium tantalate or lithium niobate is used as the piezoelectric material. In the first embodiment, lithium niobate is used as the piezoelectric material. The piezoelectric substrate 9 may also be a laminated substrate including a piezoelectric layer.

[0049] In the first embodiment, all resonators of the transmitting filter 1A are elastic wave resonators. The configuration of the elastic wave resonators is described in detail below.

[0050] Figure 9 is a schematic plan view of the series arm resonators of the transmitting filter in the first embodiment. Figure 9 schematically shows the wiring connected to the parallel arm resonator P1, which is the first parallel arm resonator.

[0051] The parallel arm resonator P1 has the piezoelectric substrate 9 and the IDT electrode 11. The IDT electrode 11 is provided on the piezoelectric substrate 9. The IDT electrode 11 has a pair of busbars and a plurality of electrode fingers. The pair of busbars are specifically a first busbar 16 and a second busbar 17. The first busbar 16 and the second busbar 17 face each other. The plurality of electrode fingers are specifically a plurality of first electrode fingers 18 and a plurality of second electrode fingers 19. One end of each of the plurality of first electrode fingers 18 is connected to the first busbar 16. One end of each of the plurality of second electrode fingers 19 is connected to the second busbar 17. The plurality of first electrode fingers 18 and the plurality of second electrode fingers 19 are interlocked with each other. The IDT electrode 11 may consist of a single layer metal film or a multilayer metal film.

[0052] In the following, the first busbar 16 and the second busbar 17 shown in Figure 9 may be collectively referred to simply as "busbars." The first electrode fingers 18 and the second electrode fingers 19 may be collectively referred to simply as "electrode fingers." The direction in which multiple electrode fingers extend is called the electrode finger extension direction, and the direction perpendicular to the electrode finger extension direction is called the electrode finger orthogonal direction. In the first embodiment, the electrode finger extension directions of all series arm resonators and all parallel arm resonators in the transmitting filter 1A are parallel. In Figures 8 and 9, the electrode finger extension direction is the vertical direction.

[0053] As shown in Figure 9, the parallel arm resonator P1 has a pair of reflectors. Specifically, the pair of reflectors are reflector 12A and reflector 12B. Reflectors 12A and reflector 12B are mounted on the piezoelectric substrate 9 so as to face each other with the IDT electrode 11 in the direction orthogonal to the electrode fingers. Reflector 12A has a pair of busbars and a plurality of electrode fingers 12c. Specifically, the pair of busbars of reflector 12A are busbar 12a and busbar 12b. Busbars 12a and busbar 12b face each other. One end of the plurality of electrode fingers 12c is connected to busbar 12a. The other end of the plurality of electrode fingers 12c is connected to busbar 12b. Reflector 12B is configured similarly to reflector 12A.

[0054] Similar to the parallel arm resonator P1, each of the parallel arm resonators and each of the series arm resonators in the transmitting filter 1A and receiving filter 1B shown in Figure 1, other than the parallel arm resonator P1, also has an IDT electrode and a pair of reflectors. That is, each of the parallel arm resonators and each of the series arm resonators is constructed by providing an IDT electrode on the piezoelectric substrate 9. The reflectors help to improve the resonance characteristics of each of the parallel arm resonators and each of the series arm resonators.

[0055] On the other hand, the longitudinally coupled resonator type elastic wave filter 7 in the receiving filter 1B has nine IDT electrodes and a pair of reflectors. The longitudinally coupled resonator type elastic wave filter 7 has one stage. Thus, the longitudinally coupled resonator type elastic wave filter 7 is constructed by providing multiple IDT electrodes on the piezoelectric substrate 9. Each resonator contributes to improving the resonance characteristics of the longitudinally coupled resonator type elastic wave filter 7. However, the number of IDT electrodes and the number of stages of the longitudinally coupled resonator type elastic wave filter 7 are not limited to those described above.

[0056] In the first embodiment, all resonators of the transmitting filter 1A share the same piezoelectric substrate 9. All resonators of the receiving filter 1B share the same piezoelectric substrate 9. Furthermore, all resonators of the transmitting filter 1A and all resonators of the receiving filter 1B share the same piezoelectric substrate 9. However, for example, the transmitting filter 1A and the receiving filter 1B may each have their own piezoelectric substrate 9.

[0057] As shown in Figure 8, the parallel arm resonators P1 and P2 are adjacent in the direction of electrode finger extension. As described above, the parallel arm resonator P1 is the first parallel arm resonator in the present invention. The parallel arm resonator P2 is one of a plurality of second parallel arm resonators in the present invention.

[0058] In the circuit configuration, the first reference potential wiring 8A is connected to the first reference potential terminal 6A side of the parallel arm resonator P1. Specifically, as shown in Figure 8, the first reference potential wiring 8A is connected to the busbar located on the parallel arm resonator P2 side of the parallel arm resonator P1. In this specification, a reference potential wiring is a wiring that is connected to a reference potential terminal and is also connected to a reference potential. The first reference potential wiring 8A is connected to the first reference potential terminal 6A.

[0059] On the other hand, in terms of the circuit configuration, the second reference potential wiring 8B is connected to the second reference potential terminal 6B side of one of the multiple second parallel arm resonators, P2. Specifically, as shown in Figure 8, the second reference potential wiring 8B is connected to the busbar located on the parallel arm resonator P1 side of the parallel arm resonator P2. The second reference potential wiring 8B is connected to the second reference potential terminal 6B. The first reference potential wiring 8A and the second reference potential wiring 8B are adjacent in the direction of electrode finger extension.

[0060] Figure 10 is a schematic plan view of the transmission filter in the first embodiment, showing an enlarged view of the area near where the capacitance is provided. Figure 11 is a schematic cross-sectional view along line II in Figure 10. Figure 12 is a schematic cross-sectional view along line II-II in Figure 10.

[0061] As shown in Figures 10 and 11, the first reference potential wiring 8A is a laminate including a first layer 8a and a second layer 8b. Specifically, the first layer 8a is provided on the piezoelectric substrate 9. The second layer 8b is laminated on the first layer 8a. As shown in Figure 12, the second reference potential wiring 8B is a laminate including a third layer 8c and a fourth layer 8d. Specifically, the third layer 8c is provided on the piezoelectric substrate 9. The fourth layer 8d is laminated on the third layer 8c. Hereafter, the direction in which the first layer 8a and the second layer 8b are laminated, and the direction in which the third layer 8c and the fourth layer 8d are laminated will be referred to as the lamination direction.

[0062] In the first embodiment, the first layer 8a of the first reference potential wiring 8A includes a first capacitance forming portion 8x. The fourth layer 8d of the second reference potential wiring 8B includes a second capacitance forming portion 8y. The first capacitance forming portion 8x in the first layer 8a and the second capacitance forming portion 8y in the fourth layer 8d face each other with an insulating film 13 in between. This constitutes a capacitance C.

[0063] More specifically, as shown in Figure 11, in the first reference potential wiring 8A, the second layer 8b is not laminated on a portion of the first layer 8a. Specifically, one end of the first layer 8a in the direction perpendicular to the electrode fingers extends further outward in the direction perpendicular to the electrode fingers than one end of the second layer 8b in the same direction. The portion of the first layer 8a where the second layer 8b is not laminated includes the first capacitance forming portion 8x.

[0064] As shown in Figure 12, in the second reference potential wiring 8B, a portion of the fourth layer 8d is not laminated to the third layer 8c. Specifically, a portion of one end of the fourth layer 8d in the electrode finger extension direction extends outward in the electrode finger extension direction more than one end of the third layer 8c in the electrode finger extension direction. The portion of the fourth layer 8d that is not laminated to the third layer 8c includes the second capacitance forming portion 8y.

[0065] The insulating film 13 is located on the first capacitance-forming portion 8x of the first layer 8a. The second capacitance-forming portion 8y of the fourth layer 8d is located on the insulating film 13. That is, the first layer 8a and the fourth layer 8d face each other in the stacking direction, with the insulating film 13 in between. This constitutes the capacitance C.

[0066] In the first embodiment, in the first layer 8a, the width of the first capacitance forming portion 8x is wider than the width of the portion adjacent to the first capacitance forming portion 8x. This makes it possible to increase the capacitance C. The width of the first layer 8a referred to here is the dimension of the first layer 8a along the direction perpendicular to the direction in which the first layer 8a extends. However, in the first layer 8a, the width of the first capacitance forming portion 8x may be the same as the width of the portion adjacent to the first capacitance forming portion 8x.

[0067] Capacitor C is adjacent to the first parallel arm resonator P1 in the direction orthogonal to the electrode finger. Capacitor C is adjacent to one of the multiple second parallel arm resonators, the parallel arm resonator P2, in the direction of electrode finger extension. This simplifies the routing of the first reference potential wiring 8A and the second reference potential wiring 8B. Thus, the size of the multiplexer 10 can be suppressed.

[0068] The position of capacitance C is not limited to the above. However, it is preferable that capacitance C is adjacent to at least one of the first parallel arm resonators and the plurality of second parallel arm resonators in either the electrode finger extension direction or the electrode finger orthogonal direction. This simplifies the routing of the first reference potential wiring 8A or the second reference potential wiring 8B.

[0069] As in the first embodiment, it is preferable that the first reference potential wiring 8A and the second reference potential wiring 8B are provided adjacent to each other on the piezoelectric substrate 9. This effectively simplifies the routing of the first reference potential wiring 8A and the second reference potential wiring 8B for forming the capacitance C. Therefore, the size of the multiplexer 10 can be effectively suppressed.

[0070] Figure 13 is a schematic plan view illustrating the positional relationship between the first parallel arm resonator and the capacitance in the first embodiment. The dashed line A in Figure 13 is a virtual line connecting the common connection terminal 2 and the first input terminal 4A. The dashed arrow B indicates the direction from the center of the parallel arm resonator P1, which is the first parallel arm resonator, toward the capacitance C.

[0071] In the first embodiment, when viewed from the center of the parallel arm resonator P1, the virtual line A is located in the direction indicated by arrow B. Therefore, the capacitance C is located close to the virtual line A when the center of the parallel arm resonator P1 is used as the reference point. This makes it easier to further improve isolation. The details of this will be explained below.

[0072] In a transmitting filter, when a signal is input from the input terminal, some of the signal may not pass through the transmitting filter but propagate directly through the piezoelectric substrate. Signals that have propagated directly through the piezoelectric substrate may reach the common connection terminal. Such signals are sometimes called direct waves. Direct waves reaching the common connection terminal tend to travel along the shortest path from the input terminal to the common connection terminal. The response caused by direct waves traveling along the short path tends to be large. The frequency at which this response occurs may be within the passband of the receiving filter. Therefore, isolation may deteriorate due to direct waves.

[0073] In contrast, the capacitance C in the first embodiment shown in Figure 13 is composed of a part of the first reference potential wiring 8A and a part of the second reference potential wiring 8B. That is, the electrodes constituting capacitance C are connected to the reference potential. Therefore, capacitance C functions as a shielding electrode against direct waves. In the first embodiment, the path shown by the virtual line A is the shortest path from the first input terminal 4A to the common connection terminal 2. As described above, capacitance C is positioned close to the virtual line A. Therefore, capacitance C effectively functions as a shielding electrode against direct waves. Consequently, isolation can be further improved.

[0074] In terms of circuit configuration, the multiple second parallel arm resonators are positioned closer to the first output terminal 5A and common connection terminal 2 than the first parallel arm resonator. Furthermore, it is preferable that the portion of the piezoelectric substrate 9 comprising the multiple second parallel arm resonators is also positioned closer to the first output terminal 5A and common connection terminal 2 than the portion comprising the first parallel arm resonator. In this case, it is preferable that, when viewed from the center of the first parallel arm resonator, the imaginary line A is positioned in the direction toward capacitance C from the center. This allows for even more reliable improvement of isolation.

[0075] The configuration of capacity C is not limited to the above. Below, a first and second modification of the first embodiment are shown, in which only the configuration of capacity C differs from that of the first embodiment. In the first and second modifications, isolation can be improved in the same way as in the first embodiment.

[0076] Figure 14 is a schematic plan view showing an enlarged view of the area around the capacitor-equipped portion of the transmitting filter in the first modified example of the first embodiment. Figure 15 is a schematic cross-sectional view along line II in Figure 14.

[0077] As shown in Figure 14, in this modified example, the position of capacitance C is the same as in the first embodiment. However, as shown in Figure 15, in this modified example, a portion of the second layer 8b in the first reference potential wiring 8C is not laminated to the first layer 8a. Specifically, one end of the second layer 8b in the direction perpendicular to the electrode fingers extends further outward in the direction perpendicular to the electrode fingers than one end of the first layer 8a in the same direction. The portion of the second layer 8b that is not laminated to the first layer 8a includes the first capacitance forming portion 8x.

[0078] As shown in Figure 14, the fourth layer 8d is not laminated on a portion of the third layer 8c in the second reference potential wiring 8D. Specifically, a portion of one end of the third layer 8c in the electrode finger extension direction extends outward in the electrode finger extension direction more than one end of the fourth layer 8d in the electrode finger extension direction. The portion of the third layer 8c where the fourth layer 8d is not laminated includes the second capacitance forming portion 8y.

[0079] As shown in Figure 15, the insulating film 13 is located on the second capacitance-forming portion 8y of the third layer 8c. The first capacitance-forming portion 8x of the second layer 8b is located on the insulating film 13. That is, the second layer 8b and the third layer 8c face each other in the stacking direction, with the insulating film 13 in between. This constitutes the capacitance C.

[0080] Figure 16 is a schematic plan view of the transmitting filter in a second modification of the first embodiment. Figure 17 is a schematic cross-sectional view along the line III-III in Figure 16.

[0081] As shown in Figure 16, in this modified example, similar to the first embodiment, the first reference potential wiring 8E and the second reference potential wiring 8F are adjacent in the direction of electrode finger extension. As shown in Figure 17, an insulating film 13 is provided on the piezoelectric substrate 9 in the portion between the first reference potential wiring 8E and the second reference potential wiring 8F. As a result, the first reference potential wiring 8E and the second reference potential wiring 8F face each other in the direction of electrode finger extension, with the insulating film 13 in between. This constitutes capacitance C.

[0082] In this modified example, the insulating film 13 is not provided on the first reference potential wiring 8E and the second reference potential wiring 8F. More specifically, the insulating film 13 is not provided on the surfaces of the first reference potential wiring 8E and the second reference potential wiring 8F that face the piezoelectric substrate 9 side. However, the insulating film 13 may be provided across the piezoelectric substrate 9, the first reference potential wiring 8E, and the second reference potential wiring 8F.

[0083] The direction in which the first reference potential wiring 8E and the second reference potential wiring 8F are adjacent is the direction of electrode finger extension. However, the direction in which the first reference potential wiring 8E and the second reference potential wiring 8F are adjacent is not limited to the above. For example, the direction in which the first reference potential wiring 8E and the second reference potential wiring 8F are adjacent may be the direction perpendicular to the electrode finger. In the present invention, the first reference potential wiring 8E and the second reference potential wiring 8F may face each other in a direction perpendicular to the lamination direction, with the insulating film 13 in between.

[0084] However, as shown in the first embodiment in Figure 10, it is preferable that the first capacitance forming portion 8x in the first reference potential wiring 8A and the second capacitance forming portion 8y in the second reference potential wiring 8B face each other in the stacking direction with the insulating film 13 in between. In this case, the area of ​​the electrodes constituting the capacitance C can be increased. This allows the electrodes constituting the capacitance C to effectively perform their function as shielding electrodes. In addition, the capacitance in capacitance C can be effectively increased. Therefore, the out-of-band attenuation can be increased more reliably in the transmitting filter 1A, and the isolation can be improved more reliably in the multiplexer 10.

[0085] On the other hand, the capacitance C may have an IDT electrode. In this case, the capacitance C is configured by providing an IDT electrode on a piezoelectric substrate 9. In the capacitance C, a first reference potential wiring 8A is connected to one busbar of the IDT electrode. A second reference potential wiring 8B is connected to the other busbar of the IDT electrode of the capacitance C. It is preferable that the electrode finger extension direction in the capacitance C is orthogonal to the electrode finger extension direction in the first parallel arm resonator and the plurality of second parallel arm resonators. It is even more preferable that the electrode finger extension direction in the capacitance C is orthogonal to the electrode finger extension direction in all resonators. This makes it possible to suppress the influence on the filter characteristics due to the excitation of elastic waves in the capacitance C.

[0086] Even when the capacitance C has an IDT electrode, it is preferable that the first reference potential wiring 8A and the second reference potential wiring 8B are provided on the piezoelectric substrate 9 adjacent to each other. This makes it easier to simplify the routing of the first reference potential wiring 8A and the second reference potential wiring 8B connected to the capacitance C. Thus, it is easier to suppress the increase in size of the multiplexer 10.

[0087] As shown in Figure 1, in the first embodiment, the series arm resonators S1a and S1b are positioned on the first input terminal 4A side of the parallel arm resonators P2, P3, and P4, which are multiple parallel arm resonators, in terms of the circuit configuration. As shown in Figure 8, the connection wire 3A is connected to the first output terminal 5A side of the series arm resonator S1a. At the same time, the connection wire 3A is connected to the first input terminal 4A side of the series arm resonator S1b. Furthermore, the connection wire 3B is connected to the first output terminal 5A side of the series arm resonator S1b.

[0088] In the first embodiment, the first reference potential wiring 8A and the connecting wiring 3A are provided on the piezoelectric substrate 9 so as to be adjacent to each other. Specifically, the first capacitance forming portion 8x of the first reference potential wiring 8A and the connecting wiring 3A are adjacent to each other. This makes it possible to effectively increase the out-of-band attenuation in the transmitting filter 1A and to effectively improve isolation in the multiplexer 10.

[0089] Furthermore, the portion of the first reference potential wiring 8A other than the first capacitance forming portion 8x may be adjacent to the connecting wiring 3A. Alternatively, the first reference potential wiring 8A and the connecting wiring 3B may be arranged on the piezoelectric substrate 9 so that they are adjacent to each other.

[0090] As described above, the circuit configuration of the transmitting filter 1A is not limited to the circuit configuration of the first embodiment. However, in terms of circuit configuration, it is preferable to have at least one series arm resonator located on the first input terminal 4A side of the plurality of second parallel arm resonators. It is preferable that one of the connecting wires connected to such a series arm resonator and the first reference potential wire 8A are provided on the piezoelectric substrate 9 so that they are adjacent to each other. This makes it possible to effectively increase the out-of-band attenuation in the transmitting filter 1A and effectively improve the isolation in the multiplexer 10.

[0091] Figure 18 is a schematic cross-sectional view showing a cross-section of a multiplexer according to the first embodiment, passing through the first reference potential terminal and the second reference potential terminal. In Figure 18, the elastic wave resonator is shown as a schematic rectangle with two diagonals added. The same applies to the schematic cross-sectional views other than Figure 18.

[0092] The multiplexer 10 has a package substrate 29. Specifically, the transmitting filter 1A and the receiving filter 1B share the package substrate 29. The configuration of the multiplexer 10 corresponds to a configuration in which elastic wave elements, including a piezoelectric substrate 9, are flip-chip mounted on the package substrate 29.

[0093] The multiplexer 10 includes a plurality of conductive connecting members 27 and a sealing resin layer 22. In the first embodiment, the connecting members 27 are bumps. However, the connecting members 27 may be, for example, a conductive adhesive. The plurality of connecting members 27 connect a plurality of terminals provided on the piezoelectric substrate 9 to the package substrate 29. The sealing resin layer 22 is provided on the package substrate 29 so as to cover the piezoelectric substrate 9.

[0094] The package substrate 29 has a laminated substrate in which multiple package layers are stacked, and multiple electrodes provided on the laminated substrate. In the first embodiment, the package substrate 29 has six package layers. The number of layers of the package substrate 29 can be two or more. As the material for each package layer, for example, glass epoxy resin or appropriate ceramic can be used.

[0095] Each of the multiple package layers has a first main surface and a second main surface. In each package layer, the first main surface and the second main surface face each other. In each package layer, of the first and second main surfaces, the first main surface is the main surface on the piezoelectric substrate 9 side.

[0096] The multiple electrodes of the package substrate 29 specifically include a first reference potential electrode 26A, a second reference potential electrode 26B, multiple through electrodes 26E, multiple internal wirings 26F, a first external reference potential electrode 26G, and a second external reference potential electrode 26H. The first reference potential electrode 26A and the second reference potential electrode 26B are provided on the first main surface 29a of the package layer located closest to the piezoelectric substrate 9. Each through electrode 26E penetrates at least one package layer. Each internal wiring 26F is provided between adjacent package layers. The first external reference potential electrode 26G and the second external reference potential electrode 26H are provided on the second main surface 29b of the package layer furthest from the piezoelectric substrate 9.

[0097] The multiple through electrodes 26E include through electrodes 26E connecting the first reference potential electrode 26A and the internal wiring 26F, through electrodes 26E connecting multiple internal wirings 26F to each other, and through electrodes 26E connecting the internal wiring 26F and the first external reference potential electrode 26G. The multiple through electrodes 26E also include through electrodes 26E connecting the second reference potential electrode 26B and the internal wiring 26F, and through electrodes 26E connecting the internal wiring 26F and the second external reference potential electrode 26H. The first reference potential electrode 26A is connected to the first external reference potential electrode 26G via the multiple through electrodes 26E and the multiple internal wirings 26F. Similarly, the second reference potential electrode 26B is connected to the second external reference potential electrode 26H via the multiple through electrodes 26E and the multiple internal wirings 26F.

[0098] The first external reference potential electrode 26G and the second external reference potential electrode 26H are electrically connected to an external reference potential. The multiple electrodes on the package substrate 29 also include electrodes electrically connected to a signal potential and electrodes electrically connected to a reference potential, which are not shown.

[0099] Multiple connecting members 27 connect multiple electrodes provided on the first main surface 29a of the package layer located closest to the piezoelectric substrate 9 to multiple terminals provided on the piezoelectric substrate 9. Specifically, for example, the multiple connecting members 27 include a connecting member 27 connecting the first reference potential terminal 6A and the first reference potential electrode 26A, and a connecting member 27 connecting the second reference potential terminal 6B and the second reference potential electrode 26B. The multiple connecting members 27 also include connecting members 27, which are not shown in Figure 18, that connect electrodes provided on the first main surface 29a to terminals provided on the piezoelectric substrate 9.

[0100] The first reference potential terminal 6A is electrically connected to an external reference potential via a connecting member 27, a first reference potential electrode 26A, multiple through electrodes 26E, multiple internal wirings 26F, and a first external reference potential electrode 26G. The second reference potential terminal 6B is electrically connected to an external reference potential via a connecting member 27, a second reference potential electrode 26B, multiple through electrodes 26E, multiple internal wirings 26F, and a second external reference potential electrode 26H. Similarly, the common connection terminal 2, the first input terminal 4A, and the second output terminal 5B shown in Figure 1 are also electrically connected to an external signal potential via multiple electrodes on the package substrate 29.

[0101] In the first embodiment, the inductor L connected between the second reference potential electrode 26B and the second external reference potential electrode 26H is a coil composed of a plurality of through electrodes 26E and a plurality of internal wirings 26F.

[0102] Even if no inductor, such as a coil, is connected between the first reference potential electrode 26A and the first external reference potential electrode 26G, the multiple electrodes connected between the first reference potential electrode 26A and the first external reference potential electrode 26G have inductance as a parameter. However, the inductance of electrodes that are not configured as coils is small. This makes it possible to further increase the difference between the total inductance between the second reference potential electrode 26B and the second external reference potential electrode 26H and the total inductance between the first reference potential electrode 26A and the first external reference potential electrode 26G. Therefore, the out-of-band attenuation can be more reliably increased in the transmitting filter 1A, and the isolation can be more reliably improved in the multiplexer 10.

[0103] The configuration of the inductor L is not limited to the above. For example, the inductor L may be a meander-shaped wiring provided on the piezoelectric substrate 9. The inductor L may be an internal wiring 26F with a meander shape included in the package substrate 29. The inductor L may include a meander-shaped wiring and the above-mentioned coil. Alternatively, the inductor L may be a surface-mount type inductor element or an inductor element as a chip element.

[0104] The inductors M1, M2, and M3 shown in Figure 1 may be composed of multiple electrodes on the package substrate 29 shown in Figure 18, or they may be surface-mount type elements or chip components. The inductors M4, M5, and capacitor D located outside the multiplexer 10 may be provided on the package substrate 29, or they may be provided on a substrate other than the package substrate 29.

[0105] The multiplexer 10 does not necessarily have to include a package substrate 29. In this case, the electrodes between the first reference potential electrode 26A and the first external reference potential electrode 26G may be wiring and terminals provided on the piezoelectric substrate 9. Similarly, the electrodes between the second reference potential electrode 26B and the second external reference potential electrode 26H may be wiring and terminals provided on the piezoelectric substrate 9. In this case, the inductor L may be composed of, for example, meander-shaped wiring provided on the piezoelectric substrate 9.

[0106] An inductor, such as a coil, may be connected between the first reference potential electrode 26A and the first external reference potential electrode 26G. An example of this is shown in the second embodiment. In the following, the inductor connected between the first reference potential electrode 26A and the first external reference potential electrode 26G may be referred to as the first inductor. The inductor connected between the second reference potential electrode 26B and the second external reference potential electrode 26H may be referred to as the second inductor.

[0107] Figure 19 is a circuit diagram of a multiplexer according to the second embodiment.

[0108] This embodiment differs from the first embodiment in that a first inductor L1 is connected to the parallel arm resonator P1 in the transmitting filter 31A. A second inductor L2 is connected to the parallel arm resonators P2, P3, and P4. This second inductor L2 corresponds to the inductor L in the first embodiment. Except for the above, the multiplexer 30 of this embodiment has the same configuration as the multiplexer 10 of the first embodiment.

[0109] In this embodiment, the inductance of the first inductor L1 is smaller than the inductance of the second inductor L2. Therefore, the total inductance between the first reference potential electrode 26A and the first external reference potential electrode 26G is smaller than the total inductance between the second reference potential electrode 26B and the second external reference potential electrode 26H. Consequently, in this embodiment as well, similar to the first embodiment, the out-of-band attenuation can be increased in the transmitting filter 31A, and the isolation can be improved in the multiplexer 30.

[0110] In this embodiment, the first inductor L1 and the second inductor L2 are coils composed of multiple through electrodes 26E and multiple internal wirings 26F, as shown with reference to Figure 18. Hereinafter, the multiple through electrodes 26E and multiple internal wirings 26F that constitute the first inductor L1 or the second inductor L2 may be collectively referred to as the wiring that constitutes the first inductor L1 or the second inductor L2.

[0111] The length of the wiring constituting the first inductor L1 is shorter than the length of the wiring constituting the second inductor L2. In other words, the sum of the lengths of the multiple through electrodes 26E and multiple internal wirings 26F constituting the first inductor L1 is shorter than the sum of the lengths of the multiple through electrodes 26E and multiple internal wirings 26F constituting the second inductor L2. As a result, the inductance of the first inductor L1 is smaller than the inductance of the second inductor L2.

[0112] The method for comparing the magnitudes of inductances will be explained in more detail below. For example, if the widths of the internal wiring 26F to be compared are approximately the same, the lengths can be compared as described above. The width of the internal wiring 26F referred to here is the dimension of the internal wiring 26F along the direction perpendicular to the direction in which the internal wiring 26F extends. However, the direction of extension may differ for each part of the internal wiring 26F. Figures 20(a) to 20(d) will be used to explain how to measure the lengths of multiple electrodes on the package substrate 29.

[0113] Figures 20(a) and 20(b) are schematic plan views illustrating a method for measuring the sum of lengths of multiple electrodes. Figure 20(c) is a schematic perspective plan view illustrating a method for measuring the sum of lengths of multiple electrodes. Figure 20(d) is a schematic cross-sectional view illustrating a method for measuring the sum of lengths of multiple electrodes. Note that Figures 20(a) to 20(c) show examples of the same package substrate 29. Figure 20(d) shows an example of a different package substrate 29 from Figures 20(a) to 20(c).

[0114] In the example shown in Figure 20(a), a first reference potential electrode 26A is provided on the first main surface 29a of the package substrate 29, which is closest to the piezoelectric substrate. In this example, the first reference potential electrode 26A includes a portion configured as an electrode pad and a portion configured as wiring. A connecting member 27 is connected to the portion of the first reference potential electrode 26A configured as an electrode pad. A through electrode 26E is connected to another portion of the first reference potential electrode 26A.

[0115] In this case, the length is measured from the center of the portion of the first reference potential electrode 26A connected to the connecting member 27 to the center in the width direction of the portion configured as wiring. In the portion configured as wiring, the length of the path passing through the center in the width direction of that portion is measured. The endpoint of this path is the center of the portion of the first reference potential electrode 26A connected to the through electrode 26E. The length of the through electrode 26E is assumed to be the sum of the thicknesses of the package layers through which the through electrode 26E penetrates.

[0116] In the example shown in Figure 20(b), internal wiring 26F is provided between adjacent package layers. Through-electrodes 26E, which penetrate the package layer closer to the piezoelectric substrate, and through-electrodes 26E, which penetrate the package layer further away from the piezoelectric substrate, are connected to the internal wiring 26F. In the internal wiring 26F, the length of the path passing through the center in the width direction of the internal wiring 26F is measured. The start and end points of this path are the centers of the portions connected to the through-electrodes 26E, respectively.

[0117] In the example shown in Figure 20(c), the first external reference potential electrode 26G is provided on the second main surface 29b of the package layer furthest from the piezoelectric substrate in the package substrate 29. In this example, the first external reference potential electrode 26G is configured as an electrode pad. A through electrode 26E is connected to the first external reference potential electrode 26G. In this case, the length from the center of the portion of the first external reference potential electrode 26G connected to the through electrode 26E to the center of the first external reference potential electrode 26G is measured.

[0118] In the example shown in Figure 20(d), the sum of the lengths of the multiple electrodes can be measured using the same method as in the examples shown in Figures 20(a) to 20(c).

[0119] On the other hand, if the widths of internal wiring 26F and other components to be compared differ significantly, the inductance can be derived by performing an electromagnetic field simulation using the finite element method, including the materials of the package substrate 29 and the multiple electrodes, and then the inductances can be compared.

[0120] For example, the first inductor L1 and the second inductor L2 may be wiring with a meander shape. In this case, the length of the wiring constituting the first inductor L1 should be shorter than the length of the wiring constituting the second inductor L2.

[0121] In the first embodiment and this embodiment, three second parallel arm resonators are provided. However, in the present invention, it is sufficient to provide at least two second parallel arm resonators. However, it is preferable to provide three or more second parallel arm resonators. In this case, the sum of the inductances between the second reference potential terminal 6B and the second reference potential electrode 26B, and between the second reference potential electrode 26B and the second external reference potential electrode 26H tends to be large. Therefore, signals that have passed through any of the second parallel arm resonators tend to leak particularly easily to the first output terminal 5A. In contrast, in the present invention, signals that have passed through the second parallel arm resonators can be directed to the capacitance C and the first reference potential terminal 6A. Therefore, the present invention is particularly preferable when three or more second parallel arm resonators are provided.

[0122] Figure 21 is a schematic cross-sectional view showing a cross-section of a multiplexer according to the third embodiment, passing through the first reference potential terminal and the second reference potential terminal.

[0123] This embodiment differs from the first embodiment in that the piezoelectric substrate 49 is a multilayer substrate. Apart from the above, the multiplexer 40 of this embodiment has the same configuration as the multiplexer 10 of the first embodiment.

[0124] The piezoelectric substrate 49 comprises a support substrate 44, an intermediate layer 45, and a piezoelectric layer 48. The intermediate layer 45 includes a first intermediate layer 46 and a second intermediate layer 47. The first intermediate layer 46 is provided on the support substrate 44. The second intermediate layer 47 is provided on the first intermediate layer 46. The piezoelectric layer 48 is provided on the second intermediate layer 47. The layer configuration of the piezoelectric substrate 49 is not limited to the above. For example, the intermediate layer 45 may be a single dielectric layer.

[0125] The IDT electrodes, reflectors, terminals, and wiring that constitute the resonators of the transmitting and receiving filters are provided on the piezoelectric layer 48 of the piezoelectric substrate 49.

[0126] The circuit configuration of this embodiment is the same as that of the first embodiment. The total inductance between the first reference potential electrode 26A and the first external reference potential electrode 26G is smaller than the total inductance between the second reference potential electrode 26B and the second external reference potential electrode 26H. Therefore, in this embodiment, the out-of-band attenuation can be increased in the transmitting filter, and the isolation in the multiplexer 40 can be improved.

[0127] Below, examples of materials for each layer of the piezoelectric substrate 49 shown in Figure 21 are given. In this specification, the main component refers to a component that accounts for more than 50% by weight. The main component material may exist in one of the following states: single crystal, polycrystalline, or amorphous, or in a mixture thereof.

[0128] As the material for the support substrate 44, for example, piezoelectric materials such as aluminum nitride, lithium tantalate, lithium niobate, and quartz; ceramics such as alumina, sapphire, magnesia, silicon nitride, silicon carbide, zirconia, cordierite, mullite, steatite, forsterite, spinel, and sialon; dielectrics such as aluminum oxide, silicon oxynitride, DLC (diamond-like carbon), and diamond; semiconductors such as silicon; or materials mainly composed of the above materials can be used. The spinel mentioned above includes aluminum compounds containing one or more elements selected from Mg, Fe, Zn, Mn, etc., and oxygen. Examples of the spinel mentioned above include MgAl2O4, FeAl2O4, ZnAl2O4, and MnAl2O4. The same applies to the spinel mentioned as an example of the material for the first intermediate layer 46, which will be described later.

[0129] The first intermediate layer 46 of the intermediate layer 45 is a high-speed film. A high-speed film is a film with a relatively high sound velocity. More specifically, the speed of sound of bulk waves propagating through a high-speed film is higher than the speed of sound of elastic waves propagating through the piezoelectric layer 48. As the material for the first intermediate layer 46, which is a high-speed film, it is also possible to use piezoelectric materials such as aluminum nitride, lithium tantalate, lithium niobate, and quartz; ceramics such as alumina, sapphire, magnesia, silicon nitride, silicon carbide, zirconia, cordierite, mullite, steatite, forsterite, spinel, and sialon; dielectrics such as aluminum oxide, silicon oxynitride, DLC (diamond-like carbon), and diamond; semiconductors such as silicon; or materials mainly composed of the above materials.

[0130] The second intermediate layer 47 of the intermediate layer 45 is a low-sound-velocity film. A low-sound-velocity film is a film with a relatively low sound velocity. More specifically, the speed of sound of bulk waves propagating through the low-sound-velocity film is lower than the speed of sound of bulk waves propagating through the piezoelectric layer 48. As the material for the second intermediate layer 47, which is a low-sound-velocity film, for example, dielectrics such as glass, silicon oxide, silicon oxynitride, lithium oxide, tantalum oxide, or compounds of silicon oxide to which fluorine, carbon, or boron have been added, or materials mainly composed of the above materials can be used.

[0131] As the material for the piezoelectric layer 48, the piezoelectric materials exemplified above can be used. It is preferable that lithium tantalate or lithium niobate is used as the material for the piezoelectric layer 48.

[0132] In this embodiment, the piezoelectric substrate 49 is laminated in the following order: a first intermediate layer 46 as a high-sonic-velocity film, a second intermediate layer 47 as a low-sonic-velocity film, and a piezoelectric layer 48. This allows the energy of elastic waves to be effectively confined to the piezoelectric layer 48.

[0133] In the piezoelectric substrate 49, the piezoelectric layer 48 is indirectly provided on the support substrate 44 via an intermediate layer 45. Alternatively, the piezoelectric layer 48 may be directly provided on the support substrate 44. Even in this case, the energy of the elastic waves can be effectively confined to the piezoelectric layer 48. In addition, isolation can be improved. [Explanation of Symbols]

[0134] 1A...Transmit Filter 1B...Receiver filter 2… Common connection terminal 3A,3B…Connection wiring 4A, 4B…First and second input terminals 5A, 5B…First and second output terminals 6A, 6B…First and second reference potential terminals 6C, 6D…Reference potential terminals 7…Longitudinal coupled resonator type elastic wave filter 8A, 8B... First and second reference potential wiring 8C, 8D…First and second reference potential wiring 8E, 8F…First and second reference potential wiring 8a~8d...Layers 1 to 4 8x, 8y… First and second volume forming sections 9… Piezoelectric substrate 10…Multiplexer 11...IDT electrode 12A,12B…Reflector 12a, 12b... busbar 12c...electrode finger 13… Insulating film 16, 17… 1st and 2nd bus bars 18, 19… First and second electrode fingers 22...Sealing resin layer 26A, 26B… First and second reference potential electrodes 26E…Through electrode 26F…Internal wiring 26G, 26H… First and second external reference potential electrodes 27…Connecting member 29…Package substrate 29a, 29b… First and second main surfaces 30…Multiplexer 31A...Transmit filter 40…Multiplexer 44…Support substrate 45…Middle class 46, 47… The first and second intermediate layers 48... Piezoelectric layer 49... Piezoelectric substrate 100... Multiplexer 101A...Transmit Filter C,D…Capacity L...Inductor L1, L2… First and second inductors M1~M5...Inductor P1~P4,P11,P12...Parallel arm resonator S1a, S1b, S2~S4, S11~S13...Series arm resonators

Claims

1. A transmitting filter having input terminals and output terminals, a first reference potential terminal and a second reference potential terminal connected to a reference potential, a first parallel arm resonator connected to the first reference potential terminal, a plurality of second parallel arm resonators located on the output terminal side of the first parallel arm resonator in the circuit configuration and commonly connected to the second reference potential terminal, a capacitance connected between the first reference potential terminal and the second reference potential terminal, a first reference potential electrode connected to the first reference potential terminal and located on the reference potential side of the capacitance, a first external reference potential electrode electrically connected to the first reference potential electrode, a second reference potential electrode connected to the second reference potential terminal and located on the reference potential side of the capacitance, a second external reference potential electrode electrically connected to the second reference potential electrode, and an inductor connected between the second reference potential electrode and the second external reference potential electrode, Receiving filter and, Equipped with, A multiplexer in which the sum of the inductances between the first reference potential electrode and the first external reference potential electrode is less than the sum of the inductances between the second reference potential electrode and the second external reference potential electrode.

2. The transmitting filter further comprises, in its circuit configuration, a first reference potential wiring connected to the first reference potential terminal side of the first parallel arm resonator, a second reference potential wiring connected to the second reference potential terminal side of one of the plurality of second parallel arm resonators, and an insulating film provided between the first reference potential wiring and the second reference potential wiring. The multiplexer according to claim 1, wherein the capacitance is formed by the first reference potential wiring and the second reference potential wiring facing each other with the insulating film in between.

3. The first reference potential wiring is a laminate comprising a first layer and a second layer laminated on the first layer. The second reference potential wiring is a laminate including a third layer and a fourth layer laminated on the third layer. The multiplexer according to claim 2, wherein, when the direction in which the first layer and the second layer in the first reference potential wiring are stacked, and the direction in which the third layer and the fourth layer in the second reference potential wiring are stacked, the capacitance configuration is one of the following: the first layer and the fourth layer face each other with the insulating film in between in the stacking direction, and the second layer and the third layer face each other with the insulating film in between in the stacking direction.

4. The transmission filter and the reception filter are further connected to a common connection terminal, The multiplexer according to claim 3, wherein, with reference to the center of the first parallel arm resonator, a virtual line connecting the input terminal and the common connection terminal of the transmitting filter is located in the direction from the center toward the capacitance.

5. The transmitting filter further comprises a piezoelectric substrate, The first parallel arm resonator, the plurality of second parallel arm resonators, and the capacitance are each provided on the piezoelectric substrate and have an IDT electrode including a plurality of electrode fingers. The multiplexer according to claim 1, wherein in the first parallel arm resonator, the plurality of second parallel arm resonators, and the capacitance, when the direction in which the plurality of electrode fingers extend is defined as the electrode finger extension direction, the electrode finger extension direction in the capacitance and the electrode finger extension direction in the first parallel arm resonator and the plurality of second parallel arm resonators are orthogonal.

6. The transmitting filter further comprises a piezoelectric substrate, a first reference potential wiring connected to the first reference potential terminal side of the first parallel arm resonator in the circuit configuration, and a second reference potential wiring connected to the second reference potential terminal side of one of the plurality of second parallel arm resonators. The multiplexer according to any one of claims 1 to 5, wherein the first reference potential wiring and the second reference potential wiring are provided on the piezoelectric substrate so as to be adjacent to each other.

7. The transmitting filter further comprises a piezoelectric substrate, at least one series arm resonator located on the input terminal side of the plurality of second parallel arm resonators in the circuit configuration, a first reference potential wiring connected to the first reference potential terminal side of the first parallel arm resonator, and connecting wiring connected to the series arm resonator. The multiplexer according to any one of claims 1 to 6, wherein the first reference potential wiring and any of the connection wirings are provided on the piezoelectric substrate so as to be adjacent to each other.

8. The multiplexer according to any one of claims 1 to 7, wherein the plurality of second parallel arm resonators are three or more second parallel arm resonators.

9. The transmitting filter further includes a first inductor connected between the first reference potential electrode and the first external reference potential electrode, The inductor connected between the second reference potential electrode and the second external reference potential electrode is the second inductor. Both the first inductor and the second inductor are constructed by wiring, The multiplexer according to any one of claims 1 to 8, wherein the length of the wiring constituting the first inductor is shorter than the length of the wiring constituting the second inductor.

10. Input terminals and output terminals, A first reference potential terminal and a second reference potential terminal connected to a reference potential, A first parallel arm resonator connected to the first reference potential terminal, In terms of circuit configuration, a plurality of second parallel arm resonators are located closer to the output terminal than the first parallel arm resonator and are commonly connected to the second reference potential terminal, A capacitance connected between the first reference potential terminal and the second reference potential terminal, A first reference potential electrode is connected to the first reference potential terminal and is located on the reference potential side of the capacitance, A first external reference potential electrode is electrically connected to the first reference potential electrode, A second reference potential electrode is connected to the second reference potential terminal and is located on the reference potential side of the capacitance, A second external reference potential electrode is electrically connected to the second reference potential electrode, An inductor connected between the second reference potential electrode and the second external reference potential electrode, Equipped with, A filter device in which the sum of the inductances between the first reference potential electrode and the first external reference potential electrode is less than the sum of the inductances between the second reference potential electrode and the second external reference potential electrode.

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