Wiring board, base material substrate, and method for manufacturing a wiring board

Abstract

The present invention aims to provide a technology that enables efficient heat dissipation. [Solution] The wiring board of the present invention is a wiring board including a glass substrate having a first surface and a second surface facing the first surface, wherein the glass substrate has a cavity formed on the first surface side on which chip components are arranged, a heat dissipation path extending from the bottom of the cavity to the edge of the glass substrate, and a heat transfer member arranged in the heat dissipation path. Furthermore, the heat dissipation path may include a through-path that penetrates from the bottom of the cavity to the second surface of the glass substrate, and a first groove-shaped path that extends from the through-path to the edge of the glass substrate on the second surface of the glass substrate.

Description

[Technical Field]

[0001] This invention relates to a wiring board, a base material substrate, and a method for manufacturing a wiring board. [Background technology]

[0002] In recent years, as semiconductor devices have become faster and more integrated, the development of wiring substrates such as package substrates and interposers for mounting semiconductor chips has also been actively pursued.

[0003] As semiconductor chips become more sophisticated, they tend to generate more heat during operation. When semiconductor devices become hot, there are concerns about malfunctions of the semiconductor chip and a decrease in the reliability of electrical connections due to deformation of the package substrate. Therefore, efficiently dissipating heat is crucial.

[0004] For example, Patent Document 1 discloses a technique for forming a heat transfer path and bonding chips together by forming grooves (which become cavities when bonded) on the bonding surfaces of chips in a stacked package (a technique for mounting chips in stacks), and filling the cavities with an adhesive containing a thermally conductive material. Specifically, Patent Document 1 aims to improve the heat dissipation efficiency of chips and enhance heat dissipation characteristics without providing heat dissipation fins, and discloses the following inventions for a semiconductor device and a method for manufacturing a semiconductor device. "Through cavities are provided in the contact surfaces of a chip stack consisting of chips 100 and 200, and a thermally conductive material (for example, a thermally conductive die adhesive) is filled into these through cavities to secure a heat dissipation path. Then, a encapsulant 500 made of a thermally conductive material is placed over it and mounted on a substrate 600 to form a stacked package. The upper chip 200 is electrically connected to wirings 507a and 507b on the substrate 600 via first electrode terminals (505a to 505k), embedded wiring (506a and 506b) provided on the inner upper surface of the encapsulant 500, and second connection terminals (504a to 504k) provided on the bottom surface of the encapsulant 500." [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-142105 [Overview of the project] [Problems that the invention aims to solve]

[0006] Patent Document 1 discloses technology related to stacked packages. The thermally conductive material filling the heat dissipation path also needs to act as an adhesive. For this reason, the thermally conductive material includes a resin component in addition to the metal material. As a result, the thermal conductivity decreases, and it becomes impossible to ensure sufficient heat dissipation efficiency. Therefore, the present invention aims to provide a technology that can efficiently dissipate heat. [Means for solving the problem]

[0007] To solve the above problems, one representative wiring board of the present invention is a wiring board including a glass substrate having a first surface and a second surface facing the first surface, wherein the glass substrate has a cavity formed on the first surface side on which chip components are arranged, a heat dissipation path extending from the bottom of the cavity to the edge of the glass substrate, and a heat transfer member arranged in the heat dissipation path. [Effects of the Invention]

[0008] According to the present invention, heat can be dissipated efficiently. Other issues, configurations, and effects not mentioned above will be clarified by the description of the embodiments for carrying out the invention below. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 shows the process of preparing a glass substrate. [Figure 2] Figure 2 shows the process of irradiating a glass substrate with laser light to form a laser-modified area. [Figure 3]Figure 3 is a diagram showing the step of etching and removing the laser modified portion. [Figure 4] Figure 4 is an enlarged view showing the cross section of the through path. [Figure 5] Figure 5 is a diagram showing the step of arranging a chip component in a cavity. [Figure 6] Figure 6 is a diagram showing the step of arranging a heat transfer member in a heat dissipation path. [Figure 7] Figure 7 is a diagram showing the step of forming build-up layers on the first surface and the second surface of a glass substrate. [Figure 8] Figure 8 is a diagram showing the step of dicing along the plane that cuts the groove-shaped path to singulate the wiring substrate including the glass substrate. [Figure 9] Figure 9 is a diagram showing the step of irradiating a glass substrate with laser light to form a laser modified portion. [Figure 10] Figure 10 is a diagram showing the step of etching and removing the laser modified portion. [Figure 11] Figure 11 is a diagram showing the step of forming a seed layer on the first surface side of a glass substrate. [Figure 12] Figure 12 is a diagram showing the step of performing electrolytic plating treatment on the first surface side of a glass substrate. [Figure 13] Figure 13 is a diagram showing the step of polishing the electrolytic plating layer. [Figure 14] Figure 14 is a diagram showing the step of patterning a resist on the electrolytic plating layer to provide an opening at a chip mounting location. [Figure 15] Figure 15 is a diagram showing the step of etching the electrolytic plating layer to form a recessed portion. [Figure 16] Figure 16 is a diagram showing the step of peeling off the resist layer. [Figure 17] Figure 17 is a diagram showing the step of arranging a chip component in the recessed portion. [Figure 18] Figure 18 is a diagram showing the step of dicing along the plane that cuts the groove-shaped path to singulate the wiring substrate including the glass substrate. [Figure 19]Figure 19 shows a modified example in which the wiring substrate, including the glass substrate, is diced by cutting the groove-shaped path with the cutting surface to separate it into individual pieces. [Modes for carrying out the invention]

[0010] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the drawings, identical parts are denoted by the same reference numerals. When there are multiple components with the same or similar function, they may be described using the same symbol but with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description. The positions, sizes, shapes, and ranges of the components shown in the drawings may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings.

[0011] "Upward" refers to the direction vertically upward when a plate-like member or layer is placed horizontally. Furthermore, "upward" and its opposite, "downward," may be referred to as the "positive z-axis direction" and the "negative z-axis direction," respectively, while the horizontal direction may be referred to as the "x-axis direction" and the "y-axis direction." Furthermore, the distance in the z-axis direction is sometimes referred to as "thickness" or "depth," and the distance in the xy-plane defined by the x-axis and y-axis directions is sometimes referred to as "width." Furthermore, "planar shape" and "planar view" refer to the shape of a surface or layer as viewed from above. In addition, "cross-sectional shape" and "cross-sectional view" refer to the shape of a plate-like member or layer as viewed from the horizontal when it is cut in a specific direction.

[0012] [First Embodiment] The manufacturing method of the wiring board according to the first embodiment will be described with reference to Figures 1 to 7. Figure 1 shows the process of preparing the glass substrate 1. Figure 1(a) shows a plan view of the glass substrate 1, and Figure 1(b) shows a cross-sectional view aa' of Figure 1(a). Note that the subscripts in the drawing numbers, (a) indicating a plan view and (b) indicating a cross-sectional view aa', are the same for the other figures.

[0013] The shape of the glass substrate 1 is a rectangle enclosed by two sides with lengths Lx and Ly, as shown in Figure 1(a). The thickness of the glass substrate 1 is length Lz, as shown in Figure 1(b). As the glass substrate 1, for example, alkali-free glass, alkali glass, borosilicate glass, quartz glass, sapphire glass, and photosensitive glass can be used.

[0014] Next, the process of forming a cavity in a glass substrate will be described with reference to Figures 2 and 3. In this disclosure, the case in which the cavity is formed on the first surface 1a of the glass substrate 1, of which the first surface 1a and the second surface 1b facing the first surface 1a are described for convenience. Figure 2 is a diagram showing the process of irradiating the glass substrate 1 with laser light to form a laser-modified portion.

[0015] The laser-modified sections are formed in the cavity and the groove-shaped paths described later. The laser-modified sections are parts in which the structure and composition of the glass material have been altered by irradiation with laser light. As shown in Figure 2(a), laser-modified sections 31 to 34 are formed on the first surface 1a side of the glass substrate 1. Also, as shown in Figure 2(b), the laser-modified section 3 includes a portion formed on the first surface 1a side of the glass substrate 1 (hereinafter also referred to as "laser-modified section 3a"), a portion formed on the second surface 1b side of the glass substrate 1 (hereinafter also referred to as "laser-modified section 3b"), and a portion that penetrates from the first surface a to the second surface 1b of the glass substrate 1 (hereinafter also referred to as "laser-modified section 3t"). In the following description, when it is not necessary to specify the location where the laser-modified section is formed, it will simply be referred to as the laser-modified section 3.

[0016] As shown in Figure 2(a), on the first surface 1a side of the glass substrate 1, the laser-modified portions 3a are formed at four locations, from laser-modified portions 31 to 34. The laser-modified portions 31 to 34 have a common shape and are rectangles enclosed by two sides with lengths wx and wy. The size of the laser-modified portions 3a is set according to the size of the cavity or chip component described later. Furthermore, as shown in Figure 2(b), the laser-modified section 3a is formed from the first surface 1a to a depth d1.

[0017] Furthermore, the laser-modified portion 3b formed on the second surface 1b side of the glass substrate 1 is shown in Figure 2(a) as a rectangle enclosed by a dashed line. The laser-modified portion 3b includes laser-modified portion 3b1, which is the portion formed on the positive x-axis side of the laser-modified portion 31; laser-modified portion 3b2, which is formed between the laser-modified portion 31 and the laser-modified portion 34; and laser-modified portion 3b3, which is the portion formed on the negative z-axis side of the laser-modified portion 34. Laser-modified portions 3b1 and 3b3 have a rectangular shape enclosed by two sides with lengths cx1 and cy. Laser-modified portion 3b2 also has a rectangular shape enclosed by two sides with lengths cx2 and cy. In the following description, when it is not necessary to specify the formed location, it will simply be referred to as the laser-modified portion 3b. Furthermore, as shown in Figure 2(b), the laser-modified section 3b is formed from the second surface 1b to a depth d2.

[0018] Furthermore, the laser modification section 3t is formed in four locations in Figure 2(b).

[0019] As a method for forming the laser-modified portion 3, for example, the laser-modified portion 3a is formed by irradiating the glass substrate 1 with laser light from the first surface 1a side, and the laser-modified portion 3b is formed by irradiating the glass substrate 1 with laser light from the second surface 1b side. The laser-modified portion 3 is formed by adjusting parameters such as the output, scanning speed, pulse density, and focal position of the laser light irradiated onto the glass substrate 1.

[0020] Note that the shape of the laser-modified section 3 is not limited to that shown in Figure 2. For example, there may be more than four laser-modified sections 4a, and more than six laser-modified sections 3b.

[0021] Next, Figure 3 shows the process of etching and removing the laser-modified section 3. In the process shown in Figure 3, groove-shaped paths are formed connecting adjacent cavities among the multiple cavities formed, and through-paths are formed that penetrate from the bottom of the cavity to the second surface 1b side of the glass substrate 1. This will be explained in detail below.

[0022] As shown in Figure 3(a), cavities 51 to 54 are formed in the areas where the laser-modified sections 31 to 34 have been removed. Cavities 51 to 54 have the same shape as the laser-modified sections 31 to 34, being rectangles in the xy plane enclosed by two sides of length wx and wy, and having a depth d1 in the zx plane. In the following description, unless it is necessary to specify the formed location, it will simply be referred to as cavity 5. As will be described later, a chip component will be placed in cavity 5.

[0023] Furthermore, the groove-shaped path (first groove-shaped path) 7 is formed in the area where the laser-modified section 3b has been removed. The groove-shaped path 7 connects to the through-path 9, which will be described later, and extends between adjacent cavities on the second surface 1b side of the glass substrate 1. Specifically, the groove-shaped path 71 is formed on the positive x-axis side of cavity 51, the groove-shaped path 72 is formed between cavity 51 and cavity 4, and the groove-shaped path 73 is formed on the negative z-axis side of cavity 54. The groove-shaped paths 71 and 73 have the same shape as the laser-modified sections 3b1 and 3b3. The groove-shaped paths 71 and 73 have a rectangular shape in the xy plane, enclosed by two sides with lengths cx1 and cy, and have a depth d2 in the zx plane. In the following description, when it is not necessary to specify the formed location, it may simply be referred to as the groove-shaped path 7. Note that the groove-shaped passage 7 and the through passage 9 described later are sometimes collectively referred to as the heat dissipation passage.

[0024] Furthermore, the through-passage 9 is formed in the portion where the laser-modified section 3t has been removed. As shown in Figure 3(b), the through-passage 9 penetrates from the bottom 5b of the cavity 5 to the second surface 1b of the glass substrate 1. The cavity 5 has a bottom 5b and a side wall 5s. Figure 4 is an enlarged view of the cross-section of the through-passage 9. Figure 4 shows an enlarged view of region Sc in the cross-sectional view of Figure 3(b). The cross-section of the through-passage 9 in the xy plane is widest at the opening at the bottom 5b of the cavity 5, becomes narrowest towards the negative z axis, and gradually widens towards the groove-shaped path 7. Specifically, the relationship is φ1 of the opening at the bottom 5b of the cavity 5 > φ2 of the opening facing the groove-shaped path 7 > φ3 of the narrowest part of the through-passage 9. For example, when the through passage 9 is cut by a plane parallel to the xy plane, and the groove-shaped path 7 is cut by a plane parallel to the yz plane, the narrowest part of the cross-sectional area is located within the through passage 9.

[0025] One etching method involves immersing the glass substrate 1, on which the laser-modified portion 3 is formed, in an etching solution such as hydrofluoric acid to remove the laser-modified portion 3.

[0026] Although the description has described a case in which the cavity 5, groove-shaped path 7, and through-passage 9 are formed in a single process, this disclosure is not limited to this case. The cavity 5, groove-shaped path 7, and through-passage 9 may each be formed in separate processes. For example, the laser-modified section 3a may be formed, the cavity 5 may be formed, then the laser-modified section 3b may be formed, and then the groove-shaped path 7 may be formed. Furthermore, the shape of the through-passage 9 is not limited to the one described and may be other shapes. For example, the through-passage 9 may be cylindrical in shape such that the diameter of the through-passage 9 is substantially constant from the bottom 5b of the cavity 5 to the groove-shaped path 7.

[0027] Next, Figure 5 shows the process of placing chip components in the cavity 5. The chip components 11 are fixed to the cavity 5 via a die attachment film (hereinafter also referred to as "DAF (Die Attach Film)") 13. The chip components 11 may be, for example, semiconductor chips, as well as passive components such as resistors, capacitors, inductors, and bridge substrates.

[0028] One method of placement is to attach the DAF13 to the bottom 5b of the cavity 5, and then place the chip component 11 on top of the DAF13 using a die bonder. Heating and pressurizing are performed using a thermocompression bonding device to bond the chip component 11 to the DAF13. By melting the DAF13, the chip component 11 and the cavity 5 are joined together. Note that the DAF13 may be placed in the cavity 5 as described above, or it may be attached to the chip component 11 side first, then placed in the cavity 5, and then heated and pressurized.

[0029] Next, Figure 6 shows the process of arranging heat transfer members in the heat dissipation passage. The heat transfer members 15 are arranged in the groove-shaped passage 7 and the through passage 9. The heat transfer members 15 fill the heat dissipation passage from the bottom 5b of the cavity 5 to the second surface 1b side of the glass substrate 1. One method of arranging the heat transfer members 15 is to fill the groove-shaped passage 7 and the through passage 9 with copper or a copper-containing alloy by electroplating. Specifically, first, a conductive layer is formed on the substrate surface including the groove-shaped passage 7 and the through passage 9 by electroless plating or the like. Next, electroplating is performed using the conductive layer as a seed layer to fill the groove-shaped passage 7 and the through passage 9 with copper or a copper-containing alloy. In this case, the heat transfer members 15 may fill the entire groove-shaped passage 7 and the through passage 9, or they may fill only a part of the groove-shaped passage 7 and the through passage 9. Alternatively, instead of copper or a copper-containing alloy, a paste containing copper and resin material may be used as the heat transfer member 15. For example, methods for filling the grooved passages 7 and through passages 9 with copper paste include screen printing, vacuum screen printing, and inkjet printing. The copper paste may be filled into the entire grooved passages 7 and through passages 9, or into only a portion of them.

[0030] The heat transfer member 15 is made of a material with a higher thermal conductivity than glass. For example, the thermal conductivity of glass is approximately 0.8 to 1.0 W / m·K, while the thermal conductivity of copper is approximately 398 W / m·K. Even if heat is generated from the chip component 11, the heat will dissipate not only through the glass substrate 1 but also through the through-passage 9 and the groove-shaped passage 7. This makes it less likely for heat to accumulate in the cavity 5, thus suppressing the chip component 11 from becoming too hot and preventing malfunctions in the chip component 11. Although the case in which the heat transfer member 15 contains copper has been described, this disclosure is not limited to this case. For example, the heat transfer member 15 may contain silver or gold.

[0031] Next, Figure 7 shows the process of forming build-up layers 17 and 19 on the first surface 1a and the second surface 1b of the glass substrate 1. The build-up layers 17 and 19 are formed by laminating one or more sets of insulating and conductive layers. The conductive layer of the build-up layer 17 has a shape that extends in the xy-plane direction on and above the first surface 1a of the glass substrate 1. The conductive layer of the build-up layer 17 may also be electrically connected to the chip component 11. The insulating layer of the build-up layer 17 is an insulating member that demarcates the conductive layer.

[0032] Furthermore, the conductive layer of the build-up layer 19 has a shape that extends in the xy-plane direction on the second surface 1b side of the glass substrate 1, both on the second surface 1b and below the second surface 1b. The insulating layer of the build-up layer 19 is an insulating member that demarcates the conductive layer.

[0033] Next, Figure 8 shows the process of dicing the wiring board, including the glass substrate, into individual pieces by cutting the groove-shaped path along the cutting surface. In Figure 8(a), the thick lines indicate the dicing lines. The wiring board is formed by dicing the glass substrate 1 and the build-up layers 17 and 19 along the dicing lines. In Figure 8(a), dicing lines 211 to 214 are set. Of these, dicing line 211 is set at the position where the groove-shaped path 71 is cut. Dicing line 212 is set at the position where the groove-shaped path 72 is cut. Dicing line 213 is set at the position where the groove-shaped path 73 is cut. In Figure 8(a), a symmetrical structure with respect to dicing line 214 is shown. In the following description, when it is not necessary to specify the formed location, it may simply be referred to as dicing line 21.

[0034] Figure 8(b) shows a cross-section of the wiring board 23 that has been fragmented between dicing lines 211, 212, and 214 in the aa' cross-section of Figure 8(a). In the wiring board 23, the through-passage 9 and groove-shaped passage 71 extend from the bottom 5b of the cavity 51 to the end 1e on the positive x-axis side of the glass substrate 1. The groove-shaped passage 71 extends from the through-passage 9 to the end 1e of the glass substrate 1 on the second surface 1b side of the glass substrate 1. In addition, the through-passage 9 and groove-shaped passage 72 extend from the bottom b of the cavity 51 to the end 1e on the negative x-axis side of the glass substrate 1. The groove-shaped passage 72 extends from the through-passage 9 to the end 1e of the glass substrate 1 on the second surface 1b side of the glass substrate 1. Heat transfer members 15 are arranged in the through-passage 9 and groove-shaped passage 7.

[0035] Figure 8(c) shows the wiring board 23 as viewed from the positive x-axis side. As shown in Figure 8(c), the groove-shaped path 71 has a rectangle enclosed by two sides of length cy and D2, and the heat transfer member 15 is arranged inside the groove-shaped path 71.

[0036] In the case of Figure 8(a), the glass substrate 1 can also be described as a base substrate on which multiple (four in this disclosure) wiring boards are formed. On the base substrate, the multiple wiring boards are arranged in a grid pattern, and the heat dissipation paths of adjacent wiring boards are connected.

[0037] (Effects / Actions) Glass substrates are effective in improving the processing accuracy of wiring formed on the substrate due to their excellent surface smoothness and rigidity. For this reason, glass substrates are used as core substrates for semiconductor package substrates (hereinafter also referred to as "glass core substrates"). Furthermore, in order to improve space efficiency and achieve high-density mounting, semiconductor package substrates have been developed in which chip components are mounted by forming cavities in the glass core substrate and then forming a build-up layer to embed the chip components. Furthermore, glass has a lower thermal conductivity compared to organic substrates and ceramics, which are conventional semiconductor packaging substrate materials (ceramics >> glass > organic). Recent electronic components are becoming smaller and more high-performance, which has led to a significant increase in operating temperature. If the generated heat accumulates inside the device, it puts a load on the element and can cause malfunctions, so it is necessary to dissipate heat efficiently. In this respect, since glass itself does not conduct heat well, if chip components are mounted on a glass core substrate with a cavity structure, for example, the heat generated from the chip components may accumulate inside the cavity, potentially leading to malfunctions.

[0038] In contrast, the wiring board 23 of this disclosure has heat dissipation paths including through-passages 9 and groove-shaped paths 7. The through-passages 9 and groove-shaped paths 7 have a shape that connects from the bottom 5b of the cavity 5 to the edge 1e of the glass substrate 1. Heat generated from the chip components 11 in the wiring board 23 is dissipated to the outside of the wiring board 23 through the through-passages 9 and groove-shaped paths 7. Of the heat generated from the chip components 11, the heat that diffuses from the cavity 5 to the glass substrate 1 and the build-up layers 17 and 19 can be reduced. Therefore, according to this disclosure, it is possible to efficiently dissipate heat in a wiring board that incorporates chip components.

[0039] [Second Embodiment] A method for manufacturing a wiring board according to the second embodiment will be described with reference to Figures 9 to 19. The second embodiment differs from the first embodiment in that the heat dissipation path is formed on the first surface 1a side of the glass substrate. In the following description, components that are the same as or equivalent to those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0040] Figure 9 shows the process of irradiating a glass substrate 1 with laser light to form laser-modified areas. As shown in Figure 9(a), 10 laser-modified areas (from laser-modified area 301 to laser-modified area 30) are formed on the first surface 1a side of the glass substrate 1. 10 A laser-modified section is formed up to that point. In the following description, when it is not necessary to specify the location where the laser-modified section is formed, it is simply referred to as the laser-modified section 30.

[0041] Of the laser-modified section 30, sections 31 to 34 are formed for the cavity. On the other hand, of the laser-modified section 3, sections 35 to 30 10 This is a section formed for heat dissipation.

[0042] Furthermore, the laser modification sections 305, 306, 308, and 309 have a rectangular shape enclosed by sides of length gx1 and gy. Also, the laser modification sections 307 and 30 10 Therefore, 3b2 has the shape of a rectangle enclosed by sides of lengths gx2 and gy.

[0043] Furthermore, as shown in Figure 9(b), the laser-modified sections 31 to 34 are formed from the first surface 1a to a depth d4. 10 It is formed from the first surface 1a to a depth d5.

[0044] Note that the shape of the laser modification section 3 is not limited to that shown in Figure 9. There may be more than 10 laser modification sections 30.

[0045] Next, FIG. 10 is a diagram showing a step of etching and removing the laser modified portion 30. In the step shown in FIG. 10, among the plurality of formed cavities, groove-shaped paths connecting adjacent cavities are formed, and in-cavity passages, which are portions from the bottom of the cavities to the side wall portions of the cavities, are formed. This will be specifically described below.

[0046] As shown in FIG. 10(a), the cavities 501 to 504 are formed in portions where the laser modified portions 301 to 304 are removed. The cavities 501 to 504 have the same shape as the laser modified portions 301 to 304, are rectangles surrounded by sides of lengths wx and wy on the xy plane, and have a depth d4 on the zx plane. In the following description, when it is not necessary to specify the formed location, it is simply referred to as the cavity 50. As will be described later, chip components are arranged in the cavity 50.

[0047] Further, the groove-shaped paths (second groove-shaped paths) 705 to 70 10 are respectively formed in the portions where the laser modified portions 305 to 30 10 are removed. The groove-shaped path 70 is connected to an in-cavity passage to be described later, and connects adjacent cavities on the first surface 1a side of the glass substrate 1. Specifically, the groove-shaped path 705 is a portion formed on the positive x-axis side of the cavity 501, and the groove-shaped path 70 10 is a portion formed between the cavity 501 and the cavity 504, and the groove-shaped path 709 is a portion formed on the negative z-axis direction side of the cavity 504. The groove-shaped paths 705, 70 10 , and 709 have the same shape as the laser modified portions 305, 30 10 , and 309, have a rectangular shape surrounded by sides of lengths cx1 and cy on the xy plane, and have a depth d5 on the zx plane. Regarding the groove-shaped paths 706 to 708 as well, similar to the groove-shaped paths 705, 70 10 , 709, they are formed at the positions corresponding to the groove-shaped paths 705, 70 10It has a shape similar to 709. In the following description, when it is not necessary to specify the formed location, it may simply be referred to as the groove-shaped passage 70. Note that the groove-shaped passage 70 and the cavity passage 80 described later may together be referred to as the heat dissipation passage.

[0048] In Figure 10(a), the dashed rectangle shown within the cavity 50 indicates the position where the chip component 11, described later, will be placed. When the chip component 11 is placed within the cavity 50, a space exists between the side wall portion 50s of the cavity 50 and the chip component 11. Also, as shown in Figure 10(b), this space connects the chip component 11 to the groove-shaped passage 70 and occupies the space between the bottom portion 50b of the cavity 50 and the side wall portion 50s. In the following description, the portion between the bottom portion 50b of the cavity 50 and the side wall portion 50s will be referred to as cavity passages 801 to 804. For example, cavity passage 801 connects the cavity 501 to the groove-shaped passage 705, and also connects the cavity 501 to the groove-shaped passage 70 10 These are connected. For cavities 50 other than cavity 501, a cavity passage 80 is also placed between it and the groove-shaped path 70. In the following description, when it is not necessary to specify the formed location, it may simply be referred to as the cavity passage 80.

[0049] Next, with reference to Figures 11 to 13, the process of arranging heat transfer members in the cavity 50 and groove-shaped passage 70 will be described. Figure 11 shows the process of forming a seed layer 82 on the first surface 1a side of the glass substrate 1. The seed layer 82 is formed inside the groove-shaped passage 70 and cavity 50 as shown in Figure 11(b), and is formed over the entire first surface 1a side of the glass substrate 1 as shown in Figure 11(a). The seed layer 82 is, for example, a copper film. Sputtering or electroless plating can be used as methods for forming the seed layer 82.

[0050] Next, Figure 12 shows the process of performing electroplating on the first surface 1a side of the glass substrate 1. As shown in Figure 12(a), the resist layer 84 is placed on the first surface 1a side of the glass substrate 1 and has a shape that exposes the cavity 50 and groove-shaped path 70. With the resist layer 84 in place, electroplating is performed using the seed layer 82 as an electrode, and an electroplating layer 86 is formed in the cavity 50 and groove-shaped path 70. As shown in Figure 12(b), the electroplating layer 86 fills the cavity 50 and groove-shaped path 70. The electroplating layer 86 is, for example, copper or a copper-containing alloy.

[0051] Next, Figure 13 shows the process of polishing the electroplating layer 86. After removing the resist layer 84, the electroplating layer 86 and the seed layer 82 are polished. As shown in Figure 13(b), the electroplating layer 86 is polished until the first surface 1a of the glass substrate 1 is exposed. As a result, a state is formed in which the seed layer 82 and the electroplating layer 86 are arranged in the groove-shaped passage 70 and the cavity passage 80 as heat transfer members.

[0052] Next, referring to Figures 14 to 16, the process of forming recesses in the heat transfer members within the cavity is shown. Figure 14 shows the process of patterning a resist on the electroplating layer 86 to create openings at the chip mounting locations. As shown in Figure 14(a), the resist layer 88 has openings at the locations where the chip components 11 are placed. The resist layer 88 has a shape that exposes the locations where the chip components 11 are mounted within the electroplating layer 86 placed in the cavity 50. Also, as shown in Figure 14(b), the cavity passage 80 is covered by the electroplating layer 86. Even after the etching process described later, the portion of the electroplating layer 86 at the mounting locations of the chip components 11 is removed, but the portion of the electroplating layer 86 placed in the cavity passage 80 remains.

[0053] Next, Figure 15 shows the process of etching the electroplating layer 86 to form recesses. Recesses 901 to 904 are formed in the electroplating layer 86. Recesses 901 to 904 are formed in locations corresponding to cavities 501 to 504, respectively. The size of the recesses 90 is set considering the chip component 11 to be mounted. In this disclosure, the recesses 90 have a depth d1. In the following description, when it is not necessary to specify the formed location, the recesses 90 may simply be referred to as such.

[0054] Figure 16 illustrates the process of peeling off the resist layer 88. When the resist layer 88 is peeled off from the glass substrate 1, a state appears in which the groove-shaped passage 70 and the cavity 50 are filled with the seed layer 82 and the electroplating layer 86, as shown in Figure 16(a). Also, as shown in Figure 16(b), the recessed portion 90 is a space surrounded by the cavity passage 80 in which the seed layer 82 and the plating layer 86 are arranged.

[0055] Next, Figure 17 shows the process of placing a chip component in the recessed portion 90. The chip component 11 is placed in the recessed portion 90 via a die attachment film (hereinafter also referred to as "DAF (Die Attach Film)") 13.

[0056] Next, Figure 18 shows the process of dicing the groove-shaped path with the cutting surface to separate the wiring board including the glass substrate into individual pieces. In Figure 14(a), dicing lines 211 to 214 are set. Of these, dicing line 211 is set at the position to cut the groove-shaped path 705. Dicing line 212 is set at the position to cut the groove-shaped path 70 10 The dicing line 213 is set to the position where it cuts the groove-shaped path 709. In Figure 13(a), a symmetrical structure with respect to the dicing line 214 is shown.

[0057] Figure 18(b) shows a cross-section of the wiring board 123 that has been diced between dicing lines 211, 212, and 214 in the aa' section of Figure 18(a). In the wiring board 123, the cavity passage 801 and the groove-shaped passage 705 extend from the bottom 50b of the cavity 501 to the end 1e on the positive x-axis side of the glass substrate 1. The groove-shaped passage 705 extends from the cavity passage 801 to the end 1e of the glass substrate 1 on the first surface 1a side of the glass substrate 1. 10 It extends from the bottom 50b of the cavity 501 to the end 1e on the minus x-axis side of the glass substrate 1. Groove-shaped path 70 10 It extends from the cavity passage 801 to the end 1e of the glass substrate 1 on the first surface 1a side of the glass substrate 1. Also, the cavity passage 801 and groove-shaped paths 705 and 70 10 In this configuration, a seed layer 82 and a plating layer 86 are arranged as heat transfer members.

[0058] Furthermore, Figure 18(c) shows the wiring board 123 as viewed from the positive x-axis side. As shown in Figure 18(c), the groove-shaped path 705 has a rectangle enclosed by two sides of length gy and d5, and a seed layer 82 and a plating layer 86 are arranged inside the groove-shaped path 705 as heat transfer members.

[0059] In the case of the second embodiment, the glass substrate 1 shown in Figure 18(a) can also be described as a base substrate on which a plurality of (four in this disclosure) wiring boards are formed. In the base substrate, the plurality of wiring boards are arranged in a grid pattern, and the heat dissipation paths of adjacent wiring boards are connected.

[0060] (Effects / Actions) In the second embodiment, the cavity passage 80 and the groove-shaped passage 70 are formed on the first surface 1a side. This allows for a shorter heat dissipation path length compared to the first embodiment, where the heat dissipation path runs from the cavity on the first surface 1a side through the through passage 9 and then through the groove-shaped passage 7 on the second surface side, thus enabling more efficient heat dissipation.

[0061] [Differentiation] Next, a modified example of the present invention will be described with reference to Figure 19. In the modified example, a groove-shaped path is added compared to the first embodiment. In the following description, the same or equivalent components as those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0062] Figure 19 shows a modified example in which the groove-shaped path is cut by a cutting surface to separate the wiring board, including the glass substrate, into individual pieces. Figure 19(1) shows a plan view of the first modified example, and Figure 19(2) shows a plan view of the second modified example.

[0063] As shown in Figure 19(1), in the first modified example, groove-shaped paths 74 and 75 are added compared to the first embodiment. When dicing is performed along the dicing line 214, groove-shaped paths 74 and 75 are cut, and groove-shaped paths 74 and 75 are exposed at the edge of the glass substrate 1.

[0064] In the case of a wiring board including a cavity 51, in addition to the heat dissipation paths including groove-shaped paths 71 and 72, a heat dissipation path including groove-shaped path 74 is also added. Since the number of heat dissipation paths formed on the wiring board can be increased, the wiring board of the first modified example can dissipate heat more efficiently.

[0065] Furthermore, as shown in Figure 19(2), in the second modified example, groove-shaped paths 76 to 79 are added compared to the first embodiment. In the first embodiment, the second embodiment, and the first modified example, the groove-shaped path was cut in a direction perpendicular to the direction in which it extends, but the groove-shaped path may also be cut in a direction parallel to the direction in which it extends. In Figure 19(2), each groove-shaped path has a width greater than the width of the dicing line, and when dicing is performed along the dicing line, the cut portion of the groove-shaped path 76 to 79 is left at the end of the wiring board.

[0066] (Effects / Actions) For example, in the case of a wiring board including a cavity 51, the cross-sectional portion of the groove-shaped path 77 remains at the end in the positive x-axis direction, the cross-sectional portion of the groove-shaped path 76 remains at the end in the positive y-axis direction, and the cross-sectional portion of the groove-shaped path 78 remains at the end in the negative x-axis direction. Since the groove-shaped path extends to the end of the wiring board and a heat dissipation member is arranged therein, the wiring board of the second modified example can dissipate heat more efficiently.

[0067] Although the case in which a groove-shaped path is formed at the location where the dicing line is cut has been described, this disclosure is not limited to this case. A groove-shaped path may also be formed in areas where no dicing line is set.

[0068] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the spirit of the invention. For example, the first embodiment and the second embodiment may be combined, or the second embodiment may be combined with modified examples.

[0069] The following describes, but is not limited to, embodiments that may constitute the present invention. (Aspect 1) A wiring substrate including a glass substrate having a first surface and a second surface facing the first surface, The aforementioned glass substrate is A cavity formed on the first surface side, in which a chip component is placed, A heat dissipation path extending from the bottom of the cavity to the edge of the glass substrate, A wiring board having a heat transfer member arranged in the heat dissipation path. (Aspect 2) A wiring board according to Embodiment 1, The aforementioned heat dissipation path is A through passage extending from the bottom of the cavity to the second surface side of the glass substrate, A wiring substrate having a first groove-shaped path extending from the through-path to the end of the glass substrate on the second surface side of the glass substrate. (Aspect 3) A wiring board according to Embodiment 1 or Embodiment 2, The aforementioned heat dissipation path is The cavity passage is the portion of the cavity from the bottom to the side wall of the cavity, A wiring substrate having a second groove-shaped path extending from the cavity passage to the end of the glass substrate on the first surface side of the glass substrate. (Aspect 4) A wiring board according to any one of embodiments 1 to 3, The heat transfer element is a wiring board made of copper or a copper-containing alloy. (Appendix 5) A wiring board according to any one of embodiments 1 to 4, A wiring board further having a build-up layer on the first or second surface of the glass substrate, wherein one or more sets of insulating and conductive layers are laminated together. (Aspect 6) In a base substrate on which multiple wiring boards according to any one of Embodiments 1 to 5 are formed, The aforementioned plurality of wiring boards are arranged in a grid pattern, A base substrate to which the heat dissipation paths of adjacent wiring boards are connected, among the plurality of wiring boards. (Aspect 7) A glass substrate having a first surface and a second surface opposite to the first surface, The process involves forming a cavity on the first surface side, The process includes forming groove-shaped passages that connect adjacent cavities among the cavities formed, A method for manufacturing a wiring substrate, comprising the step of dicing the wiring substrate, which includes a glass substrate, with a surface that cuts the groove-shaped path to separate it into individual pieces. (Pattern 8) A method for manufacturing a wiring board according to Embodiment 7, The process further includes the step of forming a through-pass that extends from the bottom of the cavity to the second surface side of the glass substrate, A method for manufacturing a wiring board, wherein the groove-shaped path connects to the through-path and connects the adjacent cavities on the second surface side of the glass substrate. (Aspect 9) A method for manufacturing a wiring board according to embodiment 7 or embodiment 8, The process of placing a chip component in the cavity, A step of arranging heat transfer members in the aforementioned through passage and groove-shaped passage, A method for manufacturing a wiring substrate, further comprising the step of forming a build-up layer on the first and second surfaces of the glass substrate. (Aspect 10) A method for manufacturing a wiring board according to any one of embodiments 7 to 19, A step of arranging heat transfer members in the cavity and the groove-shaped path, A step of forming a recess in the heat transfer member within the cavity, The process of placing a chip component in the recessed portion, A method for manufacturing a wiring substrate, further comprising the step of forming a build-up layer on the first and second surfaces of the glass substrate. (Aspect 11) A method for manufacturing a wiring board according to any one of embodiments 7 to 10, The steps of forming the cavity and forming the groove-shaped path are as follows: A step of irradiating the area where the cavity is formed and the area where the groove-shaped path is formed with laser light to form a laser-modified area, A method for manufacturing a wiring board, comprising the step of etching and removing the laser-modified portion. [Explanation of Symbols]

[0070] 1: Glass substrate 3: Laser modification section 5: Cavity 7: Groove shape path 9: Throughway 11: Chip components 15: Heat transfer components 17: Build-up layer 19: Build-up layer 21: Dicing Line 23: Wiring board 30: Laser modification section 50: Cavity 70: Groove-shaped path 80: Cavity passageway 90: Recessed area 123: Wiring board

Claims

1. A wiring substrate including a glass substrate having a first surface and a second surface facing the first surface, The aforementioned glass substrate is A cavity formed on the first surface side, in which a chip component is placed, A heat dissipation path extending from the bottom of the cavity to the edge of the glass substrate, A wiring board having a heat transfer member arranged in the heat dissipation path.

2. A wiring board according to claim 1, The aforementioned heat dissipation path is A through passage extending from the bottom of the cavity to the second surface side of the glass substrate, A wiring substrate having a first groove-shaped path extending from the through-path to the end of the glass substrate on the second surface side of the glass substrate.

3. A wiring board according to claim 1, The aforementioned heat dissipation path is The cavity passage is the portion of the cavity from the bottom to the side wall of the cavity, A wiring substrate having a second groove-shaped path extending from the cavity passage to the end of the glass substrate on the first surface side of the glass substrate.

4. A wiring board according to any one of claims 1 to 3, The heat transfer element is a wiring board made of copper or a copper-containing alloy.

5. A wiring board according to any one of claims 1 to 3, A wiring board further having a build-up layer on the first or second surface of the glass substrate, wherein one or more sets of insulating and conductive layers are laminated together.

6. A base material substrate on which a plurality of wiring boards according to any one of claims 1 to 3 are formed, The aforementioned plurality of wiring boards are arranged in a grid pattern, A base substrate to which the heat dissipation paths of adjacent wiring boards are connected, among the plurality of wiring boards.

7. A glass substrate having a first surface and a second surface facing the first surface, The process of forming a cavity on the first surface side, The process includes forming groove-shaped passages that connect adjacent cavities among the cavities formed, A method for manufacturing a wiring substrate, comprising the step of dicing the wiring substrate, which includes a glass substrate, with a surface that cuts the groove-shaped path to separate it into individual pieces.

8. A method for manufacturing a wiring board according to claim 7, The process further includes the step of forming a through-pass that extends from the bottom of the cavity to the second surface side of the glass substrate, A method for manufacturing a wiring board, wherein the groove-shaped path connects to the through-path and connects the adjacent cavities on the second surface side of the glass substrate.

9. A method for manufacturing a wiring board according to claim 8, The process of placing a chip component in the cavity, A step of arranging heat transfer members in the aforementioned through passage and groove-shaped passage, A method for manufacturing a wiring substrate, further comprising the step of forming a build-up layer on the first and second surfaces of the glass substrate.

10. A method for manufacturing a wiring board according to claim 8, A step of arranging heat transfer members in the cavity and the groove-shaped path, A step of forming a recess in the heat transfer member within the cavity, The process of placing a chip component in the recessed portion, A method for manufacturing a wiring substrate, further comprising the step of forming a build-up layer on the first and second surfaces of the glass substrate.

11. A method for manufacturing a wiring board according to any one of claims 7 to 10, The steps of forming the cavity and forming the groove-shaped path are as follows: A step of irradiating the area where the cavity is formed and the area where the groove-shaped path is formed with laser light to form a laser-modified area, A method for manufacturing a wiring board, comprising the step of etching and removing the laser-modified portion.

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