Semiconductor manufacturing equipment

Abstract

This invention provides semiconductor manufacturing equipment used in the production of semiconductor devices using wiring boards with a temporary underfill technology that is highly reliable against thermal changes and less prone to damage. [Solution] The underfill wax filling apparatus 3001 comprises at least a pressure variable chamber 211 capable of variable pressure control, a sample placement stage 214 that holds the sample at its periphery or side and has an opening or infrared transmission window located in a place corresponding to the area where underfill should be formed, a heating device 216 capable of heating the sample placement stage 214, infrared transmission windows 218 provided at both the top and bottom of the pressure variable chamber 211, an infrared irradiation device 219 located outside the infrared transmission windows 218, an infrared camera 221 capable of imaging the sample in at least one of transmission mode and reflection mode and located outside the infrared transmission windows 217, and a control system.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor manufacturing apparatus preferably used for manufacturing semiconductor devices having bump electrode junctions. [Background technology]

[0002] The process of manufacturing functional structures by joining multiple semiconductor elements with electrode bumps is becoming increasingly important. Mid-infrared cameras are realized by joining a detector made of III-V semiconductor material such as GaAs and a readout circuit made of Si with indium bumps. In printed circuit boards, solder bumps are commonly used to mount semiconductor circuits onto the circuit board. While miniaturization and high integration are progressing, recently, the development of systems that assume the joining of multiple semiconductor elements, such as chiplets and micro-LED displays, is advancing.

[0003] One widely used implementation method is called underfilling, which involves filling the joint with a thermosetting resin such as epoxy resin to protect it. This protects the joint from contaminants and chemicals during the manufacturing process, and is also expected to prevent deterioration of the joint over time after manufacturing.

[0004] Here, thermosetting resins have a coefficient of thermal expansion that is more than an order of magnitude higher than that of semiconductor materials. Therefore, in conventional underfill methods, the reliability of the underfill deteriorates due to the filling process. In particular, mid-infrared cameras are exposed to temperatures exceeding 100°C during the manufacturing process, but need to be cooled to around -200°C during use. Thermal expansion and contraction of the underfill material causes stress on the photodetector element, leading to variations in sensitivity characteristics for each pixel, as well as problems such as cracks in the detector, defective pixels due to injection failures, and non-uniformity. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2009-194010 [Non-patent literature]

[0006] [Non-Patent Document 1] Haruyoshi Katayama, Development of a Type II Superlattice Infrared Detector for Satellite Mounting, Applied Physics, Vol. 92, No. 12, pp. 723-729 (2023). [Non-Patent Document 2] Printing revolutionizes semiconductor back-end processes: 10μm pitch bumps also developed, NIKKWEI ELECTRONICS, October 2015 issue, pp. 26-27 (2015). [Overview of the project] [Problems that the invention aims to solve]

[0007] The objective of this invention is to provide a manufacturing apparatus for use as an alternative to a newly developed underfill filling technology called "temporary underfill," which solves the problem of reduced reliability due to thermal expansion of the underfill material, as described in the background section. To elaborate further, the present invention aims to provide a manufacturing apparatus for temporary underfill technology that suppresses the decrease in yield associated with heat treatment during manufacturing and frees the user from the problem of underfill material expanding or contracting due to temperature changes during use or the temperature difference between the manufacturing environment and the usage environment, thereby applying mechanical stress to the element and sometimes leading to damage. By manufacturing a semiconductor device using a wiring board with the manufacturing apparatus of the present invention, it becomes possible to provide a semiconductor device that prevents a decrease in yield due to heat treatment during manufacturing, as well as malfunctions and damage caused by temperature changes during use and temperature differences between the manufacturing environment and the usage environment. [Means for solving the problem]

[0008] The configuration of the present invention for solving the problem is shown below. (Composition 1) A pressure-variable chamber that allows the pressure inside the chamber to be controlled and varied, A sample mounting stage for a manufactured wiring board semiconductor device is provided, which holds the sample at its peripheral or side portion, and has openings or infrared-transmitting windows positioned at locations corresponding to areas where underfill should be formed. A heating device capable of heating the aforementioned sample placement stage, The variable pressure chamber is provided with infrared-transmitting windows at both the top and bottom, An infrared irradiation device positioned above and below the outside of the infrared-transmitting window, The infrared radiation emitted from the infrared irradiation device is capable of imaging the sample placed on the sample placement stage in at least one of transmission mode and reflection mode, via infrared transmission windows provided in the upper and lower parts, respectively, and openings or infrared transmission windows provided in the sample placement stage, as needed, and an infrared camera is positioned above and below the outside of the infrared transmission windows provided in both the upper and lower parts of the pressure variable chamber, A semiconductor manufacturing apparatus comprising at least a control system that controls a series of processes including the pressure in the variable pressure chamber, the temperature of the heating equipment, the irradiation of the sample with infrared rays by the infrared irradiation device, and imaging of the sample irradiated with infrared rays by the infrared camera. (Configuration 2) Furthermore, the apparatus according to configuration 1 is equipped with an underfill material supply device capable of supplying underfill material to the outer periphery of the sample placed on the aforementioned placement stage. (Composition 3) Furthermore, the apparatus according to configuration 1 or 2 is equipped with a cooling device capable of cooling the sample placed on the aforementioned stage. (Composition 4) The apparatus according to any one of configurations 1 to 3, wherein the variable pressure range in the chamber is from vacuum to 0.5 MPa. (Composition 5) The apparatus according to any one of configurations 1 to 4, wherein a temperature adjustment range by the heating equipment is 20°C or higher and 300°C or lower. (Configuration 6) The apparatus according to any one of configurations 1 to 5, wherein the infrared irradiation device is an apparatus using a blackbody furnace. (Configuration 7) The apparatus according to configuration 6, wherein a temperature of the blackbody furnace is 50°C or higher and 1000°C or lower. (Configuration 8) The apparatus according to any one of configurations 1 to 7, wherein the infrared camera is an InSb camera using InSb in a pixel portion. (Configuration 9) Further, the apparatus comprises a receiving sample holder, an underfill-completed sample holder, and a transport equipment, The apparatus according to any one of configurations 1 to 8, wherein the transport equipment places the sample from the receiving sample holder on the sample placement stage, and transports the sample placed on the sample placement stage to the underfill-completed sample holder.

Effects of the Invention

[0009] By using the manufacturing apparatus of the present invention, it becomes possible to manufacture a semiconductor device freed from the problem of reduced reliability due to thermal expansion of an underfill filler. More specifically, a decrease in yield associated with heat treatment during manufacturing is suppressed, and it becomes possible to manufacture a semiconductor device using a wiring board, which is freed from the problem that the underfill filler expands or contracts due to temperature changes during use or the temperature difference between the manufacturing environment and the use environment, applying mechanical stress to the element and sometimes leading to breakage.

[0010] In particular, in mid-infrared cameras, despite the low operating environment temperature of -200°C, the difference from the processing temperature of 180°C applied during manufacturing is large, so mid-infrared imaging devices manufactured using the conventional method with underfill filler have a high defect occurrence rate, and problems with temporal changes during use and reliability are also prone to arise. By manufacturing mid-infrared imaging devices using the manufacturing apparatus of the present invention, variations in sensitivity characteristics for each pixel of the photodetection element due to residual stress are reduced, image calibration is facilitated, and it becomes possible to manufacture and supply mid-infrared imaging devices that also solve problems such as defective pixels, non-uniformity, and temporal degradation caused by detector cracking or poor injection. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] [Figure 1] It is a cross-sectional structure diagram illustrating the configuration of a semiconductor device using the wiring board according to the first embodiment. [Figure 2] It is a flowchart diagram showing the manufacturing process. [Figure 3] It is a manufacturing process diagram illustrating the manufacturing steps of a semiconductor device using the wiring board according to the first embodiment with cross-sectional views. [Figure 4] It is a manufacturing process diagram illustrating the manufacturing steps of a semiconductor device using the wiring board according to the first embodiment with cross-sectional views. [Figure 5] It is a manufacturing process diagram illustrating the manufacturing steps of a semiconductor device using a wiring board according to the conventional method with cross-sectional views. [Figure 6] It is a manufacturing process diagram illustrating the manufacturing steps of a semiconductor device using a wiring board according to the conventional method with cross-sectional views. [Figure 7] It is a structural diagram showing the apparatus configuration of the apparatus of the present invention, where (a) is a plan view and (b) is a cross-sectional view. [Figure 8] It is a cross-sectional structure diagram showing the apparatus configuration of the apparatus of the present invention. [Figure 9] It is a flowchart diagram illustrating the operation process of the apparatus of the present invention. [Figure 10] It is a photograph showing the external appearance of the prototyped apparatus. [Figure 11]This is a photograph showing the external appearance of the pressure-variable chamber section of the prototype device. [Figure 12] This is a photograph showing the exterior of an observation facility consisting of an InSb camera and an infrared light source (blackbody furnace). [Figure 13] This photograph shows the prototype chamber set up in an observation facility consisting of an InSb camera and an infrared light source (blackbody furnace). [Figure 14] This is a cross-sectional view illustrating the structure of a semiconductor device using a wiring board in a second embodiment. [Figure 15] This is a manufacturing process diagram illustrating the manufacturing process of a semiconductor device using a wiring board, in which a protective seal according to the second embodiment is placed, using plan views and cross-sectional views. [Figure 16] This is a cross-sectional view illustrating the structure of an infrared imaging semiconductor device using a wiring board in a third embodiment. [Figure 17] This is a cross-sectional view illustrating the pixel and electrode bump processing steps for a semiconductor device in Example 1. [Figure 18] This is a band structure diagram illustrating the conduction band energy structure and subbands in Example 1. [Figure 19] This is a cross-sectional view illustrating the electrode bump processing process of the wiring board in Example 1. [Figure 20] This is a cross-sectional view illustrating the semiconductor element and wiring substrate bonding process in Example 1. [Figure 21] This is a characteristic diagram showing the voltage-current density measurement results of the infrared sensor fabricated in Example 1 under dark and background light conditions. [Figure 22] This is a characteristic diagram showing the relationship between the sensitivity spectrum of the infrared sensor fabricated in Example 1 and the absorption spectrum of H2O gas. [Figure 23] This is an example of an image taken with an infrared camera in Example 1. [Figure 24] This is an example of an image taken with an infrared camera in Example 1. [Figure 25] This is a cross-sectional diagram showing the structural characteristics of the semiconductor device fabricated in Example 2. [Figure 26](a) is a Scanning Electron Microscope (SEM) image of the electrode bump portion of the semiconductor device fabricated in Example 2, taken from above, and (b) is taken from an oblique angle. [Figure 27] This is a cross-sectional SEM image of the semiconductor device fabricated in Example 2. [Figure 28] This characteristic diagram shows the variation in characteristics of multiple semiconductor elements, which are infrared sensors, measured in the dark state. (a) is an example of an infrared sensor fabricated using the temporary underfill method of the present invention, which is Example 2, and (b) is a comparative example of an infrared sensor fabricated using the conventional epoxy underfill method. [Modes for carrying out the invention]

[0012] The embodiments for carrying out the present invention will be described below with reference to the drawings. Note that A to B in the text refers to A and B, meaning A or greater and B or less.

[0013] (Embodiment 1) Embodiment 1 first explains what temporary underfill technology is by describing the configuration of a semiconductor device using temporary underfill and its manufacturing method. Then, it shows the configuration of the apparatus of the present invention and subsequently explains how to use the apparatus in the temporary underfill process.

[0014] <Overview of temporary underfill technology and structure of semiconductor device using this technology> The temporary underfill technology, a method for manufacturing a semiconductor device according to the present invention, as shown in Figure 1, is a process for manufacturing a highly functional semiconductor device 1001 by joining one or more semiconductor elements 22 to a wiring substrate 11 with electrode bumps 12 and 23. In this process, instead of the thermosetting resin that was conventionally used to fill the joints to protect them from contaminants, chemicals, and gases during the manufacturing process, a thermoplastic polymer material is used to fill the joints, and this material is removed after the processing step. Furthermore, the semiconductor device 1001 according to the present invention is a semiconductor device 1001 in which one or more semiconductor elements 22 are joined to a wiring substrate 11 with electrode bumps 12 and 23, characterized in that at least the vicinity of the electrode bumps 12 and 23 is an air gap 43, and the electrode bumps are joined with the first main surface 19 of the wiring substrate 11 and the first main surface 29 of the semiconductor element 22 facing each other.

[0015] According to this manufacturing method, the sample is protected by a thermoplastic polymer material from chemical exposure, thermal exposure, and mechanical stress during polishing and other processes in the manufacturing process. The finished product has a void 43 around the bump joint, which relieves the thermosetting resin filler from mechanical stress caused by the ambient temperature, preventing failure due to that stress and improving reliability. This void 43 may be filled with air, which has a relatively low dielectric constant, is easy to handle and inexpensive, or it may be filled with an inert gas such as nitrogen or argon, which is chemically inert, to improve stability and reliability, or it may be vacuum-sealed, which is even more stable and has a lower dielectric constant. Here, the maximum distance between the first main surface 19 of the wiring substrate 1 and the first main surface 29 of the semiconductor element 22 is set to be between 10 nm and 50 μm. If the maximum distance is less than 10 nm, temporary filling of the void becomes difficult, and if it exceeds 50 μm, the bump size becomes large, making it difficult to achieve the objective of high-density mounting. The maximum distance is preferably between 10 nm and 10 μm, and more preferably between 10 nm and 2 μm.

[0016] Generally, both the wiring board 11 and the semiconductor element 22 are better suited to producing higher-quality elements and circuits on the first main surface (front) side than on the second main surface (back) side. Taking a Si wafer as an example, this is because the first main surface side has fewer crystal defects and has undergone processing that results in high smoothness and flatness. Although wafers with a quality processing similar to the first main surface side are commercially available, it is not easy to form circuits and elements of the same high quality on both sides due to issues with maintaining the polishing and other processing. Many film deposition, polishing, etching, and lithography systems are also based on processing on the first main surface.

[0017] In this invention, a wiring board 11 and a semiconductor element (part) 22 on which high-function circuits and elements are formed are manufactured or prepared, and the wiring board and the semiconductor element are joined together on their first surface sides (19 and 29) via bump electrodes. Since the semiconductor element 22 is positioned with the first main surface 29 facing downwards, a semiconductor device 1001 with a high-performance thin-film semiconductor element 22 arranged on a wiring substrate 11 can be obtained relatively easily by etching and polishing from the second main surface side. A typical example of a thin-film semiconductor element where the back side, which is the second main surface, is the exposed surface side is a back-side photodetector element, and this structure and manufacturing method is particularly suitable for supplying a GaAs infrared photodetector incorporating a metamaterial structure that improves the signal-to-noise ratio characteristics by utilizing plasmon resonance. Furthermore, with this configuration, at least the vicinity of the bump electrode is an air gap 43, so unwanted capacitance can also be suppressed.

[0018] <Manufacturing method for semiconductor devices> The manufacturing method of the semiconductor device 1002 according to Embodiment 1 will be explained using Figure 2, which is a flowchart, and Figures 3 and 4, which illustrate the manufacturing process using a cross-sectional structure. Here, the example shows the case where the semiconductor element 22 is an infrared image sensor having a metamaterial structure.

[0019] First, a wiring substrate 11 is prepared that has a rigid, self-supporting surface, and has a first electrode bump consisting of a plurality of bump electrodes 12 (not shown) to which the electrical wiring of an electrical circuit is at least electrically connected on the first main surface 19 side (step S11 in Figure 2, Figure 3(a)). There are no particular restrictions on the material of the wiring substrate, but examples include Si, GaAs, SiO2, SiON, Ge, InP, GaSb, GaP, InAs, InSb, SiC, GaN, AlN, sapphire, glass, and epoxy substrates. Any material used for electrode bumps can be used, but considering bonding strength, bonding stability, reliability, bonding resistance, corrosion resistance, and durability, Au, Ag, Cu, Al, Ti, Ni, Fe and alloys mainly composed of these, and eutectic alloys composed of In, Pb, Sn, Sb, Bi, Au, Ag, Al, Cu, Si, Ge, etc. can be used. Gold, in particular, is favored because it is resistant to corrosion, forms strong bump joints, and possesses excellent mechanical strength in addition to the electrical stability of the joints. Here, "self-supporting rigidity" means having the rigidity to maintain its shape even when placed vertically.

[0020] Next, a semiconductor device sample 22α is prepared in which a semiconductor device having a semiconductor layer 22a is formed on the surface of a substrate 21 having self-supporting rigidity (step S12 in Figure 2, Figure 3(b)). The semiconductor device is placed on the semiconductor layer 22a side of the semiconductor device sample 22α. Here, a second electrode bump 23 consisting of a plurality of bump electrodes is placed on the first main surface 29 side of the semiconductor device sample 22α. Here, the substrate 21 is preferably one that has self-supporting rigidity, insulating properties, and good processability by polishing and etching, and examples include Si, GaAs, SiO2, SiON, SiC, Ge, InP, GaSb, GaP, InAs, InSb, GaN, AlN, CdTe, CdZnTe, sapphire, glass, and epoxy substrates. While any material suitable for use as an electrode bump can be used, considering bonding strength, stability, reliability, resistance, corrosion resistance, and durability, gold (Au), Ag, Cu, Al, Ti, Ni, Fe, alloys mainly composed of these materials, and eutectic alloys composed of In, Pb, Sn, Sb, Bi, Au, Ag, Al, Cu, Si, Ge are preferred. Gold, in particular, is preferred because it is corrosion-resistant, provides strong bump bonding, and exhibits excellent electrical stability and mechanical strength. The thickness of the semiconductor element 22 is not particularly limited, but typically it is between 10 nm and 100 μm. Examples of semiconductor layer 22a include Si, GaAs, AlGaAs, AlAs, InGaAs, Ge, GaSb,GaP, InAs, InSb, AlSb, AlGaSb, InGaSb, GaN, InN, AlP, InP, AlN, InN, Ga2O3, PbS, PbSe, ZnTe, CdTe, HgTe, ZnSe, CdSe, and MgSe. The order in which the semiconductor device sample and the wiring board 11 are prepared does not matter; either can be done first, or they can be done simultaneously.

[0021] Subsequently, the first main surface 19 side of the wiring board 11 and the first main surface 29 side of the semiconductor element sample 22α are brought into contact, and at least a portion of the first electrode bump 12 and the second electrode bump 23 are mechanically brought into contact to form a solid-phase diffusion bond (solid-phase diffusion bonding) between the first electrode bump 12 and the second electrode bump 23 (step S13 in Figure 2, Figure 3(c)). The bonding pressure can be between 1 MPa and 10 MPa. The bonding temperature can be between 150°C and 300°C. Through solid-phase diffusion bonding, the bond between the first electrode bump 12 and the second electrode bump 23 provides mechanical strength and electrical conductivity suitable for extremely fine structures that fully utilize the metamaterial structure. When gold (Au) is used for the first electrode bump 12 and the second electrode bump 23, sufficient bonding can be obtained with contact at room temperature by performing surface activation.

[0022] Subsequently, a filler 31 made of a thermoplastic polymer whose viscosity changes with temperature and can be removed by a solvent is filled into the void 43 formed between the first main surface 19 of the wiring board 11 and the first main surface 29 of the semiconductor element 22 (step S14 in Figure 2, Figure 3(d)). As will be described later, this filling is carried out using the temporary underfill process apparatus 3001 of the present invention. By using the apparatus 3001, the filler material 31 can be densely filled into the voids 43 without generating air bubbles or other voids. The filler 31 is preferably rigid at room temperature to a degree comparable to that of a solid polymer material in order to protect the sample during the subsequent substrate removal process 21. Since the filler 31 is ultimately to be removed without residue, it is preferable that it be completely removed by a solvent at room temperature or by a solvent in a temperature environment of 60°C to 200°C. Examples of thermoplastic polymers include linear, branched, and cyclic hydrocarbon waxes. Examples of solvents include chloroform, benzene, diethyl ether, and N-methyl-2-pyrrolidone.

[0023] Subsequently, the substrate 21 is etched, polished, or both etched and polished to a predetermined depth, starting from the second main surface side of the substrate 21 (opposite the first main surface 29 of the semiconductor element 22) (step S15 in Figure 2, Figure 4(a)). At this time, whether to protect the semiconductor element 22 by not completely removing the substrate 21, to remove the substrate 21 just enough, or to remove part of the semiconductor element 22 is a design matter and can be selected as appropriate. This process yields a thin-film semiconductor element 22. For polishing, either mechanical polishing or CMP (Chemical Mechanical Polishing) can be used. For etching, for example, in the case of a GaAs substrate, a solution obtained by mixing a 1 g / ml citric acid aqueous solution and hydrogen peroxide solution in a 10:1 ratio can be used.

[0024] Subsequently, if necessary, a predetermined circuit is formed on the second main surface side of the semiconductor element 22 (step S16 in Figure 2, Figure 4(b)). When fabricating an infrared image sensor with a metamaterial structure, fine antenna wiring for inducing plasmon resonance, electrodes and wiring for extracting electrical signals, and peripheral circuits such as amplifiers are formed. If the semiconductor element 22 does not require wiring on the back side, this step can be skipped.

[0025] Subsequently, the filler material 31 is dissolved from the sample in which the thin-film semiconductor element 22 is bump-bonded onto the wiring board 11 using the aforementioned heat treatment or solvent (step S17 in Figure 2, Figure 4(c)). Finally, the semiconductor device 1002 can be manufactured by attaching wires 32, etc. (Figure 4(d)).

[0026] According to this manufacturing method, the sample is protected by a thermoplastic polymer material from chemical exposure, thermal exposure, and mechanical stress during polishing and other processes in the manufacturing process. Because the finished product has a gap 43 around the bump joint, the thermosetting resin filler is freed from mechanical stress caused by the ambient temperature, preventing failure due to that stress and improving reliability.

[0027] For reference, the manufacturing method when filling and leaving some resin in the conventional method is shown below. First, a wiring substrate 11 having a rigid, self-supporting structure is prepared, which has a first electrode bump consisting of a plurality of electrode bumps 112 (not shown) to which the electrical wiring of the electrical circuit is at least electrically connected on the first main surface 19 side (Figure 5(a)). Next, a semiconductor device sample is prepared in which a semiconductor device 122 having a semiconductor layer is formed on the surface of a substrate 121 having self-supporting rigidity (Figure 5(b)). Here, a second electrode bump 23 consisting of multiple bump electrodes is arranged on the first main surface 29 side of the semiconductor device 22. In conventional methods, gold (Au) is often used as the material for the electrode bump 23 and indium (In) is often used as the material for the electrode bump 112. Subsequently, the first main surface 19 side of the wiring board 11 and the first main surface 29 side of the semiconductor element 122 are brought into contact, and at least a portion of the first electrode bump 112 and the second electrode bump 23 are mechanically brought into contact and heated and melted to form a bond between the first electrode bump 112 and the second electrode bump 23 (Figure 5(c)). Subsequently, a filler 131 made of epoxy resin is filled into the gap formed between the first main surface 19 of the wiring board 11 and the first main surface 29 of the semiconductor element 122, and the filler 131 is cured by heat treatment or other means as necessary (Figure 5(d)). Subsequently, the substrate 121 is processed to a predetermined depth by etching, polishing, or both, starting from the second main surface side of the substrate 121 (the side opposite to the first main surface 29 of the semiconductor element 122) (Figure 6(a)). Subsequently, if necessary, a predetermined circuit 124 is formed on the second main surface side of the semiconductor element 122 (Figure 6(b)). Finally, the semiconductor device 2001 is supplied with wires 32 and other components attached (Figure 6(c)). In conventional methods, while the presence of the filler 131 protects the electrode bumps 23 and 112 from the external environment, it also creates a problem where damage and other issues are more likely to occur due to stress from the temperature environment.

[0028] <Configuration of the temporary underfill device> Figure 7 shows the configuration of the filling device 3001, which we call a temporary underfill device. This device densely fills the gap between the wiring board with bump joints and the semiconductor element with underfill wax without generating defects such as air bubbles. The temporary underfill apparatus 3001 includes a pressure variable chamber 211, a pressure variable device (vacuum pump, high-pressure gas source, pressure regulator) 212 for changing the pressure in the pressure variable chamber 211, a sample placement stage 214, a heating device 216 for heating the sample placement stage, an infrared transmission window 217 located at the top of the pressure variable chamber 211 and an infrared transmission window 218 located at the bottom, and an infrared irradiation device 219 located at least one of the upper and lower sides of the infrared transmission windows (217, 218) (when both are provided, the upper infrared irradiation device is 219a, the lower one is 219a, as shown in apparatus 3002 in Figure 8). It comprises at least 219b), an infrared camera 221 positioned above the outside of the infrared transmission window 217, and above and below the outside of the infrared transmission window 218 (a lower camera 221a and an upper camera 221b if positioned above and below), and a control device 222 that controls a series of processes including the pressure in the variable pressure chamber 211, the temperature of the heating equipment 216, the irradiation of the sample with infrared light by the infrared irradiation device (219, 219a, 219b), imaging of the infrared-irradiated sample by the infrared camera (221, 221a, 221b), and image processing as still images and / or moving images based on the imaging.

[0029] Here, the pressure-variable chamber 211 is configured such that the pressure inside the chamber can be changed by a pressure-variable device 212 connected to the pressure-variable chamber 211. Preferably, the pressure-variable range includes a range from vacuum to 0.5 MPa. The sample placement stage 214 holds a sample consisting of a wiring board and semiconductor elements at its periphery or sides, and has openings 215 or infrared-transmitting windows in areas corresponding to the region to be filled with underfill. Furthermore, a heating device 216 capable of heating the sample placement stage 214 is thermally connected by heat conduction, a heat pump, or thermal radiation. The infrared camera (221, or 221a and 221b) is configured to capture images of a sample placed on the sample placement stage 214 in at least one of transmission mode and reflection mode, with respect to infrared light emitted from the infrared irradiator (219, or 219a and 219b), via an infrared transmission window (217 or 218 or both) and, if necessary, an opening 215 or infrared transmission window located on the sample placement stage 214.

[0030] Preferably, the underfill material is provided by an underfill material supply device (not shown) to the outer periphery of the sample placed on the sample placement stage 214. A preferred method for supplying underfill material is to use a robotic arm to place block-shaped underfill material around the outer periphery of the sample placed on the sample placement stage 214. This method makes it possible to densely fill the gap between the wiring substrate and the semiconductor element with underfill material while preventing the generation of air bubbles. Other methods for supplying underfill material include supplying it using a nozzle, or supplying it by screen printing or transfer.

[0031] The temperature during underfilling of the sample placement stage 214 is preferably between 20°C and 300°C, and more preferably between 90°C and 200°C. Below 20°C, unintended flow of the underfill material is likely to occur, and above 300°C, problems such as the generation of air bubbles from the underfill material are likely to occur. Furthermore, it is preferable that the mounting stage 214 be equipped with a cooling system capable of cooling the mounted sample. The controlled temperature by the cooling system is preferably between 20°C and 300°C. By providing a cooling system, the cooling rate of the underfill material can be appropriately controlled, which has the effect of suppressing stress and crack generation associated with cooling.

[0032] The wavelength range of the infrared irradiation device (219, 219a, 219b) and infrared camera (221, 221a, 221b) is preferably 1 μm to 15 μm, more preferably 2 μm to 10 μm, and even more preferably 3 μm to 5 μm. The infrared camera (221, 221a, 221b) monitors how the underfill material penetrates and fills the gap between the wiring substrate and the semiconductor element. By using the above wavelength range, when observing in transmission mode through a substrate with a complex structure in which semiconductor layers and wiring layers are formed, or in reflection mode on the surface in which they are arranged, it matches the transmission characteristics of the underfill material, making it possible to capture minute bubbles and observe with sufficient contrast. Specifically, the infrared irradiation device (219, 219a, 219b) preferably uses a blackbody furnace as its light source, and the temperature of the blackbody furnace is preferably between 50°C and 1000°C. As for the infrared camera (221, 221a, 2b), an InSb camera using InSb in the pixel section is preferred.

[0033] It is preferable for samples to be transported by a transport system equipped with an receiving sample holder and an underfilled sample holder, due to its high stability, low incidence of foreign matter defects, and high efficiency. In such a transport system, at a constant cycle time, the sample is placed from the receiving sample holder to the sample placement stage 214, the underfill material is filled, and then the sample placed on the sample placement stage 214 is transported to the underfilled sample holder.

[0034] <How to use a temporary underfill device> The operation of the temporary underfill device 3001 will be explained with reference to the flowchart in Figure 9. First, a sample consisting of a wiring board and semiconductor elements is prepared, and this sample is placed on the sample placement stage 214 (step S011 in Figure 9). Next, the wax that will serve as the underfill material is placed around the outer periphery of the sample (step S012). It is preferable to place blocks of wax, but wax that has been given appropriate fluidity with an appropriate amount of solvent may also be dropped. Here, the order of process S011 and process S012 may be reversed. Subsequently, the variable pressure chamber 211 is evacuated (step S013), and the sample placement stage 214 is heated to melt the wax (step S014). Here, the vacuum level can be, for example, 0.25 Torr. The heating temperature can be 185°C. This heating temperature is selected to be higher than any temperature encountered in subsequent steps, so as not to cause the wax to flow again in later steps, and also so as not to cause the components in the underfill material to volatilize and generate bubbles. Subsequently, a gas such as nitrogen gas is introduced into the variable pressure chamber 211 to place the sample under pressure (step S015). Here, the pressure can be, for example, 0.5 MPa. Subsequently, the sample placement stage 214 is lowered to room temperature (step S016), and the sample is removed from the variable pressure chamber 211 (step S017). Through the above process, it is possible to produce a sample that is free from cracks or other damage, and in which wax fills the gaps created in the bump electrode junctions between the wiring board and the semiconductor element without generating defects such as air bubbles. Although this example demonstrates the application of the temporary underfill device 3001 to temporary underfill, the temporary underfill device 3001 can be used not only for temporary underfill but also for conventional underfill.

[0035] (Embodiment 2) Embodiment 2 describes a semiconductor device structure and manufacturing method that prevents deterioration over time due to the influence of outside air, which is a concern with the structure in Embodiment 1 where the space near the bump electrode junction is a gap 43, and that does not break down and operates normally even when some force is applied in a direction that separates the semiconductor element side and the substrate wiring side.

[0036] The semiconductor device 1003 of Embodiment 2, as shown in Figure 14, is a semiconductor device in which electrode bumps 12 and 23 are arranged between a semiconductor substrate 11 and a semiconductor element 22, and the semiconductor substrate 11 and the semiconductor element 22 are at least electrically connected, characterized in that a sealing material 41 is provided on the outer periphery of the semiconductor element 22. This structure protects the bump junctions of the semiconductor device 1003 from the external environment, making them less susceptible to deterioration over time. Furthermore, the increased mechanical strength makes it more difficult for the semiconductor element 22 to peel off the semiconductor substrate 11, thus reducing damage and improving reliability. The void 43 is preferably in a vacuum or inert gas-filled state, but air sealing is also acceptable for lower cost. Figure 14 also shows the metamaterial structure 24 and wire 32 described in Embodiment 1 for reference.

[0037] The semiconductor device 1003 can be manufactured using a B-stage epoxy, which is a one-component epoxy in a semi-solid state, by the following method.

[0038] First, using the apparatus 3001 of the present invention, as shown in Figure 15(a), blocks 41a of B-stage epoxy are placed on the outer periphery of the semiconductor element 22, and a vacuum is applied. The air gap 43 becomes a vacuum. Here, it is preferable to place the B-stage epoxy discretely rather than evenly on the outer periphery. In this state, the sample is heated in the heating device 216 to a predetermined viscosity, causing the B-stage epoxy to fluidize. The B-stage epoxy wets and spreads along the outer circumference of the semiconductor element substrate and is automatically drawn into the gaps by capillary force. However, due to its viscosity, it does not penetrate too deeply and can be stopped after only a small amount of penetration. Using the apparatus 3001 of the present invention, this process can be performed while observing the process on the infrared camera 221 monitor (not shown). Next, by cooling without pressurizing while maintaining a vacuum, a semiconductor device is completed in which the vacuum is maintained by a sealing material 41 that surrounds the outer periphery made of B-stage epoxy, filling the gap 43.

[0039] Although the semiconductor elements forming the joint are extremely thin and fragile, this method makes it possible to protect the bump joint from the outside air while increasing its mechanical strength. Furthermore, by introducing a gas of the appropriate type and pressure (for example, an inert gas such as Ar or N2) into the chamber before heating, the void 43 can be changed to an optimal atmosphere. In addition to the method using B-stage epoxy, another method involves installing a liquid syringe inside the apparatus that can be moved by external operation, and dispensing a one-component epoxy under a vacuum environment.

[0040] (Embodiment 3) Embodiment 3 introduces an example of applying the semiconductor device shown in Embodiment 1 to an image sensor. Photoelectric conversion elements, including image sensors, are preferably back-illuminated with a thin semiconductor layer to avoid the adverse effects of light shielding by wiring, substrates, etc. From this viewpoint, the element structure of the present invention, which has a thin-film semiconductor element structure and in which the exposed side of the semiconductor element is the second main surface side (back side), is suitable for this application.

[0041] Furthermore, when the target wavelength of the sensor is infrared, particularly in the mid-infrared region between 2.5 μm and 25 μm, it is often used at low temperatures such as -200°C due to the signal-to-noise ratio. On the other hand, since the sensor undergoes heat treatment at temperatures such as 180°C during fabrication, it is necessary to create an element that is resistant to damage over a wide temperature range, does not compromise reliability, and maintains performance. From this perspective, conventional structures using resins such as epoxy resin, which have a coefficient of thermal expansion orders of magnitude larger than that of the semiconductor layer, have been problematic. In the structure fabricated using the temporary underfill technology of the present invention, at least the area near the bump junction is a void, and this area may be a vacuum. For this reason, the structure of the present invention is also suitable from the viewpoint of temperature adaptability, and it is possible to provide a semiconductor device that has fewer problems such as failure even in a temperature range of 4K to 400K.

[0042] Furthermore, the exposed surface of the semiconductor device is planarized and smoothed using methods such as CMP (Chemical Polishing). Therefore, it is also suitable for forming metamaterial structures that require fine pattern formation.

[0043] Figure 16 shows the structure of an example application of the semiconductor device 1004 of the present invention to a mid-infrared image sensor with a wavelength of 2.5 μm to 25 μm. Here, the semiconductor device 1004 consists of a wiring board (ROIC, readout circuit) 11, a circuit inside the wiring board 11a, an Au bump 12, a semiconductor element part 22, a GaAs semiconductor layer 22a, a pixel part bump 23a, a peripheral circuit part bump 23b, an antenna wiring for the metamaterial structure 24a, an electrode wiring for the metamaterial structure 24b, a peripheral circuit 24c, a quantum well layer 51 made of GaAs / AlGaAs, an insulator layer 52, a pixel area 61, a single pixel area 61a, a peripheral circuit area 62, a peripheral circuit formation area 62a, and a circuit protection area 62b. Details of the manufacturing method, etc., will be described in the examples. [Examples]

[0044] (Example 1) Example 1 reports on the results of applying the temporary underfill method using the apparatus of the present invention to the manufacturing of an image sensor for a metamaterial infrared camera, which requires delicate electrode bump bonding.

[0045] <Overview> First, let's outline Example 1. A silicon-based CMOS circuit was used for the readout circuit. The infrared detection material has a metamaterial structure in which GaAs / AlGaAs quantum wells are sandwiched between layers of Au. Here, the thickness of the semiconductor layer is only about 200 nm, so in conventional underfill methods where thermal stress is applied, a large difference in thermal contraction occurs between the electrode bumps and the underfill layer when cooled to -200°C during use, causing the semiconductor layer to rupture or the properties to change due to large stresses.

[0046] As the thermoplastic underfill material (wax), a wax based on commercially available electron wax was used. This temporary filling of the thermoplastic underfill material protected the electrode bumps and circuit surfaces at the joints from contamination and corrosion caused by polishing powder, chemicals, and gases during processes such as substrate polishing, chemical etching, resist coating, development, resist removal, dry etching, and cleaning in the lithography process. By using the apparatus of the present invention, it was possible to fill the space between the wiring substrate and the semiconductor element, where the bump joint is located, with this thermoplastic underfill material without generating gaps such as air bubbles.

[0047] By using the manufacturing apparatus of the present invention, the temporarily filled thermoplastic underfill material (wax) was dissolved with a suitable solvent, and then removed by replacing the solvent without applying surface tension. In this process, no wax remained, and a state was achieved in which the joint was hollow.

[0048] If surface protection is required, a vapor-depositable film can be deposited using atomic layer deposition or a parylene film. In general, infrared cameras are mounted in a vacuum chamber for cooling, so the surface can be left as is. Cooling to -200°C is required during imaging, but since the electrode bumps simply contract and there is no other material in contact with the semiconductor layer above them, no changes in the semiconductor layer's properties due to stress occurred.

[0049] <Manufacturing equipment for temporary underfill> The temporary underfill manufacturing apparatus used in Example 1 is a house-made prototype apparatus that conforms to the temporary underfill apparatus 3001 described in Embodiment 1, and consists of a variable pressure chamber 211, a variable pressure device 212, a pressure gauge 213, a sample placement stage 214 with an opening 215, a heating device 216, an upper infrared transmission window 217, a lower infrared transmission window 218, an infrared irradiation device 219, an infrared camera 221, and a control device 222. Here, the infrared irradiator 219 is a double-cone blackbody light source (BBZ-30W500, manufactured by Japan Sensor Co., Ltd.) used at a temperature of 500°C. It emits infrared light in the wavelength range of 1.4 to 18.5 μm. The infrared camera 221 is a cooled mid-infrared camera (A6751, manufactured by Teledyne FLIR) using an InSb pixel sensor, and is a sensor that has particularly excellent sensitivity to infrared light in the wavelength range of 3.0 to 5.0 μm. For reference, photographs of the apparatus are shown in Figures 10 to 13.

[0050] <Fabrication of semiconductor devices (image sensors)> 1. Quantum well fabrication process The photovoltaic quantum well infrared detector shown in Figure 17(a) was fabricated using a molecular beam epitaxy (MBE) system (COMPACT21T, RIBER). First, an n-type GaAs(100) substrate 22b was prepared, and the oxide film on its surface was removed by heating at 580°C. Then, a GaAs buffer layer for surface planarization was grown to a thickness of 300 nm using an MBE apparatus. After that, Al at x=0.90 x Ga1-x As sacrificial layer is 900 nm, Al x=0.55 x Ga 1-x An As sacrificial layer was formed to a thickness of 100 nm. The formation temperature at this time was 580°C. In Figure 17(a), both sacrificial layers are combined and represented as sacrificial layer 110. Subsequently, the multiple quantum well structure shown in Figure 18 and Table 1 was formed, with the layers stacked in the following order: a contact layer which becomes the electron recovery layer (109), a final barrier layer, ... the first well layer (103), the first barrier layer (102), and finally a contact layer which becomes the electron supply layer (101). The formation temperature for these layers and beyond was 530°C. Here, the multiple quantum well structure (51a in Figure 17(a)) functions like a conventional pn junction-based photodiode, acting as an electrical circuit that generates a photocurrent flowing in the thickness direction when infrared light is incident on it.

[0051] [Table 1]

[0052] 2. Pixel and electrode bump processing process for semiconductor devices To match the specifications of the wiring board to which it was bonded, the final image was divided into 332 horizontal and 268 vertical detection pixels, in addition to the 320 horizontal and 256 vertical detection pixels that make up the final image, by surrounding them with 6 ground pixels on each side. Each pixel is arranged in a square grid with a period of 30 μm.

[0053] The difference between ground pixels and detection pixels is that ground pixels penetrate the detection layer, and Al x Ga 1-x As forms through holes that reach the sacrificial layer, Al x Ga 1-xThe As sacrificial layer is exposed on the first main surface side. Therefore, the electrode bump formed on the detection pixel is electrically connected to the electron supply layer, while the electrode bump formed on the ground pixel is connected to the electron recovery layer side, forming a closed circuit that extends from the 320 horizontal and 256 vertical detection pixels to the ground pixels arranged on the outer periphery thereof. Further, the electrode bumps are formed in two layers in this example.

[0054] The first layer (lower-layer electrode bump) is also used as a mask for dry etching for pixel isolation. The dry etching for pixel isolation exposes the end face of the multiple quantum well structure. For this protection, a polyimide thin film is used in this example, and finally a second upper-layer electrode bump with a sufficient thickness is formed, which is to be bonded to the first electrode bump of the wiring substrate. The polyimide thin film is provided with an opening at the center of each pixel, through which the lower-layer electrode bump and the upper-layer electrode bump are electrically connected. Hereinafter, the pixel and electrode bump processing of the semiconductor element will be described by dividing it into five steps. Photolithography was used for patterning, except for the metal patch of the plasmon resonator.

[0055] 2.1 First Step The first step is forming the through-hole 25a of the ground pixel, as shown in FIG. 17(b). A photoresist was applied, a predetermined pattern was drawn and developed, and four 2 μm × 1 μm resist openings were formed at the center of the ground pixel. Using these openings as a mask, inductively coupled plasma etching with argon gas was performed to penetrate the multiple quantum well structure (total thickness 164 nm) and reach the Al x Ga 1-x As sacrificial layer, forming a through-hole with a depth of 250 nm. All subsequent steps are common to the detection pixels and the ground pixels.

[0056] 2.2 Second Step The second step is the formation of the lower electrode bumps (see Figure 17(c)). Photoresist is applied, a predetermined pattern is drawn, and the image is developed to form a 27 μm square resist opening in the center of each pixel. A 3 nm thick layer of Ti and a 150 nm thick layer of Au are deposited on top of this, and by lift-off, 332 horizontal and 268 vertical 27 μm square lower electrode bumps 24' are arranged. For the detection pixels, these lower electrode bumps 24' also serve as one of the metal layers of the plasmon resonator. For the ground pixels, this metal layer penetrates deep into the previously formed through-holes and is exposed on the surface when the semiconductor device is later thinned, becoming the through-electrode 25'.

[0057] 2.3 Third Process The third step is dry etching for pixel separation (see Figure 17(d)). The lower electrode bumps formed in the previous step are used as a mask, and dry etching is performed to a depth of 90 nm using inductively coupled plasma etching with a chlorine-nitrogen mixed gas. This depth extends from the electron supply layer beyond the second well layer to the layers beyond the third barrier layer. Since this multiple quantum well 51' is conductive in the in-plane direction in the Si-doped first well layer, each pixel can be electrically separated by drilling to a depth beyond this.

[0058] 2.4 Fourth process The fourth step is the formation of a polyimide protective film 52 to protect the sides of the multiple quantum well structure exposed by the dry etching in the previous step (see Figure 17(e)). The polyimide raw material was spin-coated over the entire substrate and cured by a predetermined baking process. A photoresist was applied on top of this, a predetermined pattern was drawn and developed to form a 19 μm square resist opening in the center of each pixel. From there, the polyimide was removed by plasma etching with oxygen gas to expose the surface of the lower electrode bump. Finally, the photoresist was removed.

[0059] 2.5 Fifth Step The fifth step is the formation of the upper electrode bumps (see Figure 17(f)). A photoresist was applied, a predetermined pattern was drawn, and the surface was developed to form a 23 μm square resist opening in the center of each pixel. On top of this, a 10 nm thick Ti film and a 250 nm thick Au film were deposited by sputtering, and 23 μm square upper electrode bumps (electrode bumps 23) were formed by lift-off. At this time, marks corresponding to the alignment marks patterned on the wiring substrate were formed at the four corners. As a result, the first main surface of the semiconductor device had 332 horizontally and 268 vertically arranged 25 μm square upper electrode bumps with a 30 μm period, the remaining area was covered with a polyimide protective film, and alignment marks to be used in the subsequent alignment bonding were drawn at the four corners.

[0060] The resulting semiconductor device substrate is cut into a rectangular shape slightly larger than all the pixels, and slightly smaller than a wiring substrate with bonding pads for wiring around its outer edge. Furthermore, the second main surface of this semiconductor device has a uniformly exposed GaAs substrate.

[0061] 3. Pixel and electrode bump processing process for wiring boards Here, electrical wiring and the first electrode bump were fabricated on the first main surface side of a wiring board having a first electrode bump. The wiring board used in this embodiment is the FLIR ISC9705 readout integrated circuit. This is a dedicated wiring board for fabricating image sensors, and it is an integrated circuit formed by a CMOS process in which 320 horizontally and 256 vertically detection pixels, and 6 ground pixels surrounding their outer periphery, for a total of 332 horizontally and 268 vertically, are arranged in a square grid with a period of 30 μm (see Figure 19(a)). Thirty-seven bonding pads are formed on the outer circumference, and by applying a predetermined voltage to a predetermined pad or inputting a voltage waveform, an image signal voltage waveform is generated at a predetermined pad. Solid-phase diffusion bonding was performed using gold (Au) as the electrode bump material.

[0062] First, an underbump metal layer 72, which serves as the base for the three-dimensional bumps, was formed on each pixel (see Figure 19(b)). To form the material, first, a 50 nm thick Ti layer and a 100 nm thick Au layer were sequentially deposited on the entire substrate using a sputtering method. A photoresist was then applied on top of this, a predetermined pattern was drawn, and the material was developed to form a 20 μm square resist pattern in the center of each pixel. Subsequently, the Au and Ti layers were removed by dry etching, and then the resist pattern was removed.

[0063] Next, electrode bumps 12 made of Au were formed on the underbump metal layer 72 (see Figure 19(c)). First, a photoresist was applied to the entire substrate surface, a predetermined pattern was drawn, and the image was developed to form openings defining the electrode bumps on the underbump metal of each pixel. The shape of the electrode bumps varies depending on the required positioning accuracy and electrical characteristics, and is not fixed. For example, multiple circular patterns may be arranged to fill the square-shaped undermetal bumps, or a single pattern of a specific shape may be formed. On top of this, Au of a thickness corresponding to the pattern was deposited mainly by sputtering, and electrode bumps with a height of 1 to 2.5 μm were formed by lift-off. These bumps are designed to collapse under load during bonding, and after bonding, their thickness becomes 0.1 to 0.5 μm. Furthermore, the second main surface of this wiring board has a uniformly exposed Si substrate.

[0064] 4. Electrode bump bonding process Next, the wiring board and semiconductor element were joined using an alignment bonding device that could align and contact the two substrates, and then pressurize and heat them (see Figure 20(a)). The wiring board and semiconductor element were held in the alignment bonding device so that their first main surfaces faced each other, and the alignment marks drawn on the four corners of both were aligned so that they overlapped complementaryly and the gap between them was not visible. Then, they were pressurized and heated under atmospheric pressure. The pressurizing load depended on the shape of the electrode bumps, but for example, a load was set such that each part was pressed at a pressure of 5 MPa. The temperature was 200 to 250°C. Under these conditions, the Au surfaces were joined by solid-phase diffusion bonding. In this way, 332 horizontally and 268 vertically the first electrode bumps of the wiring board and the second electrode bumps of the semiconductor element were joined.

[0065] Here, the semiconductor element is cut slightly larger than all the pixels, but the wiring board has bonding pads even further around the outer edge of all the pixels and is cut outside of that, so the wiring board is larger, and the assembled body is such that the smaller semiconductor element is mounted on the larger wiring board with its second main surface exposed and margins on all four sides.

[0066] 5. Filling process for the filler material The core filler material 31 of this patent is Apiezon Wax W from M&I Materials. This material has long been known as a wax for electronic applications, can be easily applied by raising the temperature, and can protect important components and interfaces from various chemicals and solvents. Furthermore, this material can be easily removed with common solvents such as chloroform. In this embodiment, a solvent was added to make it easier to handle in the filling process. This was cut into an appropriate shape and placed along the four sides of the semiconductor element on the wiring board, so that when heated, it would flow into the gap where the electrode bumps were joined.

[0067] This sample was placed on the sample placement stage 214 of the temporary underfill process apparatus 3001 of the present invention and vacuumed. As a result, the gap 43 where the electrode bumps were joined became a vacuum, and no bubbles were generated even when the fluid was filled from the outer periphery. In this state, the sample was heated to 185°C to melt the wax. As a result, the wax spread and wetted along the outer edge of the semiconductor device substrate, and the void 43 became a vacuum inside, completely surrounded by the molten wax. Although the wax was melted, it was not very fluid. Therefore, even if capillary action was at play, it hardly penetrated the void 43.

[0068] Next, the valve of the sealed container 211 of the apparatus 3001 was opened, and nitrogen gas pressurized to 0.5 MPa was introduced. As a result, the wax, which would not enter spontaneously, was forced into the gap by the pressure from the outer periphery. Since the inside was under vacuum, when the pressurization was complete, there were no air bubbles, and the gap was completely filled with wax. This sample was cooled to room temperature to obtain a bonded sample of a wiring substrate and a semiconductor element, where the bonded components were joined and the void 43 was filled with filler material (see Figure 20(b)).

[0069] 6. Thin-film deposition process for semiconductor devices Next, the semiconductor device was mechanically polished until its thickness was approximately 100 μm. Then, using a solution of 1 g / ml citric acid aqueous solution and hydrogen peroxide solution mixed in a 10:1 ratio, the GaAs and buffer layer were selectively removed at 38°C, exposing the sacrificial layer made of AlGaAs. Subsequently, the sacrificial layer consisting of AlGaAs was selectively removed with an aqueous hydrofluoric acid solution (see Figure 20(c)).

[0070] 7. Circuit formation process on the second main surface side of the semiconductor device Two types of microfabrication were applied to the second main surface of the exposed semiconductor device (see Figure 20(d)). The first microfabrication step is the formation of a plasmon resonator. The quantum wells shown in Figure 18 and Table 1 are based on intersubband transitions, which require an electric field component perpendicular to the substrate. Therefore, they alone are not sensitive to light incident perpendicular to the substrate (where the electric field is parallel to the substrate). While it is possible to achieve some sensitivity with oblique incidence, it is very small. However, when this photovoltaic quantum well infrared detector is combined with a plasmon resonator, it is possible to achieve a sensitivity nearly 1000 times greater than that of the oblique incidence method.

[0071] The second type of microfabrication is electrode wiring. A metal pattern was formed to cover the vertical and horizontal regions of each pixel, with a width of 8 μm, excluding the central 22 μm area which serves as the detection area. Furthermore, a metal pattern was formed to cover all or part of the outermost 6-pixel width ground electrode area, so that all of these are connected as a pattern. This entire area becomes equipotential and acts as the ground electrode 24b. In the ground pixels, the lower electrode pad is exposed to the surface through a through hole. Since a metal pattern was formed on top of this, the ground electrode is connected to the ground pixel of the wiring board, forming a closed circuit.

[0072] 8. Dissolution process of the filler Re-poration was performed by dissolving the filler material 31 from the wiring substrate to which the thinned semiconductor elements were bump-bonded, thereby forming voids 43 (see Figure 20(e)). For elution, chloroform, which readily dissolves the wax used, was used as the solvent, and the temperature was raised to its boiling point to ensure elution even in narrow voids. To achieve this, a separable flask containing chloroform was placed on a hot plate, and a Graham condenser was connected to it, allowing for prolonged heating without losing the chloroform through evaporation. The circuit board was mounted in a dedicated jig and held vertically, completely immersed in the chloroform in the separable flask. When the hot plate was set to 100°C, the chloroform solution temperature was maintained at its boiling point of 61.2°C. This state was maintained for 1 to 2 hours to dissolve the filler material 31 that filled the space between the first main surface of the semiconductor element and the first main surface of the wiring circuit. The wiring board was held vertically during this process because the convection of the liquid in the vertical direction efficiently cleaned the inside of the void. As the chloroform solution gradually became contaminated with the dissolved filler material, the chloroform solution was replaced multiple times as needed to prevent any filler material from remaining, and finally, the chloroform was completely removed.

[0073] 9. Implementation Process Finally, the second main surface of the wiring board, on which the thin-film semiconductor elements were bump-bonded with air gaps, was mounted onto a 28-pin ceramic package using conductive epoxy, and the bonding pads located on the outer periphery of the first main surface of the wiring board and the bonding pads on the ceramic package were wire-bonded with Au wire. Through the above process, a semiconductor device 1005, which is a semiconductor image sensor sensitive to mid-infrared light, was fabricated (see Figure 20(f)).

[0074] <Evaluation of image sensor characteristics> The current density and voltage characteristics of the fabricated semiconductor device at 77K were measured using a source meter. The results are shown in Figure 21. The characteristics of an infrared detector's current are important in two states: the dark state and the background light state. The dark state is when no radiation is incident on the photodetector and represents the noise characteristics of the infrared detector. In this measurement, the dark state was achieved by covering the front of the photodetector with a 29K cold shield coated with blackbody paint. The background light state is when 300K radiation is incident on the detector and represents the sensitivity of the infrared detector.

[0075] The readout integrated circuit ISC9705 used in this embodiment is equipped with four TEST pixels for evaluating the element characteristics as an infrared detector, in addition to the detection pixels that make up the image. Dedicated wiring is connected to the TEST pixels, and current-voltage characteristics and sensitivity spectra can be measured in the same way as a normal single detector. The circles and crosses in Figure 21 represent the dark state current density and background light state current density, respectively, for one of these TEST pixels.

[0076] Figure 21 also shows the characteristics of a single detector with identical specifications. This single detector is not a readout integrated circuit, but is fabricated by solid-state diffusion bonding of semiconductor elements to a simple Au substrate, similarly thinning it, and then wire bonding it. In Figure 21, the dark state current density and background light state current density of the single detector are shown as ● and +, respectively. However, ● and ○ almost overlap, and + and × almost overlap, making them indistinguishable.

[0077] This indicates that, by the method described in this patent, one pixel of an infrared camera (image sensor) in which the detector is bump-bonded to a wiring board and the filler material 31 is removed to form an air gap 43 in the electrode bump portion has the same characteristics as a single infrared detector bonded seamlessly to an Au plate. Semiconductor devices are sensitive to defects and distortions, and these effects are particularly evident in noise, i.e., dark-state current. However, because ○ and ● precisely overlap, the infrared camera fabricated by bonding to the wiring board 11 using the method shown in this patent shows no degradation whatsoever from the noise characteristics of the original single detector. Furthermore, because × and + precisely overlap, the sensitivity characteristics also show no degradation whatsoever. The results above demonstrate that the manufacturing method using the manufacturing apparatus of this patent allows for the bonding of semiconductor elements without defects or distortion.

[0078] This infrared camera has a sensitivity peak at a wavelength of 6.4 μm and was designed to visualize H2O gas (water vapor, gaseous water). Figure 22 shows the sensitivity spectrum of a single detector (○) and the absorption spectrum of H2O gas (line). The two overlap across the entire spectrum. Therefore, the camera fabricated with this detector can dynamically visualize the absorption and emission of H2O gas as an image. The sensitivity shown in Figure 22 is the zero-bias sensitivity, where no bias voltage is applied to the detector. The readout integrated circuit ISC9705 used in this embodiment has a function to apply a bias voltage to the detection pixel. When an appropriate bias voltage is applied to the detector used, the sensitivity increases several times while the sensitivity spectrum remains almost unchanged. Therefore, by applying an appropriate bias voltage, it is possible to visualize the flow of H2O gas with several times higher sensitivity.

[0079] Figures 23 and 24 are examples of actual images taken using this infrared camera. Figure 23 shows a human hand and water vapor emitted from a heated humidifier against a wall at room temperature. This camera is basically the same as a thermograph and can visualize infrared light emitted from an object. However, as shown in Figure 22, it differs in that it has a narrow sensitivity spectrum and visualizes only infrared light of a specific wavelength from the broad spectrum of infrared light emitted from an object. Figure 23(a) shows that the outlet of the heated humidifier is bright due to its high temperature, indicating that H2O gas is being released from it. The gas is brighter than the hand in the background, indicating that the H2O gas is hotter than human body temperature. Figure 23(b) shows the same image with the brightness adjusted so that the human hand is clearly visible. Figure 24 shows a human face photographed against a blackbody plane light source at 55°C. Figure 24(a) shows a person wearing glasses with their mouth open. Figure 24(b) is the same image displayed with adjusted brightness, where the H2O gas contained in the exhaled breath is visualized as a black cloud. As described above, we bonded the detector to the circuit board and fabricated an infrared camera that retained its original performance, successfully visualizing H2O gas as intended.

[0080] (Example 2) <Sample preparation and its structure> In Example 1, a semiconductor device was fabricated in which a semiconductor element 22 with infrared sensors arranged in a matrix and a wiring board 11 were electrically connected via bump bonding using the temporary underfill method, and the characteristics of one infrared sensor mounted thereon were evaluated. In Example 2, the variation in the electrical characteristics of multiple pixels of infrared sensors mounted on a total of three semiconductor devices manufactured in accordance with Example 1 was investigated. As a comparative example, the electrical characteristics of multiple infrared sensor pixels mounted on one semiconductor device fabricated by changing the temporary underfill method to the epoxy underfill method, which is a commonly used conventional method, were investigated. The only manufacturing difference between the semiconductor device of Example 2 and the semiconductor device of the Comparative Example is the underfill process described above. The difference in the manufactured semiconductor devices is shown in Figures 25 and 27: in the semiconductor device of Example 2, there is a gap 43 between the bump electrodes, while in the Comparative Example, it is filled with a filler 31 made of epoxy resin, which is a high-temperature curing polymer. The shape of the electrode bumps 12 is annular, as shown in Figure 26, and the epoxy resin used in the Comparative Example was type 314 (manufactured by Epoxy Technology). As shown in Figure 27, in Example 2, the combination of the temporary underfill method and the annular cavity bump allows for the flexible holding of an ultrathin infrared sensor (ultrathin semiconductor detector) with a thickness of 200 nm or less, achieving a low-distortion state.

[0081] <Characteristic Evaluation> Figure 28(a) shows the sensitivity-noise characteristics of individual pixels when a 320×256 pixel camera is created using the semiconductor device of Example 2 to which the temporary underfill method was applied. In this figure, the dark current density of a single detector is shown as a line, and the dark current densities of all 12 TEST pixels from the three semiconductor devices fabricated using the temporary underfill method are all shown as ●. The data from all 12 TEST pixels overlapped and could not be distinguished. Based on the characteristics of the individual infrared sensor before it was made into a camera corresponding to just one pixel, no change in sensitivity or noise was observed. In particular, dark current is sensitive to defects and strain in the semiconductor crystal, so the fact that it did not change means that the semiconductor device has an ideal bump junction without defects or strain. On the other hand, in the case of cameras implemented using the conventional epoxy underfill method, as shown in Figure 28(b), two of the four samples showed semiconductor crystal damage and short circuits, and the remaining two showed dark currents higher than those of a single infrared sensor, suggesting the occurrence of crystal defects or strain. Here, in Figure 28(b), the dark current density of a single detector is shown as ●, and the dark current densities of the four TEST pixels of one semiconductor device fabricated by the epoxy underfill method are shown as ○△□×. Of these, the values ​​for two were too large, so they were multiplied by 0.01 to fit on the same graph.

[0082] As described above, the application of the temporary underfill method maintained the characteristics of the individual infrared sensors before implementation in the camera without exception for all 12 evaluations, and uniform characteristics were obtained. However, with the conventional method, the characteristics deteriorated in all 4 out of 4 sensors, and 2 of them were unusable as pixels. Therefore, through Example 2, it was demonstrated that the temporary underfill method is an ideal implementation technique that does not cause camera sensitivity degradation or noise increase. [Industrial applicability]

[0083] By using the manufacturing apparatus of the present invention, it becomes possible to manufacture and supply semiconductor devices using wiring boards that have high yield due to suppression of crack defects during manufacturing, and excellent long-term stability during use, particularly due to significantly suppression of breakdown caused by temperature changes. This characteristic is particularly suitable for infrared image sensors, which experience drastic temperature changes from manufacturing to the operating environment. Furthermore, by using the manufacturing apparatus of the present invention, it becomes possible to manufacture and supply metamaterial structure quantum well type photodetectors that have excellent signal-to-noise ratio and high detection sensitivity through a thin-film semiconductor layer with low light loss. Such photodetectors have a wide range of applications, including sensors and cameras for civilian, industrial, and military use. Therefore, we believe that this invention will have a significant social impact and a major influence on industry. [Explanation of Symbols]

[0084] 11: Wiring board 11a: Circuits within the wiring board 12: Electrode bump, first electrode bump, Au bump 19: 1st main surface 21: Semiconductor device substrate, substrate 22: Semiconductor devices, thin-film semiconductor devices, semiconductor device parts 22α: Semiconductor device sample 22a: Semiconductor layer, GaAs 23: Electrode bump, second electrode bump, Au bump 23a: Pixel bump, Au 23b: Peripheral circuit bump, Au 24: Metamaterial Structure 24α: Lower electrode bump 24a: Antenna wiring for metamaterial structures 24b: Electrode wiring and ground wiring for metamaterial structures 24c: Peripheral Circuits 25α: Through electrode 25a: Through hole 29: 1st main surface 31: Filling material 32: Wire 41: Sealant 41a: B-stage epoxy block 43:Void 51: Quantum well layer 51': Multiple quantum wells 51α: Quantum well layer 51a: Quantum well layer 52: Insulating layer, polyimide protective film 61: Pixel area 61a: Single pixel area 62: Peripheral Circuit Area 62a: Peripheral circuit formation region 62b: Circuit protection area 63:1 pixel area 71a: Pixel electrode 71b: Pixel electrode 72: Underbump Metal Layer 101: Electron supply layer, contact layer 102: The first barrier layer 103: The first well layer 104: The second barrier layer 105: Second well layer 106: The third barrier layer 107: The third well layer 108: The 7th Barrier Layer 109: Electron recovery layer, contact layer 110: Sacrificial Layer 112: Electrode bump 121: Circuit board 122: Semiconductor elements 124: Circuit 131: Filling material 211: Pressure-variable chamber, sealed container 212: Variable pressure device (pump) 213: Pressure gauge 214: Sample placement stage 215: Opening 216:Heating equipment 217: Infrared-transmitting window, upper infrared-transmitting window 218: Infrared-transmitting window, lower infrared-transmitting window 219: Infrared irradiation device 219a: Downward infrared irradiation device 219b: Upper infrared irradiation device 220: Infrared 221: Infrared camera 221a: Downward-facing infrared camera 221b: Upward-facing infrared camera 222: Control device 1001: Semiconductor Device 1002: Semiconductor device 1003: Semiconductor device 1004: Semiconductor device for infrared imaging 1005: Semiconductor device 2001: (Conventional) Semiconductor Device 3001: Temporary underfill device (underfill wax filling device) 3002: Temporary underfill device (underfill wax filling device)

Claims

1. A pressure-variable chamber that allows the pressure inside the chamber to be controlled and varied, A sample mounting stage for a manufactured wiring board semiconductor device is provided, which holds the sample at its peripheral or side portion, and has openings or infrared-transmitting windows positioned at locations corresponding to areas where underfill should be formed. A heating device capable of heating the aforementioned sample placement stage, The variable pressure chamber is provided with infrared-transmitting windows at both the top and bottom, An infrared irradiation device positioned above and below the outside of the infrared-transmitting window, The infrared radiation emitted from the infrared irradiation device is capable of imaging the sample placed on the sample placement stage in at least one of transmission mode and reflection mode, via infrared transmission windows provided in the upper and lower parts, respectively, and openings or infrared transmission windows provided in the sample placement stage, as needed, and an infrared camera is positioned above and below the outside of the infrared transmission windows provided in both the upper and lower parts of the pressure variable chamber, A semiconductor manufacturing apparatus comprising at least a control system that controls a series of processes including the pressure in the variable pressure chamber, the temperature of the heating equipment, the irradiation of the sample with infrared rays by the infrared irradiation device, and imaging of the sample irradiated with infrared rays by the infrared camera.

2. The apparatus according to claim 1, further comprising an underfill material supply device capable of supplying underfill material to the outer periphery of the sample placed on the aforementioned placement stage.

3. Furthermore, the apparatus according to claim 1 or 2 is further equipped with a cooling device capable of cooling the sample placed on the aforementioned stage.

4. The apparatus according to any one of claims 1 to 3, wherein the variable pressure range in the chamber is from vacuum to 0.5 MPa.

5. The apparatus according to any one of claims 1 to 4, wherein the temperature control range by the heating equipment is 20°C or more and 300°C or less.

6. The apparatus according to any one of claims 1 to 5, wherein the infrared irradiation device is an apparatus using a blackbody furnace.

7. The apparatus according to claim 6, wherein the temperature of the blackbody furnace is 50°C or more and 1000°C or less.

8. The apparatus according to any one of claims 1 to 7, wherein the infrared camera is an InSb camera using InSb in the pixel portion.

9. Furthermore, it is equipped with a receiving sample holder, an underfilled sample holder, and a transport system. The apparatus according to any one of claims 1 to 8, wherein the transport equipment places the sample from the receiving sample holder onto the sample placement stage, and transports the sample placed on the sample placement stage to the underfilled sample holder.

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