Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device that can suppress temperature rise. [Solution] The electro-optical device 300 comprises a transistor 1, a pixel electrode 10 provided on the light incident side of the transistor 1, and a conductive layer 23 having a conductive film 23a made of a light-reflective material and a conductive film 23b made of a material with lower light reflectivity than the conductive film 23a and provided on the transistor 1 side of the conductive film 23a. The conductive layer 23 has a main body portion 233 having an overhang portion 233p that extends out to the corner of the aperture region T of the pixel P, an extended portion 231, and an extended portion 232. At least in the overhang portion 233p, the conductive film 23a has an aperture H, and the conductive film 23b of the conductive layer 23 is electrically connected to the pixel electrode 10 via a contact hole 21 provided on the inside of the aperture H of the conductive film 23a in a plan view, at a position spaced apart from the edge of the aperture H.

Description

Technical Field

[0001] The present invention relates to an electro-optical device and an electronic apparatus provided with the electro-optical device.

Background Art

[0002] As a conventional electro-optical device, for example, the one described in Patent Document 1 is known. Patent Document 1 describes a liquid crystal panel including a capacitive element connected directly below a pixel electrode via a pixel contact hole.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the electro-optical device described in Patent Document 1, the capacitive electrode constituting the capacitive element is formed of titanium nitride. Since titanium nitride has a low reflectance, most of the light incident on the capacitive electrode is absorbed without being reflected, which causes a rise in the temperature of the liquid crystal panel.

Means for Solving the Problems

[0005] An electro-optical apparatus according to one aspect of the present application comprises a transistor, a pixel electrode provided on the light incident side of the transistor, and a first conductive layer having a first film made of a light-reflective material and a second film made of a material with lower light reflectivity than the first film and provided on the transistor side of the first film, wherein the first conductive layer has a main body portion having an overhang portion that extends out to the corner of the aperture region of the pixel, a first extending portion extending from the main body portion in a first direction, and a second extending portion extending from the main body portion in a second direction intersecting the first direction, wherein the first film of the first conductive layer has an opening in at least the overhang portion of the main body portion of the first conductive layer, and the second film of the first conductive layer is electrically connected to the pixel electrode via a contact hole provided on the inside of the opening of the first film in a plan view, at a position spaced apart from the edge of the opening.

[0006] An electronic device according to one aspect of the present application comprises the electro-optical device described above. [Brief explanation of the drawing]

[0007] [Figure 1] A plan view of the electro-optical apparatus according to Embodiment 1. [Figure 2] Cross-sectional view of the electro-optical apparatus along line II-II in Figure 1. [Figure 3] An equivalent circuit diagram showing the electrical configuration of the element substrate. [Figure 4] A schematic diagram illustrating the cross-sectional structure and connection relationships of the display area on the element substrate. [Figure 5] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 6] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 7] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 8] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 9] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 10]An explanatory diagram showing a planar structure of a display region of an element substrate. [Figure 11] An explanatory diagram showing a planar structure of a display region of an element substrate. [Figure 12] A cross-sectional view taken along line A-A in Figure 11. [Figure 13] A cross-sectional view taken along line B-B in Figure 11. [Figure 14] A flowchart showing manufacturing processes of a capacitive element and a pixel contact. [Figure 15] A cross-sectional view showing one aspect of a manufacturing process. [Figure 16] A cross-sectional view showing one aspect of a manufacturing process. [Figure 17] A cross-sectional view showing one aspect of a manufacturing process. [Figure 18] A cross-sectional view showing one aspect of a manufacturing process. [Figure 19] A cross-sectional view showing one aspect of a manufacturing process. [Figure 20] A plan view showing one aspect of a manufacturing process. [Figure 21] A schematic diagram showing an example of an electronic apparatus according to Embodiment 2. [Description of Embodiments]

[0008] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that in each of the following drawings, the scale of dimensions may be varied for different constituent elements to make the constituent elements easy to view. Further, in the following description, for convenience of explanation, mutually orthogonal X-axis, Y-axis, and Z-axis are used as appropriate. One direction along the X-axis is referred to as X1 direction, and the direction opposite to the X1 direction is referred to as X2 direction. Similarly, one direction along the Y-axis is referred to as Y1 direction, and the direction opposite to the Y1 direction is referred to as Y2 direction. One direction along the Z-axis is referred to as Z1 direction, and the direction opposite to the Z1 direction is referred to as Z2 direction. In the following, viewing in the Z1 direction or the Z2 direction is defined as "plan view", and viewing from a direction perpendicular to a cross section including the Z-axis is defined as "cross-sectional view".

[0009] Furthermore, in the following description, for a substrate, the recitation "on the substrate" shall refer to any of the cases where an element is disposed in direct contact with the substrate, disposed above the substrate via another structure, or partially disposed in direct contact with the substrate and partially disposed above the substrate via another structure. Further, for example, the recitation "upper surface of the substrate" relative to the substrate shall refer to the surface on the Z1 direction side of the substrate, and the recitation "lower surface of the substrate" shall refer to the surface on the Z2 direction side of the substrate.

[0010] 1. Embodiment 1 In the present embodiment, an example of a liquid crystal device 300 will be described as an electro-optical device. The liquid crystal device 300 (see FIG. 1) is an active-drive transmissive liquid crystal device including a TFT (Thin Film Transistor) as the transistor 1 (see FIG. 4) for each pixel P. This liquid crystal device 300 is used, for example, as a light modulation device in a later-described projection display apparatus 1000 (see FIG. 21). In the present embodiment, the projection display apparatus 1000 is an example of an electronic apparatus.

[0011] 1.1. Outline of Structure of Liquid Crystal Device 300 The structure of the liquid crystal device 300 according to the present embodiment will be described with reference to FIG. 1 and FIG. 2. FIG. 1 shows a plan view of the liquid crystal device 300. FIG. 2 shows a schematic cross-sectional configuration of the liquid crystal device 300 taken along line II-II in FIG. 1.

[0012] As shown in FIG. 1 and FIG. 2, the liquid crystal device 300 includes a light-transmissive element substrate 100, a light-transmissive opposing substrate 200, a seal member 8 provided in a frame shape, and a liquid crystal layer Lc. The term "light-transmissive" means transparency to visible light, and preferably refers to a visible light transmittance of 50% or more.

[0013] The liquid crystal device 300 has a display region A1 for displaying an image, and a peripheral region A2 located at the outer periphery of the display region A2 in a plan view. Display area A1 is provided with multiple pixels P arranged in a matrix. Although the shape of the liquid crystal device 300 and display area A1 shown in Figure 1 is rectangular, other shapes, such as a circle, may also be used.

[0014] As shown in Figure 2, the element substrate 100 and the opposing substrate 200 are arranged with a liquid crystal layer Lc in between. In this embodiment, a counter substrate 200 is placed on the light incidence side of the liquid crystal layer Lc, and an element substrate 100 is placed on the light emission side of the liquid crystal layer Lc. The incident light IL incident on the counter substrate 200 is modulated by the liquid crystal layer Lc and emitted from the element substrate 100 as modulated light ML.

[0015] The element substrate 100 has a base body 90, multiple interlayer insulating layers including an interlayer insulating layer 82, a pixel electrode 10, and an alignment film 12. Between the multiple interlayer insulating layers, a transistor 1 (see Figure 4), a relay layer, or a conductive layer is arranged. The pixel electrode 10 is provided on the light incident side of the transistor 1. The substrate 90 is a translucent and insulating flat plate. The substrate 90 is, for example, a glass substrate or a quartz substrate.

[0016] The pixel electrode 10 is translucent. The pixel electrode 10 is formed from ITO (Indium Tin Oxide). Alternatively, the pixel electrode 10 may be formed from transparent conductive materials such as IZO (Indium Zinc Oxide) and FTO (Fluorine-doped tin oxide).

[0017] The alignment film 12 is transparent and insulating. The alignment film 12 aligns the liquid crystal molecules of the liquid crystal layer Lc. Examples of materials for the alignment film 12 include silicon oxide (SiO2) or polyimide.

[0018] The opposing substrate 200 has a base 210, an insulating layer 220, a common electrode 230, and an alignment film 240. The substrate 210 is a translucent and insulating flat plate. The substrate 210 is, for example, a glass substrate or a quartz substrate. The insulating layer 220 is transparent and insulating. The material of the insulating layer 220 is an inorganic material such as silicon oxide.

[0019] The common electrode 230 is an electrode positioned opposite to multiple pixel electrodes 10, and can be referred to as a counter electrode. The common electrode 230 is formed from a transparent conductive material such as ITO, IZO, or FTO. The common electrode 230 and the pixel electrodes 10 apply an electric field to the liquid crystal layer Lc. The alignment film 240 is transparent and insulating.

[0020] The sealing member 8 is placed between the element substrate 100 and the opposing substrate 200. The sealing member 8 is formed using an adhesive containing various curable resins, such as epoxy resin. The sealing member 8 may also include a gap material made of an inorganic material such as glass.

[0021] The liquid crystal layer Lc is located within a region enclosed by the element substrate 100, the opposing substrate 200, and the sealing member 8. The liquid crystal layer Lc is an electro-optic layer whose optical properties change in response to the electric field generated by the pixel electrode 10 and the common electrode 230. The liquid crystal layer Lc contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to the electric field applied to the liquid crystal layer Lc. The liquid crystal layer Lc modulates the incident light IL in response to the applied electric field.

[0022] As shown in Figure 1, multiple scan line drive circuits 6, data line drive circuits 7, and external terminals 9 are arranged in the peripheral region A2 of the element substrate 100. External terminal 9 is a mounting terminal on which external connection lines, such as FPC (Flexible Printed Circuits) (not shown), are mounted. Various signals, such as image signals, synchronization signals, inspection signals, common potential, and power supply potential, are supplied to external terminal 9 via the external connection lines.

[0023] 1.2. Electrical configuration of the element substrate 100 Figure 3 is an equivalent circuit diagram showing the electrical configuration of the element substrate 100. As shown in Figure 3, the display area A1 of the element substrate 100 is provided with multiple transistors 1, n scan lines 3, m data lines 4, m capacitance lines 5, pixel electrodes 10, and capacitance elements 2. n and m are integers of 2 or greater.

[0024] Transistor 1 is provided corresponding to each intersection of the n scan lines 3 and the m data lines 4. The pixel electrode 10 is electrically connected to the drain region of transistor 1. Each of the n scan lines 3 extends in the X1 direction, and the n scan lines 3 are arranged at equal intervals in the Y1 direction. Each of the n scan lines 3 is electrically connected to the gate electrode of the corresponding transistor 1. The n scan lines 3 are electrically connected to the scan line driving circuit 6 shown in Figure 1. The scan line drive circuit 6 supplies scan signals G1, G2, ..., and Gn to 1 to n scan lines 3 in line-by-line sequence.

[0025] Each of the m data lines 4 extends in the Y1 direction, and the m data lines 4 are arranged at equal intervals in the X1 direction. Each of the m data lines 4 is electrically connected to the source region of the corresponding set of transistors 1. The m data lines 4 are electrically connected to the data line drive circuit 7 shown in Figure 1. The data line drive circuit 7 supplies image signals E1, E2, ..., and Em to 1 to m data lines 4.

[0026] The n scan lines 3 and m data lines 4 are electrically insulated from each other and are arranged in a grid pattern in a planar view. The region enclosed by two adjacent scan lines 3 and two adjacent data lines 4 corresponds to a pixel P.

[0027] Each of the m capacitance lines 5 extends in the Y1 direction, and the m capacitance lines 5 are arranged at equal intervals in the X1 direction. The capacitance lines 5 are electrically insulated from the data lines 4 and scan lines 3, and are spaced apart from them. A fixed potential, such as a common potential or ground potential, is supplied to the capacitance lines 5 via the external terminal 9.

[0028] One electrode of the capacitive element 2 is electrically connected to the capacitance wire 5. The other electrode of the capacitive element 2 is electrically connected to the pixel electrode 10 and holds the potential of the image signal E1 and the like supplied to the pixel electrode 10.

[0029] 1.3. Cross-sectional structure and planar structure of the display area A1 of the element substrate 100 Figure 4 is a schematic explanatory diagram showing the cross-sectional structure and connection relationships of the display area A1 of the element substrate 100, and is a cross-sectional view showing the stacking relationship and electrical connection relationships of each layer. Figures 5 to 11 are plan views showing the planar structure of the main layers. Figure 12 is a cross-sectional view along line AA in Figure 11. Figure 13 is a cross-sectional view along line BB in Figure 11.

[0030] As shown in Figure 4, in the display area A1, the element substrate 100 has a cross-sectional structure in which insulating or conductive functional layers or functional films are stacked on the substrate 90.

[0031] Figure 5 is a plan view showing the planar structure of the substrate 90 and the interlayer insulating layer 76. In Figure 5, the light-shielding layer 80, semiconductor layer 70, gate electrode 74, and contact holes 71, 73, 75, and 81 are shown by solid lines. In Figures 5 to 9, the position of the pixel electrode 10 is shown by a dashed line to show the positional relationship of each component in a plan view. The shape of the pixel electrode 10 is rectangular.

[0032] As shown in Figure 4, a light-shielding layer 80 is placed between the substrate 90 and the interlayer insulating layer 82. As shown in Figure 5, the light-shielding layer 80 constitutes a part of the light-shielding region S of the pixel P and is provided so as to overlap with the transistor 1 in a plan view. The transistor 1 is provided so as to extend in the Y1 direction and the Y2 direction between the four pixel electrodes 10. The light-shielding layer 80 has a portion that extends in the Y1 direction, a portion that extends in the Y2 direction, and protruding portions that overlap with the corners of each of the four pixel electrodes 10.

[0033] The light-shielding layer 80 is formed of a conductive material having light-shielding properties. Examples of conductive materials having light-shielding properties include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. The same applies to conductive materials having light-shielding properties, and they function as a light-shielding layer. "Light-shielding properties" refers to light-shielding properties with respect to visible light, preferably with a visible light transmittance of less than 50%, and more preferably with a transmittance of 10% or less.

[0034] The interlayer insulating layer 82 is transparent and insulating. The interlayer insulating layer 82 is formed from an inorganic material such as silicon oxide (SiO2). Hereafter, each interlayer insulating layer is formed from the same material as the interlayer insulating layer 82.

[0035] As shown in Figure 4, a transistor 1 is provided on the interlayer insulating layer 82. Transistor 1 has a semiconductor layer 70 having an LDD (Lightly Doped Drain) structure, a gate electrode 74, and a gate insulating layer 72. The semiconductor layer 70 has a drain region 70d, an LDD region 70a, a channel region 70c, an LDD region 70b, and a source region 70s.

[0036] The channel region 70c is located in the central part of the semiconductor layer 70. The LDD region 70b is located between the channel region 70c and the source region 70s. The LDD region 70a is located between the channel region 70c and the drain region 70d.

[0037] The semiconductor layer 70 is, for example, polysilicon, and the regions excluding the channel region 70c are doped with impurities to enhance conductivity. The impurity concentrations in the LDD region 70b and LDD region 70a are lower than the impurity concentrations in the source region 70s and drain region 70d.

[0038] A gate electrode 74 is provided on the semiconductor layer 70 via a gate insulating layer 72. The gate electrode 74 overlaps the channel region 70c of the semiconductor layer 70. The gate electrode 74 is formed, for example, using polysilicon doped with impurities to enhance conductivity. Alternatively, the gate electrode 74 may be formed using conductive materials such as metals, metal silicides, and metal compounds. The gate insulating layer 72 is composed of silicon oxide, which is formed by, for example, thermal oxidation or CVD (Chemical Vapor Deposition).

[0039] An interlayer insulating layer 76 is provided on transistor 1. A conductive layer 61 is provided on the interlayer insulating layer 76. In this embodiment, the conductive layer 61 is a scan line 3.

[0040] Figure 6 is a plan view showing the planar structure of the conductive layer 61 provided on the interlayer insulating layer 76, with the conductive layer 61, light-shielding member 62, and contact holes 71, 73 shown by solid lines, and the contact holes 75, 81 and semiconductor layer 70 shown by dashed lines.

[0041] As shown in Figure 4, the conductive layer 61 is electrically connected to the gate electrode 74 via a contact hole 75 provided in the interlayer insulating layer 76. The conductive layer 61 is also electrically connected to the light-shielding layer 80 via contact holes 81 provided in the interlayer insulating layer 76 and the interlayer insulating layer 82. The light-shielding layer 80 receives a scanning signal G1 and the like from the conductive layer 61 and functions as a back gate.

[0042] As shown in Figure 6, the contact holes 81 are provided along the X1-direction side and X2-direction side of the channel region 70c and LDD region 70a, and by providing a light-shielding member made of a light-shielding metal such as tungsten in the contact holes 81, the channel region 70c and LDD region 70a are shielded from light incident from these sides.

[0043] The conductive layer 61 is formed of a light-shielding conductive material and constitutes a part of the light-shielding region S of the pixel P. The conductive layer 61 extends in the X1 and X2 directions so as to overlap with adjacent pixel electrodes 10 in the Y1 and Y2 directions. The conductive layer 61 has protruding portions that overlap with the corners of the pixel electrodes 10.

[0044] The light-shielding member 62 is provided so as to overlap with the LDD region 70a in a plan view. As shown in Figure 4, the light-shielding member 62 is electrically connected to the relay layer 54, and the potential of the drain region 70d is applied through the contact hole 71 and the relay layer 54.

[0045] Figure 7 is a plan view showing the planar structure of the relay layers 53 and 54, with the relay layers 53, 54 and contact holes 51, 52 shown by solid lines, and the contact holes 71, 73, light-shielding member 62, and semiconductor layer 70 shown by dashed lines.

[0046] The relay layers 53 and 54 are formed of a light-shielding conductive material and constitute a part of the light-shielding region S of the pixel P. The relay layers 53 and 54 are provided so as to overlap between adjacent pixel electrodes 10 in the X1 and X2 directions, respectively. The relay layer 54 is provided at a position that overlaps with the corners of the four pixel electrodes 10, and has a protruding portion that overlaps with the corner of each pixel electrode 10.

[0047] As shown in Figure 4, the relay layer 54 is electrically connected to the drain region 70d of the semiconductor layer 70 via contact holes 71 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76. The relay layer 53 is electrically connected to the source region 70s of the semiconductor layer 70 via contact holes 73 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76.

[0048] An interlayer insulating layer 50 is provided on the intermediate layer 53 and the intermediate layer 54, and an intermediate layer 41 and a conductive layer 42 are provided on the interlayer insulating layer 50. In this embodiment, the conductive layer 42 is a data line 4. The relay layer 41 and the conductive layer 42 are provided in the same layer and are each formed of a light-shielding conductive material.

[0049] Figure 8 is a plan view showing the planar structure of the relay layer 41 and the conductive layer 42, with the relay layer 41, the conductive layer 42, and the contact holes 43 shown by solid lines, and the contact holes 51, 52, and the semiconductor layer 70 shown by dashed lines.

[0050] The relay layer 41 and the conductive layer 42 are formed of a light-shielding conductive material and constitute a part of the light-shielding region S of the pixel P. The relay layer 41 is provided so as to overlap with the spaces between adjacent pixel electrodes 10 in the Y1 and Y2 directions. The conductive layer 42 extends in the Y1 and Y2 directions so as to overlap with adjacent pixel electrodes 10 in the X1 and X2 directions, and is provided so as to overlap with the semiconductor layer 70.

[0051] As shown in Figure 4, the relay layer 41 is electrically connected to the relay layer 54 via the contact hole 51. The conductive layer 42 is electrically connected to the relay layer 53 via the contact hole 52.

[0052] An interlayer insulating layer 40 is provided on the relay layer 41, the conductive layer 42, and the interlayer insulating layer 50. A conductive layer 44 and an interlayer insulating layer 30 are provided on the interlayer insulating layer 40. In this embodiment, the conductive layer 44 is a capacitance line 5.

[0053] A capacitive insulating layer 32, a conductive layer 23, and an interlayer insulating layer 20 are provided on the conductive layer 44 and the interlayer insulating layer 30. The conductive layer 44, the capacitive insulating layer 32, and the conductive layer 23 constitute the capacitive element 2. In this embodiment, the conductive layer 23 is an example of a first conductive layer, and the conductive layer 44 is an example of a second conductive layer.

[0054] Between the conductive layer 44 and the conductive layer 23, the end portion 44e of the conductive layer 44 is covered by an insulating member 30c. In other words, the insulating member 30c is provided between the conductive layer 44 and the conductive layer 23, along the outer edge of the capacitive element 2. In this embodiment, the end portion 44e of the conductive layer 44 includes the upper surface along the outer edge of the conductive layer 44. The end portion 44e may also include the side surface of the outer edge of the conductive layer 44. In this embodiment, the insulating member 30c is part of the interlayer insulating layer 30, but may be formed from a different material or process.

[0055] Since the end portion 44e of the conductive layer 44 is covered by the insulating member 30c, the end portion 44e of the conductive layer 44 and the end portion 23e of the conductive layer 23 are separated by the insulating member 30c. Therefore, the conductive layer 44 and the conductive layer 23 can be configured to be less prone to short circuits. In this embodiment, the end portion 23e of the conductive layer 23 includes the lower surface along the outer edge of the conductive layer 23. The end portion 23e may also include the side surface of the outer edge of the conductive layer 23.

[0056] Figure 9 is a plan view showing the planar structure of the conductive layer 44 and the contact holes 43, with the conductive layer 44 and the contact holes 43 indicated by solid lines. The conductive layer 44 is formed of a light-shielding conductive material and constitutes a part of the light-shielding region S of the pixel P.

[0057] Figure 10 is a plan view showing the planar structure of the conductive layer 23, the contact hole 43, and the opening H, with the conductive layer 23 and the opening H shown by solid lines and the contact hole 43 shown by a dashed line. The conductive layer 23 is electrically connected to the relay layer 41 via a contact hole 43. The conductive layer 23 is made of a light-shielding conductive material and constitutes a part of the light-shielding region S of the pixel P.

[0058] The conductive layer 23 has an inverted L-shape when viewed from above. The conductive layer 23 has a main body portion 233 having an overhang portion 233p that extends out to the corner of the aperture region T of the pixel P, an extended portion 231 extending from the main body portion 233 in the Y2 direction, and an extended portion 232 extending from the main body portion 233 in the X2 direction.

[0059] The corners of the aperture region T of the pixel P are adjacent to the points where the grid of the light-shielding region S, which is provided in a grid pattern, intersects. The aperture region T of the pixel P can be rephrased as the light-transmitting region. In this embodiment, the Y2 direction is an example of a first direction, the extension portion 231 is an example of a first extension portion, the X2 direction is an example of a second direction, and the extension portion 232 is an example of a second extension portion.

[0060] As shown in Figure 4, the conductive layer 23 is a light-shielding layer located closest to the pixel electrode 10 and functions as a light-reflecting layer. The conductive layer 23 comprises a conductive film 23a made of a light-reflecting material and a conductive film 23b made of a material with lower light reflectivity than the conductive film 23a and located closer to the transistor 1 than the conductive film 23a. The conductive film 23a contains aluminum, and the conductive film 23b contains titanium nitride (TiN).

[0061] The conductive film 23a has a high light reflectivity and reflects approximately 90% of the light irradiated onto it. In other words, the conductive film 23a can reduce the amount of light absorbed by the conductive film 23a to approximately 10% of the irradiated light. Therefore, according to this embodiment, the temperature rise of the liquid crystal device 300 can be suppressed. In this embodiment, the conductive film 23a is an example of a first film, and the conductive film 23b is an example of a second film.

[0062] The conductive film 23a of the conductive layer 23 has an opening H. The bottom of the opening H exposes the conductive film 23b. The contact hole 21 is located inside the opening H, at a position separated from the edge of the opening H. In other words, the contact hole 21 is located in a position that does not come into contact with the conductive film 23a.

[0063] As shown in Figure 10, the opening H is provided in the main body portion 233 of the conductive layer 23 in a region that spans from the protruding portion 233p to the inside of the main body portion 233.

[0064] Figure 11 is a plan view showing the planar structure of the pixel electrode 10, conductive layer 23, contact hole 21, and plug 25, with the pixel electrode 10 shown by a solid line and the conductive layer 23, contact hole 21, and plug 25 shown by a dashed line. The contact hole 21 is located inside the opening H, at a position separated from the edge of the opening H in a plan view.

[0065] As shown in Figure 4, by providing a capacitance line 5 between the conductive layer 23 and the data line 4, the conductive layer 23 and the data line 4 are shielded by the capacitance line 5, and electrical coupling between the conductive layer 23 and the data line 4 is suppressed. Therefore, it is possible to suppress the application of other image signals E1 of pixels P supplied to the data line 4 to the conductive layer 23 as noise.

[0066] An interlayer insulating layer 20 and a protective layer 22 are provided on the conductive layer 23. The protective layer 22 is made of an inorganic material that is transparent and hygroscopic, such as BSG (Borosilicate Glass). The protective layer 22 may be omitted. Pixel electrodes 10 are provided on the protective layer 22.

[0067] The pixel electrode 10 is electrically connected to the conductive layer 23 via contact holes 21 provided in the interlayer insulating layer 20 and the protective layer 22. A plug 25 is provided inside the contact hole 21. The contact hole 21 and the plug 25 constitute a pixel contact. The pixel contact is configured to electrically connect the pixel electrode 10 to the conductive layer 23 directly beneath the pixel electrode 10.

[0068] 1.4. Capacitive element 2 and pixel contact Figure 12 is a cross-sectional view along line AA in Figure 11, showing the cross-sectional configuration of the capacitive element 2 and the pixel contact. Figure 13 is a cross-sectional view along line BB in Figure 11, showing the cross-sectional configuration of the capacitive element 2.

[0069] As shown in Figure 12, the pixel contact electrically connects the pixel electrode 10 and the conductive layer 23. In this embodiment, the pixel contact consists of a contact hole 21 and a plug 25. The pixel contact may also consist of a contact hole 21 and a pixel electrode 10 formed inside the contact hole 21.

[0070] The contact hole 21 penetrates the interlayer insulating layer 20 and the protective layer 22, reaching the conductive film 23b containing titanium nitride within the opening H provided in the conductive film 23a containing aluminum, and exposing the conductive film 23b at the bottom of the contact hole 21. The contact hole 21 is provided within the opening H at a position spaced apart from the edge of the opening H in the conductive film 23a. In other words, the contact hole 21 is provided at a position that does not overlap with the conductive film 23a in a plan view, so as not to come into contact with the conductive film 23a.

[0071] Since the contact hole 21 is provided in a position that does not overlap with the conductive film 23a, no etching residue caused by aluminum is generated when forming the contact hole 21. In other words, in this embodiment, there is no need to remove the etching residue. Therefore, in this embodiment, when removing the etching residue, the conductive film 23a containing aluminum is not side-etched, and there is no risk of increased reliability risk to the pixel contact.

[0072] A plug 25 is provided inside the contact hole 21. The plug 25 contains tungsten. Tungsten has excellent heat resistance and is a material that is easy to embed in contact holes with a high aspect ratio. Therefore, tungsten can neatly embed the elongated shape of the contact hole 21. Thus, the reliability of the plug 25 as a connecting member can be improved.

[0073] A barrier film 24 is provided between the plug 25 and the contact hole 21. The barrier film 24 is made of tungsten nitride (WN) or titanium nitride. Tungsten nitride or titanium nitride has excellent adhesion to the interlayer insulating layer 20. Therefore, the barrier film 24 can suppress delamination of the plug 25 and improve the reliability of the plug 25.

[0074] As shown in Figure 13, the conductive layer 23 is formed inside the contact hole 43 and is electrically connected to the relay layer 41 at the bottom of the contact hole 43.

[0075] 1.5. Method for manufacturing capacitive element 2 and pixel contacts Next, the manufacturing methods for the capacitive element 2 and the pixel contacts will be described with reference to Figures 14 to 20. Figure 14 is a flowchart showing a method for manufacturing the capacitive element 2 and the pixel contact. Figures 15 to 20 are cross-sectional or plan views showing one aspect of the manufacturing process for the capacitive element 2 and the pixel contact. Figure 15 corresponds to the cross-section along the EE line in Figure 9. Figures 16 to 19 correspond to the cross-section along the GG line in Figure 10.

[0076] As shown in Figure 14, the manufacturing method for the capacitive element 2 and the pixel contact includes a capacitive electrode formation step S1, an insulating member formation step S2, a capacitive insulating layer formation step S3, a capacitive electrode formation step S4, an opening formation step S5, an interlayer insulating layer formation step S6, a contact hole formation step S7, a plug formation step S8, and a pixel electrode formation step S9.

[0077] In the capacitive electrode formation step S1, a conductive layer 44 is formed as a capacitive electrode for the capacitive element 2, as shown in Figure 15. The conductive layer 44 includes a conductive film 44a containing TiN and a conductive film 44b containing aluminum. The capacitive electrode formation step S1 includes the steps of depositing the conductive film 44b and the conductive film 44a in that order on the interlayer insulating layer 40, and the steps of patterning the deposited conductive film 44b and conductive film 44a by photolithography.

[0078] In the insulating member formation step S2, as shown in Figure 15, an insulating member 30c is formed on the end 44e of the conductive layer 44. The insulating member 30c can be formed by a step of depositing an interlayer insulating layer 30 on the conductive layer 44 and a step of removing a portion of the interlayer insulating layer 30 on the conductive layer 44 by photolithography. As shown in Figure 20, the insulating member 30c is formed so as to overlap the end 44e of the conductive layer 44, shown by the dashed line, and the end 23e of the conductive layer 23, shown by the solid line, in a plan view.

[0079] In the capacitive insulating layer formation step S3, a capacitive insulating layer 32 is formed as shown in Figure 15. The capacitive insulating layer 32 is formed so as to cover the insulating member 30c at the end portion 44e of the conductive layer 44.

[0080] In the capacitive electrode formation step S4, a conductive layer 23 is formed as a capacitive electrode for the capacitive element 2, as shown in Figure 16. The capacitive electrode formation step S4 includes the steps of depositing conductive films 23b and 23a on the capacitive insulating layer 32 in that order, and the steps of patterning the deposited conductive films 23b and 23a by photolithography.

[0081] The conductive film 23a of the conductive layer 23 is provided in a position where a portion overlaps with the insulating member 30c. Specifically, the end portion 23e of the conductive layer 23 overlaps with the insulating member 30c, except near the contact hole 43.

[0082] As shown in Figure 20, the end portion 23e of the conductive layer 23 overlaps with the insulating member 30c in a plan view, causing the conductive layer 23 and the conductive layer 44 to be spaced apart in accordance with the insulating member 30c. Therefore, a configuration can be achieved in which the conductive layer 23 and the conductive layer 44 are less likely to short-circuit.

[0083] In the opening formation step S5, as shown in Figure 17, an opening H is formed in the conductive film 23a of the conductive layer 23 to expose the conductive film 23b. The opening formation step S5 includes a step of half-etching the conductive layer 23 at the position where the opening H is to be formed by photolithography to remove the conductive film 23a on the conductive film 23b.

[0084] As shown in Figure 20, the opening H is provided in the region that spans from the protruding portion 233p of the main body 233 to the inside of the main body 233. By providing the opening H in the region that spans from the protruding portion 233p to the inside of the main body 233, the protrusion of the protruding portion 233p into the opening region T can be suppressed. Therefore, the aperture ratio can be increased, and a bright display can be achieved.

[0085] The opening H is not positioned in a location that overlaps with the insulating member 30c in a plan view. A step is formed by the insulating member 30c where it overlaps, but since the opening H is positioned in a location that does not overlap with the insulating member 30c in a plan view, the opening H can be formed with high precision.

[0086] In the interlayer insulating layer formation step S6, as shown in Figure 18, an interlayer insulating layer 20 is formed on the conductive layer 23. In this embodiment, a protective layer 22 is provided on the interlayer insulating layer 20.

[0087] In the contact hole formation step S7, contact holes 21 are formed in the interlayer insulating layer 20 and the protective layer 22, exposing the conductive film 23b. As shown in Figure 20, the contact hole 21 is positioned in a location that does not overlap with the insulating member 30c in a plan view. A step is formed at the end 23e of the conductive layer 23 by the insulating member 30c, but in this embodiment, since the contact hole 21 is positioned in a location that does not overlap with the insulating member 30c, the contact hole 21 can be formed with high precision.

[0088] As shown in Figure 20, the contact hole 21 is located inside the opening H, at a position separated from the four sides of the edge of the opening H. Therefore, no etching residue caused by aluminum is generated when forming the contact hole 21.

[0089] In this embodiment, since no etching residue is generated due to aluminum, there is no need to remove such etching residue. Therefore, when removing such etching residue, the conductive film 23a containing aluminum is not side-etched, and there is no risk of increased reliability risk to the pixel contact.

[0090] Here, the etching residue caused by aluminum is aluminum fluoride (AlFx). When forming contact holes 21 in the conductive film 23a, aluminum fluoride is formed by the etching gas containing fluorine (F) used to form the contact holes 21, so an AlFx removal step is required to remove the aluminum fluoride. In the AlFx removal step, the conductive film 23a containing aluminum is side-etched by an etching gas containing Cl (chlorine), which may increase the reliability risk of the pixel contact.

[0091] In the plug formation step S8, a plug 25 is formed inside the contact hole 21, as shown in Figure 19. In this embodiment, a barrier film 24 is provided between the plug 25 and the contact hole 21.

[0092] In the pixel electrode formation step S9, a pixel electrode 10 is formed for each pixel P, as shown in Figure 12. The pixel electrode 10 is provided so as to overlap the opening H and the contact hole 21 in a plan view, as shown in Figure 20. However, the pixel electrode 10 does not need to overlap with a part of the opening H in a plan view, as it does not overlap with the contact hole 21. After forming the pixel electrodes 10, the alignment film 12 is formed.

[0093] As described above, the liquid crystal device 300 as an electro-optical device of this embodiment provides the following advantages. The liquid crystal apparatus 300 of this embodiment comprises a transistor 1, a pixel electrode 10 provided on the light incident side of the transistor 1, and a conductive layer 23 as a first conductive layer having a conductive film 23a as a first film made of a light-reflective material and a conductive film 23b as a second film made of a material with lower light reflectivity than the conductive film 23a and provided on the transistor 1 side of the conductive film 23a, and the conductive layer 23 has a main body portion 233 having an overhang portion 233p that protrudes to the corner of the aperture region T of the pixel P, and the main body The conductive layer 23 has an extension portion 231 as a first extension portion that extends from the main body portion 233 along the Y2 direction as a first direction, and an extension portion 232 as a second extension portion that extends from the main body portion 233 along the X2 direction as a second direction that intersects the Y2 direction. At least in the protruding portion 233p of the main body portion 233 of the conductive layer 23, the conductive film 23a of the conductive layer 23 has an opening H, and the conductive film 23b of the conductive layer 23 is electrically connected to the pixel electrode 10 via a contact hole 21 provided inside the opening H of the conductive film 23a in a plan view, at a position spaced apart from the edge of the opening H.

[0094] As described above, the liquid crystal device 300 of this embodiment has a conductive layer 23 which has a conductive film 23a made of a light-reflective material, and the conductive layer 23 has a main body portion 233, an extended portion 231 extending from the main body portion 233 along the Y2 direction, and an extended portion 232 extending from the main body portion 233 along the X2 direction. Therefore, most of the light irradiated onto the pixel P is reflected by the conductive film 23a. Thus, the temperature rise of the liquid crystal device 300 can be suppressed.

[0095] Furthermore, the pixel electrode 10 and the conductive film 23b are electrically connected via a contact hole 21 provided inside the opening H of the conductive film 23a at a position spaced apart from the edge of the opening H. Therefore, since no etching residue is generated due to the light-reflective material when forming the contact hole 21, the process of removing such etching residue becomes unnecessary. When the process of removing etching residue is performed, the conductive film 23a containing the light-reflective material is side-etched, creating a reliability risk to the pixel contact. However, according to this embodiment, since the process of removing etching residue is unnecessary, there is no reliability risk to the pixel contact. Therefore, according to this embodiment, a highly reliable liquid crystal device 300 can be realized.

[0096] In the liquid crystal device 300 of this embodiment, the opening H of the conductive film 23a is provided in a region that spans from the protruding portion 233p of the main body portion 233 to the inside of the main body portion 233 in a plan view. In this way, by providing the aperture H in a region that spans from the protruding portion 233p to the inside of the main body portion 233, the area of ​​the protruding portion 233p that extends into the aperture region T can be suppressed. Therefore, the impact on the aperture region T, that is, the reduction in the aperture region ratio of the pixels P, can be suppressed, and a liquid crystal display device 300 that can display brightly can be realized.

[0097] The liquid crystal device 300 of this embodiment comprises a capacitive element 2 having a conductive layer 23 and a conductive layer 44 provided opposite to the conductive layer 23, and an insulating member 30c provided between the conductive layer 23 and the conductive layer 44 so as to cover the end portion 44e of the conductive layer 44, and in a plan view, the contact hole 21 is provided in a position that does not overlap with the insulating member 30c.

[0098] Although a step is formed at the end 23e of the conductive layer 23 by the insulating member 30c, in this embodiment, the contact hole 21 is provided in a position that does not overlap with the insulating member 30c, so the contact hole 21 can be formed with high precision.

[0099] In the liquid crystal device 300 of this embodiment, the insulating member 30c is provided along the end portion 23e of the protruding portion 233p in a plan view, and the conductive film 23a of the conductive layer 23 is provided in a position where a part of it overlaps with the insulating member 30c, while the opening H of the conductive film 23a is not provided in a position where it overlaps with the insulating member 30c.

[0100] When viewed from above, the end portion 23e of the conductive film 23a of the conductive layer 23 overlaps with the insulating member 30c, causing the end portion 23e of the conductive layer 23 and the conductive layer 44 to be separated according to the insulating member 30c. Therefore, a configuration can be achieved in which the conductive layer 23 and the conductive layer 44 are less likely to short-circuit.

[0101] Furthermore, the opening H of the conductive film 23a is not located in a position that overlaps with the insulating member 30c in a plan view. A step is formed by the insulating member 30c where it overlaps, but since the opening H is located in a position that does not overlap with the insulating member 30c in a plan view, the opening H can be formed with high precision.

[0102] In the liquid crystal apparatus 300 of this embodiment, the conductive film 23a contains aluminum, and the conductive film 23b contains titanium nitride. The conductive film 23a containing aluminum, provided on the light incident side, is a highly reflective film, while the conductive film 23b containing titanium nitride, provided on the transistor 1 side, is a low-reflective film. Therefore, the liquid crystal device 300 can suppress the temperature rise of the liquid crystal device 300 by suppressing light absorption with the conductive film 23a containing aluminum, and can suppress the generation of stray light with the conductive film 23b containing titanium nitride, thereby preventing a deterioration in display quality.

[0103] In the liquid crystal device 300 of this embodiment, a plug 25 is provided as a connecting member within the contact hole 21. In this way, by providing a plug 25 inside the contact hole 21, the aspect ratio of the contact hole 21 can be increased, or in other words, the diameter of the contact hole 21 can be reduced, compared to when the pixel electrode 10 is deposited inside the contact hole 21. Therefore, the area of ​​the aperture H can be reduced, and the area of ​​the protruding portion 233p that extends into the aperture region T can be suppressed. Thus, the impact on the aperture region T, that is, the reduction in the aperture region ratio of the pixel P, can be suppressed, and a liquid crystal display device 300 that can display brightly can be realized.

[0104] 2. Embodiment 2 Figure 21 is a schematic diagram showing an example of an electronic device, and is a schematic diagram showing the general configuration of a projection-type display device 1000 as an electronic device. The projection display device 1000 is, for example, a three-panel projector equipped with three of the above-described liquid crystal displays 300. Liquid crystal display 300R corresponds to the red display color, liquid crystal display 300G corresponds to the green display color, and liquid crystal display 300B corresponds to the blue display color. The control unit 1005 includes, for example, a processor and memory, and controls the operation of the liquid crystal displays 300R, 300G, and 300B.

[0105] The illumination optical system 1001 supplies red light RL from the light source illumination device 1002 to the liquid crystal device 300R, green light GL to the liquid crystal device 300G, and blue light BL to the liquid crystal device 300B. Each liquid crystal device 300R, 300G, and 300B functions as an optical modulator that modulates the respective colored lights RL, GL, and BL supplied from the illumination optical system 1001 according to the displayed image. The projection optical system 1003 combines the light emitted from the liquid crystal display unit 300R, the liquid crystal display unit 300G, and the liquid crystal display unit 300B and projects it onto the screen 1004.

[0106] As described above, the projection-type display device 1000 as an electronic device of this embodiment includes the liquid crystal display device 300 described above. Therefore, by employing a liquid crystal device 300 that suppresses temperature rise, the performance of the projection display device 1000 can be improved.

[0107] Furthermore, the electronic device is not limited to the three-chip projector exemplified. For example, it may be a single-chip, two-chip, or projector equipped with four or more liquid crystal displays 300. The electronic device may also be a smartphone, PDA (Personal Digital Assistant), camera, television, car navigation system, personal computer, display, e-paper, calculator, videophone, and POS (Point of Sale), printer, scanner, copier, video player, or device equipped with a touch panel.

[0108] Although preferred embodiments have been described above, the present invention is not limited to the embodiments described above. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that performs a similar function to that of the embodiments described above, and any configuration can be added. [Explanation of symbols]

[0109] 1...Transistor, 2...Capacitor element, 3...Scan line, 4...Data line, 5...Capacitor line, 6...Scan line drive circuit, 7...Data line drive circuit, 8...Sealing member, 9...External terminal, 10...Pixel electrode, 12...Alignment film, 20...Interlayer insulating layer, 21...Contact hole, 22...Protective layer, 23...Conductive layer, 23a,23b...Conductive film, 23e...End, 231,232...Extending part, 233...Main body part, 233p...Protruding part, H...Opening, 24...B Rear film, 25...plug, 30...interlayer insulating layer, 30c...insulating material, 32...capacitive insulating layer, 40...interlayer insulating layer, 41...relay layer, 42...conductive layer, 43...contact hole, 44...conductive layer, 44a,44b...conductive film, 44e...end, 50...interlayer insulating layer, 51,52...contact hole, 53,54...relay layer, 60...interlayer insulating layer, 61...conductive layer, 62...light shielding material, 70...semiconductor layer, 70a,70b...LDD region, 7 0c...Channel region, 70d...Drain region, 70s...Source region, 71...Contact hole, 72...Gate insulating layer, 73...Contact hole, 74...Gate electrode, 75...Contact hole, 76...Interlayer insulating layer, 80...Light shielding layer, 81...Contact hole, 82...Interlayer insulating layer, 90...Substrate, 100...Element substrate, 200...Opposite substrate, 210...Substrate, 220...Insulating layer, 230...Common electrode, 240...Alignment film, 3 00, 300B, 300G, 300R…Liquid crystal display unit, 1000…Projection type display device, 1001…Illumination optical system, 1002…Illumination device, 1003…Projection optical system, 1004…Screen, 1005…Control unit, A1…Display area, A2…Peripheral area, RL…Red light, GL…Green light, BL…Blue light, Lc…Liquid crystal layer, IL…Incident light, ML…Modulated light, P…Pixel, S…Shading area, T…Aperture area, E1…Image signal, G1…Scanning signal

Claims

1. Transistors and, A pixel electrode provided on the light incident side of the transistor, The transistor and the pixel electrode are separated by a first conductive layer comprising: a first film made of a light-reflective material; and a second film made of a material with lower light reflectivity than the first film, and provided on the transistor side of the first film. The first conductive layer has a main body portion having an overhang portion that extends outwards from the corner of the aperture region of the pixel, a first extending portion extending from the main body portion along a first direction, and a second extending portion extending from the main body portion along a second direction intersecting the first direction. In at least the protruding portion of the main body of the first conductive layer, the first film of the first conductive layer has an opening, and the second film of the first conductive layer is electrically connected to the pixel electrode via a contact hole provided in a plan view inside the opening of the first film at a position spaced apart from the edge of the opening. Electro-optical device.

2. The opening of the first membrane is provided in a region that spans from the protruding portion of the main body to the inside of the main body in a plan view. The electro-optical apparatus according to claim 1.

3. A capacitive element having the first conductive layer and a second conductive layer provided opposite to the first conductive layer, The facility comprises an insulating member provided between the first conductive layer and the second conductive layer so as to cover the end of the second conductive layer, In a plan view, the contact hole is positioned so as not to overlap with the insulating member. The electro-optical apparatus according to claim 1.

4. The insulating member is provided along the end of the protruding portion in a plan view. The first film of the first conductive layer is provided in a position where a portion overlaps with the insulating member. The opening of the first film is not located in a position that overlaps with the insulating member. The electro-optical apparatus according to claim 3.

5. The first film contains aluminum, The second film contains titanium nitride, The electro-optical apparatus according to claim 1.

6. The connecting member provided within the contact hole is provided. The electro-optical apparatus according to claim 1.

7. An electronic device comprising an electro-optical apparatus as described in any one of claims 1 to 6.

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