Voltage detector

JP2026169008APending Publication Date: 2026-10-16NISSHINBO MICRO DEVICES INC
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Application Number
JP2025062631
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-04-04
Publication Date
2026-10-16

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Benefits of technology

【0019】 本発明に係る電圧検出器によれば、消費電流を低減できる、との効果を奏する。

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Abstract

To provide a voltage detector with reduced power consumption. [Solution] A transistor M3 is placed between resistors R1 and R2, with its source connected to the gate of transistor M1 and its gate connected to the source of transistor M1. A voltage monitoring circuit 67 monitors the drain-source voltage of transistor M3. A transistor M4 is connected in series with resistors R1 and R2, interrupting the current flowing through resistors R1 and R2. When the voltage monitoring circuit 67 detects a drain-source voltage of VR2 or higher, the control circuit 66 turns off transistor M4 and intermittently turns it on.
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Description

[Technical Field]

[0001] This invention relates to a voltage detector. [Background technology]

[0002] Global warming is thought to be caused by an increase in the concentration of greenhouse gases such as CO2, which strengthens the greenhouse effect in the atmosphere. With the rapid progress of the information and communication society, reducing the power consumption of electronic devices has become a major challenge. Many semiconductor integrated circuits are used in electronic devices, and this invention aims to reduce the current consumption of voltage detectors, which are widely used in semiconductor integrated circuits, and thereby contribute to mitigating global warming.

[0003] Conventionally, a circuit like the one shown in Figure 5 is known as a voltage detector used in semiconductor integrated circuits (see, for example, Patent Documents 1 and 2). The conventional voltage detector 100 shown in Figure 5 is mainly composed of a resistive voltage divider 102 that outputs a divided voltage based on the input voltage, a differential input 103, an output 104, and an output buffer 105.

[0004] The resistive voltage divider 102 has resistors R1 and R2 connected in series between the input terminal T1 to which the input voltage VS is input and the negative power supply terminal to which the negative power supply voltage VSS is supplied. The resistive voltage divider 102 outputs a divided voltage VA (voltage generated at junction node A) from the connection point (junction node A) between resistors R1 and R2. The divided voltage VA changes based on the voltage VS input to the input terminal T1.

[0005] The differential input section 103 consists of transistors M1 and M2, whose sources are connected in common and through which currents flow in a current ratio corresponding to the potential difference between the reference voltage VREF generated by the reference voltage source 31 and the divided voltage VA, respectively, and a constant current source 90 connected between the common source of transistors M1 and M2 and the positive power supply terminal to which the positive power supply voltage VDD is supplied.

[0006] The output section 104 consists of a transistor M11 connected in series with transistor M1, a transistor M12 connected in series with transistor M2, a transistor M13 whose gate is connected to the connection point between transistors M1 and M11 and whose source is connected to the negative power supply terminal, and a constant current source 91 connected between the drain of transistor M13 and the positive power supply terminal.

[0007] Transistor M12 has its gate and drain connected to the drain of transistor M2, and its source connected to the negative power supply terminal. Transistor M11 has its drain connected to the drain of transistor M1, its source connected to the negative power supply terminal, and its gate connected to the gate and drain of transistor M12. In other words, transistor M11 is current-mirror connected to transistor M12, copying and folding back the current flowing through transistor M12.

[0008] The output buffer section 105 consists of two inverters 51 and 52. Inverter 51 has its input connected to the connection point between transistor M13 and constant current source 91, and its output connected to the input of inverter 52. Inverter 52 has its output connected to output terminal T3 and outputs the output signal VOUT.

[0009] In the operation of a conventional voltage detector 100 to detect low voltage, if the input voltage VS is high and the divided voltage VA is higher than the reference voltage VREF, the output unit 104 outputs a High potential and the output signal VOUT becomes a High potential. This state is called the deactivated state of the voltage detector. If the input voltage VS is low and the divided voltage VA is lower than the reference voltage VREF, the output unit 104 outputs a Low potential and the output signal VOUT becomes a Low potential. This state is called the detected state of the voltage detector, and the detection voltage V when the output signal VOUT transitions from a High potential to a Low potential is called the detection voltage V DET This is represented by Equation 1.

[0010]

number

[0011] Here, R1 is the resistance value of resistor R1, and R2 is the resistance value of resistor R2.

[0012] Next, the operation in which the consumption current increases as the input voltage VS rises will be described. The current IS flowing through the input terminal T1 (resistive voltage divider unit 102) is expressed by Equation 2.

[0013]

Equation

[0014] From Equation 2, the current IS flowing through the input terminal T1 increases in proportion to the rise of the input voltage VS. Therefore, when the input voltage VS is high, the current IS flowing through the resistive voltage divider unit 102 becomes large, and the consumption current also becomes large. In addition, if the resistance values of the resistors R1 and R2 are increased, the current IS flowing through the input terminal T1 can be reduced, but the chip size increases, leading to an increase in manufacturing cost.

[0015] The conventional voltage detector 100 described above has a problem that the consumption current increases because the current IS flowing through the input terminal T1 increases in accordance with the input voltage VS.

Prior Art Documents

Patent Documents

[0016]

Patent Document 1

Patent Document 2

Summary of the Invention

Problem to be Solved by the Invention

[0017] The present invention has been made in view of the circumstances described above, and an object thereof is to provide a voltage detector with reduced consumption current.

Means for Solving the Problem

[0018] To achieve the aforementioned objectives, the voltage detector according to the present invention is characterized by the following [1] to

[13] . [1] A resistive voltage divider having a first resistor and a second resistor that divide the input voltage, A first differential input unit having a first transistor to which a divided voltage obtained by dividing the input voltage is supplied to the gate or base, and a second transistor to which a first reference voltage is supplied to the gate or base, and generating a differential current with a current ratio corresponding to the difference between each gate voltage or each base voltage, A voltage detector comprising a first output unit that generates a voltage corresponding to the current difference of the differential current, The aforementioned resistive voltage divider section is The system further comprises a third transistor, which is provided between the first resistor and the second resistor, and whose source or emitter is connected to the gate or base of the first transistor, and whose gate or base is connected to the source or emitter of the first transistor. A voltage monitoring circuit for monitoring the drain-source voltage or collector-emitter voltage of the third transistor, The intermittent control circuit includes a switch element connected in series with the first resistor and the second resistor to interrupt the current flowing through the first resistor and the second resistor, and a control circuit unit that turns off the switch element and intermittently turns it on when the voltage monitoring circuit detects a drain-source voltage or collector-emitter voltage that is equal to or greater than a second reference voltage. It is a voltage detector. [2] In the voltage detector described in [1], The aforementioned switch element is It consists of a fourth transistor connected in series with the first resistor and the second resistor, It is a voltage detector. [3] In the voltage detector described in [1], The aforementioned control circuit unit is An oscillator that intermittently outputs pulse signals, The circuit includes a logic circuit that outputs an off signal to turn off the switch element when a detection signal is output from the voltage monitoring circuit indicating that a drain-source voltage or collector-emitter voltage greater than or equal to the second reference voltage has been detected, and outputs an on signal to turn on the switch element when the pulse signal is output. It is a voltage detector. [4] In the voltage detector described in [1], The aforementioned voltage monitoring circuit is The first input is connected to the drain or collector of the third transistor, and the second input is connected to the source or emitter of the third transistor via a reference voltage source that outputs the second reference voltage, and the device has a voltage comparator that compares the drain voltage or collector voltage with the source voltage or emitter voltage obtained by adding the second reference voltage. It is a voltage detector. [5] In the voltage detector described in [1], The aforementioned voltage monitoring circuit is A second differential input unit comprising: a fifth transistor whose gate or base is connected to the source or emitter of the third transistor; a sixth transistor whose gate or base is connected to the drain or collector of the third transistor; and a voltage generating element that generates the second reference voltage connected between the sources or emitters of the fifth transistor and the sixth transistor, wherein the second differential input unit generates a differential current with a current ratio corresponding to the difference between the gate voltages or base voltages of the fifth transistor and the sixth transistor; The device includes a second output unit that outputs a voltage corresponding to the current difference of the differential current generated by the second differential input unit as a detection signal indicating that a drain-source voltage or collector-emitter voltage equal to or greater than the second reference voltage has been detected. It is a voltage detector. [6] In the voltage detector described in [5], The voltage generating element is composed of a seventh transistor connected by a diode. It is a voltage detector. [7] In the voltage detector described in [5], The voltage generating element is composed of a third resistor, It is a voltage detector. [8] In the voltage detector described in [1], The voltage monitoring circuit, A second differential input unit having a fifth transistor whose gate or base is connected to the source or emitter of the third transistor, and a sixth transistor whose gate or base is connected to the drain or collector of the third transistor, which generates a differential current with a current ratio corresponding to the difference between the gate voltages or base voltages of the fifth and sixth transistors, The device has a second output unit that outputs a voltage corresponding to the current difference of the differential current generated by the second differential input unit as a detection signal indicating that a drain-source voltage or collector-emitter voltage equal to or greater than the second reference voltage has been detected. The threshold voltage of the fifth transistor is set lower than the threshold voltage of the sixth transistor. The threshold voltage difference between the fifth transistor and the sixth transistor corresponds to the second reference voltage. It is a voltage detector. [9] In the voltage detector described in [1], The voltage monitoring circuit, An eighth transistor having its source or emitter connected to the drain or collector of the third transistor, and its gate or base connected to the source or emitter of the third transistor, The device comprises a current source connected in series with the eighth transistor, A detection signal is output indicating that a drain-source voltage or collector-emitter voltage greater than or equal to the second reference voltage has been detected at the connection point of the eighth transistor and the current source. It is a voltage detector.

[10] A resistive voltage divider having a first resistor and a second resistor that divide the input voltage, A first differential input unit having a first transistor to which a divided voltage obtained by dividing the input voltage is supplied to the gate or base, and a second transistor to which a first reference voltage is supplied to the gate or base, and generating a differential current with a current ratio corresponding to the difference between each gate voltage or each base voltage, A voltage detector comprising a first output unit that generates a voltage corresponding to the current difference of the differential current, The aforementioned resistive voltage divider section is A third transistor is provided between the first resistor and the second resistor, and is composed of a depletion-type electrolytic effect transistor whose source is connected to the gate or base of the first transistor, and to which the gate is supplied with the first reference voltage. The device further comprises a switch element connected in series with the first resistor and the second resistor, which interrupts the current flowing through the first resistor and the second resistor. A voltage monitoring circuit that monitors the drain-source voltage of the third transistor, The voltage monitoring circuit includes an intermittent control circuit that, when it detects a drain-source voltage greater than or equal to a second reference voltage, turns off the switch element and intermittently turns it on. It is a voltage detector.

[11] In the voltage detector described in [1], When the switch element is off, the circuit currents of the first differential input and the first output are interrupted. It is a voltage detector.

[12] In the voltage detector described in any one of items [1] to

[11] , At least one of the aforementioned transistors is composed of bipolar transistors. It is a voltage detector.

[13] In the voltage detector described in any one of items [1] to

[11] , At least one of the aforementioned transistors is composed of an electrolytic effect transistor. It is a voltage detector. [Effects of the Invention]

[0019] The voltage detector according to the present invention has the effect of reducing current consumption.

[0020] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by referring to the attached drawings and reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments"). [Brief explanation of the drawing]

[0021] [Figure 1] Figure 1 is a circuit diagram showing a voltage detector in the first embodiment. [Figure 2] Figure 2 shows the current characteristics flowing through the resistance voltage divider and the voltage divider ratio control unit in the first to third embodiments. [Figure 3] Figure 3 is a circuit diagram showing a voltage detector in the second embodiment. [Figure 4] Figure 4 is a circuit diagram showing a voltage detector in the third embodiment. [Figure 5] Figure 5 is a circuit diagram showing an example of a conventional voltage detector. [Modes for carrying out the invention]

[0022] Specific embodiments of the present invention will be described below with reference to the figures.

[0023] (First Embodiment) First, the voltage detector 1 of the first embodiment will be described with reference to Figure 1. As shown in the figure, the voltage detector 1 includes a resistive voltage divider 2, a differential input 3 (= first differential input 3), an output 4 (= first output 4), an output buffer 5, and a voltage divider ratio control unit 6.

[0024] The resistive voltage divider 2 consists of resistors R1 (=first resistor), R2 (=second resistor), and transistor M3 (=third transistor) connected in series between the input terminal T1, to which the input voltage VS is input, and the negative power supply terminal T21. The negative power supply voltage VSS is supplied to the negative power supply terminal T21.

[0025] Transistor M3 is composed of an N-channel field-effect transistor. Resistor R1 is connected between the input terminal T1 and the drain of transistor M3. The gate of transistor M3 is connected to the sources of transistors M1 and M2, which will be described later. Resistor R2 is connected between the source of transistor M3 and the drain of transistor M4 (=switch element, fourth transistor), which will be described later.

[0026] The resistive voltage divider 2 outputs a divided voltage VA (voltage generated at junction node A) based on the input voltage VS from the connection point (junction node A) between transistor M3 and resistor R2.

[0027] The differential input section 3 consists of transistors M1 and M2, whose sources are connected in common and through which currents flow in a ratio corresponding to the potential difference between the reference voltage VREF (= first reference voltage) generated by the reference voltage source 31 and the divided voltage VA, respectively, and a constant current source 90 connected between the common source of transistors M1 and M2 and the positive power supply terminal T22. The positive power supply voltage VDD is supplied to the positive power supply terminal T22.

[0028] Transistors M1 and M2 are composed of P-channel field-effect transistors. A voltage divider voltage VA is supplied to the gate of transistor M1, and a reference voltage VREF is supplied to the gate of transistor M2. The constant current supplied from the constant current source 90 is divided between transistors M1 and M2. The current ratio (divide ratio) of the currents flowing through transistors M1 and M2 is a value corresponding to the reference voltage VREF and the voltage divider voltage VA.

[0029] The differential input unit 3 compares the reference voltage VREF generated by the reference voltage source 31 with the divided voltage VA generated by the resistive voltage divider unit 2, and generates a differential current with a current ratio corresponding to the comparison result.

[0030] In this embodiment, the output section 4 is composed of a transistor M11 connected in series with transistor M1, a transistor M12 connected in series with transistor M2, a transistor M13 whose gate is connected to the connection point between transistors M1 and M11 and whose source is connected to the negative power supply terminal T21, and a constant current source 91 connected between the drain of transistor M13 and the positive power supply terminal T22. Transistors M11, M12, and M13 are composed of N-channel field-effect transistors.

[0031] Transistor M12 has its gate and drain connected to the drain of transistor M2, and its source connected to the negative power supply terminal T21. Transistor M11 has its drain connected to the drain of transistor M1, its source connected to the negative power supply terminal T21, and its gate connected to the gate and drain of transistor M12. In other words, transistor M11 is current-mirror connected to transistor M12, copying and folding back the current flowing through transistor M12.

[0032] In this embodiment, the output buffer unit 5 is composed of two inverters 51 and 52. The input of inverter 51 is connected to the connection point between transistor M13 and constant current source 91, and its output is connected to the input of inverter 52. The output of inverter 52 is connected to output terminal T3 and outputs the output signal VOUT.

[0033] The voltage division ratio control unit 6 consists of a voltage monitoring circuit 67 that monitors the drain-source voltage of transistor M3 and an intermittent control circuit 68, and controls the voltage division ratio of the resistive voltage divider unit 2.

[0034] The voltage monitoring circuit 67 includes a voltage comparator 61 and a reference voltage source 62 that generates a reference voltage VR2 (= second reference voltage). In the voltage monitoring circuit 67, the non-inverting input of the voltage comparator 61 is connected to the connection point between the drain of transistor M3 and resistor R1, and the inverting input is connected to the divided voltage VA via the reference voltage source 62. The voltage comparator 61 outputs a low-level signal while the drain-source potential of transistor M3 is less than the reference voltage VR2, and outputs a high-level detection signal when it is equal to or greater than the reference voltage VR2. The detection signal output from the voltage comparator 61 is input to the intermittent control circuit 68.

[0035] The intermittent control circuit 68 comprises a transistor M4 and a control circuit section 66. Transistor M4 is composed of an N-channel field-effect transistor. The transistor's drain is connected in series with resistor R2, its source is connected to the negative power supply terminal T21, and its gate is connected to the control circuit section 66.

[0036] The on and off states of transistor M4 are controlled by the on and off signals generated by the control circuit unit 66. By intermittently turning on transistor M4, the control circuit unit 66 releases the current interruption state of the resistor voltage divider unit 2, and the drain-source voltage of transistor M3 is periodically monitored by the voltage monitoring circuit 67.

[0037] Next, the operation of the voltage detector 1 with the above configuration will be described below. First, we will describe the operation in the detection state where the divided voltage VA is lower than the reference voltage VREF and the output of output terminal T3 is at a low potential, that is, the output signal VOUT is approximately the negative power supply voltage VSS.

[0038] When the divided voltage VA is lower than the reference voltage VREF, more current flows from the constant current source 90 to transistor M1 than to transistor M2. Because transistor M11 is current mirrored to transistor M12, the gate voltage of transistor M13 rises.

[0039] As the gate voltage of transistor M13 increases, the drain current of transistor M13 increases and becomes greater than the current of the constant current source 91. The input of inverter 51 becomes low, and the output signal VOUT becomes low.

[0040] Next, we will explain the operation in the release state where the divided voltage VA is higher than the reference voltage VREF, and the output of output terminal T3 is at a high potential, i.e., the output signal VOUT is approximately the positive power supply voltage VDD.

[0041] When the divided voltage VA is higher than the reference voltage VREF, more current flows from the constant current source 90 to transistor M2 than to transistor M1. Because transistor M11 is current mirrored to transistor M12, the gate voltage of transistor M13 decreases.

[0042] As the gate voltage of transistor M13 decreases, the drain current of transistor M13 decreases and becomes smaller than the current of the constant current source 91. The input of inverter 51 becomes high potential, and the output signal VOUT becomes high potential.

[0043] Next, the current IS flowing through the input terminal T1 (resistive voltage divider 2) will be explained below with reference to the current characteristics shown in Figure 2.

[0044] In region D1 of equation 3, where the input voltage VS is low, i.e., the source voltage of transistor M3 is low, so the gate-source voltage of transistor M3 is above the threshold voltage of transistor M3. As a result, the drain-source voltage of transistor M3 becomes almost zero, and the potential difference between the non-inverting input and the inverting input of the voltage comparator 61, which monitors the drain-source voltage of transistor M3, becomes smaller than the reference voltage VR2. The output of the voltage comparator 61 becomes low, and the control circuit 66 controls transistor M4 to the ON state. Also, since the drain-source voltage of transistor M3 is almost zero, the divided voltage VA is the voltage divided by resistors R1 and R2. The divided voltage VA changes according to the voltage VS input to input terminal T1, and the current IS flowing through input terminal T1 is expressed by equation 5.

[0045]

number

[0046]

number

[0047]

number

[0048] Here, R1 is the resistance value of resistor R1, R2 is the resistance value of resistor R2, V GS2 V is the gate-source voltage of transistor M2. TH3 This is the threshold voltage of transistor M3.

[0049] From Equation 5, in region D1 of Equation 3, when the input voltage VS is low, the current IS flowing through the input terminal T1 fluctuates in proportion to the input voltage VS, but because the input voltage VS is low, the current IS flowing through the input terminal T1 is small. Note that the voltage VS1 shown in Equation 3 is the same as the detection voltage V shown in Equation 1 explained in the background art. DET It is provided in a larger size than that.

[0050] When the input voltage VS rises and reaches region D2 in equation 6, the source voltage of transistor M3 rises, the gate-source voltage drops, and the threshold voltage V TH3 This becomes equal to the threshold voltage V. Transistor M3 has a gate-source voltage that is equal to the threshold voltage V. TH3 Below this level, current can no longer flow. Therefore, transistor M3 will not be able to pass current when the gate-source voltage is below the threshold voltage V. TH3 The voltage divider voltage VA is limited to equal to VA, and it functions as a voltage limiting circuit for the voltage divider voltage VA. The limit value of the voltage divider voltage VA at this time is expressed by equation 4 VA REF This is the result. Furthermore, since the potential difference between the input voltage VS and the source voltage of transistor M3 becomes greater than the voltage drop across resistor R1, the drain-source voltage of transistor M3 increases, and the current IS flowing through the input terminal T1 is expressed by equation 7.

[0051]

number

[0052]

number

[0053] From Equation 7, in region D2 of Equation 6, even if the input voltage VS rises significantly above the voltage VS1 of the voltage detector 1, the divided voltage VA output from the resistive voltage divider 2 is limited by the action of transistor M3, so the current IS flowing through the input terminal T1 does not increase and is limited to a constant current.

[0054] When the input voltage VS reaches region D3 shown in Equation 8, the potential difference between the non-inverting and inverting inputs of the voltage comparator 61, which monitors the drain-source voltage of transistor M3, becomes greater than the reference voltage VR2. The voltage comparator 61 outputs a high-level detection signal. In response to the output of the detection signal, the control circuit 66 controls transistor M4 to the off state. When transistor M4 is turned off, the current flowing through the resistor voltage divider 2 is interrupted, and the current IS flowing through the input terminal T1 becomes zero.

[0055] Further, during the period in which the voltage comparator 61 outputs a High-level detection signal, the control circuit unit 66 intermittently turns on the transistor M4, and monitors the state of the input voltage VS based on the drain-source voltage of the transistor M3. The current IS flowing through the input terminal T1 is a current represented by Equation 7 at regular intervals, and the average current IS due to the intermittent operation AVE is suppressed to the current represented by Equation 9.

[0056] [Mathematical Formula]

[0057] [Mathematical Formula]

[0058] Here, D 68 is the duty ratio of the intermittent control signal generated by the intermittent control circuit 68.

[0059] That is, even if the voltage VS input to the input terminal T1 rises far above the voltage VS1, the current IS flowing through the resistance voltage dividing unit 2 is limited to a constant current when the input voltage VS is in the region of Equation 6, and is suppressed to a very small current when the input voltage VS is in the region D3 of Equation 8.

[0060] In other words, in the voltage detector 1 according to the first embodiment, even if the input voltage VS rises far above the voltage VS1, the current IS flowing through the input terminal T1 is suppressed, so an increase in current consumption can also be suppressed.

[0061] Accordingly, the effect of reducing current consumption is achieved.

[0062] (Second Embodiment) Next, a voltage detector 1B according to a second embodiment will be described with reference to FIG. 3. In FIG. 3, components identical to those in the circuit shown in FIG. 1 are designated by the same reference numerals, and detailed descriptions thereof are omitted.

[0063] As shown in the figure, the voltage detector 1B, similar to the first embodiment, includes a resistive voltage divider 2, a differential input 3, an output 4, an output buffer 5, and a voltage divider ratio control unit 6B.

[0064] The difference between the first and second embodiments is that the configurations of the voltage monitoring circuit 67B and the intermittent control circuit 68B are specified. The voltage monitoring circuit 67B of the second embodiment has a differential input section 671 (= second differential input section) and an output section 672 (= second output section). The differential input section 671 is composed of transistors M5 (= fifth transistor), M6 (= sixth transistor), M7 (= seventh transistor) and a constant current source 92. The output section 672 is composed of transistors M61 and M62.

[0065] Transistors M5 to M7 are composed of P-channel field-effect transistors. Transistors M61 and M62 are composed of N-channel field-effect transistors. Transistor M5 has its gate connected to the voltage divider voltage VA, and its drain connected to the drain of transistor M61. Transistor M6 has its gate connected to the connection point between the drain of transistor M3 and resistor R1, and its drain connected to the gate and drain of transistor M62. Transistor M7 has its gate and drain connected to the source of transistor M5, and its source connected to the source of transistor M6. Transistor M61 is current-mirror connected to transistor M62, copying and folding back the current flowing through transistor M62.

[0066] The constant current source 92 is connected between the positive power supply terminal T22 and the sources of transistors M6 and M7.

[0067] The voltage monitoring circuit 67B receives the signal output from the connection point between transistor M5 and transistor M61 as input to the intermittent control circuit 68B.

[0068] The intermittent control circuit 68B includes a transistor M4 and a control circuit unit 66B. The control circuit unit 66B includes an oscillator 63, an OR gate 64, and an inverter 65. The on / off state of transistor M4 is controlled by a signal output from the control circuit unit 66B. By turning on transistor M4 at regular intervals, the current interruption state of the resistor voltage divider 2 is released, and the drain-source voltage of transistor M3 is periodically monitored by the voltage monitoring circuit 67B.

[0069] The output signal of the voltage monitoring circuit 67B controls the startup of the oscillator 63 and is connected to the input of the inverter 65. One input of the OR gate 64 is connected to the output of the inverter 65, the other input is connected to the output of the oscillator 63, and the output is connected to the gate of transistor M4. The OR gate 64 and inverter 65 correspond to logic circuits.

[0070] With the above configuration, the source of transistor M5 is connected to the threshold voltage V of transistor M7, which is the source potential of transistor M6. GS7 The potential is supplied with the value subtracted. Therefore, the drain-source voltage of transistor M3 is the threshold voltage V. GS7 As a result, the current flowing through transistor M5 becomes greater than the current flowing through transistor M6, causing the connection point between transistors M5 and M61 to reach a high level. This causes the voltage monitoring circuit 67B to output a high-level detection signal to the intermittent control circuit 68B.

[0071] When a high-level detection signal is input to the inverter 65, the inverter 65 outputs a low-level signal to the OR gate 64. The OR gate 64 outputs a low-level off signal to the gate of transistor M4, turning transistor M4 off. The oscillator 63 outputs a high-level pulse signal at regular intervals. When a high-level pulse signal is input to the OR gate 64, the OR gate 64 outputs a high-level on signal to the gate of transistor M4, turning transistor M4 on.

[0072] Next, the current IS flowing through the input terminal T1 (resistive voltage divider 2) of the voltage detector 1B with the above configuration will be described below with reference to the current characteristics shown in Figure 2. The voltage detector 1B in this configuration is basically the same as in the first embodiment, except for the points described later.

[0073] The difference between the operation of the first embodiment and the second embodiment is that, in the first embodiment, the voltage monitoring circuit 67 compared and monitored the drain-source voltage of transistor M3 using the reference voltage VR2 as a reference voltage, whereas in the second embodiment, the voltage monitoring circuit 67B compares and monitors the gate-source voltage of transistor M7 (= second reference voltage) as a reference voltage.

[0074] In region D1 of equation 10, when the input voltage VS is in the first embodiment, the potential difference input to the gates of transistors M5 and M6, which constitute the differential input section 671 of the voltage monitoring circuit 67B that monitors the drain-source voltage of transistor M3, becomes smaller than the gate-source voltage of transistor M7. The output of the voltage monitoring circuit 67B becomes low, and transistor M4 turns on. Also, the divided voltage VA is the voltage divided by resistors R1 and R2 because the drain-source voltage of transistor M3 is almost zero. The divided voltage VA changes according to the voltage VS input to input terminal T1, and the current IS flowing through input terminal T1 is expressed by equation 11.

[0075]

number

[0076]

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[0077] From Equation 11, in region D1 of Equation 10, the current IS flowing through input terminal T1 fluctuates in proportion to the input voltage VS, but because the input voltage VS is low, the current IS flowing through input terminal T1 is small.

[0078] When the input voltage VS rises to region D2 in equation 12, as in the first embodiment, the transistor M3 has a gate-source voltage that reaches the threshold voltage V TH3 When the gate-source voltage falls below the threshold voltage V, current can no longer flow. TH3 It is limited to a voltage equal to and functions as a voltage limiting circuit for the divided voltage VA. The divided voltage VA at this time is expressed in equation 4 as VA REF This is the result. Furthermore, since the potential difference between the input voltage VS and the source voltage of transistor M3 becomes greater than the voltage drop across resistor R1, the drain-source voltage of transistor M3 increases, and the current IS flowing through the input terminal T1 is expressed by equation 13.

[0079]

number

[0080]

number

[0081] Here, V GS7 This is the gate-source voltage of transistor M7.

[0082] From equation 13, in region D2 of equation 12, even if the input voltage VS rises significantly above the voltage VS1 of the voltage detector 1B, the divided voltage VA output from the resistive voltage divider 2 is limited by the action of transistor M3, so the current IS flowing through the input terminal T1 does not increase and is limited to a constant current.

[0083] When the input voltage VS is in region D3 of equation 14, the potential difference input to the gates of transistors M5 and M6, which constitute the differential input section 671 of the voltage monitoring circuit 67B that monitors the drain-source voltage of transistor M3, becomes greater than the gate-source voltage of transistor M7. The voltage monitoring circuit 67B outputs a high-level detection signal, and the control circuit section 66B turns off transistor M4. As a result, the current flowing through the resistor voltage divider 2 is interrupted, and the current IS flowing through the input terminal T1 becomes zero.

[0084] Furthermore, during the period when the voltage monitoring circuit 67B outputs a high-level detection signal, the oscillator 63 intermittently generates a pulse signal. The OR gate 64 turns on transistor M4 each time a pulse signal is input, and monitors the state of the input voltage VS by the drain-source voltage of transistor M3. The current IS flowing through the input terminal T1 is expressed by equation 13 at regular intervals, but due to intermittent operation, the average current IS AVE As such, the current is suppressed to the current represented by Equation 15.

[0085]

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[0086]

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[0087] Here, D 68B This is the duty cycle of the intermittent control signal generated by the intermittent control circuit 68B.

[0088] In other words, even if the voltage VS input to the input terminal T1 rises significantly above the voltage VS1, the current IS flowing through the resistive voltage divider 2 is limited to a constant current in the region of equation 12 when the input voltage VS is in that region, and suppressed to a minute current in the region of equation 14.

[0089] In other words, in this second embodiment, even if the input voltage VS rises significantly above the voltage VS1, the voltage detector 1B suppresses the current IS flowing through the input terminal T1, thus also suppressing an increase in current consumption.

[0090] Therefore, the second embodiment, like the first embodiment, also achieves the effect of reducing current consumption.

[0091] In the voltage monitoring circuit 67B of the second embodiment described above, the reference voltage compared with the drain-source voltage of transistor M3 was generated by diode-connected transistor M7, but this is not the only option. A resistor may be connected, and the voltage drop across it may be used to generate the reference voltage. Alternatively, transistors M5 and M6, which form an input differential pair by connecting their respective sources, may be set to different threshold voltages, and the difference between these threshold voltages may be used as the reference voltage.

[0092] In the second embodiment described above, a specific embodiment using transistors M5 to M7 as the voltage monitoring circuit 67B for monitoring the drain-source voltage of transistor M3 was described, but this is not the only possible embodiment. Other well-known voltage monitoring circuits may also be used.

[0093] (Third embodiment) Next, the voltage detector 1C of the third embodiment will be described with reference to Figure 4. In Figure 4, components identical to those in the circuit shown in Figure 3 are given the same reference numerals, and their detailed descriptions are omitted.

[0094] As shown in the figure, the voltage detector 1C, similar to the second embodiment, includes a resistive voltage divider 2, a differential input 3, an output 4, an output buffer 5, and a voltage divider ratio control unit 6C.

[0095] The difference between the second and third embodiments lies in the configuration of the voltage monitoring circuit 67C. In the embodiment, the voltage monitoring circuit 67B was configured with transistors M5 to M7, M61, M62 and a constant current source 92, but in the second embodiment, it is configured with transistor M8 (= eighth transistor) and a constant current source 93 (= current source).

[0096] Transistor M8 is composed of a P-channel field-effect transistor. The source of transistor M8 is connected to the connection point between the drain of transistor M3 and resistor R1, the gate is connected to the voltage divider VA, and the drain is connected to the negative power supply terminal T21 via a constant current source 93.

[0097] The voltage monitoring circuit 67C receives an output signal from the connection point between transistor M8 and constant current source 93, which is then input to the intermittent control circuit 68B.

[0098] Next, the current IS flowing through the input terminal T1 (resistive voltage divider unit 2 and voltage divider ratio control unit 6C) of the voltage detector 1C with the above configuration will be described below with reference to the current characteristics shown in Figure 2. The voltage detector 1C in this configuration is basically the same as in the second embodiment, except for the points described later.

[0099] The difference between the operation of the second embodiment and the third embodiment is that, in the voltage monitoring circuit 67B of the second embodiment, the drain-source voltage of transistor M3 was compared and monitored using the gate-source voltage of transistor M7 as a reference voltage, whereas in the voltage monitoring circuit 67C of the third embodiment, the gate-source voltage of transistor M8 is compared and monitored using the gate-source voltage of transistor M8 as a reference voltage.

[0100] When the input voltage VS is in region D1 of equation 16, the drain-source voltage of transistor M3 becomes smaller than the threshold voltage of transistor M8. The output of the voltage monitoring circuit 67C becomes low, and transistor M4 turns on. Also, the divided voltage VA is the voltage divided by resistors R1 and R2 because the drain-source voltage of transistor M3 is almost zero. The divided voltage VA changes according to the voltage VS input to input terminal T1, and the current IS flowing through input terminal T1 is expressed in equation 17.

[0101]

number

[0102]

number

[0103] From Equation 17, in region D1 of Equation 16, when the input voltage VS is low, the current IS flowing through the input terminal T1 fluctuates in proportion to the input voltage VS. However, because the input voltage VS is low, the current IS flowing through the input terminal T1 is small.

[0104] When the input voltage VS is in the region of Equation 18, transistor M3 has a gate-source voltage that is equal to the threshold voltage V. TH3 When the gate-source voltage falls below the threshold voltage V, current can no longer flow, so the gate-source voltage is below the threshold voltage V. TH3 It is limited to a voltage equal to and functions as a voltage limiting circuit for the divided voltage VA. The divided voltage VA at this time is expressed in equation 4 as VA REF This is the result. Furthermore, since the potential difference between the input voltage VS and the source voltage of transistor M3 becomes greater than the voltage drop across resistor R1, the drain-source voltage of transistor M3 increases, and the current IS flowing through the input terminal T1 is expressed by equation 19.

[0105]

number

[0106]

number

[0107] Here, V TH8 This is the threshold voltage of transistor M8.

[0108] From Equation 19, in region D2 of Equation 18, even if the input voltage VS rises significantly above the voltage VS1 of the voltage detector 1C, the divided voltage VA output from the resistive voltage divider 2 is limited by the action of transistor M3, so the current IS flowing through the input terminal T1 does not increase and is limited to a constant current.

[0109] When the input voltage VS is in region D3 of equation 20, the drain-source voltage of transistor M3 becomes greater than the threshold voltage of transistor M8. The voltage monitoring circuit 67C outputs a high-level detection signal, the control circuit 66B turns off transistor M4, and the current flowing through the resistor voltage divider 2 is interrupted. The current IS flowing through the input terminal T1 is the current I generated by the constant current source 93 of the voltage monitoring circuit 67C. 93 It plays.

[0110] Furthermore, during the period when the voltage monitoring circuit 67C outputs a high-level detection signal, a pulse signal is generated by the oscillator 63. The control circuit 66B turns on transistor M4 each time a pulse signal is input and monitors the state of the input voltage VS by the drain-source voltage of transistor M3. The current IS flowing through the input terminal T1 is expressed by equation 19 at regular intervals, but due to intermittent operation, the average current IS AVE As such, the current is suppressed to the current represented by Equation 21.

[0111]

number

[0112]

number

[0113] Here, D 68B I is the duty cycle of the intermittent control signal generated by the intermittent control circuit 68B. 93 This is the current generated by the constant current source 93.

[0114] In other words, even if the voltage VS input to the input terminal T1 rises significantly above the voltage VS1, the current IS flowing through the resistive voltage divider 2 and the voltage divider ratio control unit 6C is limited to a constant current in the region of equation 18 when the input voltage VS is present, and suppressed to a minute current in the region D3 of equation 20 when the input voltage VS is present.

[0115] In other words, in this third embodiment, even if the input voltage VS rises significantly above the voltage VS1, the voltage detector 1C can suppress the increase in current consumption because the current IS flowing through the input terminal T1 is suppressed.

[0116] Therefore, the third embodiment, like the second embodiment, also achieves the effect of reducing current consumption.

[0117] (Other embodiments) The present invention is not limited to the embodiments described above, and can be modified, improved, etc., as appropriate. Furthermore, the material, shape, dimensions, number, placement, etc., of each component in the embodiments described above are arbitrary and not limited, as long as they can achieve the present invention.

[0118] For example, in the first to third embodiments described above, the transistors were composed of field-effect transistors, but the invention is not limited to this. At least one of the transistors may be replaced with bipolar transistors. In this case, "P channel" can be read as "PNP type," "N channel" as "NPN type," "gate" as "base," "source" as "emitter," and "drain" as "collector" in the explanation.

[0119] In the first to third embodiments described above, the gate of transistor M3 was connected to the sources of transistors M1 and M2, but this is not the only option. Transistor M3 may be configured as a depletion-type field-effect transistor, and its gate may be connected to the reference voltage VREF. In this case, VA REF This is expressed in Equation 22.

[0120]

number

[0121] Here, V TH3D This is the threshold voltage of the depletion-type field-effect transistor M3.

[0122] In the first to third embodiments described above, the circuit currents of the differential input section 3 and output section 4 are not controlled in accordance with the on / off switching of transistor M4, but the invention is not limited to this. The current consumption may be further reduced by configuring the circuit to interrupt the circuit currents of the differential input section 3 and output section 4 when transistor M4 is off, while maintaining a high potential for the output signal VOUT.

[0123] In the first to third embodiments described above, the output section 4 was configured with transistors M11 to M13 and a constant current source 91, but it is not limited to this configuration. Other embodiments are possible as long as the circuit generates a voltage corresponding to the current difference of the differential current generated by transistors M1 and M2. [Explanation of symbols]

[0124] 1,1B,1C Voltage Detector 2. Resistive voltage divider section 3. Differential Input Section (First Differential Input Section) 4. Output section (first output section) 61 Voltage comparator 62 Reference voltage source 63 Oscillator 64 OR gates (logic circuits) 65 Inverter (Logic Circuit) 671 Differential input section (second differential input section) 672 Output section (second output section) 66, 66B Control Circuit Section 67, 67B, 67C Voltage Monitoring Circuit 68, 68B Intermittent control circuit 93 Current source M1 Transistor (First Transistor) M2 transistor (second transistor) M3 transistor (third transistor) M4 transistor (switch element, fourth transistor) M5 transistor (the fifth transistor) M6 transistor (the sixth transistor) M7 transistor (the seventh transistor) M8 transistor (8th transistor) R1 First resistor R2 Second resistor VA voltage divider VS Input Voltage VREF Reference voltage (first reference voltage) VR2 Reference voltage (second reference voltage)

Claims

1. A resistor voltage divider having a first resistor and a second resistor that divide the input voltage, A first differential input unit having a first transistor to which a divided voltage obtained by dividing the input voltage is supplied to the gate or base, and a second transistor to which a first reference voltage is supplied to the gate or base, and generating a differential current with a current ratio corresponding to the difference between each gate voltage or each base voltage, A voltage detector comprising a first output unit that generates a voltage corresponding to the current difference of the differential current, The aforementioned resistive voltage divider section is The system further comprises a third transistor, which is provided between the first resistor and the second resistor, and whose source or emitter is connected to the gate or base of the first transistor, and whose gate or base is connected to the source or emitter of the first transistor. A voltage monitoring circuit for monitoring the drain-source voltage or collector-emitter voltage of the third transistor, The intermittent control circuit includes a switch element connected in series with the first resistor and the second resistor to interrupt the current flowing through the first resistor and the second resistor, and a control circuit unit that turns off the switch element and intermittently turns it on when the voltage monitoring circuit detects a drain-source voltage or collector-emitter voltage that is equal to or greater than a second reference voltage. Voltage detector.

2. In the voltage detector according to claim 1, The aforementioned switch element is It consists of a fourth transistor connected in series with the first resistor and the second resistor, Voltage detector.

3. In the voltage detector according to claim 1, The aforementioned control circuit unit is An oscillator that intermittently outputs pulse signals, The logic circuit includes a detection circuit that outputs an off signal to turn off the switch element when a detection signal is output from the voltage monitoring circuit indicating that a drain-source voltage or collector-emitter voltage equal to or greater than the second reference voltage has been detected, and outputs an on signal to turn on the switch element when the pulse signal is output. Voltage detector.

4. In the voltage detector according to claim 1, The voltage monitoring circuit, The first input is connected to the drain or collector of the third transistor, and the second input is connected to the source or emitter of the third transistor via a reference voltage source that outputs the second reference voltage, and the device has a voltage comparator that compares the drain voltage or collector voltage with the source voltage or emitter voltage obtained by adding the second reference voltage. Voltage detector.

5. In the voltage detector according to claim 1, The voltage monitoring circuit, A second differential input unit comprising: a fifth transistor whose gate or base is connected to the source or emitter of the third transistor; a sixth transistor whose gate or base is connected to the drain or collector of the third transistor; and a voltage generating element that generates the second reference voltage connected between the sources or emitters of the fifth transistor and the sixth transistor, wherein the second differential input unit generates a differential current with a current ratio corresponding to the difference between the gate voltages or base voltages of the fifth transistor and the sixth transistor; The device includes a second output unit that outputs a voltage corresponding to the current difference of the differential current generated by the second differential input unit as a detection signal indicating that a drain-source voltage or collector-emitter voltage equal to or greater than the second reference voltage has been detected. Voltage detector.

6. In the voltage detector according to claim 5, The voltage generating element is composed of a seventh transistor connected by a diode. Voltage detector.

7. In the voltage detector according to claim 5, The voltage generating element is composed of a third resistor, Voltage detector.

8. In the voltage detector according to claim 1, The voltage monitoring circuit, A second differential input unit having a fifth transistor whose gate or base is connected to the source or emitter of the third transistor, and a sixth transistor whose gate or base is connected to the drain or collector of the third transistor, which generates a differential current with a current ratio corresponding to the difference between the gate voltages or base voltages of the fifth and sixth transistors, The device also includes a second output unit that outputs a voltage corresponding to the current difference of the differential current generated by the second differential input unit as a detection signal indicating that a drain-source voltage or collector-emitter voltage equal to or greater than the second reference voltage has been detected. The threshold voltage of the fifth transistor is set lower than the threshold voltage of the sixth transistor. The threshold voltage difference between the fifth transistor and the sixth transistor corresponds to the second reference voltage. Voltage detector.

9. In the voltage detector according to claim 1, The voltage monitoring circuit, An eighth transistor having its source or emitter connected to the drain or collector of the third transistor, and its gate or base connected to the source or emitter of the third transistor, The device comprises a current source connected in series with the eighth transistor, A detection signal is output indicating that a drain-source voltage or collector-emitter voltage greater than or equal to the second reference voltage has been detected at the connection point of the eighth transistor and the current source. Voltage detector.

10. A resistor voltage divider having a first resistor and a second resistor that divide the input voltage, A first differential input unit having a first transistor to which a divided voltage obtained by dividing the input voltage is supplied to the gate or base, and a second transistor to which a first reference voltage is supplied to the gate or base, and generating a differential current with a current ratio corresponding to the difference between each gate voltage or each base voltage, A voltage detector comprising a first output unit that generates a voltage corresponding to the current difference of the differential current, The aforementioned resistive voltage divider section is A third transistor is provided between the first resistor and the second resistor, and is composed of a depletion-type electrolytic effect transistor whose source is connected to the gate or base of the first transistor, and to which the gate is supplied with the first reference voltage. The device further comprises a switch element connected in series with the first resistor and the second resistor, which interrupts the current flowing through the first resistor and the second resistor. A voltage monitoring circuit that monitors the drain-source voltage of the third transistor, The voltage monitoring circuit includes an intermittent control circuit that turns off the switch element and intermittently turns it on when it detects a drain-source voltage greater than or equal to a second reference voltage. Voltage detector.

11. In the voltage detector according to claim 1, When the switch element is off, the circuit currents of the differential input and output sections are interrupted. Voltage detector.

12. In the voltage detector according to any one of claims 1 to 11, At least one of the aforementioned transistors is composed of bipolar transistors. Voltage detector.

13. In the voltage detector according to any one of claims 1 to 11, At least one of the aforementioned transistors is composed of an electrolytic effect transistor. Voltage detector.

Citation Information

Patent Citations

  • Voltage detection circuit

    JP2004198335A

  • Voltage Detector

    JP7131965B2