Program, information processing system, and information processing method

Abstract

The aim is to reduce the burden of ensuring system quality. [Solution] A program that causes a computer to execute a first acquisition step of acquiring a test code that describes one or more logical elements 2 to be tested and the test content for one or more logical elements 2; a second acquisition step of acquiring the results of the tests performed by the test code; and a generation step of generating presentation information that shows the correspondence between the tests indicated by the test code and each of the one or more logical elements 2, and the results of the tests performed by the test code.

Description

Technical Field

[0001] The present invention relates to a program, an information processing system, and an information processing method.

Background Art

[0002] When constructing a system, processing is performed in the order of model design, implementation of the designed model by code, and verification of the implemented code, and the code is modified or the like according to the verification result. As a technique for verifying a software program, for example, the technique described in Patent Document 1 has been proposed.

[0003] Patent Document 1 discloses a method and system for verifying a software program in an integrated development environment, and the method for verifying a software program in an integrated development environment includes generating source code of the software program that includes logging statements based on specifications of the software program. Further, this method includes executing the source code having the logging statements, and generating one or more log files during execution of the source code based on the logging statements. Further, this method includes generating a representation of the source code in a modeling language using the one or more log files. This method includes verifying that the source code conforms to the specifications by comparing the representation of the source code in the modeling language with the specifications in the modeling language.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of Invention

Problems to be Solved by the Invention

[0005] Incidentally, in modern system development, systems are composed of a large number of interconnected modules, and even if there are no problems with the verification of a module individually, problems may arise when that module is linked with other modules. No method for intuitively understanding the relationships between such multiple modules has been disclosed in prior art, and the difficulty in understanding the relationships between modules has placed a burden on ensuring system quality.

[0006] This invention has been made in view of these circumstances and aims to reduce the burden of ensuring the quality of the system. [Means for solving the problem]

[0007] In a program according to a first aspect of the present invention, a first acquisition step is to obtain a computer a test code that describes one or more logical elements to be tested and the test content for the one or more logical elements, The system performs a second acquisition step of obtaining the results of the tests performed by the test code, and a display control step of controlling the system to display information showing the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code.

[0008] The presented information may further include the test results shown by the test code for each of the one or more logical elements.

[0009] If the test results from the test code indicate that the test has failed, the display control step may be controlled to display information indicating that the test from the test code has failed for each of the one or more logical elements.

[0010] In the display control step, the system may control the display to show presentation information including nodes that represent the tests indicated by the test code and each of the one or more logical elements, and edges that represent the correspondence between the tests indicated by the test code and each of the one or more logical elements.

[0011] In the display control step, the present information is displayed in a different display manner depending on the success rate of the test associated with each of the one or more logical elements.

[0012] The test code further includes a selection step that identifies the verification elements for each of the multiple verification items included in the test code, and the one or more logical elements that each of the multiple verification items is to be verified, and in the display control step, the display information may be shown that indicates the correspondence between the one or more verification elements and the one or more logical elements, and for each of the one or more logical elements, the verification result of the verification item that is to be verified for that logical element.

[0013] An information processing system in a second aspect of the present invention includes: a first acquisition unit that acquires a test code describing the test content for one or more logical elements; a second acquisition unit that acquires the results of the tests performed by the test code; and a display control unit that controls the system to display presentation information showing the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code.

[0014] A third aspect of the present invention relates to an information processing method which includes: a first acquisition step of acquiring a test code that a computer executes, which describes one or more logical elements to be tested and the test content for the one or more logical elements; a second acquisition step of acquiring the results of the tests performed by the test code; and a display control step of controlling the computer to display presentation information that shows the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code. [Effects of the Invention]

[0015] According to the present invention, it is possible to present information for reducing the burden associated with ensuring system quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] [Figure 1] FIG. 2 is a diagram illustrating a configuration of an information processing apparatus 1. [Figure 2] FIG. 3 is a block diagram illustrating a functional configuration of the information processing apparatus 1. [Figure 3] FIG. 4 is a block diagram illustrating a functional configuration of a reflection unit 140. [Figure 4] FIG. 5 is a flowchart illustrating an overview of processing executed by the information processing apparatus 1. [Figure 5] FIG. 6 is a flowchart illustrating an operation flow of the reflection unit 140. [Figure 6] FIG. 7 is a diagram for explaining the operation of the reflection unit 140. [Figure 7] FIG. 8 is a diagram illustrating an example of presentation information. [Figure 8] FIG. 9 is a diagram illustrating an example of presentation information in which a verification result is reflected. [Figure 9] FIG. 10 is a diagram illustrating an example of presentation information of logical elements including progress information and the like. [Figure 10] FIG. 11 is a diagram illustrating an example of presentation information of logical elements including progress information and the like. [Figure 11] FIG. 12 is a diagram illustrating an extended example of presentation information. [Figure 12] FIG. 13 is a diagram illustrating a flow of integration of design and implementation. [Figure 13] FIG. 14 is a diagram for explaining an operation of a reflection unit 140 according to a second embodiment. [Figure 14] FIG. 15 is a flowchart illustrating an overview of processing executed by an information processing apparatus 1 according to the second embodiment. [Figure 15] FIG. 16 is a diagram illustrating an example of presentation information in the second embodiment. [Figure 16] FIG. 17 is a diagram illustrating an example of presentation information in the second embodiment. [Figure 17] This figure shows an example of matrix information. [Modes for carrying out the invention]

[0017] Embodiments of this disclosure will be described below with reference to the drawings. The various features shown in the embodiments below are interchangeable.

[0018] Incidentally, the program for implementing the software appearing in one embodiment may be provided as a non-transitory computer-readable medium, or it may be provided as a downloadable medium from an external server, or it may be provided so that the program is launched on an external computer and its functions are realized on a client terminal (so-called cloud computing).

[0019] Furthermore, in various information processing according to one embodiment, an input and an output corresponding to the input can be realized. Here, as long as an output is obtained as a result of the input, the form of the information referenced in such information processing (hereinafter referred to as reference information) is not limited. The reference information may be, for example, rule-based information such as a database, a lookup table, or a predetermined function (including a decision formula such as a regression equation constructed by a statistical method), or a trained model that has been pre-trained to learn the correlation between input and output, or a generative AI such as a large-scale language model or visual language model that can output a desired result by inputting a prompt.

[0020] Furthermore, in one embodiment, "part" may include, for example, hardware resources implemented by a circuit in a broad sense, and the information processing of software that can be specifically realized by these hardware resources. Also, in one embodiment, various types of information are handled, and this information can be represented, for example, by the physical values ​​of signal values ​​representing voltage and current, the high or low values ​​of signal values ​​as a set of binary bits composed of 0s or 1s, or by quantum superposition (so-called qubits), and communication and calculations can be performed on a circuit in a broad sense.

[0021] Furthermore, a circuit in a broad sense is a circuit realized by combining at least a suitable combination of circuits, circuits, processors, and memory. The processor may be a general-purpose processor or a dedicated circuit. In other words, it includes application-specific integrated circuits (ASICs), programmable logic devices (for example, simple programmable logic devices (SPLDs), complex programmable logic devices (CPLDs), and field programmable gate arrays (FPGAs)), etc.

[0022] [First Embodiment] 1. Configuration of the information processing device Figure 1 shows the configuration of the information processing device 1. As shown in the figure, the information processing device 1 has a processor 11, a storage unit 12, a temporary storage unit 13, an external device connection unit 14, and a communication unit 15, and these components are electrically connected within the information processing device 1 via a communication bus 16.

[0023] The processor 11 is implemented, for example, by a Central Processing Unit (CPU), and operates according to a predetermined program stored in the memory unit 12, realizing various functions. That is, information processing by software stored in the memory unit 12 is concretely realized by the processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11. These will be described in more detail in the next section. Note that the processor 11 is not limited to a single unit, and may be implemented with multiple processors 11 for each function, or a combination thereof.

[0024] The memory unit 12 is a non-volatile storage medium that stores various types of information. This can be implemented using a storage device such as a hard disk drive (HDD) or a solid state drive (SSD). The memory unit 12 can also be located in a separate device that can communicate with the information processing device 1.

[0025] The temporary storage unit 13 is a volatile storage medium. This is implemented by memory such as Random Access Memory (RAM), and stores information (arguments, arrays, etc.) that is temporarily needed when the processor 11 is operating.

[0026] The external device connection section 14 is a connection section that conforms to standards such as Universal Serial Bus (USB) and High-Definition Multimedia Interface (HDMI®), and allows connection of input devices such as keyboards and display devices such as monitors.

[0027] The communication unit 15 is a communication means conforming to, for example, a Local Area Network (LAN) standard, and enables communication between the information processing device 1 and a network such as the Internet via the Local Area Network.

[0028] Furthermore, the information processing device 1 can utilize general-purpose server computers or personal computers, and it is also possible to configure the information processing device 1 using multiple computers.

[0029] 2. Functions of the Information Processing Device 1 Next, we will describe the information processing system. The information processing system is an information processing system consisting of at least one device, and includes at least one processor capable of executing each step of the program described later. Here, an information processing system consists of one or more devices or components. Therefore, even an information processing device 1 alone is included in the information processing system. In other words, the devices that constitute the information processing system are, for example, information processing devices 1, and the information processing system is realized by one or more information processing devices 1. In the following, we will describe the case in which an information processing system is configured with one information processing device 1 as an example.

[0030] The functions of the information processing device 1 will now be described. The information processing device 1 implements each of the functional units described later by operating according to a program. This program causes at least one computer to execute each of the steps described later. Specifically, the processor 11, which is hardware, operates based on the program stored in the memory unit 12, that is, the software, to implement each of the functional units described later. At this time, the processor 11 operates the memory unit 12, the temporary storage unit 13, the external device connection unit 14, and the communication unit 15 as needed.

[0031] Figure 2 is a block diagram showing the functional configuration of the information processing device 1. As shown in the figure, the information processing device 1 comprises a design unit 110, an implementation unit 120, a verification unit 130, and a reflection unit 140. In other words, information processing by software stored in the storage unit 12 is concretely realized by a processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11.

[0032] Specifically, the design unit 110 is a functional unit that designs the model, the implementation unit 120 is a functional unit that implements the model designed by the design unit 110 using code, the verification unit 130 is a functional unit that verifies the code implemented by the implementation unit 120, and the reflection unit 140 is a functional unit that reflects the verification results from the verification unit 130 into the model designed by the design unit 110. Note that the design unit 110, implementation unit 120, and verification unit 130 can each be implemented using general-purpose software. In that case, depending on the specifications of each software, information may be passed from the design unit 110 to the reflection unit 140, or from the implementation unit 120 to the reflection unit 140, as shown by the dashed arrows in Figure 2.

[0033] Next, the functions of the reflection unit 140 will be described. Figure 3 is a block diagram showing the functional configuration of the reflection unit 140. As shown in the figure, the reflection unit 140 comprises a specification unit 141, an acquisition unit 142, and a generation unit 143. The specification unit 141 performs a specification step, in which it identifies the logical elements to be verified and the verification items for the logical elements from the code implemented based on the model. The specification unit 141 may also acquire test code and, based on the acquired test code, identify one or more logical elements to be tested and the verification items for each of the one or more logical elements. The test code describes one or more logical elements to be tested and the verification items for each of the one or more logical elements. The verification items, as an example, describe the verification item name, the content of the test, and the method for determining pass or fail. The test code may contain multiple verification items. The specification unit 141 may acquire multiple test codes. The acquisition unit 142 performs an acquisition step, in which it acquires the verification results of the logical elements. The generation unit 143 executes a generation step, in which it associates verification results with logical elements and generates presentation information that represents the model in a diagram. The model represented in the diagram, that is, the model designed by the design unit 110, is, for example, a model described in a modeling language or a model described on a modeling tool. With this configuration, various verification functions of this program, described later, can be implemented for models described in a modeling language or models described on a modeling tool.

[0034] 3. Information Processing Methods This section describes the information processing method performed by the information processing system (in this case, the information processing device 1). The order of the processes included in the information processing method can be rearranged as appropriate, multiple processes may be executed simultaneously, and some processes may be omitted.

[0035] 3.1 Overview As mentioned above, the information processing device 1 comprises at least one processor 11, which functions as the following parts by reading a program. In other words, such an information processing method comprises steps corresponding to each part of the information processing system. From another perspective, such a program causes a computer to execute steps corresponding to each part of the information processing system. Figure 4 is a flowchart outlining the processing performed by the information processing device 1. The steps shown in Figure 4 will be described below.

[0036] First, in the process shown in Figure 4, in a specific step, the logical element 2 to be verified and the verification item 3 for the logical element 2 are identified from the code implemented based on the model (step S001). In the acquisition step, the verification result 4 of the logical element 2 is acquired (step S002). In the generation step, the verification result 4 is associated with the logical element 2 to generate presentation information that represents the model as a diagram (step S003). With this configuration, the verification results of the implemented code can be reflected in the designed model, making it possible to verify the consistency between design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, and as a result, it is possible to realize an environment that continuously produces high-quality development deliverables. In addition, a large amount of verification results can be reflected in the design model all at once, making it possible to prevent discrepancies between the design model and the implemented code.

[0037] 3.2 Specific Examples Specific examples may be included within the scope defined in the overview described above. Figure 5 is a flowchart showing the operation flow of the reflection unit 140. Figure 6 is a diagram illustrating the operation of the reflection unit 140. In the specific example, it is assumed that a user who has implemented source code and test code in the implementation environment included in this program performs tests on the source code. Specifically, the user presses (for example, clicks, taps, etc.) a button for executing tests included in the user interface of the implementation environment, and the tests are executed.

[0038] When the initial press operation is performed, the identification unit 141 first identifies the logical element 2 from the source code and test code implemented by the implementation unit 120 (step S101), and then identifies the verification item 3 for the identified logical element 2 (step S102). In other words, as an identification step, the identification unit 141 identifies the logical element 2 to be verified and the verification item 3 for logical element 2 from the code implemented based on the model. Since the source code and test code are written according to predetermined rules, the logical element 2 and the verification item 3 can be identified according to the rules and specifications of the relevant programming language.

[0039] Next, the reflection unit 140 causes the verification unit 130 to perform verification and waits for the verification to be completed (step S103). Note that step S103 in Figure 3 is not an operation of the reflection unit 140, but is included for explanatory purposes.

[0040] Once the verification by the verification unit 130 is complete, the reflection unit 140 records the verification result 4 obtained by the acquisition unit 142, associating it with the corresponding test item (step S104). In other words, the acquisition unit 142 acquires the verification result 4 of the logical element 2 as an acquisition step.

[0041] Next, in response to user actions, the user transitions from the implementation environment screen to the model design environment screen (step S105).

[0042] Next, in response to user input, the specific unit 141 syntactically analyzes the contents of the implemented test code and extracts a list of verification items 3, which previously had to be done manually, onto the user interface of the model design environment (step S106).

[0043] The generation unit 143 then generates presentation information in a manner that allows the user to grasp the list of verification items 3 (step S107). The generated presentation information may be displayed on a display (not shown) connected via the external device connection unit 14. The generation unit 143 may also be controlled to display the presentation information on another device via the communication unit 15. This allows the user to grasp the verification items 3, which have been automatically listed as described above, and the corresponding verification results 4, on the model design environment through the generated presentation information. Further details will be explained in the next section. In other words, as a generation step, the generation unit 143 associates the verification results 4 with the logical elements 2 and generates presentation information that represents the model as a diagram.

[0044] The above is the processing flow for a specific example. Please note that the assumptions and processing flow described above are merely examples and are not exhaustive. For example, step S107 may be executed before steps S105 and S106. In any case, the user can grasp the verification items 3, which are automatically listed as described above, and the corresponding verification results 4, through the generated presentation information, within the model design environment. While it was previously impossible to visually confirm the consistency between design and implementation, the above configuration makes it possible to prevent discrepancies between the design model and the implemented code, which have traditionally been performed independently.

[0045] 4. Presentation information Next, the presentation information generated by the generation unit 143 will be explained. Figure 7 shows an example of the presentation information. The presentation information shown in this figure is a diagrammatic representation of the model designed by the design unit 110, and consists of logical elements 201, 202, 203, 204, 205, and 206. It also shows that logical element 201 is composed of logical elements 202, 203, 204, 205, and 206. Each logical element 2 has a corresponding verification item 3, and the verification items 3 are automatically listed in the user interface of the model design environment. For example, when logical element 202 is referenced, verification items 3 such as fff(), ggg(), hhh(), etc. are automatically listed. For example, if there are 1000 verification items 3, it would be necessary to input 1000 verification items 3 in the model design environment, but this program eliminates that effort. In particular, because the relationships between multiple logical elements 2 can be visually grasped, for example, if there are logical elements 2 that follow each other in series, it can be visually and intuitively understood that if the verification of the preceding logical element 2 fails, the verification of the subsequent logical element 2 will also likely fail. Furthermore, not only does this ensure consistency between design and implementation, but it also allows for the judgment of the validity of the verification itself within the design model. In other words, it realizes an environment in which logical consistency can be grasped end-to-end throughout the entire process of design, implementation, and verification. Note that the relationships between logical elements in the presented information may be generated based on the interrelationships between logical elements described in the source code.

[0046] Furthermore, the presentation information generated by the generation unit 143 will reflect the verification results if verification is performed by the verification unit 130. Figure 8 shows an example of presentation information that reflects the verification results. The presentation information is represented in a manner that differs depending on whether the verification result is successful (i.e., the verification passed) or unsuccessful (i.e., the verification failed), for example, by using different colors to represent the logical elements. In the example shown in Figure 8, logical elements 202 and 204 were successfully verified and are represented in a color that indicates successful verification, such as green. On the other hand, logical elements 201, 203, and 205 are represented in a color that indicates unsuccessful verification, such as red. With this configuration, the success or failure of the verification result of the implemented code can be recognized through easily understandable visual information such as the difference in color.

[0047] Furthermore, the displayed information is represented by a color that is different from the color that represents the logical element corresponding to the verification result compared to the color that represents the logical element that does not correspond to the verification result. In the example shown in Figure 8, logical element 206 does not correspond to the verification result, so it is represented by a different color from logical elements 201 and 202, for example, white. With this configuration, the verification result of the implemented code can be recognized through easily understandable visual information such as the difference in color. Note that the verification by the verification unit 130 may be performed repeatedly, and in this case, the displayed information may be displayed in a manner that maintains the same color as before for the logical elements that do not correspond to the verification result. With this configuration, the user can recognize the verification result of the implemented code more easily by not changing the color of the logical elements that do not correspond to the verification result.

[0048] Incidentally, verification by the verification unit 130 is performed for each verification item, but a logical element may contain multiple verification items. In this case, the color of the logical element shown in the presentation information may not only represent the color for successful verification and the color for unsuccessful verification, but may also represent logical elements that have successfully verified more than half of the verification items with a color indicating that, for example, yellow. Furthermore, the presentation information may be displayed so that the color representing the logical element corresponds to the percentage of successful verification results. With this configuration, multiple verification items among the verification results of the implemented code can be recognized through easily understandable visual information such as color differences.

[0049] Furthermore, if a logical element includes multiple verification items, the displayed information may be configured to show progress information representing the percentage of successful verification results, associated with the logical element corresponding to that progress information. Alternatively, the logical element may be displayed in a manner in which a string indicating the verification result (e.g., success or failure) is associated with the logical element corresponding to the verification result. This configuration allows for easy understanding of the progress of multiple verification items and enables users to recognize the verification results more clearly. Figures 9 and 10 show examples of displayed information for logical elements that include progress information. As shown in these figures, logical element 210 includes a name 211, summary information 212, progress status information 213, and verification result information 214. This logical element 210 is used as a substitute for logical elements 201 and 202 shown in Figure 8.

[0050] Name 211 is the name of the logical element 210, and summary information 212 is information that shows an overview of the definition information and functions included in the logical element 210. Progress information 213 shows the percentage of verification items that have been successfully verified by the verification unit 130 as the progress status (indicated as test success rate in the figure). For example, if there are 10 verification items and 5 of them have been successfully verified, the progress status will be 50%. Verification result information 214 is string information that shows the verification result. By changing the color of the progress bar 213B included in the progress status information 213 to the color that appears when the progress information of the logical element 210 reaches 100%, that is, when all verification items have been successfully verified (for example, green), the color of the logical element 210 is unified, as shown in Figure 10, and the visibility of the diagram including the logical element 210 is improved.

[0051] 5. Expansion of the information presented Here, we will explain an example of extending the presented information. Figure 11 shows an example of extending the presented information. As shown in the figure, when progress information is included in the logical elements contained in the diagram of the presented information, this progress information can be displayed as a graph. This graph is generated for each logical element, and graphs showing the progress information of multiple logical elements can be displayed side by side. With this configuration, the progress of multiple verification items can be easily grasped through easy-to-understand visual information such as graphs. In this example, there are 110 successes and 7 failures. In particular, when there are a large number of verification items, such as more than 100, the success rate can be instantly grasped by the user through visual information such as graphs.

[0052] 6. Integration of Design and Implementation As explained above, by using the information processing device 1, it becomes possible to display verification results that demonstrate the validity of the implementation in the design domain model, thereby suppressing the discrepancy between design and implementation and enabling development to proceed. As a result, it becomes possible to integrate the designed model with the implementation based on that model. Figure 12 is a diagram showing the flow of design and implementation integration. If design and implementation are not integrated, there are problems such as the design information not being updated even though the design and implementation are completely different, the inability to grasp the comprehensiveness of verification for the entire system, and the repetition of ad-hoc verification with no end in sight. One of the reasons for these is that opportunities to access design information are gradually lost during the design, implementation, and verification process.

[0053] In contrast, if design and implementation are integrated, • Reflecting the vast amount of unit test results into the design model (UML, SysML) all at once • Unit test date and time, as well as the location and cause of test failures, can also be reflected. • Successful elements are green, and unsuccessful elements are red, allowing for instant identification by color. • Supports large-scale development projects • Contributes to updating design information in organizations involved in design, implementation, and verification. • Ideal for building a system that ensures consistency between design, implementation, and verification. • Implementation can be visually confirmed on the design information, making it efficient to understand the implementation status. • Visual decision-making is possible, which contributes to maintaining motivation in the development environment. This makes such things possible.

[0054] 7. Other With respect to the information processing system according to the above-described embodiment, the following embodiments may be adopted.

[0055] At least one of the devices included in the information processing system (e.g., information processing device 1) may be located outside of Japan. For example, information processing device 1 may be located outside of Japan, and a user terminal connected to information processing device 1 via a network may be located in Japan. Similarly, a user may access information processing device 1 located in Japan from outside of Japan using their own user terminal. Such a configuration can also be, for example, a type of SaaS using a website provided by information processing device 1. In such a service, it would be desirable for the user to be able to access the website and upload predetermined information, such as test code, to obtain presented information that reflects the verification results 4 in the model. In other words, according to this configuration, a more convenient experience can be provided to the user through various management methods.

[0056] In one embodiment, various functional units are described as functional units implemented by the processor 11 of the information processing device 1, but at least a part of these may be implemented as functional units implemented by a server other than the information processing device 1. Alternatively, they may be implemented as functional units implemented by the processor of the user terminal. Furthermore, the various information described in the above example may be stored not only in the storage unit 12 of the information processing device 1, but also distributedly on other external devices using blockchain technology or the like.

[0057] [Second Embodiment] Next, the information processing device 1 according to the second embodiment will be described. In the following, components identical to those in the first embodiment will be denoted by the same reference numerals, and their descriptions will be omitted. The information processing device 1 according to the second embodiment differs from the information processing device 1 according to the first embodiment in that it displays presentation information showing the relationship between the logical elements 2 and the test code. By having such a differing configuration, the second embodiment can present information that facilitates understanding the relationships between the logical elements 2 that are related to each other via the test code.

[0058] The operation of the information processing device 1 according to the second embodiment will be described with reference to Figures 13 and 14. Figure 13 is a diagram illustrating the operation of the reflection unit 140 according to the second embodiment. Figure 14 is a flowchart showing an overview of the processing performed by the information processing device 1 according to the second embodiment. The flowchart shown in Figure 14 is, as an example, started when an operation to perform a test is performed.

[0059] The acquisition unit 142 acquires test code (S201). The acquisition unit 142 may acquire multiple test codes. The identification unit 141 parses the acquired test code and identifies one or more logical elements 2 to be verified and verification items 3 in the test code (S202). As an example, the identification unit 141 may automatically acquire the association with the corresponding logical element 2 by parsing the target class name or function name from test code written with a common unit test framework such as JUnit or pytest. The identification unit 141 may further identify the logical element 2 and the verification item 3 for that logical element 2 based on the source code as described above.

[0060] The identification unit 141 may identify the verification element 5. The verification element 5 is an element that groups one or more verification items 3 according to the subject or purpose of the test. As an example, the identification unit 141 identifies the verification element 510 and the verification items 3 included in the verification element 5 based on the unit in which the verification items 3 are described in the test code. Alternatively, the verification element 5 to which each verification item 3 belongs may be specified in advance in the test code. Note that there may be a one-to-one relationship between the verification element 5 and the verification item 3, or there may be a one-to-one relationship between the test code and the verification element 5.

[0061] Next, the verification unit 130 executes the test code acquired by the acquisition unit 142 (S203). For example, the verification unit 130 stores the verification results for each of the verification items 3 indicated by the test code in the storage unit 12. The verification unit 130 may also output the verification results to the acquisition unit 142. The acquisition unit 142 acquires the test results from the test code executed by the verification unit 130 (S204).

[0062] The generation unit 143 generates presentation information that shows (1) the correspondence between the test indicated by the test code and one or more logical elements 2, and (2) the results of the test performed by the test code (S205). The generation unit 143 controls the display of the presentation information on a display (not shown) connected via the external device connection unit 14 (S206). The generation unit 143 may also control the display of the presentation information on another device via the communication unit 15.

[0063] Referring to Figure 15, the information presented in the second embodiment will be described. The presented information includes the identified logical element 210 and the verification element 510. The information displayed in the logical element 210 has already been described.

[0064] A verification element 510 includes, for example, a test name 511, progress status information 512, and verification result information 513. The test name 511 is the name assigned to the verification element 510. The progress status information 512 is information for quantitatively indicating the progress of the verification items included in the verification element 510. The generation unit 143 calculates the success rate for each verification element 510 based on the verification results of the verification items 3 associated with the verification element 510. For example, if 98 out of 100 verification items included in that verification element 510 are successful, the success rate of that verification element 510 is considered to be 98%. In other words, the presented information includes information that numerically indicates the success rate of the verification results for each logical element 2 and each verification element 510. With this configuration, the verification results for each logical element and each verification element can be quantitatively evaluated, making it possible to numerically identify quality bottlenecks and provide objective indicators that contribute to continuous improvement.

[0065] The presented information may be configured to include directional lines indicating the correspondence between the test code and the logical element 210. Specifically, as shown in Figure 15, the logical element 210 and the verification element 510 are displayed as nodes, and the relationship between the verification element 510 and the logical element 210 that is the target of verification, as indicated by the verification result information 513 contained in the verification element 510, is displayed as an edge. This makes it possible to visually grasp the correspondence between the test code and the logical element 210.

[0066] Specifically, the verification element 510 and the logical element 210 that the verification items included in the verification element 510 are verifying are connected by a directional edge 230 that indicates the relationship between the test and the test target. For example, the starting point of the edge 230 is the verification element 510, and the ending point of the edge 230 is the logical element 210. For example, at the edge 230, a tag indicating that the relationship shown by the edge 230 is between the test and the test target is displayed superimposed. By configuring the information processing device 1 to generate such presentation information, it becomes easier to intuitively understand which logical element 210 is affected by the failure of a verification item described in a particular test code, and as a result, the relationships between logical elements 210 that are indirectly related through the test can be intuitively grasped.

[0067] The information presented in Figure 15 shows that the verification items included in verification element 510B target logical elements 210A, 210B, and 210C. The arrows connecting each element allow for a visual understanding of their interdependencies. Furthermore, if multiple related logical elements 210 exist, the degree of influence may be indicated by the color or thickness of the related arrows.

[0068] The generation unit 143 may be configured to generate presentation information in which logical elements 210 that are indirectly related via the verification elements 510 are connected by edges. That is, the generation unit 143 generates presentation information in which logical elements that are subject to verification by the same verification item are connected by edges. In this case, if the logical elements 210 are commonly associated with multiple verification elements 510, the presentation information may be configured to show edges in different ways (different colors or thicknesses) depending on the number of commonly associated verification elements 510. By configuring the information processing device 1 to generate and display such presentation information, it is possible to provide the user with information that makes it easy to grasp the degree of influence between the logical elements 210.

[0069] If the test code indicates that the test has failed, the generation unit 143 generates information indicating that the test by the test code has failed for each of the one or more logical elements 210. In the information shown in Figure 15, if the test for a verification item fails, information indicating that the verification item has failed is displayed for the verification element 510 corresponding to that verification item and for each of the logical elements 210 associated with that verification element 510. With the information processing device 1 configured in this way, it is possible to provide information that allows for a visual understanding of the degree of influence between the logical elements 210 through the test.

[0070] When a specific verification element 510 is selected, the presentation information may be configured to display the logical element 210 that the selected verification element 510 is verifying in a different manner (e.g., a different color) than other logical elements 210. This configuration allows the user to intuitively understand the relationship between the verification element 510 and the logical elements 210. In this case, the generation unit 143 is configured to allow the selection of the verification element 510, and when the verification element 510 is selected, it generates presentation information configured to display the logical element 210 that the verification element 510 is verifying in a different color than other logical elements 210.

[0071] Incidentally, the information processing device 1 may be configured so that the logical element 2 and the verification element 5 are displayed in different ways (for example, in different colors) depending on the success rate. This configuration allows the user to easily understand the relationships between the logical elements 2 related to a specific verification item 3. That is, the generation unit 143 generates presentation information to show each of the logical elements 2 in different display ways depending on the success rate of the test that each logical element 2 is being verified. The presentation information generated in this case is shown in Figure 16.

[0072] In the information presented in Figure 16, the success rate of each verification item for each logical element 210 and each verification element 510 is displayed numerically, and each logical element 210 and each verification element 510 is displayed in a different color according to its success rate. For example, logical elements 210 and verification elements 510 with a 100% success rate are displayed in green, those with a success rate of less than 100% are displayed in orange, and those with a success rate of less than 50% are displayed in red, allowing the user to quickly identify abnormal areas. With this configuration, if there is an abnormality in a particular verification item, the logical elements 210 related to that verification item can be identified by visually checking the color, and the relationships between logical elements 210 that are related through a particular verification item can be easily grasped visually. Furthermore, with this configuration, the quality of the verification results of each logical element 210 can be intuitively grasped by color, improving visibility and enabling users to quickly detect abnormalities and judge progress. In particular, components that frequently fail can be immediately identified, and the efficiency of debugging and correction work can be expected to improve.

[0073] Incidentally, the generation unit 143 may be configured to generate matrix information for displaying the verification results for each logical element 210 in a matrix format, and to display the generated matrix information. An example of matrix information is shown in Figure 17. In the matrix information, the test code is arranged in the row direction and the logical elements 210 are arranged in the column direction, and the progress of the test is shown in each column. With this configuration, the correspondence between the test code and the logical elements 210 can be comprehensively grasped, and it becomes possible to quantitatively and systematically confirm whether there are any omissions or errors in the verification and the status of success / failure. This is particularly effective for checking the coverage of multiple tests.

[0074] Furthermore, the identification unit 141 may, in cooperation with a configuration management system (not shown), acquire version information and development manager information for each logical element 210 during the acquisition step. In this case, the generation unit 143 may generate presentation information that further includes the version information and development manager information for each logical element 210 acquired during the acquisition step. By configuring the information processing device 1 in this way, it is possible to provide information that facilitates the assurance of system quality.

[0075] As described above, the information processing device according to the second embodiment automatically extracts the correspondence between test code and logical element 210 and visually presents the verification results, thereby enabling centralized understanding of the verification status, accelerating quality evaluation, and improving debugging efficiency. In particular, by visually displaying the relationship between logical element 210 and verification items, and displaying information according to the test pass status, the indirect relationships between logical elements 210 can be visualized.

[0076] [others] At least some of the components included in the information processing system may be located outside of Japan. For example, a server that performs visualization processing and test code execution processing may be configured on the cloud, while client terminals are located within Japan. This configuration allows for the provision of high-performance verification and visualization processing without geographical constraints.

[0077] In one embodiment, the processor was described as being configured in a server device, but at least a part of the processing may be executed on a user terminal or in a local environment. In particular, since the execution and visualization of test code can be sufficiently performed on a development terminal alone, the configuration may be such that it can be processed in an environment that does not require a network connection. Such an embodiment can be flexibly applied even when there are restrictions on company confidentiality or the removal of source code.

[0078] The test code history and verification results may be recorded on a distributed ledger such as a blockchain. Such a configuration makes it possible to prevent tampering with test results and to strictly maintain quality traceability, which is particularly useful in areas where safety is paramount, such as medical devices, automobiles, and aerospace.

[0079] In one embodiment, the use was assumed to be within a single development team, but in large-scale projects involving multiple teams or development vendors, the visualization may be divided and integrated for each team's assigned module. This configuration allows for individual management of the quality status of each team while maintaining a unified understanding of overall dependencies and progress.

[0080] In addition to test code, logical elements may also be visualized using static analysis results, code coverage results, performance profile information, etc. This approach allows for the multifaceted evaluation and improvement of software quality from perspectives other than testing, functioning as a general-purpose visualization platform.

[0081] The acquired test results and success rates may be compared with past verification history to display improvement or deterioration trends. In this configuration, the quality trends for each build can be visualized in a continuous integration (CI) / continuous delivery (CD) environment, promoting improvements to the entire development process.

[0082] Finally, various embodiments of the present invention have been described, but these are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents.

Claims

1. On the computer, A first acquisition step involves obtaining test code that describes one or more logical elements to be tested, and the test content for said one or more logical elements. A second acquisition step involves obtaining the results of the tests performed by the aforementioned test code, A display control step that controls the display to show information indicating the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code. A program to execute.

2. The aforementioned information further includes the test results shown by the test code for each of the one or more logical elements. The program according to claim 1.

3. If the test code indicates that the test has failed, the display control step controls the display of information indicating that the test code has failed for each of the one or more logical elements. The program according to claim 1.

4. In the display control step, the system controls the display to show information including nodes that represent the tests indicated by the test code and each of the one or more logical elements, and edges that represent the correspondence between the tests indicated by the test code and each of the one or more logical elements. The program according to any one of claims 1 to 3.

5. In the display control step, the present information is displayed in a different display manner depending on the success rate of the test for which each of the one or more logical elements is to be verified. The program according to any one of claims 1 to 3.

6. The test code further includes a specific step of identifying the verification elements for each of the multiple verification items included in the test code, and the one or more logical elements that each of the multiple verification items is to be verified. In the display control step, the present information is displayed, which shows the correspondence between the one or more verification elements and the one or more logical elements, and for each of the one or more logical elements, the verification result of the verification item for which the logical element is the target of verification. The program according to any one of claims 1 to 3.

7. A first acquisition unit acquires test code that describes one or more logical elements to be tested and the test content for said one or more logical elements. A second acquisition unit obtains the results of the test performed by the aforementioned test code, A display control unit controls the display of information that shows the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code. An information processing system.

8. A computer executes A first acquisition step involves obtaining test code that describes one or more logical elements to be tested, and the test content for said one or more logical elements. A second acquisition step involves obtaining the results of the tests performed by the aforementioned test code, A display control step that controls the display to show information indicating the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed by the test code. An information processing method having

Images