Constant voltage circuit

Abstract

This invention provides a constant voltage circuit that exhibits minimal fluctuations in output voltage in response to rapid changes in power supply voltage. [Solution] The constant voltage circuit 100 includes a power terminal 101, a ground terminal 102, an ED-type reference voltage circuit 104 formed by connecting a first depletion-type transistor 121 and an enhancement-type transistor 123 in series and connecting their gates, a second depletion-type transistor 105 connected in series between the power terminal and the ED-type reference voltage circuit, a first output terminal 110 or a second output terminal 130, and a power fluctuation suppression circuit 103 connected between connection point P5 and the ground terminal to suppress fluctuations in the power supply voltage. The power fluctuation suppression circuit has a detection circuit that detects whether or not there is a fluctuation in the power supply voltage, and a pass transistor 124 connected in parallel with the detection circuit that can be switched on and off.

Description

TECHNICAL FIELD

[0001] The present invention relates to a constant voltage circuit.

BACKGROUND ART

[0002] In general, it is desirable for a constant voltage circuit that the fluctuation of the output voltage is small with respect to a rapid fluctuation of the power supply voltage. As an example, there is a constant voltage circuit configured by connecting a plurality of depletion-type NMOS transistors in series (see, for example, Patent Document 1).

PRIOR ART DOCUMENTS

PATENT DOCUMENTS

[0003]

PATENT DOCUMENT 1

SUMMARY OF THE INVENTION

PROBLEM TO BE SOLVED BY THE INVENTION

[0004] However, the conventional constant voltage circuit has room for improvement in that rapid fluctuations of the power supply voltage are transmitted to the output via the parasitic capacitance existing between the drain and source of the depletion-type NMOS transistor.

[0005] In consideration of the circumstances described above, the present invention aims to provide a constant voltage circuit in which the fluctuation of the output voltage is small with respect to rapid fluctuations of the power supply voltage.

MEANS FOR SOLVING THE PROBLEM

[0006] An embodiment of the present invention provides a constant voltage circuit comprising: a power supply terminal for supplying a power supply voltage; a ground terminal; a first depletion type transistor; and an enhancement type transistor; an ED type reference voltage circuit formed by connecting the first depletion type transistor and the enhancement type transistor in series and connecting their gates; a second depletion type transistor connected in series between the power supply terminal and the ED type reference voltage circuit; a power supply fluctuation suppression circuit connected between the ground terminal and a first connection point which is the connection point between the second depletion type transistor and the ED type reference voltage circuit; and the first depletion type transistor and the enhancement type transistor. The power supply fluctuation suppression circuit is characterized by comprising: a detection circuit having a first terminal connected to the first connection point, a second terminal connected to the ground terminal, and a third terminal that outputs a detection signal including a signal level corresponding to whether or not the fluctuation of the power supply voltage exceeds a set range; and a pass transistor having a gate connected to the third terminal of the detection circuit, a source connected to one of the first and second terminals of the detection circuit, and a drain connected to the other of the first and second terminals of the detection circuit, and being switchable on and off depending on the signal level applied to the gate. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a constant voltage circuit in which the output voltage fluctuates little in response to rapid fluctuations in the power supply voltage. [Brief explanation of the drawing]

[0008] [Figure 1] This is a circuit diagram showing an example of a constant voltage circuit configuration according to the first embodiment of the present invention. [Figure 2] This is a partial circuit diagram showing an example configuration of a constant voltage circuit according to a second embodiment of the present invention. [Figure 3] This is a circuit diagram showing a first modified example of the constant voltage circuit according to this embodiment. [Figure 4] This is a circuit diagram showing a second modified example of the constant voltage circuit according to this embodiment. [Figure 5] This is a circuit diagram showing a third modified example of the constant voltage circuit according to this embodiment. [Figure 6] This is a circuit diagram showing a fourth modified example of the constant voltage circuit according to this embodiment. [Figure 7] This is a circuit diagram showing a fifth modified example of the constant voltage circuit according to this embodiment. [Modes for carrying out the invention]

[0009] Hereinafter, a constant voltage circuit according to an embodiment of the present invention will be described with reference to the drawings.

[0010] [First Embodiment] Figure 1 is a circuit diagram of a constant voltage circuit 100, which is an example of a constant voltage circuit according to the first embodiment of the present invention.

[0011] The constant voltage circuit 100 includes a power supply terminal 101, a ground terminal 102, an ED-type reference voltage circuit 104, a power supply fluctuation suppression circuit 103, a depletion-type N-channel MOS transistor (hereinafter referred to as "NMOS transistor") 105, a first output terminal 110, and a second output terminal 130. The ground terminal 102 is a power supply terminal that supplies a power supply voltage of 0V (zero volts) (hereinafter referred to as "ground voltage") as an example of a power supply voltage that serves as a reference for circuit operation.

[0012] The ED-type reference voltage circuit 104 includes, for example, two or more depletion-type NMOS transistors 121 and 122, and at least one enhancement-type NMOS transistor 123. The depletion-type NMOS transistor 121 and the NMOS transistor 122, which is the first depletion-type NMOS transistor, are connected in series. The depletion-type NMOS transistor 122 and the NMOS transistor 123 are connected in series.

[0013] The drain of the depletion-type NMOS transistor 121 is connected to the source of the depletion-type NMOS transistor 105. The connection point between the drain of the depletion-type NMOS transistor 121 and the depletion-type NMOS transistor 105 constitutes the connection point P5 between the ED-type reference voltage circuit 104 and the NMOS transistor 105 as the third depletion-type transistor.

[0014] More specifically, the gate of NMOS transistor 123 is connected to its own drain, the first output terminal 110, and the source of depletion-type NMOS transistor 122. The gate of depletion-type NMOS transistor 122 is connected to its own source and the gate of depletion-type NMOS transistor 121. In other words, the gates of depletion-type NMOS transistors 122 and 123 are connected to connection point P4, which is the connection point between the source of depletion-type NMOS transistor 122 and the drain of NMOS transistor 123. In addition, the gate of depletion-type NMOS transistor 121 and the first output terminal 110 are connected to connection point P4, which is a second connection point.

[0015] The power supply fluctuation suppression circuit 103 comprises a detection circuit 120 and an NMOS transistor 124 as a pass transistor. The detection circuit 120 is configured, for example, as a three-terminal circuit having three terminals, and includes a capacitor 125 and a resistor 126 connected in series with the capacitor 125.

[0016] Resistor 126 includes a first terminal connected to the source of NMOS transistor 124 and a second terminal connected to the gate of NMOS transistor 124. Capacitor 125 includes a first terminal connected to resistor 126 (more specifically, the second terminal) and a second terminal connected to the drain of NMOS transistor 124.

[0017] Here, a connection point P1 between the capacitor 125 and the drain of the NMOS transistor 124, that is, the second end of the capacitor 125, constitutes the first terminal of the detection circuit 120. A connection point P2 between the resistor 126 and the source of the NMOS transistor 124, that is, the first end of the resistor 126, constitutes the second terminal of the detection circuit 120. A connection point P3 between the capacitor 125 and the resistor 126 constitutes the third terminal of the detection circuit 120.

[0018] The connection point P1 is the same node as the connection point P5 serving as the first connection point. That is, the second end of the capacitor 125 and the drain of the NMOS transistor 124 are connected to the source of the depletion-type NMOS transistor 105, the second output terminal 130, and the drain of the depletion-type NMOS transistor 121. The connection point P2 is connected to the ground terminal 102 and the source of the NMOS transistor 123.

[0019] In the depletion-type MOS transistor 105, the drain is connected to the power supply terminal 101, the gate is connected to the source of the depletion-type NMOS transistor 121 and the drain of the depletion-type NMOS transistor 122, and the source is connected to the second output terminal 130, the drain of the depletion-type NMOS transistor 121, the second end of the capacitor 125, and the drain of the NMOS transistor 124.

[0020] Next, the operation of the constant voltage circuit 100 will be described. The power supply terminal 101 supplies a predetermined power supply voltage. The ground terminal 102 supplies a ground voltage.

[0021] The depletion-type NMOS transistors 121 and 122 connected in series generate a constant current using the voltage at the connection point P5 as a power supply. The constant current generated by the depletion-type NMOS transistors 121 and 122 is supplied to the NMOS transistor 123 to generate a constant voltage at the drain. In this way, the ED-type reference voltage circuit 104 generates a constant voltage and outputs it from the first output terminal 110.

[0022] The depletion-type NMOS transistor 105 operates as a source follower. Specifically, it generates a voltage at connection point P5 that is the source voltage of the depletion-type NMOS transistor 121 plus the absolute value of the threshold. The voltage generated at connection point P5 is output from the second output terminal 130.

[0023] When the voltage at power terminal 101 is stable and sufficient time has elapsed (hereinafter referred to as the "steady state"), the capacitor 125 is charged to the voltage at connection point P5. Since no DC current flows through resistor 126, the voltage across resistor 126 is 0V. Since the voltage between the gate and source of NMOS transistor 124 is 0V, NMOS transistor 124 is turned off.

[0024] From the steady state described above, let us assume, for example, that the voltage at the power supply terminal 101 rises sharply, and the voltage at connection point P5 rises via the parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105. When the voltage at connection point P5 rises, a charging current flows through the capacitor 125 and resistor 126, causing the gate voltage of the NMOS transistor 124 to rise.

[0025] The NMOS transistor 124 turns on when its gate voltage exceeds a threshold voltage. When the NMOS transistor 124 turns on, the connection point P5 and the ground terminal 102 are connected via the NMOS transistor 124, thus suppressing the rise in voltage at the connection point P5. As a result, fluctuations in the output voltage of the ED-type reference voltage circuit 104, which uses the voltage at the connection point P5 as its power source, i.e., the voltage at the first output terminal 110, are suppressed. In the constant voltage circuit 100, the first output terminal 110 can supply a voltage with higher accuracy than the second output terminal 130.

[0026] As explained above, with the constant voltage circuit 100, even if parasitic capacitance exists between the drain and source of the depletion-type NMOS transistor 105, the power supply fluctuation suppression circuit 103 can limit fluctuations in the output voltages output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage. Therefore, the constant voltage circuit 100 can provide a constant voltage circuit that exhibits smaller output voltage fluctuations in response to rapid fluctuations in the power supply voltage than conventional constant voltage circuits.

[0027] According to the constant voltage circuit 100, since the power supply fluctuation suppression circuit 103 has a configuration comprising an NMOS transistor 124, a capacitor 125, and a resistor 126, the fluctuation of the output voltage can be reduced in response to rapid fluctuations in the power supply voltage without complicating the configuration of the constant voltage circuit 100. Furthermore, since the power supply fluctuation suppression circuit 103 can use a smaller capacitor 125 than a power supply fluctuation suppression circuit composed of a single capacitor, the power supply fluctuation suppression circuit 103 as a whole can be configured in a smaller size than a power supply fluctuation suppression circuit composed of a single capacitor. Therefore, according to the constant voltage circuit 100, the fluctuation of the output voltage can be reduced in response to rapid fluctuations in the power supply voltage while minimizing the increase in area associated with adding a configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0028] [Second Embodiment] Figure 2 is a partial circuit diagram of a constant voltage circuit 1000, which is an example of a constant voltage circuit according to a second embodiment of the present invention.

[0029] The constant voltage circuit 1000 differs from the constant voltage circuit 100 in that it further includes an operational amplifier 160, but is otherwise substantially the same. Therefore, in this description of the embodiment, the operational amplifier 160 will be the main focus, and components that are substantially the same as those in the constant voltage circuit 100 will be given the same reference numerals and their descriptions will be omitted.

[0030] The constant voltage circuit 1000 further includes an operational amplifier 160 in addition to the constant voltage circuit 100. The operational amplifier 160 has a positive power supply terminal 161, a negative power supply terminal 162, an output terminal 163, an inverting input terminal 164, and a non-inverting input terminal 165. The positive power supply terminal 161 is connected to the second output terminal 130. The negative power supply terminal 162 is connected to the ground terminal 102. The output terminal 163 is connected to the third output terminal 150. The inverting input terminal 164, which is the first input terminal, is connected to the third output terminal 150. The non-inverting input terminal 165, which is the second input terminal, is connected to the first output terminal 110.

[0031] Next, the operation of the constant voltage circuit 1000 will be explained. For example, suppose the voltage at power supply terminal 101 (see Figure 1) rises sharply, causing the voltage at connection point P5 to rise via the parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105 (see Figure 1). In this case, similar to the constant voltage circuit 100, the power supply fluctuation suppression circuit 103 suppresses the voltage fluctuations at the first output terminal 110 and the second output terminal 130.

[0032] The operational amplifier 160 receives the voltage at the second output terminal 130 at the positive power supply terminal 161 and the ground voltage at the ground terminal 102 from the negative power supply terminal 162, and operates as a voltage follower. The operational amplifier 160 buffers the voltage appearing at the first output terminal 110 and outputs it to the third output terminal 150 via the output terminal 163. Since the voltage at the second output terminal 130 exhibits little fluctuation in output voltage in response to rapid fluctuations in the power supply voltage at the power supply terminal 101, the output voltage output from the third output terminal 150 can also exhibit little fluctuation in response to rapid fluctuations in the power supply voltage.

[0033] As explained above, the constant voltage circuit 1000 can achieve the same effects as the constant voltage circuit 100. Specifically, the constant voltage circuit 1000 can reduce fluctuations in the output voltages output from the first output terminal 110, the second output terminal 130, and the third output terminal 150 in response to rapid fluctuations in the power supply voltage. Furthermore, the constant voltage circuit 1000 can reduce fluctuations in the output voltage in response to rapid fluctuations in the power supply voltage without complicating the configuration of the constant voltage circuit 1000. Moreover, the constant voltage circuit 1000 can reduce fluctuations in the output voltage in response to rapid fluctuations in the power supply voltage while minimizing the increase in area associated with adding a configuration that reduces fluctuations in the output voltage in response to rapid fluctuations in the power supply voltage.

[0034] Furthermore, the constant voltage circuit 1000, by incorporating an operational amplifier 160 that functions as a voltage follower, provides a constant voltage circuit with lower output impedance than conventional constant voltage circuits and reduces fluctuations in output voltage in response to rapid fluctuations in power supply voltage.

[0035] In the constant voltage circuit 1000 described above, voltage can be output from the first output terminal 110, the second output terminal 130, and the third output terminal 150, but the first output terminal 110 may be omitted. Also, the constant voltage circuit 1000 illustrated in Figure 2 is an example that includes a constant voltage circuit 100, but the constant voltage circuit 1000 may include any of the constant voltage circuits 200, 300, 400, 500, and 600 described later instead of constant voltage circuit 100.

[0036] Next, several modifications of the constant voltage circuit according to this embodiment, constant voltage circuits 200, 300, 400, 500, and 600, will be described.

[0037] (First variation) Figure 3 is a circuit diagram of a constant voltage circuit 200, which is a first modified example of the constant voltage circuit according to this embodiment.

[0038] The constant voltage circuit 200 differs from the constant voltage circuit 100 (see Figure 1) in that it includes a power supply fluctuation suppression circuit 203 instead of the power supply fluctuation suppression circuit 103, but is otherwise substantially the same. Therefore, in the description of the first modified example, the power supply fluctuation suppression circuit 203 will be the main focus, and components that are substantially the same as those in the constant voltage circuit 100 will be given the same reference numerals and their descriptions will be omitted.

[0039] The power supply fluctuation suppression circuit 203 differs from the power supply fluctuation suppression circuit 103 in that it includes a detection circuit 220 instead of a detection circuit 120, but is otherwise substantially the same. The detection circuit 220 differs from the detection circuit 120 in that it has a constant current source 226 instead of a resistor 126, but is otherwise substantially the same.

[0040] The constant current source 226 includes a first terminal connected to the source of the NMOS transistor 124 and a second terminal connected to the gate of the NMOS transistor 124. The capacitor 125 includes a first terminal connected to the constant current source 226 (more specifically, the second terminal) and a second terminal connected to the drain of the NMOS transistor 124. The second terminal of the capacitor 125 is further connected to the source of the depletion-type NMOS transistor 105, the drain of the depletion-type NMOS transistor 121, and the second output terminal 130. The first terminal of the constant current source 226 is further connected to the ground terminal 102 and the source of the NMOS transistor 123.

[0041] Next, the operation of the constant voltage circuit 200 will be explained. The constant current source 226 is defined as an element that cannot supply a constant current when there is no potential difference across its terminals. In a steady state, the capacitor 125 is charged to the voltage at connection point P5. The constant current source 226 has a voltage of 0V across its terminals and no DC current is flowing through it. The NMOS transistor 124 has a gate-source voltage of 0V and is off.

[0042] For example, suppose the voltage at power supply terminal 101 rises sharply, causing the voltage at connection point P5 to rise via the parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105. When the voltage at connection point P5 rises, the gate voltage of the NMOS transistor 124 rises via capacitor 125 because the impedance of the constant current source 226 is very high. Note that other operations are substantially the same as those of the constant voltage circuit 100, so we will omit the explanation.

[0043] As explained above, the constant voltage circuit 200 can achieve the same effect as the constant voltage circuit 100. That is, even if parasitic capacitance exists between the drain and source of the depletion-type NMOS transistor 105, the constant voltage circuit 200 can reduce the fluctuation of the output voltage output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage.

[0044] Furthermore, without complicating the configuration of the constant voltage circuit 200, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced. In addition, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced while minimizing the increase in area associated with adding the configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0045] (Second variation) Figure 4 is a circuit diagram of a constant voltage circuit 300, which is a second modified example of the constant voltage circuit according to this embodiment.

[0046] The constant voltage circuit 300 differs from the constant voltage circuit 100 (see Figure 1) in that it includes a power supply fluctuation suppression circuit 303 instead of the power supply fluctuation suppression circuit 103, but is otherwise substantially the same. Therefore, in the description of the second modified example, the power supply fluctuation suppression circuit 303 will be the main focus, and components that are substantially the same as those in the constant voltage circuit 100 will be given the same reference numerals and their descriptions will be omitted.

[0047] The power supply fluctuation suppression circuit 303 differs from the power supply fluctuation suppression circuit 103 in that it includes a detection circuit 320 instead of a detection circuit 120, but is otherwise substantially the same. The detection circuit 320 differs from the detection circuit 120 in that it has a depletion-type NMOS transistor 326 instead of a resistor 126, but is otherwise substantially the same.

[0048] The depletion-type NMOS transistor 326 includes a drain connected to the gate of NMOS transistor 124, a source connected to the source of NMOS transistor 124, and a gate connected to its own source. The drain of the depletion-type NMOS transistor 326 is further connected to the first end of capacitor 125. The source of the depletion-type NMOS transistor 326 is further connected to the ground terminal 102 and the source of NMOS transistor 123.

[0049] The constant voltage circuit 300 configured in this way has a depletion-type NMOS transistor 326 instead of a constant current source 226 compared to the constant voltage circuit 200. Since the function of the depletion-type NMOS transistor 326 is substantially the same as that of the constant current source 226, the operation of the constant voltage circuit 300 is substantially the same as that of the constant voltage circuit 200.

[0050] As explained above, the constant voltage circuit 300 in this configuration example can achieve the same effect as the constant voltage circuit 200. That is, with the constant voltage circuit 300, even if parasitic capacitance exists between the drain and source of the depletion-type NMOS transistor 105, the power supply fluctuation suppression circuit 303 can reduce the fluctuation of the output voltage output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage.

[0051] Furthermore, without complicating the configuration of the constant voltage circuit 300, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced. Moreover, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced while minimizing the increase in area associated with adding the configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0052] (Third variation) Figure 5 is a circuit diagram of a constant voltage circuit 400, which is a third modified example of the constant voltage circuit according to this embodiment.

[0053] The constant voltage circuit 400 differs from the constant voltage circuit 100 (see Figure 1) in that it includes a power supply fluctuation suppression circuit 403 instead of the power supply fluctuation suppression circuit 103, but is otherwise substantially the same. Therefore, in the description of the third modified example, the power supply fluctuation suppression circuit 403 will be the main focus, and components that are substantially the same as those in the constant voltage circuit 100 will be given the same reference numerals and their descriptions will be omitted.

[0054] The power supply fluctuation suppression circuit 403 includes a detection circuit 420 having a resistor 426 and a capacitor 425, and a P-channel MOS transistor (hereinafter referred to as "PMOS transistor") 424 as a pass transistor. The resistor 426 includes a first terminal connected to the source of the PMOS transistor 424 and a second terminal connected to the gate of the PMOS transistor. The capacitor 425 includes a first terminal connected to the resistor 426 (more specifically, the second terminal) and a second terminal connected to the drain of the PMOS transistor 424.

[0055] Here, the connection point P1 between resistor 426 and the source of PMOS transistor 424, i.e., the first end of resistor 426, constitutes the first terminal of detection circuit 420. The connection point P2 between capacitor 425 and the drain of PMOS transistor 424, i.e., the second end of capacitor 425, constitutes the second terminal of detection circuit 420. The connection point P3 between capacitor 425 and resistor 426 constitutes the third terminal of detection circuit 420.

[0056] The first terminal of resistor 426 is further connected to the source of depletion-type NMOS transistor 105, the drain of depletion-type NMOS transistor 121, and the second output terminal 130. The second terminal of capacitor 425 is further connected to the ground terminal 102 and the source of NMOS transistor 123.

[0057] Next, the operation of the constant voltage circuit 400 will be explained. In a steady state, capacitor 425 is charged to the voltage at connection point P5. Resistor 426 has no DC current flowing through it, so its voltage across it is 0V. PMOS transistor 424 is off, with a gate-source voltage of 0V.

[0058] For example, suppose the voltage at power supply terminal 101 rises sharply, causing the voltage at connection point P5 to rise via the parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105. When the voltage at connection point P5 rises, charging current flows through capacitor 425 and resistor 426, causing the source voltage of PMOS transistor 424 to rise. PMOS transistor 424 turns on when the voltage between its gate and source exceeds a threshold voltage, connecting connection point P5 and ground terminal 102 via PMOS transistor 424, thus suppressing the rise in voltage at connection point P5. As a result, fluctuations in the output voltage of the ED-type reference voltage circuit 104, which uses the voltage at connection point P5 as its power source, i.e., the voltage at the first output terminal 110, are suppressed. Note that the other operations of the constant voltage circuit 400 are substantially the same as those of the constant voltage circuit 100, so their explanation is omitted.

[0059] As explained above, the constant voltage circuit 400 can achieve the same effect as the constant voltage circuit 100. That is, even if parasitic capacitance exists between the drain and source of the depletion-type NMOS transistor 105, the constant voltage circuit 400 can reduce the fluctuation of the output voltage output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage.

[0060] Furthermore, without complicating the configuration of the constant voltage circuit 400, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced. Moreover, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced while minimizing the increase in area associated with adding the configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0061] (Fourth variation) Figure 6 is a circuit diagram of a constant voltage circuit 500, which is a fourth modified example of the constant voltage circuit according to this embodiment.

[0062] The constant voltage circuit 500 differs from the constant voltage circuit 400 (see Figure 5) in that it includes a power supply fluctuation suppression circuit 503 instead of the power supply fluctuation suppression circuit 403, but is otherwise substantially the same. Therefore, in the description of the fourth modified example, the power supply fluctuation suppression circuit 403 will be the main focus, and components that are substantially the same as those in the constant voltage circuit 400 will be given the same reference numerals and their descriptions will be omitted.

[0063] The power supply fluctuation suppression circuit 503 differs from the power supply fluctuation suppression circuit 403 in that it includes a detection circuit 520 instead of a detection circuit 420, but is otherwise substantially the same. The detection circuit 520 differs from the detection circuit 420 in that it has a constant current source 526 instead of a resistor 426, but is otherwise substantially the same.

[0064] The constant current source 526 includes a first terminal connected to the source of the PMOS transistor 424, and a second terminal connected to the first terminal of the capacitor 425 and the gate of the PMOS transistor 424. The first terminal of the constant current source 526 is further connected to the source of the depletion-type NMOS transistor 105, the drain of the depletion-type NMOS transistor 121, and the second output terminal 130.

[0065] Next, the operation of the constant voltage circuit 500 will be explained. The constant current source 526 is defined as an element that cannot supply a constant current when there is no potential difference across its terminals. In the steady state, the capacitor 425 is charged to the voltage at connection point P5. The constant current source 526 has a voltage of 0V across its terminals and no DC current is flowing. The PMOS transistor 424 has a gate-source voltage of 0V and is off.

[0066] For example, suppose the voltage at power supply terminal 101 rises sharply, causing the voltage at connection point P5 to rise via the parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105. At this time, the constant current source 526 limits the charging current of capacitor 425, causing the source voltage of PMOS transistor 424 to rise. PMOS transistor 424 turns on when the voltage between its gate and source exceeds a threshold voltage, suppressing the rise in voltage at connection point P5. As a result, fluctuations in the output voltage of the ED-type reference voltage circuit 104, which uses the voltage at connection point P5 as its power source, i.e., the voltage at the first output terminal 110, are suppressed. Note that the other operations of the constant voltage circuit 500 are substantially the same as those of the constant voltage circuit 400, so their explanation is omitted.

[0067] As explained above, the constant voltage circuit 500 in this configuration example can achieve the same effect as the constant voltage circuit 100. That is, with the constant voltage circuit 500, even if there is parasitic capacitance between the drain and source of the depletion-type NMOS transistor 105, the power supply fluctuation suppression circuit 503 can reduce the fluctuation of the output voltage output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage.

[0068] Furthermore, without complicating the configuration of the constant voltage circuit 500, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced. Moreover, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced while minimizing the increase in area associated with adding the configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0069] (Fifth variation) Figure 7 is a circuit diagram of a constant voltage circuit 600, which is a fifth modified example of the constant voltage circuit according to this embodiment.

[0070] The constant voltage circuit 600 differs from the constant voltage circuit 500 (see Figure 6) in that it includes a power supply fluctuation suppression circuit 603 instead of the power supply fluctuation suppression circuit 503, but is otherwise substantially the same. Therefore, in the fifth modified example, the power supply fluctuation suppression circuit 603 will be described in detail, and components that are substantially the same as those in the constant voltage circuit 500 will be given the same reference numerals and their descriptions will be omitted.

[0071] The power supply fluctuation suppression circuit 603 differs from the power supply fluctuation suppression circuit 503 in that it includes a detection circuit 620 instead of a detection circuit 520, but is otherwise substantially the same. The detection circuit 620 differs from the detection circuit 520 in that it has a depletion-type NMOS transistor 326 instead of a constant current source 526, but is otherwise substantially the same.

[0072] The depletion-type NMOS transistor 326 includes a drain connected to the source of the PMOS transistor 424, a source connected to the gate of the PMOS transistor 424, and a gate connected to its own source. The drain of the depletion-type NMOS transistor 326 is further connected to the source of the depletion-type NMOS transistor 105, the drain of the depletion-type NMOS transistor 121, and the second output terminal 130.

[0073] The operation of the constant voltage circuit 600 is substantially the same as that of the constant voltage circuit 500, because the function of the depletion-type NMOS transistor 326 is substantially the same as that of the constant current source 526.

[0074] As explained above, the constant voltage circuit 600 in this configuration example can achieve the same effect as the constant voltage circuit 500. That is, with the constant voltage circuit 500, even if parasitic capacitance exists between the drain and source of the depletion-type NMOS transistor 105, the power supply fluctuation suppression circuit 603 can reduce the fluctuation of the output voltage output from the first output terminal 110 and the second output terminal 130 in response to rapid fluctuations in the power supply voltage.

[0075] Furthermore, without complicating the configuration of the constant voltage circuit 600, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced. Moreover, the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage can be reduced while minimizing the increase in area associated with adding the configuration that reduces the fluctuation of the output voltage in response to rapid fluctuations in the power supply voltage.

[0076] It should be noted that the present invention is not limited to the embodiments described above, and in practice, it can be implemented in various forms other than those described above, and various omissions, additions, substitutions, or modifications can be made without departing from the spirit of the invention. For example, the constant voltage circuits 100, 200, 300, 400, 500, and 600 described above are examples that include a first output terminal 110 and a second output terminal 130, but are not limited thereto. The constant voltage circuits 100, 200, 300, 400, 500, and 600 only need to include at least one of the first output terminal 110 and the second output terminal 130, and the other of the first output terminal 110 and the second output terminal 130 may be omitted.

[0077] In the ED-type reference voltage circuit 104, there may be multiple depletion-type NMOS transistors connected in series, and even more transistors may be included. For example, one or more depletion-type NMOS transistors can be further connected in series between depletion-type NMOS transistor 121 and depletion-type NMOS transistor 122. When there are three or more depletion-type NMOS transistors connected in series, there are multiple connection points for the multiple depletion-type NMOS transistors connected in series, but the gate of NMOS transistor 105 can be connected to any of the connection points of the multiple depletion-type NMOS transistors. That is, it can be any connection point formed between the drain of depletion-type NMOS transistor 121 and the source of depletion-type NMOS transistor 122.

[0078] These embodiments and their variations are included within the scope and essence of the invention, as well as within the scope of the invention and its equivalents as described in the claims. [Explanation of symbols]

[0079] 100, 200, 300, 400, 500, 600, 1000 Constant Voltage Circuit 101 Power terminal 102 Ground terminal 103, 203, 303, 403, 503, 603 Power supply fluctuation suppression circuit 104 ED type reference voltage circuit 123 NMOS transistor (enhancement transistor) 122 NMOS transistor (first depletion-type transistor) 121 NMOS transistor (second type of depletion transistor) 105 NMOS transistor (third type of depletion transistor) 110 First Output Terminal 120, 220, 320, 420, 520, 620 detection circuit 124 NMOS transistors (pass transistors) 125, 425 capacity 126, 426 resistors 130 Second output terminal 160 Operational Amplifiers 161 Positive power terminal (first power terminal) 162 Negative power terminal (second power terminal) 163 Output terminal 164 Inverting input terminal (first input terminal) 165 Non-inverting input terminal (second input terminal) 226, 526 constant current source 326 NMOS transistors (depletion-type N-channel transistors) 424 PMOS transistors (pass transistors) P1, P2, P3 connection points (terminal 1, terminal 2, terminal 3) P4 Connection point (Second connection point) P5 Connection point (1st connection point)

Claims

1. Power supply terminals that supply power voltage, Grounding terminal and An ED-type reference voltage circuit comprising a first depletion-type transistor and an enhancement-type transistor, wherein the first depletion-type transistor and the enhancement-type transistor are connected in series and their gates are connected, A second depletion-type transistor is connected in series between the power supply terminal and the ED-type reference voltage circuit, A power supply fluctuation suppression circuit is connected between the first connection point, which is the connection point between the second depletion-type transistor and the ED-type reference voltage circuit, and the ground terminal, and suppresses fluctuations in the power supply voltage. The device comprises an output terminal connected to either the connection point of the first depletion-type transistor and the enhancement-type transistor, or to a second connection point which is the connection point of the first connection point. The aforementioned power supply fluctuation suppression circuit is A detection circuit having a first terminal connected to the first connection point, a second terminal connected to the ground terminal, and a third terminal that outputs a detection signal including a signal level corresponding to whether or not the fluctuation of the power supply voltage exceeds a set range, A constant voltage circuit comprising a pass transistor whose gate is connected to the third terminal of the detection circuit, whose source is connected to one of the first and second terminals of the detection circuit, whose drain is connected to the other of the first and second terminals of the detection circuit, and which can be switched on and off according to the signal level applied to the gate.

2. The constant voltage circuit according to claim 1, wherein the detection circuit includes a resistor having a first terminal connected to the source of the pass transistor and a second terminal connected to the gate of the pass transistor, and a capacitor having a first terminal connected to the gate of the pass transistor and the second terminal of the resistor, and a second terminal connected to the drain of the pass transistor.

3. The detection circuit includes a constant current source having a first terminal connected to the source of the pass transistor and a second terminal connected to the gate of the pass transistor, A constant voltage circuit according to claim 1, comprising a capacitor including a first terminal connected to the second terminal of the constant current source and a second terminal connected to the drain of the pass transistor.

4. The pass transistor has its gate connected to the third terminal of the detection circuit, its source connected to the second terminal of the detection circuit, and its drain connected to the first terminal of the detection circuit. The constant voltage circuit according to claim 1, wherein the detection circuit comprises a depletion-type N-channel transistor having a drain connected to the gate of the pass transistor, a source connected to the source of the pass transistor, and a gate connected to its own source, and a capacitor having a first terminal connected to the drain of the pass transistor and a second terminal connected to the gate of the pass transistor and the drain of the depletion-type N-channel transistor.

5. The pass transistor has its gate connected to the third terminal of the detection circuit, its source connected to the first terminal of the detection circuit, and its drain connected to the second terminal of the detection circuit. The constant voltage circuit according to claim 1, wherein the detection circuit comprises a depletion-type N-channel transistor having a drain connected to the source of the pass transistor, a source connected to the gate of the pass transistor, and a gate connected to its own source, and a capacitor having a first terminal connected to the gate of the pass transistor and the gate and source of the depletion-type N-channel transistor, and a second terminal connected to the drain of the pass transistor.

6. A first power supply terminal connected to the first connection point, The second power supply terminal connected to the grounding terminal, The first input terminal connected to the second connection point, Output terminal and A constant voltage circuit according to any one of claims 1 to 5, further comprising an operational amplifier having a second input terminal connected to the output terminal.

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