electrostatic chuck

Abstract

To provide an electrostatic chuck that can maintain the temperature of a substrate at an appropriate temperature. [Solution] The electrostatic chuck 10 is a member made of a material mainly composed of alumina and comprises a dielectric substrate 100 having a surface 110 on which a substrate W is placed, and a base plate 200 which is bonded to surface 120 of the dielectric substrate 100 and has a refrigerant flow path 250 through which a refrigerant flows. When the dielectric substrate 100 is cut perpendicular to surface 110, a void portion VA is formed in at least a part of the cross-section, in which the cross-sectional area occupied by voids accounts for 1% or more of the area.

Description

Technical Field

[0001] The present invention relates to an electrostatic chuck.

Background Art

[0002] A semiconductor manufacturing apparatus such as an etching apparatus is provided with an electrostatic chuck as a device for attracting and holding a substrate such as a silicon wafer to be processed. The electrostatic chuck has a dielectric substrate provided with an attraction electrode, and a base plate that supports the dielectric substrate, and these are joined to each other to form a structure. When a voltage is applied to the attraction electrode, an electrostatic force is generated, and the substrate placed on the dielectric substrate is attracted and held. As described in Patent Document 1 below, the dielectric substrate is often formed using a ceramic material such as alumina, for example.

[0003] During processing such as etching, it is necessary to maintain the temperature of the substrate at an appropriate temperature. For this reason, as described in Patent Document 1 below, a coolant flow path for passing a coolant is formed inside the base plate. Heat from the substrate is transferred to the coolant through the dielectric substrate and the base plate, and is discharged to the outside together with the coolant.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problem to be Solved by the Invention

[0005] When viewed from a direction perpendicular to the mounting surface, the refrigerant flow paths are formed along routes that pass through various parts of the base plate, but it is not possible to form refrigerant flow paths that pass through every location. As a result, a large temperature difference occurs between the area directly above where refrigerant flow paths are formed and the area directly above where they are not. Consequently, the in-plane temperature distribution of the substrate during processing becomes more variable.

[0006] In recent years, dielectric substrates have tended to be made thinner in order to reduce impedance and thermal resistance. As a result, the thermal resistance of the dielectric substrate decreases, which may make it difficult to maintain the substrate temperature at an appropriate level for reasons such as those mentioned above.

[0007] This invention has been made in view of these problems, and its objective is to provide an electrostatic chuck that can maintain the temperature of a substrate at an appropriate temperature. [Means for solving the problem]

[0008] To solve the above problems, the electrostatic chuck according to the present invention comprises a dielectric substrate having a mounting surface on which an object to be adsorbed is placed, and a base plate bonded to the surface of the dielectric substrate opposite to the mounting surface, through which a refrigerant channel is formed. When the dielectric substrate is cut perpendicular to the mounting surface, at least a portion of the cross-section has a void portion where the cross-sectional area of ​​the void accounts for 1% or more of the area.

[0009] In the void, heat transfer between the substrate and the base plate is hindered by the void. By providing such voids in the dielectric substrate, it becomes possible to suppress temperature differences between, for example, the area directly above where a coolant flow path is formed and the area directly above where it is not formed. As a result, the temperature of the substrate can be maintained at an appropriate temperature. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide an electrostatic chuck that can maintain the temperature of a substrate at an appropriate temperature. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic cross-sectional view showing the configuration of the electrostatic chuck according to the first embodiment. [Figure 2] This is an enlarged cross-sectional view showing a portion of the dielectric substrate of the electrostatic chuck according to the first embodiment. [Figure 3] This is a cross-sectional view showing the structure of the void. [Figure 4] This is an enlarged cross-sectional view showing a portion of the dielectric substrate of the electrostatic chuck according to the second embodiment. [Figure 5] This is a schematic cross-sectional view showing the configuration of an electrostatic chuck according to the third embodiment. [Figure 6] This is an enlarged cross-sectional view showing a portion of the dielectric substrate of the electrostatic chuck according to the third embodiment. [Modes for carrying out the invention]

[0012] This embodiment will be described below with reference to the attached drawings. To facilitate understanding of the explanation, the same reference numerals are used for identical components in each drawing whenever possible, and redundant explanations are omitted.

[0013] A first embodiment will be described. The electrostatic chuck 10 according to this embodiment is used to attract and hold a substrate W to be processed by electrostatic force inside a semiconductor manufacturing apparatus (not shown), such as an etching apparatus. The substrate W to be attracted is, for example, a silicon wafer. The electrostatic chuck 10 may also be used in apparatus other than semiconductor manufacturing apparatus.

[0014] Figure 1 shows a schematic cross-sectional view of the electrostatic chuck 10 in a state where the substrate W is held by adsorption. The electrostatic chuck 10 comprises a dielectric substrate 100 and a base plate 200.

[0015] The dielectric substrate 100 is a substantially disk-shaped member made of a ceramic sintered body. The dielectric substrate 100 is formed of a material containing alumina (Al₂O₃) as a main component. The purity and type of ceramics, additives and the like in the dielectric substrate 100 can be appropriately set in consideration of plasma resistance and the like required for the dielectric substrate 100 in a semiconductor manufacturing apparatus.

[0016] Note that, in the present specification, the "main component" refers to a compound that is confirmed to be contained in a relatively larger amount than any other compound contained in the target object when quantitative or semi-quantitative analysis by X-ray Diffraction (XRD) is performed on the target object such as the dielectric substrate 100. In the dielectric substrate 100 of the present embodiment, the proportion occupied by alumina as the main component is greater than 50%. The proportion is more preferably 90% or more, and even more preferably 95% or more.

[0017] Of the dielectric substrate 100, the surface 110 on the upper side in FIG. 1 serves as a "mounting surface" on which the substrate W to be processed is mounted. Further, of the dielectric substrate 100, the surface 120 on the lower side in FIG. 1 serves as a "bonded surface" that is bonded to the base plate 200 via the bonding layer 300. A viewpoint when the electrostatic chuck 10 is viewed from the surface 110 side along a direction perpendicular to the surface 110 is also referred to as "top view" in the following description.

[0018] An adsorption electrode 130 is embedded inside the dielectric substrate 100. The adsorption electrode 130 is a thin flat plate-shaped layer formed of a metal material such as palladium, and is arranged to be parallel to the surface 110. As the material of the adsorption electrode 130, molybdenum, platinum, tungsten or the like may be used in addition to palladium. When a voltage is applied to the adsorption electrode 130 from the outside via a power supply path (not shown), an electrostatic force is generated between the surface 110 and the substrate W, whereby the substrate W is adsorbed and held. As the configuration of the power supply path, various known configurations can be adopted. Only one adsorption electrode 130 may be provided as a so-called "unipolar" electrode as in the present embodiment, or two adsorption electrodes 130 may be provided as so-called "bipolar" electrodes.

[0019] A space SP is formed between the dielectric substrate 100 and the substrate W. When processing such as etching is performed in a semiconductor manufacturing apparatus, helium gas for temperature adjustment is supplied to the space SP from the outside through a gas hole (not shown). By interposing the helium gas between the dielectric substrate 100 and the substrate W, the thermal resistance between the two is adjusted, whereby the temperature of the substrate W is maintained at an appropriate temperature. The temperature adjustment gas supplied to the space SP may be a gas of a type different from helium.

[0020] A seal ring 111 and dots 112 are provided on the surface 110 which is a mounting surface, and the above space SP is formed around these components.

[0021] The seal ring 111 is a wall that partitions the space SP at the position of the outermost periphery. The seal ring 111 is an annular protrusion formed on the surface 110 side. The tip of the seal ring 111 (the upper end in FIG. 1) is a part of the surface 110 and abuts against the substrate W. The tip of the seal ring 111 can be said to be the outermost portion of the surface 110 which is the mounting surface.

[0022] Furthermore, multiple seal rings 111 may be provided to divide the space SP. With this configuration, the pressure of the helium gas in each space SP can be individually adjusted, making the surface temperature distribution of the substrate W during processing more uniform.

[0023] In Figure 1, the portion labeled "116" is the bottom surface of the space SP. Hereafter, this portion will also be referred to as "bottom surface 116". The seal ring 111, along with the dot 112 described below, is formed as a result of excavating a portion of the surface 110 down to the position of the bottom surface 116.

[0024] The dots 112 are circular protrusions that extend from the bottom surface 116. Multiple dots 112 are provided and are distributed approximately evenly on the mounting surface of the dielectric substrate 100. The upper end of each dot 112 is part of the surface 110 and contacts the substrate W. By providing multiple such dots 112, the bending of the substrate W is suppressed.

[0025] The base plate 200 is a roughly disc-shaped member that supports the dielectric substrate 100. The base plate 200 is made of a metallic material such as aluminum. Of the base plate 200, the upper surface 210 in Figure 1 is the "bonded surface" which is bonded to the dielectric substrate 100 via the bonding layer 300. The base plate 200 is bonded to the surface 120 of the dielectric substrate 100 that is opposite to the mounting surface.

[0026] The bonding layer 300 is a layer provided between the dielectric substrate 100 and the base plate 200, and it bonds the two together. The bonding layer 300 is made by curing an adhesive made of an insulating material. In this embodiment, a silicone adhesive is used as the adhesive. However, the bonding layer 300 may be made by curing another type of adhesive. In any case, it is preferable to use a material with the highest possible thermal conductivity for the bonding layer 300 so that the thermal resistance between the dielectric substrate 100 and the base plate 200 is reduced.

[0027] An insulating film may be formed on the surface of the base plate 200. As the insulating film, for example, an alumina film formed by thermal spraying can be used. By covering the surface of the base plate 200 with an insulating film, the dielectric strength of the base plate 200 can be increased.

[0028] A refrigerant channel 250 is formed inside the base plate 200 for passing a refrigerant. When etching or other processes are performed in the semiconductor manufacturing equipment, a refrigerant is supplied from the outside to the refrigerant channel 250, thereby cooling the base plate 200. During processing, the heat generated in the substrate W is transferred to the refrigerant via the helium gas in the space SP, the dielectric substrate 100, and the base plate 200, and is discharged to the outside together with the refrigerant. The supply and discharge of refrigerant to and from the refrigerant channel 250 is performed through an opening (not shown) formed on the surface 220 of the base plate 200 opposite to the surface 210.

[0029] Figure 2 shows an enlarged cross-section of a portion of the dielectric substrate 100, as shown in Figure 1. The cross-section in Figure 2 is the cross-section obtained when the dielectric substrate 100 is cut perpendicular to the mounting surface (surface 110). Note that in Figure 2, the seal ring 111 and dots 112 formed on the dielectric substrate 100 are omitted from the illustration.

[0030] The dotted line DL1 shown in Figure 2 represents a hypothetical plane parallel to surface 110. The entire region of the cross-section in Figure 2 that lies on the surface 120 side of the dotted line DL1 will hereafter be referred to as "region 150". Region 150 includes the edge of the dielectric substrate 100 on the base plate 200 side (i.e., surface 120) and its vicinity.

[0031] Figure 3 is a magnified view of a portion of region 150. As mentioned earlier, the dielectric substrate 100 is made of a ceramic material mainly composed of alumina. Therefore, numerous alumina crystal grains 51 can be observed in the cross-section of Figure 3. The part labeled "52" in Figure 3 is a precipitated phase in which impurities have precipitated, filling almost the entire gap between the crystal grains 51. This part will also be referred to as the "precipitated phase 52" below.

[0032] As shown in Figure 3, numerous voids 60 are also observed in the cross-section of the dielectric substrate 100. These numerous voids 60 may include intragranular voids 61 within the crystal grains 51, extragranular voids 62 within the precipitated phase 52, and so on.

[0033] In a cross-section like that shown in Figure 3, the proportion of the cross-sectional area occupied by the voids 60 will hereafter be referred to as the "void ratio." For example, if the total area of ​​a region of a certain size in the cross-section shown in Figure 3 is S1, and the sum of the cross-sectional areas of all the voids 60 in that region is S2, then the void ratio can be calculated as S2 / S1. The "region of a certain size" mentioned above can be set to any region of any position and size, as long as it is sufficiently larger than the cross-sectional area of ​​the voids 60. The void ratio can be calculated for each part of the cross-section of the dielectric substrate 100 shown in Figure 2.

[0034] In this embodiment, the void ratio of the dielectric substrate 100 is not uniform across the entire cross-section as shown in Figure 2, but varies from location to location. Specifically, the void ratio in the region 150 on the side of the surface 120 relative to the dotted line DL1 is larger than the void ratio in the other regions.

[0035] In the cross-section shown in Figure 2, the portion with a void ratio of 1% or more will be referred to below as the "void portion VA". In this embodiment, the entire region 150 becomes the void portion VA, and the void ratios of each part are adjusted so that regions other than region 150 do not become the void portion VA.

[0036] In the air gap VA, heat transfer between the substrate W and the base plate 200 is hindered by the air gap 60, resulting in a higher thermal resistance compared to the areas outside the air gap VA. The reason for providing such an air gap VA in a part of the dielectric substrate 100 is as follows.

[0037] The refrigerant flow path 250 of the base plate 200 is formed along a path that passes through various parts of the base plate 200 when viewed from above, but it is not possible to form the refrigerant flow path 250 to pass through all locations. Therefore, there is a possibility that the temperature difference between the area directly above the part of the substrate W where the refrigerant flow path 250 is formed and the area directly above the area where it is not formed will become large. As a result, there is a possibility that the in-plane temperature distribution of the substrate W will become more variable during processing.

[0038] In recent years, dielectric substrates 100 have tended to be made thinner in order to reduce impedance and thermal resistance. As a result, the thermal resistance of the dielectric substrate 100 decreases, making the temperature difference described above even more likely to occur, and it is expected that maintaining the temperature of the substrate W at an appropriate temperature will become even more difficult.

[0039] Therefore, in the electrostatic chuck 10 according to this embodiment, a gap VA with relatively high thermal resistance is provided in region 150 to suppress the temperature difference between the area directly above where the refrigerant flow path 250 is formed and the area directly above where it is not formed. As a result, the temperature of each part of the substrate W can be maintained at an appropriate temperature.

[0040] The void VA may be formed in a different area of ​​the cross-section in Figure 2 than in this embodiment. As described above, in order to suppress the temperature difference between the portion directly above the refrigerant flow path 250 and the other portions, it is preferable that the void VA be formed in a region of the cross-section in Figure 2 that includes at least the vicinity of surface 120. For example, the void VA may be formed across the entire cross-section of Figure 2, from the end on the surface 120 side to the end on the surface 110 side.

[0041] However, the portion of the cross-section in Figure 2 near surface 110 is the part that is in direct contact with the substrate W and is also the part that may be exposed to plasma. If there are concerns that the formation of the void VA may reduce the durability against plasma, the void VA may be formed only in the region excluding that portion. Specifically, the void VA may be formed in the entire region of Figure 2 that is on the surface 120 side of the dotted line DL2, and the void VA may not be formed in the region 160 that is on the surface 110 side of the dotted line DL2. By forming the void VA in the portion of the cross-section in Figure 2 that is excluding the vicinity of the mounting surface (i.e., region 160), the same effects as above can be achieved while ensuring the durability of the dielectric substrate 100 against plasma.

[0042] The void ratio in each part of the cross-section of the dielectric substrate 100 can be adjusted, for example, by the particle size and particle shape of the raw material used to create the green sheet when forming the molded body of the dielectric substrate 100 before sintering using a sheet lamination method. For example, the green sheet in the void portion VA can be made using a raw material with a large particle size, and the green sheet in the other portion can be made using a raw material with a small particle size. Alternatively, the green sheet in the void portion VA can be made using a raw material containing particles with a small average circularity (as described later), and the green sheet in the other portion can be made using a raw material containing particles with a large average circularity (close to 1). The average particle size of the raw material should be 0.1 to 10 μm, preferably 0.1 to 5 μm.

[0043] The void VA has a cross-sectional area of ​​0.40 μm². 2 Larger voids 60 exceeding 0.40 μm may be included. However, if the number of such large voids 60 becomes too large, it may reduce the durability of the dielectric substrate 100 against plasma or reduce the dielectric breakdown voltage performance of the dielectric substrate 100. For this reason, the cross-sectional area of ​​the void VA should be 0.40 μm. 2It is preferable that the proportion of the sum of the cross-sectional areas of all air gaps 60 that are larger than the specified size is kept to 15% or less. Experiments conducted by the inventors have confirmed that keeping the proportion of large air gaps 60 to this level allows the performance degradation of the dielectric substrate 100 to be kept to a negligible degree.

[0044] As already mentioned with reference to Figure 3, in at least the voids VA in the cross-section of the dielectric substrate 100, a precipitated phase 52 in which impurities are deposited is formed between each crystal grain 51. The proportion of the cross-section occupied by the precipitated phase 52 can be adjusted according to the amount of impurities such as sintering aids contained in the raw materials of the dielectric substrate 100. Examples of impurities include Si, Ca, and Mg. By increasing the amount of impurities included in the raw materials of the dielectric substrate 100 and increasing the cross-sectional area of ​​the precipitated phase 52, the cross-sectional area can be increased to 0.40 μm². 2 The generation of larger voids 60 can be suppressed to the extent described above. The amount of impurities contained in the dielectric substrate 100 should be less than 1000 ppm, preferably 500 ppm or less, and more preferably less than 300 ppm.

[0045] As shown in Figure 3, the shape of each crystal grain 51 in the void VA is different from a circular shape. The further the shape of the crystal grain 51 in the cross-section is from a circular shape, in other words, the smaller the circularity of the crystal grain 51 is than 1, the more voids 60 can be generated in that cross-section, and as a result the void ratio in that part can be increased. The circularity of the crystal grain 51 is calculated using the following formula. Circularity = 4π × (Cross-sectional area of ​​crystal grain 51) / (Perimeter of crystal grain 51) 2

[0046] Circularity can be measured, for example, using image analysis and measurement software such as WinROOF (Mitani Corporation). Note that the circularity of crystal grain 51 is displayed as "Circularity II" on the WinROOF screen.

[0047] In the void portion VA, it is preferable to keep the average value of the circularity of each crystal grain 51 smaller than 0.75. Experiments conducted by the present inventors have shown that by reducing the circularity of the crystal grain 51 to the above extent, a relatively large number of voids 60 can be generated in the cross-section of the dielectric substrate 100, and that portion can be easily made into a void portion VA.

[0048] A second embodiment will now be described. The following will primarily focus on the differences from the first embodiment, omitting explanations of points common to both embodiments as appropriate. This embodiment differs from the first embodiment in the arrangement of the void VA.

[0049] Figure 4 is a schematic cross-sectional view of the dielectric substrate 100 according to this embodiment, cut perpendicular to the mounting surface, similar to Figure 2. In this embodiment, a void VA is formed throughout the entire cross-section of Figure 4, from the end on the surface 120 side to the end on the surface 110 side. In other words, the void ratio is 1% or more at all locations in the cross-section of Figure 4. However, the void ratio in the cross-section is not uniform throughout, but differs from location to location.

[0050] The dotted line DL11 shown in Figure 4 represents a hypothetical plane parallel to surface 110. This plane is located between the adsorption electrode 130 and surface 110. The entire region of the cross-section in Figure 4 that is closer to surface 110 than the dotted line DL11 will hereafter be referred to as "region 171". Region 171 is the region of the dielectric substrate 100 that includes the mounting surface (i.e., surface 110) and its vicinity. Region 171, which is part of the void VA, corresponds to the "first void" in this embodiment.

[0051] The dotted line DL12 shown in Figure 4 represents a hypothetical plane parallel to surface 110. This plane is located closer to surface 120 than the dotted line DL11 and the adsorption electrode 130. The entire region of the cross-section in Figure 4 that is closer to surface 120 than the dotted line DL12 will hereafter be referred to as "region 172". Region 172 is located closer to the base plate 200 than region 171. Region 172, which is part of the void VA, corresponds to the "second void" in this embodiment.

[0052] As described above, the void VA in this embodiment includes a first void formed in region 171 near the mounting surface in the cross-section of Figure 4, and a second void formed in region 172 on the base plate 200 side of the first void. In this embodiment, the void ratio of each part is adjusted so that the sum of the cross-sectional areas of the voids 60 included in the first void (region 171) is smaller than the sum of the cross-sectional areas of the voids 60 included in the second void (region 172).

[0053] In this embodiment, the thermal resistance of the dielectric substrate 100 is increased by making the entire cross-section of the dielectric substrate 100 an air gap VA. As a result, as in the first embodiment, variations in the in-plane temperature distribution of the substrate W during processing can be suppressed. Furthermore, in this embodiment, the air gap ratio is reduced in the first air gap on the mounting surface side. As a result, sufficient durability against plasma can be ensured in the portion of the dielectric substrate 100 near the mounting surface.

[0054] Furthermore, the second void may be formed in a different location than in this embodiment, as long as it is located closer to the base plate 200 than the first void. For example, the second void may be in a region that does not include surface 120 or its vicinity.

[0055] A third embodiment will now be described. The following will primarily focus on the differences from the first embodiment, while commonalities will be omitted as appropriate.

[0056] Figure 5 schematically shows the configuration of the electrostatic chuck 10 according to this embodiment as a cross-sectional view similar to that in Figure 1. In this embodiment, a heater 400 is embedded inside the dielectric substrate 100. The heater 400 is an electric heater that heats the dielectric substrate 100 to maintain it at an appropriate temperature. Inside the dielectric substrate 100, the heater 400 is routed linearly along a plane parallel to the surface 110. The position where the heater 400 is provided is on the surface 120 side of the adsorption electrode 130.

[0057] The heater 400 may be routed individually to each of the multiple regions that are divided when viewed from above. With this configuration, the amount of heat generated by the heater 400 in each region can be individually adjusted, making the in-plane temperature distribution of the substrate W closer to uniform.

[0058] Figure 6 is a schematic cross-sectional view, similar to Figures 2 and 4, showing the cross-section of the dielectric substrate 100 according to this embodiment when it is cut perpendicular to the mounting surface.

[0059] The dotted line DL31 shown in Figure 6 represents a hypothetical plane parallel to surface 110. This plane is located on the side of surface 120 from the heater 400. The entire region of the cross-section in Figure 6 that is on the side of surface 120 from the dotted line DL31 will hereafter be referred to as "region 180". Region 180 includes the edge of the dielectric substrate 100 on the base plate 200 side (i.e., surface 120) and its vicinity.

[0060] In the dielectric substrate 100 of this embodiment, the void ratio in each part of the cross-section in Figure 6 is adjusted so that the entire region 180 becomes a void VA. In other words, the void VA is formed in the part of the cross-section in Figure 6 that is closer to the base plate 200 than to the heater 400.

[0061] In this configuration, the thermal resistance between the heater 400 and the base plate 200 is increased by the air gap VA. Since the heat generated by the heater 400 is less likely to escape to the base plate 200, the dielectric substrate 100 can be heated efficiently. This makes it possible to maintain the temperature of the substrate W at an appropriate temperature.

[0062] The void VA may be formed in a different location than in this embodiment, as long as at least a portion of it is formed on the base plate 200 side of the heater 400. For example, another portion of the void VA may be formed on the surface 110 side of the heater 400. Alternatively, the void VA may be a region that does not include the surface 120 or its vicinity.

[0063] The embodiments have been described above with reference to specific examples. However, this disclosure is not limited to these specific examples. Modifications made to these specific examples by those skilled in the art are also included within the scope of this disclosure, as long as they retain the features of this disclosure. The elements, their arrangement, conditions, shapes, etc., of each of the aforementioned specific examples are not limited to those illustrated and can be modified as appropriate. The elements of each of the aforementioned specific examples can be combined in different ways as appropriate, as long as no technical inconsistencies arise. [Explanation of Symbols]

[0064] 10: Electrostatic Chuck 51: Crystal Particles 52: Precipitated phase 60:Void 110,120: face 200: Base plate 250: Refrigerant flow path 400: Heater VA:Void area W: Circuit board

Claims

1. A component formed from a material mainly composed of alumina, comprising a dielectric substrate having a mounting surface on which an object to be adsorbed is placed, The dielectric substrate comprises a base plate bonded to the surface opposite to the mounting surface described above, and having a refrigerant channel formed therein through which the refrigerant passes, In the cross-section obtained by cutting the dielectric substrate perpendicular to the surface described above, An electrostatic chuck characterized in that at least a portion of the cross-section has a void portion formed therein, where the proportion of the cross-sectional area occupied by the void is 1% or more.

2. The electrostatic chuck according to claim 1, characterized in that the void portion is formed in the portion of the cross-section excluding the vicinity of the mounting surface described above.

3. The electrostatic chuck according to claim 1, characterized in that the gap is formed in the vicinity of at least the end of the cross-section on the base plate side.

4. A heater is placed inside the dielectric substrate. The electrostatic chuck according to claim 1, characterized in that the gap is formed in the portion of the cross-section that is on the base plate side of the heater.

5. In the aforementioned void, the cross-sectional area is 0.40 μm². ２ The electrostatic chuck according to claim 1, characterized in that the proportion of the cross-sectional area of ​​all the gaps that are larger than the specified value is 15% or less.

6. The aforementioned void portion is The first void portion formed in the vicinity of the aforementioned surface in the cross-section, It includes a second void formed on the base plate side of the first void, The sum of the cross-sectional areas of the voids contained in the first void is The electrostatic chuck according to claim 1, characterized in that it is smaller than the sum of the cross-sectional areas of the voids contained in the second void.

7. The electrostatic chuck according to claim 1, characterized in that the average value of the circularity of each crystal grain in the void is less than 0.

75.

8. The electrostatic chuck according to claim 1, characterized in that a precipitated phase in which impurities are precipitated is formed between each crystal particle in the void portion.

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