Deposition of AlN and GaN semiconductor transition layer structures on silicon substrates

Abstract

The present invention relates to a method for depositing AlN on a silicon substrate disposed in a process chamber, the method comprising: disposing an aluminum target in the process chamber; supplying a process gas composition containing a noble gas and nitrogen to the process chamber; ionizing the process gas composition by applying an electric field and a magnetic field to form getters of noble gas ions and nitrogen ions; sputtering the aluminum target while applying a positive bias on the silicon substrate; and depositing an aluminum and nitrogen epilayer on the silicon substrate. The present invention also relates to a gallium nitride semiconductor transition layer structure including an AlN epilayer obtained by this method.

Description

[Technical Field]

[0001] The present invention relates to a method for depositing aluminum nitride (AlN) on a silicon substrate. [Background technology]

[0002] The material gallium nitride (GaN) does not occur naturally but can be formed from its components gallium and nitrogen. GaN can be deposited by MOCVD on substrates that are closely lattice-matched to the in-plane lattice constant of GaN, i.e., 3.1 Å. To fabricate GaN on silicon, aluminum nitride is typically deposited as a primer or nucleation layer. The common substrate used in LED manufacturing is sapphire, which has a 30% lattice mismatch with GaN. Until now, sapphire wafer sizes have been limited to wafer sizes less than 8 inches, while 12-inch silicon wafer sizes are common and abundant in the semiconductor industry. Therefore, depositing gallium nitride on silicon would be an industrially scalable approach for wafers from 4 to 12 inches.

[0003] The deposition of aluminum nitride (AlN) can be performed by various methods, including metalorganic chemical vapor deposition (MOCVD), magnetron sputtering, and atomic layer deposition (ALD). To date, MOCVD has been the only technique that has provided epitaxial crystal quality, i.e., XRD FWHM, of AlN better than 0.1° for 4- to 8-inch wafers.

[0004] One object of the present invention is to provide AlN-on-silicon by sputtering for GaN-on-silicon epi-wafers. Problems and challenges associated with providing GaN-on-silicon and using AlN-on-silicon in the prior art are described below.

[0005] The Si(111) substrate surface for epitaxial aluminum nitride (AlN) is typically chosen due to its trigonal symmetry, which favors the epitaxial growth of hexagonal wurtzite GaN structures. During MOCVD epitaxial growth of GaN-on-silicon, Ga can alloy with silicon, a phenomenon known as Ga melt-back. Pure gallium (Ga) melts at room temperature, with a melting point of 29.8°C, whereas the melting point of silicon is 1410°C. Due to the Gibbs free energy required for Ga and Si to mix and form alloys, the melting point of Ga-Si alloys is very close to that of Ga and can be as low as 100°C. During direct MOCVD growth of GaN on silicon at 1100°C, Ga diffusion into silicon can cause Ga-Si melting at the processing temperature. This phenomenon is known as gallium melt-back.

[0006] Besides AlN, many other materials have been used as nucleation or transition layers to separate GaN from Si, such as SiC, HfN, ZnO, Al2O3, or rare earth oxides or nitrides.

[0007] Furthermore, the formation of silicon nitride must be avoided during MOCVD growth as a nucleation layer for AlN on silicon. To prevent the formation of an amorphous SiNx layer, an Al pretreatment or preflow is used to wet the Si surface without the introduction of ammonia (NH3). However, a thin layer of amorphous SiNx may still exist at the Si-AlN interface due to the reaction between N and the Si substrate.

[0008] The conditions of the TMAl preflow significantly affect the Si-AlN interface, which can determine the structural quality, surface morphology, and surface pitting of the AlN layer and the subsequently grown GaN layer.

[0009] To avoid the Si-Al eutectic temperature, the quality of the AlN nucleation layer may deteriorate below a thickness of 50 nm.

[0010] Significant tensile thermal stress during cooling leads to concave bowing of the Si wafer and cracking of the GaN epilayer due to the large difference in thermal expansion coefficients (54%).

[0011] To compensate for the large tensile thermal stresses that occur during the growth of GaN-on-Si, some compressive stress may be intentionally built into the subsequent GaN epilayer on AlN-on-silicon during epitaxy by lattice-mismatch-induced strain. MOCVD growth of AlN epilayers deposited on and above silicon (111) substrates is achieved by using a method where the lattice constant is related to a epilayer substrate and a AlN is 3.110 Å, and a Si Since the lattice constant is 3.84 Å, this causes tensile stress, and therefore the AlN epilayer is tensile, providing a concave wafer curvature. However, subsequent MOCVD growth of GaN epilayers on AlN as a substrate is related to the lattice constant a epilayer >a substrate and a GaN is 3.189 Å, and a AlN Since the thickness of the GaN epilayer is 3.110 Å, this induces compressive stress in the epilayer, thus compressing the GaN epilayer and providing a convex wafer curvature. Therefore, MOCVD AlN deposition typically begins with a silicon (111) substrate that is first annealed at 1050°C in a H2 atmosphere for approximately 5–10 minutes to remove the native oxide layer. Then, 50–150 lmol / min of TMAl is introduced into the reactor at temperatures of 600–900°C for 5–15 seconds without the presence of NH3 to prevent the formation of an amorphous SiNx layer. A 100 nm AlN nucleation layer is then deposited. AlN growth is performed at temperatures above 1000°C in a H2 atmosphere at a pressure of 75 Torr to minimize parasitic reactions between TMAl and NH3. This is described by Papasouliotis et al., J. Mater. Res., Vol. 30, No. 19, October 14, 2015.

[0012] ​The main obstacle to the development of AlN-on-silicon is the low growth rate. While the growth rate of AlN layers on Si by MOCVD has been reported to be about 150 nm / hour, the thickness of the AlN base layer used as a template for GaN growth typically needs to be about 300 nm with a process time of about 2 hours. This is explained by Xianglin Liu et al. in Scientific Reports 4:6416. Summary of the Invention [Problem to be solved by the invention]

[0013] In light of the above, it is an object of the present invention to provide an improved method for depositing epitaxial AlN epilayers on silicon. Embodiments of the present invention preferably seek to mitigate, alleviate or eliminate, singly or in any combination, one or more deficiencies, drawbacks or problems in the prior art, such as those described above, by providing a method for depositing AlN on a silicon substrate disposed in a process chamber in accordance with the appended claims.

[0014] It should be emphasized that as used in this specification, the term "comprise / compriseing" is to be interpreted as specifying the presence of stated features, integers, steps, or components, but does not exclude the presence or addition of one or more other features, integers, steps, components, or groups thereof.

[0015] The precursor gases, which are metalorganic and thermally decomposed, contaminate the epitaxial AlN layer with carbon atoms, which form parasitic conductive channels in the silicon substrate that lead to switching losses in high-speed RF devices and reduce the breakdown voltage of GaN power devices. Therefore, it is an object of the present invention to provide a method for depositing carbon-free epitaxial AlN epilayers on silicon.

[0016] Another object of the present invention is to provide an epitaxial AlN epilayer that can incorporate stress into a gallium nitride layer disposed above the AlN epilayer so that the AlN epilayer acts as a barrier against Ga melt-back.

[0017] It is yet another object of the present invention to provide carbon-free aluminum nitride on silicon with improved electrical properties at the silicon-aluminum nitride interface.

[0018] Aluminum nitride has the largest bandgap of all semiconductors, making it a close insulator. During sputtering, the aluminum nitride surface becomes charged by ion bombardment, increasing the risk of plasma arcing. Therefore, it is another object of the present invention to provide epitaxially oriented, smooth, low-surface-roughness aluminum nitride thin films on silicon. [Means for solving the problem]

[0019] In order to achieve at least these objects, and also other objects that will become apparent from the following description, the present invention provides a method having the features defined in claim 1 and a gallium nitride semiconductor transition layer structure having the features defined in claim 16. Preferred embodiments will become apparent from the dependent claims.

[0020] Any advantage or technical effect discussed in connection with any aspect of the present invention, and any embodiment thereof, may be applicable to any other aspect of the present invention.

[0021] According to a first aspect of the present invention, there is provided a method for depositing AlN on a silicon substrate disposed in a process chamber, the method including: disposing an aluminum target in the process chamber; supplying a process gas composition containing a noble gas and nitrogen to the process chamber; ionizing the process gas composition by applying an electric field and a magnetic field to form a getter for noble gas ions and nitrogen ions; sputtering the aluminum target while applying a positive bias on the silicon substrate; and depositing an epilayer of aluminum and nitrogen on the silicon substrate.

[0022] Applying a positive bias on the silicon substrate attracts negatively charged ions and electrons to the substrate, which shifts the glow discharge toward the silicon substrate, thus promoting the growth of AlN on the silicon substrate.

[0023] The aluminum and nitrogen epilayer will have an epitaxial relationship with the silicon substrate. The term "epitaxial relationship" will be understood as the in-plane orientation between two crystalline materials. For example, the epitaxial relationship between AlN(0001) and Si(111) is

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[0024] The positive bias on the silicon substrate may be set according to the desired rate of AlN formation and / or the desired thickness of such layer.

[0025] The positive bias may be in the range of 1 kV to 5 kV, or 1 kV, or 2 kV, or 3 kV, or 4 kV, or 5 kV, etc.

[0026] The positive bias may be applied as a DC bias.

[0027] The DC bias may be applied at a power in the range of 900-1500W.

[0028] The DC bias may be pulsed at a frequency in the range of 10 kHz to 350 kHz.

[0029] The duty cycle may range from 1% to 10%.

[0030] The silicon substrate may be any type of silicon. Preferably, the silicon substrate is: <111> It has a crystal orientation of

[0031] The silicon substrate and the aluminum target may be substantially parallel and may be spaced apart from each other by a distance in the range of 1 cm to 10 cm.

[0032] The process gas composition may include any gas. Additionally, the process gas composition may include any combination of noble gases. For example, the process gas composition may include argon, helium, and / or neon. Preferably, the process gas composition includes argon. For example, the process gas composition may include argon, with a nitrogen to argon ratio ranging from 1:1 to 1:3.

[0033] The total pressure in the process chamber during sputtering can be less than 7.5 mTorr (1 Pa). This improves the ionization rate of the process gas composition, thus improving the sputtering rate and, therefore, the deposition rate of aluminum and nitrogen.

[0034] The inventors have determined that the partial pressure of argon in the glow discharge formed in the process chamber during sputtering is p Ar and the partial pressure of nitrogen, p N2 But argon p Ar is 0.1mTorr <p Ar <3mTorr, and the nitrogen partial pressure is 0.2 <p N2 It has further been discovered that when the relationship is satisfied, where the AlN has a rod structure and the AlN epilayer is compressive, a surprising growth promotion of the AlN epilayer is achieved on a silicon substrate, where the AlN has a rod structure and the AlN epilayer is compressive.

[0035] Ionizing the process gas composition by applying an electric and magnetic field can be accomplished by any suitable means, preferably a magnetron. The magnetic field may be applied, for example, substantially perpendicular to the extension plane of the aluminum target.

[0036] Prior to depositing the aluminum nitride getter on the silicon substrate, the silicon substrate may be surface treated to enhance its surface smoothness. For example, the method may further include sputtering the silicon substrate with a noble gas prior to sputtering the aluminum target. Alternatively, the method may further include wet etching the silicon substrate in HF before placing the silicon substrate in the process chamber.

[0037] The time between sputtering or wet etching the silicon substrate and depositing the aluminum and nitrogen getter on the silicon substrate is less than 20 minutes.

[0038] The method may include heating the substrate to a substrate temperature in the range of 600 to 1200°C.

[0039] According to a second aspect of the present invention, there is provided a gallium nitride semiconductor transition layer structure, the structure comprising: <111> and a polycrystalline epilayer of aluminum and nitrogen disposed on and above the silicon substrate by a method according to the first aspect of the present invention, wherein the polycrystalline AlN epilayer includes pillar nanostructures having an epitaxial relationship to the substrate.

[0040] The aluminum and nitrogen epilayer may include a first 3C-AlN epilayer having a thickness of less than 5 nm in direct contact with the silicon substrate, and a 2H-AlN epilayer having a thickness in the range of 100 to 500 nm in direct contact with the 3C-AlN epilayer.

[0041] The pillar nanostructures may have thicknesses ranging from 10 to 60 nm.

[0042] These and other embodiments of the present invention will now be described in more detail with reference to the accompanying drawings, which show exemplary embodiments of the invention. [Brief explanation of the drawings]

[0043] [Figure 1] 1 is a schematic diagram of a system for carrying out a method according to a first aspect of the invention; DETAILED DESCRIPTION OF THE INVENTION

[0044] In the following detailed description, several embodiments of the present invention will be described. However, it should be understood that features of different embodiments are interchangeable between the embodiments and may be combined in different ways, unless otherwise indicated. In the following description, numerous details are set forth to provide a more thorough understanding of the present invention, but it will be apparent to those skilled in the art that the present invention may be practiced without these details. In other instances, well-known structures or functions have not been described in detail so as not to obscure the invention. In the drawings, similar or corresponding features are indicated by the same reference numerals. Before describing the present invention in detail herein, it should be understood that the present invention is not limited to any GaN-on-silicon embodiment.

[0045] 1 shows a system 1 for depositing AlN according to a first embodiment of the present invention. The system 1 includes a process chamber 2. The process chamber 2 may be any type of chamber configured for a sputtering process. Specifically, the process chamber 2 should preferably be configured to generate and maintain a vacuum of 1-10 mTorr and a temperature exceeding 500°C.

[0046] The system 1 further comprises an aluminum target 3 and a silicon substrate 4 disposed within the process chamber 2. The aluminum target 3 may be provided, for example, in the form of metallic aluminum. Alternatively, the aluminum target 3 may be provided in the form of an aluminum alloy.

[0047] The silicon substrate may have any crystal orientation. Preferably, the silicon substrate is <111> It has a crystal orientation of

[0048] The silicon substrate 4 may be heated when placed in the process chamber 2.

[0049] Here, the aluminum target 3 and silicon substrate 4 are shown as being substantially parallel to each other.

[0050] The substantially parallel relationship between the aluminum target 3 and the silicon substrate 4 entails that the main sputtering surface 3A of the aluminum target 3, which faces the main deposition surface 4A of the silicon substrate 4, is substantially parallel to said main deposition surface 4A. Furthermore, the aluminum target 3 and the silicon substrate 4 are substantially coaxial. Because the aluminum target 3 and the silicon substrate 4 are substantially parallel and coaxial, the rate of deposition is maximized.

[0051] The primary sputtering surface 3A of the aluminum target 3 and the primary deposition surface 4A of the silicon substrate 4 may be spaced apart from each other by a distance of 1 to 30 cm, or 1 to 20 cm, or 1 to 30 cm. Preferably, the primary sputtering surface 3A and the primary deposition surface 4A are spaced apart from each other by a distance of 1 cm or more and 10 cm or less.

[0052] Prior to sputtering, a process gas composition is supplied to chamber 2. The process gas composition includes a noble gas and nitrogen. Preferably, the noble gas is argon. Furthermore, the process gas composition may include two or more noble gases. For example, the process gas composition may include argon and neon. The ratio of argon to neon in the process gas composition may be, for example, 1:1. The partial pressure of nitrogen may be in the range of 0.3 to 0.8 mTorr, and the partial pressure of argon may be in the range of 0.8 to 1.2 mTorr. In one embodiment of the present invention, the process gas composition may have a total pressure of less than 2 mTorr when supplied to the process chamber. The total pressure of the process gas composition when injected into process chamber 2 may be, for example, 1 to 10 mTorr. Thus, the total pressure of the process gas composition may be 1 mTorr, or 2 mTorr, or 3 mTorr, or 4 mTorr, or 5 mTorr, or 6 mTorr, or 7 mTorr, or 8 mTorr, or 9 mTorr, or 10 mTorr. In another embodiment of the present invention, the process gas composition may include argon, and the nitrogen to argon ratio may be in the range of 1:1 to 1:3. The process gas composition may include argon, and the nitrogen partial pressure may be in the range of 0.2 to 0.3 mTorr, and the argon partial pressure may be in the range of 0.1 mTorr to 3 mTorr. Furthermore, the nitrogen to argon ratio may be in the range of 1:2 to 1:3.

[0053] As is well established in the art, to initiate sputtering, a negative bias is applied on the aluminum target 3. Positive noble gas ions, such as argon ions, naturally occurring in the process gas composition will therefore be accelerated towards the aluminum target 3 such that the aluminum target 3 is sputtered. The general trajectory direction for aluminum atoms sputtered from the aluminum target 3 is indicated by arrow A1.

[0054] Sputtering of the aluminum target 3 will also lead to the emission of secondary electrons. A glow discharge 5 will therefore be formed. The glow discharge 5 contains aluminum ions and nitrogen ions.

[0055] To increase the sputtering rate, the process gas composition is ionized by applying an electric and magnetic field so that a getter of rare gas ions and nitrogen ions is formed. The magnetic field may, for example, be substantially parallel to the extension plane of the target. To this end, the system 1 may further comprise a magnetron 6, as is well established in the art, which moves the secondary electrons in a circular pattern to enhance the ionization of rare gas atoms. The circular pattern is indicated by arrow A2 and is denoted "e" - " is also written as ".

[0056] During sputtering of the aluminum target, a positive bias is applied on the silicon substrate 3. By applying a positive bias on the silicon substrate 3, the glow discharge 5, and hence the getter of rare gas ions and nitrogen ions, is transferred towards the silicon substrate 3. Thus, the aluminum ions and nitrogen ions are attracted to the silicon substrate 3. Therefore, the getter of aluminum ions and nitrogen ions is deposited on the silicon substrate 3, which will further attract the sputtered aluminum and ionized nitrogen. This promotes the growth of an AlN epilayer on the silicon substrate.

[0057] The DC bias power may be pulsed at a frequency ranging from 10 kHz to 350 kHz. The pulsing may be performed at a duty cycle ranging from 1% to 10%. The total pressure in the process chamber during sputtering may be less than 7.5 mTorr (1 Pa). The positive bias may be in the range of 1 kV to 5 kV. The positive bias may be 1 kV, 2 kV, 3 kV, 4 kV, or 5 kV. The positive bias may be applied as a DC bias. The DC bias may be pulsed at a frequency ranging from 10 kHz to 350 kHz.

[0058] The substrate may be heated to temperatures ranging from 600 to 1200 °C. The crystallinity of the aluminum nitride is enhanced by sublimation of the Al-N getter into a crystalline solid thin film. This is achieved by applying a DC bias power that causes the glow discharge to reach an electron temperature of 10 eV, corresponding to 10,000 K. For example, the total DC power may be in the range of 900 to 1500 W. The duty cycle is typically kW / cm in short pulses (impulses) of tens of microseconds with a low duty cycle of less than 10%. 2 This method may be used to deliver pulses with high power densities on the order of 1000 kJ / s. In another embodiment of the present invention, the pressure is reduced to 1 mTorr to further increase the kinetic energy of the argon ions. High diffusion onto the surface of the silicon substrate may be achieved at temperatures exceeding 500°C. Temperatures above 700°C are desirable. However, temperatures should not exceed 1000°C to prevent alloy formation between gallium and silicon. In AC sputtering, the polarity changes from positive to negative in half cycles, typically at a frequency of 13.56 MHz, corresponding to a period of 71 nanoseconds. DC sputtering systems typically require 2-5 kV. The anode / target is decharged during the off-time, allowing material to be deposited during the negative cycle.

[0059] Before depositing the aluminum and nitrogen epilayer on the silicon substrate 4, the silicon substrate 4 may be surface-treated to enhance its surface smoothness. For example, the silicon substrate 4 may be sputtered with a noble gas before or while the aluminum target 3 is sputtered. Alternatively, the silicon substrate 4 may be wet-etched in HF before being placed in the process chamber 2. The time between sputtering or wet-etching the silicon substrate 4 and depositing the aluminum and nitrogen getter on the silicon substrate 4 is preferably less than 20 minutes.

[0060] The method according to the first aspect of the present invention may be used to provide a gallium nitride semiconductor transition layer structure.

[0061] The silicon substrate is <111> Specifically, the gallium nitride semiconductor transition layer structure may have a crystal orientation of: <111> and a polycrystalline AlN epilayer of aluminum and nitrogen disposed on and above the silicon substrate, the polycrystalline AlN epilayer being obtained by the method according to the first aspect of the present invention. The polycrystalline AlN epilayer includes pillar nanostructures in an epitaxial relationship to the silicon substrate. The aluminum and nitrogen epilayer may include a first 3C-AlN epilayer of less than 5 nm thickness in direct contact with the silicon substrate, and a 2H-AlN epilayer of 100-500 nm thickness in direct contact with the 3C-AlN epilayer. The pillar nanostructures may have a thickness of 10-60 nm.

[0062] Another embodiment of the present invention is a GaN-on-silicon epiwafer including a polycrystalline aluminum and nitrogen epilayer disposed on and above a silicon substrate. The first layer disposed on and above the polycrystalline AlN epilayer substrate includes pillar nanostructures in an epitaxial relationship to the silicon substrate. The aluminum and nitrogen epilayer may include a first 3C-AlN epilayer less than 5 nm thick in direct contact with the silicon substrate, and a 2H-AlN epilayer having a thickness of 100-500 nm in direct contact with the 3C-AlN epilayer. The pillar nanostructures may have thicknesses in the ranges of 10-60 nm, 100-300 nm, or 300-1000 nm. A second epilayer including Al(x)Ga(1-x)N, where x is 0.2≦x<0.3, may be deposited on the polycrystalline AlN epilayer by MOCVD. A third epilayer of Al(y)Ga(1-y)N with composition 0.1≦x<0.2 may be deposited by MOCVD, and a substantially thicker fourth GaN epilayer may be deposited by MOCVD.

[0063] A presently preferred embodiment of the present invention is a method for depositing AlN on a silicon substrate disposed in a process chamber, the method comprising: disposing an aluminum target in the process chamber; supplying a process gas composition containing a noble gas and nitrogen to the process chamber; ionizing the process gas composition by applying an electric field and a magnetic field to form a getter of noble gas ions and nitrogen ions; sputtering the aluminum target while applying a positive bias on the silicon substrate; and depositing an epilayer of aluminum and nitrogen on the silicon substrate. <111> The silicon substrate and the aluminum target may have a crystal orientation of 1000 to 10000 kHz. The process gas composition may have a total pressure of less than 2 mTorr when supplied to the process chamber. The silicon substrate and the aluminum target may be substantially parallel and spaced apart from each other by a distance of 1 cm to 10 cm. The positive bias may be applied as a DC bias. The DC bias may be applied at a power in the range of 900 to 1500 W. The DC bias power may be pulsed at a frequency in the range of 10 kHz to 350 kHz. The pulsation may be performed at a duty cycle in the range of 1% to 10%. The total pressure in the process chamber during sputtering may be less than 7.5 mTorr (1 Pa).

[0064] The silicon substrate may be sputtered with the noble gas before sputtering the aluminum target. The silicon substrate may be wet etched in HF before being placed in the process chamber. The time between sputtering or wet etching the silicon substrate and depositing an aluminum and nitrogen epilayer on the silicon substrate may be less than 20 minutes. Sputtering may be performed with the aluminum target coaxial with the substrate. The process gas composition may include argon, and the nitrogen to argon ratio may be in the range of 1:1 to 1:3. The process gas composition may include argon, and the nitrogen partial pressure may be in the range of 0.2 to 0.3 mTorr, and the argon partial pressure may be in the range of 0.1 to 3 mTorr. The substrate may be heated to a temperature in the range of 600 to 1200°C.

[0065] Another currently preferred embodiment of the present invention comprises: <111> A gallium nitride semiconductor transition layer structure includes a silicon substrate having a crystal orientation of 3C-AlN and a polycrystalline aluminum and nitrogen epilayer disposed on and above the silicon substrate. The polycrystalline AlN epilayer may include pillar nanostructures in an epitaxial relationship with the substrate. The aluminum and nitrogen epilayer may include a first 3C-AlN epilayer less than 5 nm thick in direct contact with the silicon substrate and a 2H-AlN epilayer having a thickness of 100-500 nm in direct contact with the 3C-AlN epilayer. The pillar nanostructures may have a thickness in the range of 10-60 nm.

[0066] A further presently preferred embodiment of the present invention is a GaN-on-silicon epi-wafer comprising a polycrystalline epi-layer of aluminum and nitrogen disposed on and above a silicon substrate. The first layer may be disposed on or above a substrate of a polycrystalline AlN epi-layer comprising pillar-nanostructures having an epitaxial relationship with the silicon substrate 4. The epi-layer of aluminum and nitrogen may comprise a first 3C-AlN epi-layer having a thickness of less than 5 nm in direct contact with the silicon substrate 4 and a 2H-AlN epi-layer having a thickness of 100 to 500 nm in direct contact with the 3C-AlN epi-layer. The pillar-nanostructures may have a thickness in the range of 10 to 60 nm, 100 to 300 nm, or 300 to 1000 nm. The polycrystalline AlN epi-layer may comprise a second epi-layer disposed on the first layer comprising Al(x)Ga(1-x)N having a composition of 0.2 ≦ x < 0.3 and may be deposited by MOCVD. A third epi-layer of Al(y)Ga(1-y)N having a composition of 0.1 ≦ x < 0.2 may be deposited by MOCVD and a substantially thick fourth GaN epi-layer may be deposited by MOCVD. Alternatively, the polycrystalline AlN epi-layer may comprise a second epi-layer disposed on the first layer comprising GaN deposited by MOCVD. A third epi-layer of Al(x)Ga(1-x)N having a composition of 0 < x < 1 and deposited by MOCVD having a thickness in the range of 1 to 30 nm may be deposited on the second epi-layer.

[0067] While modifications and variations may be suggested by those skilled in the art, it is the intention of the inventors that the present invention encompass all modifications and variations that are reasonably and appropriately within the scope of the disclosure disclosed herein. The present invention has been described above with reference to specific embodiments. However, other embodiments besides those described above are equally possible within the scope of the present invention. Method steps other than those described above for the method for depositing AlN on a silicon substrate may be provided within the scope of the present invention. Different features and steps of the present invention may be combined in other combinations than those described. For example, various features of the embodiments may be combined, mutatis mutandis, in combinations other than those described. The scope of the present invention is limited only by the appended claims.

Claims

1. A method for depositing AlN on a silicon substrate (4) having a crystal orientation of <111> and placed in a process chamber (2), The aluminum target (3) is placed inside the process chamber (2), A process gas composition containing noble gases and nitrogen is supplied to the process chamber (2), The process gas composition is ionized by applying an electric and magnetic field so that getters are formed between noble gas ions and nitrogen ions. The aluminum target (3) is sputtered while a positive bias is applied to the silicon substrate (4), The process involves depositing an epitaxial layer of aluminum and nitrogen on the silicon substrate (4) and Methods that include...

2. The method according to claim 1, wherein the process gas composition has a total pressure of less than 2 mTorr when supplied to the process chamber (2).

3. The method according to claim 1, wherein the silicon substrate (4) and the aluminum target (3) are substantially parallel and are arranged at a distance of 1 cm to 10 cm from each other.

4. The method according to claim 1, wherein the positive bias is applied as a DC bias, the DC bias voltage is in the range of 1 kV to 5 kV, the power of the DC bias is in the range of 900 to 1500 W, and the DC bias is pulsed at a frequency in the range of 10 kHz to 350 kHz.

5. The method according to claim 1, wherein the total pressure in the process chamber (2) during sputtering is less than 7.5 mTorr (1 Pa).

6. The method according to claim 1, further comprising sputtering the silicon substrate (4) with the noble gas before sputtering the aluminum target (3).

7. The method according to claim 6, wherein the time between sputtering the silicon substrate (4) and depositing an epitaxial layer of aluminum and nitrogen on the silicon substrate (4) is less than 20 minutes.

8. The method according to claim 1, further comprising wet etching the silicon substrate (4) in HF before the silicon substrate (4) is placed in the process chamber (2).

9. The method according to claim 8, wherein the time between wet etching the silicon substrate (4) and depositing an aluminum-nitrogen epitaxial layer on the silicon substrate (4) is less than 20 minutes.

10. The method according to claim 1, wherein the aluminum target (3) is coaxial with the silicon substrate (4).

11. The method according to claim 1, wherein the process gas composition contains argon, and the ratio of nitrogen to argon is in the range of 1:1 to 1:

3.

12. The method according to claim 1, wherein the process gas composition contains argon, the partial pressure of nitrogen is in the range of 0.2 to 0.3 mTorr, and the partial pressure of argon is in the range of 0.1 to 3 mTorr.

13. The method according to claim 1, further comprising heating the substrate to a temperature in the range of 600 to 1200°C.

14. The method according to claim 1, wherein by applying a positive bias to the silicon substrate, the glow discharge, and consequently the getters of the noble gas ions and nitrogen ions, are transferred toward the silicon substrate, and as a result, aluminum ions and nitrogen ions are attracted to the silicon substrate, the getters of aluminum ions and nitrogen ions are deposited on the silicon substrate, and the sputtered aluminum and ionized nitrogen are further attracted, thereby promoting the growth of the AlN epitaxial layer on the silicon substrate.

15. A silicon substrate (4) having a crystal orientation of <111>, A polycrystalline epitaxial layer of aluminum and nitrogen disposed on and above the silicon substrate (4), the polycrystalline epitaxial layer obtained by the method of any one of claims 1 to 14 Includes, The polycrystalline AlN epitaxial layer is a gallium nitride semiconductor transition layer structure that includes pillar nanostructures having an epitaxial relationship with the substrate (4).

16. The gallium nitride semiconductor transition layer structure according to claim 15, wherein the aluminum-nitrogen epitaxial layer comprises a first 3C-AlN epitaxial layer less than 5 nm thick in direct contact with the silicon substrate (4), and a 2H-AlN epitaxial layer in the range of 100 to 500 nm thick in direct contact with the 3C-AlN epitaxial layer.

17. The gallium nitride semiconductor transition layer structure according to claim 15, wherein the pillar nanostructure has a thickness in the range of 10 to 60 nm.

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