Process for manufacturing image sensors

Abstract

The present invention relates to a process for manufacturing an image sensor for detecting visible light and short wave infrared light, the process comprising: a. Providing a carrier substrate (1, 1') containing a first semiconductor; b. forming a plurality of cavities (5) in the carrier substrate (1, 1') to define visible light sensitive pixels (11, 11') in the first semiconductor between the plurality of cavities (5); c. forming an electrically insulating protective layer (4) on at least a plurality of sides of each pixel (11, 11') sensitive to visible light; growing a second material different from the first material in the plurality of cavities (5) to form pixels (12, 12') sensitive to short wave infrared radiation; The present invention is characterized by comprising:

Description

[Technical Field]

[0001] The present disclosure relates to a process for manufacturing image sensors sensitive to visible light and short-wave infrared radiation.

[0002] Fabrication of image sensors sensitive to visible light and short-wave infrared (SWIR) involves using separate materials to form two different types of pixels: a first set of pixels sensitive to visible light, i.e., light with wavelengths comprised between 380 nm and 780 nm, and a second set of pixels sensitive to short-wave infrared, i.e., light with wavelengths extending from about 780 nm to about 3 μm.

[0003] Due to its semiconducting properties, silicon is usually used for the manufacture of sensors sensitive to visible light. In particular, silicon-on-insulator (SOI) substrates are used, which comprise a doped silicon base substrate, an intermediate silicon oxide layer called the buried oxide layer, and a so-called active layer of silicon, which may be doped differently from the base substrate and in which the pixels are formed.

[0004] However, silicon is not suitable for detecting infrared radiation, and the photon energy of infrared radiation is too low to be detected by wide bandgap materials such as silicon. As a result, narrower bandgap materials, such as III-V semiconductors including alloys of indium phosphide (InP) or even germanium (Ge), are used to fabricate infrared cameras or sensors.

[0005] InP alloys are of particular use; however, InP is a relatively rare material that is only available in the form of small diameter (less than 15 cm) substrates, and is brittle and relatively difficult to work with.

[0006] As a result, in the prior art, the fabrication of a sensor simultaneously sensitive to visible and infrared light requires the use of multiple layers of different materials derived from different substrates. Sensors obtained via this type of process generally include at least one silicon substrate, a layer of a semiconductor sensitive to visible light, and a layer of a different semiconductor sensitive to infrared light.

[0007] One alternative is to use III-V semiconductors to detect not only visible light but also infrared radiation, as envisaged in WO 2015 / 048304 A2. In this type of sensor, as shown in FIG. 1, an indium gallium arsenide (InGaAs) layer 104 serves as a layer for detecting visible and short-wave infrared radiation, and its thickness is between 0.5 μm and 6 μm. The InGaAs layer 104 is epitaxially grown on an InP substrate 101 and is covered with an additional InP layer 105, which serves as a contact layer. The indium phosphide surface layer 105 is particularly thin so that visible light can reach the InGaAs layer 104.

[0008] However, the presence of the indium phosphide layer 105 still reduces the quantum efficiency of the sensor at certain wavelengths of visible light, typically around 600 nm. Furthermore, using the same InGaAs layer 104 to detect visible and infrared waves means that the dimensions and spacing of the visible pixels must be the same as the dimensions and spacing of the SWIR pixels. Therefore, the resolution of the sensor is limited by the resolution of the infrared-sensitive pixels, which is generally much lower than the resolution desired for the visible-sensitive pixels. Therefore, this solution does not provide a satisfactory resolution for the visible-sensitive pixels. Overview

[0009] To overcome these drawbacks, the present disclosure provides a process for manufacturing an image sensor for detecting visible light and short-wave infrared light, the process comprising: a. providing a carrier substrate including a first semiconductor; b. forming a plurality of cavities in the carrier substrate to define pixels sensitive to visible light in the first semiconductor between the plurality of cavities; c. forming an electrically insulating protective layer on at least a plurality of sides of each pixel sensitive to visible light; d. growing a second material, different from the first material, within the plurality of cavities to form pixels sensitive to short wave infrared radiation.

[0010] In this way, a sensor is obtained that is sensitive to both radiation in the visible spectrum and short-wave infrared radiation, with the pixels sensitive to these two types of radiation being located in the same plane, thereby avoiding the need for vertical stacking of successive semiconductor layers. The resulting sensor does not exhibit a reduction in quantum efficiency, and the resolution of the pixels sensitive to visible radiation is not limited by the resolution of the pixels sensitive to short-wave infrared radiation.

[0011] According to one embodiment, the process includes step a' of forming a protective film on the carrier substrate between step a and step b to protect the visible light-sensitive pixels in step b of forming the multiple cavities, and step c' of removing the protective film between step c and step d to expose the top surfaces of the visible light-sensitive pixels.

[0012] According to one embodiment, the process includes, between step a and step b, step a' of forming a protective film on the carrier substrate to protect the pixels sensitive to visible light in step b of forming the cavities, and after step d, step d' of removing the protective film to expose the top surfaces of the pixels sensitive to visible light.

[0013] According to one embodiment, step c comprises forming the protective layer by rapid thermal annealing.

[0014] According to one embodiment, the first semiconductor is silicon.

[0015] According to one embodiment, the second semiconductor is a III-V semiconductor, preferably selected from indium phosphide, indium gallium arsenide, germanium alloys, or quantum dots, for example colloidal quantum dots based on lead(II) sulfide.

[0016] According to one embodiment, the carrier substrate is a silicon-on-insulator substrate, which successively comprises a base substrate, an electrically insulating intermediate layer, and a monocrystalline layer of a first semiconductor.

[0017] According to one embodiment, the process comprises, between steps b and c, a step b' of thickening the monocrystalline layer by homoepitaxy.

[0018] According to one embodiment, step b is an etching step applied to the carrier substrate until the electrically insulating intermediate layer is reached.

[0019] According to one embodiment, the process includes a step c" after step c and optionally step c' of removing the material forming the electrically insulating interlayer from the plurality of cavities, and pixels sensitive to short wave infrared radiation are formed in step d on the surface of the base substrate exposed by the removing step c".

[0020] According to one embodiment, the carrier substrate is a bulk substrate of the first semiconductor.

[0021] The present disclosure further provides an image sensor for detecting visible light and short wave infrared light, the image sensor comprising: a carrier substrate; - a plurality of pixels sensitive to visible light and a plurality of pixels sensitive to short wave infrared light formed on a carrier substrate, the pixels sensitive to infrared light being arranged on a surface region of the carrier substrate; - a protective layer disposed on at least a plurality of sidewalls of each pixel to electrically isolate each pixel from a plurality of adjacent pixels; The pixels form an array arranged in the same plane, and the carrier substrate is a semiconductor-on-insulator (SOI) substrate, in particular a silicon-on-insulator, which comprises, in succession, a base substrate made of a semiconductor, an electrically insulating intermediate layer and a monocrystalline layer made of a semiconductor. [Brief explanation of the drawings]

[0022] [Figure 1] FIG. 1 shows a prior art sensor sensitive to visible light and short-wave infrared. [Figure 2] FIG. 1 is a diagram showing a conventional SOI substrate. [Figure 3] 1A-1C illustrate steps for epitaxial growth of a monocrystalline layer of SOI according to one embodiment. [Figure 4a] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 4b] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 4c] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 4d] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 4e] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 4f] FIG. 2 shows the steps of the proposed process according to a first embodiment. [Figure 5a] FIG. 4 illustrates steps of the proposed process according to a second embodiment. [Figure 5b] FIG. 4 illustrates steps of the proposed process according to a second embodiment. [Figure 5c] FIG. 4 illustrates steps of the proposed process according to a second embodiment. [Figure 5d] FIG. 4 illustrates steps of the proposed process according to a second embodiment. [Figure 5e] FIG. 4 illustrates steps of the proposed process according to a second embodiment. [Figure 6] FIG. 1 is a diagram showing an arrangement of pixels of a sensor called a "Bayer arrangement." Detailed Description of the Embodiments

[0023] For clarity of illustration, the various elements are not necessarily drawn to scale.

[0024] A given reference number used in multiple figures indicates the same element and will not be described in detail more than once.

[0025] The present disclosure relates to a process for fabricating an image sensor capable of detecting visible light and short-wave infrared light, and the sensor resulting from this process.

[0026] The process includes a first step of providing a carrier substrate, which includes at least a first semiconductor on which the visible light sensitive pixels will be formed. More specifically, the first semiconductor can be silicon.

[0027] According to a first embodiment, the carrier substrate is a silicon-on-insulator (SOI) substrate, which comprises in succession a base substrate, an electrically insulating intermediate layer and a monocrystalline layer of a first semiconductor.

[0028] If the first semiconductor monocrystalline layer has a thickness less than that desired for the pixels sensitive to visible light, the process can include a growth step aimed at thickening said layer. This step can be an epitaxial growth, in particular a homoepitaxy step. For example, the thickness of the pixels sensitive to visible light is advantageously comprised between 1 μm and 10 μm.

[0029] According to a second embodiment, the carrier substrate is entirely formed from a first semiconductor, which may in particular be a bulk silicon substrate.

[0030] The process includes forming cavities in a first semiconductor of a carrier substrate, thereby enabling the definition of a plurality of pixels sensitive to visible light between the cavities in the first semiconductor. As will be seen below, the cavities are then filled with a second semiconductor sensitive to infrared light. Consequently, the size of the cavities is advantageously selected to optimize the size of the pixels sensitive to infrared light, and the distance between adjacent cavities is selected to optimize the size of the pixels sensitive to visible light. For example, but not limited to, the distance between two adjacent cavities (which substantially corresponds to the width of the pixels sensitive to visible light) is between 0.25 μm and 2 μm, and the width of the cavities (which substantially corresponds to the width of the pixels sensitive to infrared light) is between 1 μm and 10 μm.

[0031] Prior to this step of forming the cavity, the proposed process may include a step of forming a protective film. Such a step aims to protect certain parts of the carrier substrate and leave other parts of the carrier substrate unprotected, which then form the cavity. The step of forming the cavity may be a step of plasma-assisted dry etching.

[0032] The protective film then serves in particular to protect certain parts of the carrier substrate during etching. The protective film may in particular be a film that acts as a mask to protect the carrier substrate from the etchant.

[0033] The protective film may be formed from silicon nitride, which has the advantage of having high etch selectivity with respect to silicon and III-V materials.

[0034] After the cavity has been formed, the process further comprises the step of forming an electrically insulating protective layer on the pixel sensitive to visible light, in particular on its side surfaces. If the bottom of the cavity is made of semiconductor, the protective layer also extends onto this surface. This layer can be obtained by rapid thermal annealing, in particular in an oxidizing atmosphere.

[0035] The proposed process further comprises the step of growing in the cavity a second semiconductor different from the first semiconductor, the second semiconductor being sensitive to short-wave infrared radiation. Advantageously, the second material is chosen from III-V semiconductors such as indium phosphide (InP), indium gallium arsenide (InGaAs) or alloys of germanium (Ge), or is otherwise formed from colloidal quantum dots, such as colloidal quantum dots based on lead (II) sulfide or lead selenide.

[0036] The second semiconductor is grown heteroepitaxially on the first semiconductor, and to this end, if the bottom of the cavity is covered with an electrically insulating protective layer, it is necessary to remove said layer beforehand to expose the first semiconductor.

[0037] In order to grow the second semiconductor in the cavities, the surface of the pixel that is sensitive to visible light is advantageously protected by a mask, for example made of silicon nitride.

[0038] The first embodiment uses an SOI such as that shown in Figure 2 as carrier substrate 1. Such an SOI comprises, in succession, a base substrate 13 made of a semiconductor, usually silicon, an intermediate layer 14 made of an electrically insulating material, in particular silicon oxide, and a layer 15 of a monocrystalline semiconductor, usually also made of silicon. The thickness of the monocrystalline semiconductor layer is typically comprised between 50 nm and a few µm.

[0039] As shown in Figure 4a, the proposed process may include the step of forming a protective film 3, which selectively protects certain parts of the substrate 1 and leaves other parts unprotected.

[0040] 4b shows a step for forming pixels 11 sensitive to visible light. In this step, cavities 5 are created in the monocrystalline layer 15 of the carrier substrate 1, up to the insulating intermediate layer 14. According to one preferred embodiment, these cavities are created by plasma-assisted dry etching, which is performed so as to etch the unprotected parts of the substrate 1, but not the parts protected by the protective film 3.

[0041] Such etching is usually anisotropic and makes it possible to obtain cavities 5 that are essentially oriented in the thickness direction of the substrate 1 and have sides that are substantially parallel to this direction.

[0042] The distance between the cavities, which corresponds substantially to the width of the part of the carrier substrate 1 covered by the protective film 3, is chosen to obtain pixels 11 of the desired size that are sensitive to visible light.

[0043] If the SOI monocrystalline layer 15 is too thin to form pixels 11 of the desired size that are sensitive to visible light, an epitaxial growth step can be provided to thicken the monocrystalline layer 15, for example to a thickness of the order of a few microns. Such a step is shown in Figure 3. Since this layer is preferably made of silicon, this step would in this case be a step of homoepitaxy of monocrystalline silicon onto the monocrystalline layer 15.

[0044] This step makes it possible in particular to choose the thickness of the pixels 11 sensitive to visible light, which thickness depends directly on the thickness of the SOI monocrystalline layer 15 .

[0045] As shown in FIG. 4c, after the cavity is obtained, an electrically insulating protective layer 4 is formed to protect at least the sidewalls of each pixel 11 sensitive to visible light. According to one embodiment, this protective layer is obtained by thermal oxidation, which may include rapid thermal annealing. When such thermal annealing is performed in an oxidizing atmosphere, a silicon oxide layer appears on the surface of the pixels 11 sensitive to visible light, forming the protective layer 4. Furthermore, the protective layer may also be formed by deposition. The function of this protective layer 4 is to create electrical insulation between the pixels 11 sensitive to visible light and the pixels 12 sensitive to short-wave infrared light that will be formed in a subsequent step of the process.

[0046] The use of SOI as carrier substrate therefore makes it possible to obtain a silicon oxide layer present both on the sidewalls of the visible light sensitive pixels 11 and between these pixels and the base substrate 13 of the carrier substrate 1. In fact, the protective silicon oxide layer 4 is already partly formed by the intermediate layer 14 of SOI which serves as the carrier substrate 1. This allows the visible light sensitive pixels 11 to be electrically isolated not only from the shortwave infrared sensitive pixels 12 but also from the rest of the carrier substrate 1, which limits the transconductance between the pixels.

[0047] The process then includes removing the portions of the protective layer 4 (or 14) located at the bottom of the cavities to expose the base substrate 13 of the carrier substrate 1, such as that shown in Figure 4d. The protective layer is then disposed only around the sidewalls of each pixel 11 that is sensitive to visible light and between these pixels 11 and the base substrate 13 of the carrier substrate 1.

[0048] This allows the top surface of the carrier substrate 1 to be exposed for the purpose of forming infrared sensitive pixels 12 thereon, as will be explained below.

[0049] Finally, the process includes forming infrared-sensitive pixels 12 in the portions of the carrier substrate 1 located between the visible-light-sensitive pixels 11. This step is shown in FIG. 4e. This formation is preferably performed by epitaxy, with the surface of the carrier substrate 11 then serving as a seed layer for growing the infrared-sensitive material. According to one embodiment, the material forming the pixels 12 is selected from III-V semiconductors, such as indium phosphide (InP), indium gallium arsenide (InGaAs), or alloys of germanium (Ge). The material forming the pixels 12 may also be formed from colloidal quantum dots, such as lead(II) sulfide colloidal quantum dots. Since the substrate 1 is typically made of silicon, this step is preferably a heteroepitaxial growth step.

[0050] If a protective film 3 has been used to form the cavities 5, this film is removed after the step of forming the infrared-sensitive pixels 12. The protective film 3 therefore also makes it possible to prevent the material forming the pixels 12 from growing on the visible-light-sensitive pixels 11. The protective film 3 can in particular be removed in an additional etching step.

[0051] Forming the shortwave infrared sensitive pixels 12 in cavities 5 located between the visible light sensitive pixels 11 allows these two types of pixels to be located in the same plane of the sensor. Thus, forming the sensor does not require vertical stacking of light sensitive materials configured to detect visible light and shortwave infrared respectively. Therefore, in contrast to prior art sensors, neither of the two materials used is embedded and all pixels are directly exposed to the light rays.

[0052] Therefore, the sensors obtained by the proposed process do not exhibit the decrease in quantum efficiency observed in prior art sensors at certain wavelengths.

[0053] Furthermore, because the formation of the infrared-sensitive pixels 12 is independent of the formation of the visible-light-sensitive pixels 11, these pixels 12 are formed to the desired dimensions (particularly having the desired width and thickness) independent of the dimensions of the visible-light-sensitive pixels 11. Each type of pixel is formed from the most appropriate material.

[0054] Optionally, prior to the step of forming the infrared-sensitive pixels 12, provisions can be made to form a buffer layer 6 on the portion of the carrier substrate 1 located at the bottom of the cavity 5 so as to absorb dislocations generated by the process of epitaxial growth of the pixels 12, as shown in FIG. 4f.

[0055] According to a second embodiment of the process shown in FIGS. 5a-5e, a bulk silicon substrate is used as a carrier substrate 1′ to obtain a sensor such as that shown in FIG. 5e. According to this embodiment, a cavity 5, such as that shown in FIG. 5b, is preferably created in the silicon layer 1′ by etching using a protective film 3 such as that described above. The cavity is created only in a portion of the thickness of the carrier substrate 1′ to achieve the desired thickness of the visible light-sensitive pixel 11′. Then, as shown in FIG. 5c, a protective layer 4 is formed. A step can then be performed to remove the portion of the protective layer 4 at the bottom of the cavity to expose the carrier substrate 1′. This step is shown in FIG. 5d.

[0056] In this embodiment, the final protective layer 4 will be located only on the sidewalls of the pixels 11' that are sensitive to visible light.

[0057] Finally, infrared-sensitive pixels 12' are formed, in particular by heteroepitaxial growth on the superficial surface of the carrier substrate 1' within the cavity 5. As in the previous embodiment, a III-V semiconductor such as those mentioned above, or colloidal quantum dots such as lead(II) sulfide colloidal quantum dots will preferably be chosen as the infrared-sensitive material.

[0058] As in the previous embodiment, if a protective film 3 is used to form the cavity 5, this film is removed after the step of forming the infrared-sensitive pixels 12', in particular by an additional etching step.

[0059] As mentioned above, a buffer layer 6 may be provided between the carrier substrate 1' and the infrared-sensitive material to absorb dislocations generated by the process of epitaxial growth of the pixels 12'.

[0060] 6 shows, from a top view, an example of an arrangement of pixels of a sensor in the form of a Bayer matrix, which includes pixels sensitive to blue, green, and red visible light (denoted R, G, and B for red, green, and blue, respectively) and pixels sensitive to short-wave infrared (denoted SWIR). All pixels are arranged in the same plane. The shape and size of the pixels are given merely as an indication and do not represent the actual size of the two types of pixels.

Claims

1. 1. A process for manufacturing an image sensor for detecting visible light and short wave infrared light, said process comprising: a. Providing a carrier substrate (1, 1') comprising a first semiconductor; b. forming a plurality of cavities (5) in the carrier substrate (1, 1') to define visible light sensitive pixels (11, 11') in the first semiconductor between the cavities (5); c. forming an electrically insulating protective layer (4) on at least a plurality of sides of each pixel (11, 11') sensitive to visible light; d. growing a second semiconductor material different from the first material in said plurality of cavities (5) to form pixels (12, 12') sensitive to short wave infrared radiation; A process comprising:

2. The process comprises: a step a' of forming a protective film (3) on the carrier substrate (1, 1') between steps a and b in order to protect the pixels (11, 11') sensitive to visible light during step b of forming the cavities (5); - after step d, a step d' of removing said protective film (3) to expose the upper surface of said pixels (11, 11') sensitive to visible light; 2. The process of claim 1, comprising:

3. 3. Process according to claim 1 or 2, characterized in that step c) comprises forming said protective layer (4) by thermal oxidation.

4. A process according to any one of claims 1 to 3, characterized in that the first semiconductor is silicon.

5. 5. The process according to any one of claims 1 to 4, characterized in that the second semiconductor is a III-V semiconductor preferably selected from indium phosphide, indium gallium arsenide, germanium alloys, or colloidal quantum dots based on lead(II) sulfide or lead selenide.

6. 6. The process according to any one of claims 1 to 5, characterized in that the carrier substrate (1) is a silicon-on-insulator (SOI) substrate, comprising in succession a base substrate (13), an electrically insulating intermediate layer (14) and a monocrystalline layer (15) of the first semiconductor.

7. 7. Process according to claim 6, characterized in that it comprises, between steps b and c, a step b' of thickening the monocrystalline layer (15) by homoepitaxy.

8. 8. Process according to claim 6 or 7, characterized in that step b) is an etching step applied to the carrier substrate (1) until the electrically insulating intermediate layer (14) is reached.

9. 9. The process according to claim 6, further comprising, after step c", a step c" of removing the material forming the electrically insulating intermediate layer (14) from the cavities, and wherein the pixels (12) sensitive to short-wave infrared radiation are formed in step d on the face of the base substrate (13) exposed by the removing step c".

10. Process according to any one of the preceding claims, characterized in that the carrier substrate (1') is a bulk substrate of the first semiconductor.

11. 1. An image sensor for detecting visible light and short wave infrared light, comprising: a carrier substrate (1), a plurality of pixels (11) sensitive to visible light and a plurality of pixels (12) sensitive to short-wave infrared light formed on the carrier substrate, the plurality of pixels (11) and the plurality of pixels (12) sensitive to infrared light being arranged in a surface area of ​​the carrier substrate; a protective layer (4) disposed on at least the sidewalls of each pixel in order to electrically isolate it from its neighboring pixels; Equipped with the pixels (11, 12) form an array arranged in the same plane; The image sensor, wherein the carrier substrate (1) is a semiconductor-on-insulator (SOI) substrate comprising, in succession, a base substrate (13) made of a semiconductor, an electrically insulating intermediate layer (14), and a monocrystalline layer (15) made of a semiconductor.

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