Chip-on-wafer assembly containing decoupling capacitors

Abstract

A microelectronic assembly is provided, comprising a semiconductor structure (e.g., an IC chip) and an interposer electrically connected to the semiconductor structure and containing a semiconductor material (e.g., a silicon interposer). The assembly also comprises a decoupling capacitor containing alternating dielectric layers and internal electrode layers, the internal electrode layers comprising a first internal electrode layer and a second internal electrode layer. The capacitor further comprises an external terminal disposed on a first surface of the capacitor and electrically connected to the interposer, and an external terminal disposed on a second surface of the capacitor and electrically connected to a circuit board.

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