Connection from the front to the back inside the double diffusion break

Abstract

The semiconductor IC device includes a through-connection to a conductive device. This connection may be located within a double diffusion break (DDB) region separating the active region. This connection may include a false S / D region between the front contacts and back contacts. The semiconductor IC device may further include a first and / or second diffusion break isolation rail. This connection may exist between the first and second diffusion break isolation rails. The location of the connection within the DDB region can, as a result, increase the integration density of the semiconductor IC device. Furthermore, this connection can reduce routing complexity and resistance through the semiconductor IC device, thereby improving the performance of the semiconductor IC device. In addition, this connection can utilize structural instances (e.g., front contacts, back contacts, false S / D region, or similar) that mirror those used by microdevices (e.g., transistors or similar) within the active region, thereby reducing manufacturing complexity.

Claims

1. Dual diffusion break (DDB) regions between each active region; and The conductive device through-connection within the DDB region, the conductive device through-connection has a false source / drain (S / D) region. A semiconductor integrated circuit (IC) device that includes [a specific feature / feature].

2. The aforementioned DDB region is First diffusion break separation rail; and Second Diffusion Break Separation Rail A semiconductor IC device according to claim 1, having the following characteristics.

3. The semiconductor IC device according to claim 2, wherein the conductive device through-connection is located between the first diffusion break isolation rail and the second diffusion break isolation rail.

4. The semiconductor IC device according to claim 3, wherein the conductive device through-connection further comprises a front contact and a back contact, and the false S / D region is located between the front contact and the back contact.

5. A first set of false channels connecting the false S / D region and the first diffusion break separation rail; and A second set of false channels connecting the false S / D region and the second diffusion break separation rail. The semiconductor IC device according to claim 4, further comprising:

6. A front-facing back-end-of-line (BEOL) network connected to the aforementioned front-facing contact; and The back-side power supply network (BSPDN) connected to the aforementioned back-side contacts. The semiconductor IC device according to claim 4, further comprising:

7. The semiconductor IC device according to claim 4, wherein the front contact, the back contact, and the false S / D region are aligned in the vertical direction.

8. The semiconductor IC device according to claim 3, wherein the bottom surface of the false S / D region is located above the bottom surfaces of the first diffusion break separation rail and the second diffusion break separation rail, respectively.

9. Of the aforementioned active regions, the active region is: Transistors including S / D region A semiconductor IC device according to claim 1, including the above.

10. The semiconductor IC device according to claim 9, wherein the false S / D region structurally and materially mirrors the S / D region.

11. Of the respective active regions, the active region is A rear contact placeholder located below and connected to the aforementioned S / D area. A semiconductor IC device according to claim 10, including the above.

12. A first spacer, where the first diffusion break separation rail is located between the first spacers; and The first conductive gate is located between the first spacers and along the first diffusion break separation rail. The semiconductor IC device according to claim 2, further comprising:

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