High-precision in-situ verification and correction of wafer position and orientation for ion implantation.

JP2026520039APending Publication Date: 2026-06-19APPLIED MATERIALS INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
APPLIED MATERIALS INC
Filing Date
2024-06-07
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

Current methods are inadequate for in-situ verification and correction of wafer positions on a platen within a processing chamber, leading to potential misalignment and non-uniform processing results.

Method used

A system utilizing an illumination device to backlight the underside of a platen and an imaging device outside the chamber to detect the platen and wafer edges, with a controller processing the data to ensure accurate alignment and correction of the wafer position relative to the platen.

Benefits of technology

Improves the accuracy of wafer alignment, reduces process variability, and enhances the uniformity of ion exposure processes, thereby improving device performance and reducing defects.

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Abstract

Disclosed herein are approaches for in-situ verification and correction of wafer position. One approach may include a method that irradiates the underside of a platen positioned within a processing chamber and detects the outer edge of the platen using an imaging device positioned outside the processing chamber and above the platen. The method may further include, via a controller, identifying platen position data based on the detected outer edge of the platen, and positioning a wafer on the platen based on the platen position data, wherein the wafer has a positioning notch. The method may further include using an imaging device to detect the position of the wafer and the position of the positioning notch, comparing the platen position data with the detected wafer position, and comparing the detected position of the positioning notch with the expected notch position.
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Description

Technical Field

[0001] Cross - reference to Related Applications

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 472,189, filed on June 9, 2023, and claims priority to U.S. Patent Application No. 18 / 391,503, filed on December 20, 2023. The entire content of the above applications is incorporated herein by reference in its entirety.

[0002]

[0002] This disclosure relates to semiconductor processing, and more specifically, to an approach for in - situ verification and correction of wafer positions on a platen.

Background Art

[0003]

[0003] In microchip manufacturing, processing chambers are used to achieve various manufacturing steps performed on wafers. These processing chambers typically include a substantially flat surface and a pedestal on which the wafer is placed during processing. The pedestal may also be known as a platen, stage, or susceptor. The engagement and disengagement between the wafer and the pedestal surface are controlled by a lift mechanism.

[0004]

[0004] Holding a wafer on a pedestal within a chamber is sometimes referred to as chucking. Chucking can be performed mechanically, such as by clamping the peripheral portion of the wafer, or by vacuum holding force. Chucking can also be performed electrostatically by an electrostatic chuck. However, before or during chucking, the wafer may be in an incorrect position relative to the pedestal.

[0005]

[0005] Therefore, it is desirable to provide devices and methods for detecting and correcting wafer positions under a variety of wafer process conditions.

Summary of the Invention

[0006]

[0005] This summary is provided to introduce, in a simplified form, selected from the concepts detailed in the following "Modes for Carrying Out the Invention". This summary is not intended to identify important or essential features of the subject matter of the claimed invention, nor is it intended to assist in determining the scope of the subject matter of the claimed invention.

[0007]

[0006] In one embodiment, the method may include illuminating the underside of a platen positioned within a chamber, detecting the outer edge of the platen using an imaging device positioned outside the chamber, and determining the position data of the platen based on the detected outer edge of the platen via a controller. The method may further include positioning a wafer on a platen based on the position data of the platen, wherein the wafer has a position notch, detecting the position of the wafer and the position of the position notch using an imaging device, comparing the position of the wafer with the position data of the platen, and comparing the position of the position notch with an expected notch position.

[0008]

[0007] In another embodiment, a system for wafer position in-situ verification and correction may include an illumination device capable of illuminating the underside of a platen, the platen being positioned within a chamber, and the illumination device being positioned outside the chamber. The illumination device may be capable of detecting the outer edge of the platen and detecting the outer edge of a wafer positioned on the platen and the position of a positioning notch formed within the wafer. The system may further include a controller that communicates with the illumination device and the platen, the controller being capable of determining platen position data based on the detected outer edge of the platen, determining the position of the wafer and the position of the positioning notch, comparing the wafer position with the platen position data and comparing the position of the positioning notch with an expected notch position.

[0009]

[0008] In yet another embodiment, the method may include illuminating the underside of a platen positioned within a processing chamber and detecting the outer edge of the platen using an imaging device positioned outside the processing chamber and above the platen. The method may further include, via a controller, determining the position data of the platen based on the detected outer edge of the platen, and positioning a wafer on the platen based on the position data of the platen, wherein the wafer has a positioning notch. The method may further include using an imaging device to detect the position of the wafer and the position of the positioning notch, and comparing the position of the positioning notch with an expected notch position.

[0010]

[0009] In yet another embodiment, the system may include a processor and a memory for storing instructions, the processor being able to perform the following: illuminate the underside of a platen positioned within a processing chamber and detect the outer edge of the platen using an imaging device positioned outside the processing chamber and above the platen. The memory may further store instructions, the processor being able to perform the following: determine the position data of the platen based on the detected outer edge of the platen and position a wafer on the platen based on the position data of the platen, the wafer being positioned on the platen having a positioning notch. The memory may further store instructions, the processor being able to perform the following: detect the position of the wafer and the position of the positioning notch using an imaging device and compare the position of the positioning notch with an expected notch position.

[0011]

[0010] The accompanying drawings illustrate an exemplary approach of the present disclosure, which includes a practical application of the principles of the present disclosure as follows: [Brief explanation of the drawing]

[0012] [Figure 1]

[0011] This is a top view of an exemplary processing system according to an embodiment of the present disclosure. [Figure 2]

[0012] This is a side view of a processing chamber of a processing system according to an embodiment of the present disclosure. [Figure 3] This is a flowchart illustrating a method for identifying wafer alignment on a platen according to an embodiment of the present disclosure. [Modes for carrying out the invention]

[0013]

[0014] The drawings are not necessarily to scale. The drawings are for illustrative purposes only and are not intended to depict specific parameters of the disclosure. The drawings are intended to illustrate exemplary embodiments of the disclosure and should therefore not be considered limiting. In the drawings, similar numbering indicates similar elements.

[0014]

[0015] Furthermore, certain elements in some diagrams may be omitted or not drawn to scale for the sake of clarity. Sectional views may be in the form of "slices" or "near-sighted" sections, and certain background lines that would be visible in a "true" section may be omitted for the sake of clarity. Additionally, some reference numbers may be omitted in certain drawings for clarity.

[0015]

[0016] The systems, processing chambers, and methods described herein will now be described more comprehensively with reference to the accompanying drawings illustrating various embodiments. The systems, processing chambers, and methods may be implemented in many different forms and should not be construed as being limited to the embodiments specified herein. Rather, these embodiments are provided to make this disclosure detailed and complete and to fully convey the scope of the methods to those skilled in the art.

[0016]

[0017] Currently, there are few effective methods to verify in-situ that a wafer is properly positioned and oriented on the platen within a processing chamber. Most prior art injection systems do not check the wafer position after loading the wafer onto the platen. Embodiments of the present disclosure address this deficiency by using a camera to detect the position of the platen and then the position of the wafer on the platen. Unlike prior art approaches that use front / top illumination during imaging, embodiments of the present disclosure use backlighting to more accurately capture the position of the wafer and wafer notch relative to the platen.

[0017]

[0018] Figure 1 shows a top view of an exemplary semiconductor processing system (hereinafter, the "System") 100 according to an embodiment of the present disclosure. As shown, the System 100 may include an apparatus front-end module (EFEM) 102 connected to one or more forward-opening unified pods (FOUPs) 104, and one or more robots (R1, R2) 106 capable of transporting wafers 108 between a left load dock 110 and / or a right load dock 112 and a processing chamber 116. The wafers 108 may be positioned on a platen 118 of a rotating platform (i.e., a roplat) also located inside the processing chamber 116. As will be described in more detail herein, the positions of the platen 118 and the wafer 108, as well as the positions of the wafer alignment marks 150, can be measured and analyzed in-situ using a sensor / imaging device 122 and an illumination source 124 located outside the processing chamber 116. In other embodiments, there may be multiple imaging devices 122 and / or illumination sources 124.

[0018]

[0019] As better illustrated in Figure 2, the illumination source 124 may include one or more LEDs connected to the door 130 of the processing chamber 116, the door 130 including one or more windows 131 to allow light 132 to enter the processing chamber 116 below the platen 118. In other embodiments, the illumination source 124 may be connected to the wall of the processing chamber 116 and positioned adjacent to the windows 131. In some embodiments, the illumination source 124 may be the flash of a camera, and the light 132 produced by the illumination source 124 may be light that provides high contrast, such as white light. The light 132 produced by the illumination source 124 may have a ring shape, a spotlight shape, or other shape. By directing the light 132 to the area below the platen 118, the wafer 108 appears to be backlit by the imaging device 122, and thus the visual contrast at the outer edge 134 of the wafer 108 is increased. Furthermore, this position of the light 132 below the platen 118 minimizes difficulties due to reflections from the wafer 108 and the surface of the processing chamber 116, making it more reliable compared to front / top illumination and image processing. It will be understood that the illumination source 124 may vary, and the wavelength of the light may be optimized, for example, by shifting to more ultraviolet or more near-infrared light in the case of a transparent substrate to improve the sharpness of edge shadows.

[0019]

[0020] In the illustrated embodiment, the imaging device 122 may be a camera positioned perpendicular to the top surface of the wafer 108. The imaging device 122 may be positioned outside the processing chamber 116, adjacent to the window 136.

[0020]

[0021] As further shown, the processing chamber 116 may include a rotating platform 140 comprising a base 141 connected to one or more outwardly extending side arms 142 that are spaced apart from each other. The rotating platform 140 can support and control a platen 118, which may be an electrostatic chuck capable of clamping a wafer 108 in place by the use of electrostatic force. One or more motors (not shown) may be positioned within the rotatable platform 140 to allow the platen 118 to rotate / spin around an axis passing through the center of the platen 118 and perpendicular to the plane of the platen 118. During use, the rotating platform 140, the illumination source 124, and the imaging device 122 may be operated by one or more controllers 144.

[0021]

[0022] The rotating platform 140 is horizontal to the plane of the platen 118 and further allows rotation of the platen 118 around a second axis oriented perpendicular to the first axis. The rotating platform 140 is capable of rotating at least 90°. For example, the rotating platform 140 has a first position known as a load / unload position, where the rotating platform 140 is oriented so that the platen 118 is horizontal or nearly horizontal. While in this load / unload position, the wafer 108 may be placed on the platen 118 and removed from the platen 118 after processing.

[0022]

[0023] The rotating platform 140 also has a second position known as the operating position, where the rotating platform 140 is oriented so that the platen 118 is vertical or nearly vertical. In this operating position, the platen 118 and the clamped wafer 108 face the ion beam directed towards the platen 118; in other words, the plane formed by the surface of the platen 118.

[0023]

[0024] The control of the rotation platform 140, the irradiation source 124, and the image device 122 can be executed by a controller 144 operably connected thereto. More specifically, the processing of signals from the image device 122, the processing and storage of data, and the communication of signals with the rotation platform 140 are performed by the data processing and control modules of the controller 144. Without limitation, the controller 144 controls the operations of the image device 122 and the irradiation source 124, processes pixel signals from the image device 122, analyzes individual pixel data as needed, collects data and stores it in the memory 147, and may include a field programmable gate array (FPGA) programmed to receive and transmit signals via a wired or wireless communication module. In other embodiments, the controller 144 may alternatively or additionally include a microprocessor, a digital signal processor (DSP), or an application specific integrated circuit (ASIC) designed specifically.

[0024]

[0025] The memory 147 may include non-volatile memory for storing important data such as the position data of the platen 118, the position data of the wafer 108, the position data of the alignment marks 150, and other parameters necessary for the operation of the system 100, but is not limited thereto. As an alternative embodiment, dynamic random access memory (DRAM) may be utilized.

[0025]

[0026] Referring to FIGS. 2-3, one non-limiting process 200 for in-situ verification and correction of the position of the wafer 108 will be described. In block 202, it is determined whether the position of the platen 118 is acceptable. Further, the position of the platen 118 relative to the image device 122 is specified to establish a reference for measuring the wafer to be subsequently positioned thereon. In some embodiments, specifying the position of the platen 118 may include using the image device 122 to detect the outer periphery of the platen 118 after the irradiation source 124 is activated. In other embodiments, the image device 122 can recognize one or more other visual features of the platen 118, such as a pre-marked center point.

[0026]

[0027] In some embodiments, a calibration routine may be executed in which the controller 144 instructs the image device 122 to take one or more images of the platen 118 edge when the platen 118 is in the initial position. The firmware within the controller 144 compares the bit count of each pixel for light intensity to determine whether the pixel is hidden by the platen 118. Next, the firmware within the controller 144 may identify the position data of the platen, such as the coordinates corresponding to the platen 118 edge, by identifying the last fully hidden pixels in the first and last columns of the pixel array. Partially hidden pixels may also be detected, and higher accuracy is enabled by the ability to extrapolate dimensions based on the fractional level of light within the pixel.

[0027]

[0028] Once the dimensions of the intersections of the edges of the platen 118 are identified, the firmware uses these values to identify the absolute calibration distance from the image device 122 and to identify the reference center point of the platen 118. The reference / calibration dimensions are then stored in the memory 147 and used as reference data after position verification of the wafer 108. The reference / calibration dimensions can also be compared to previously stored values (i.e., the expected platen position) to determine whether unacceptable deviations exist. If the position of the platen 118 is unacceptable (i.e., "no"), the process 200 proceeds to block 203 and a handling error is issued. If yes, the position of the platen 118 is acceptable and the process proceeds to block 204.

[0028]

[0029] In block 204, the wafer 108 is then oriented and placed on the platen 118. Ideally, the center of the wafer 108 is aligned with the identified center of the platen 118 and placed directly above it. Furthermore, the alignment marks 150 may be initially aligned with the expected notch position stored in memory 147. In some embodiments, the alignment marks 150 may be formed on the sidewall of the wafer 108 and may have a wide variety of shapes, such as triangles, rectangles, circles, etc. Non-limiting, the alignment marks 150 may have a width ranging from about 1 mm to about 4 mm and a depth from the sidewall of the wafer 108 ranging from about 1 mm to about 4 mm. Thus, the alignment marks 150 may be easily detectable without excessively limiting the area of ​​the wafer 108 occupied by the alignment marks 150. In some embodiments, the alignment marks 150 may be reflective alignment marks, high-contrast alignment marks, etc.

[0029]

[0030] In block 206, when the wafer 108 is in a predetermined position, the actual wafer center and the position of the alignment mark 150 (e.g., a notch) are identified. That is, the controller 144 instructs the imaging device 122 to take one or more images of the wafer 108 to identify its outer perimeter 134. The firmware within the controller 144 then identifies the coordinates corresponding to the outer perimeter 134, and the center point of the wafer 108 can be identified using the coordinates of the outer perimeter 134. In some embodiments, the coordinates and center point of the wafer 108 are calculated using the previously identified absolute calibration distance from the imaging device 122 and the platen coordinates established when the platen 118 is imaged.

[0030]

[0031] It will be understood that the wafer 108 may be loaded onto the platen 118 with a displacement in the x and y directions between the center point of the wafer 108 and the center point of the platen 118. Therefore, in block 208, it is determined whether the alignment of the wafer 108 is acceptable within predetermined limits. In some embodiments, the center point of the wafer 108 is compared with the center point of the platen 118 to determine if there is a displacement in the X and Y directions. If the displacement exceeds the predetermined limits, the wafer position is considered unacceptable (i.e., "no"), and process 200 indicates a handling error. If yes, process 200 proceeds to block 210 to determine whether the position of the alignment mark 150 is acceptable.

[0031]

[0032] In some embodiments, the imaging device 122 transmits visual data to the controller 144 to identify the location of the alignment marks 150 and / or other identifying features on the surface of the wafer 108. Based on the location of the alignment marks 150, the rotational position of the wafer 108 can be determined. If a rotational misalignment of the wafer 108 exists, the misalignment can be calculated based on the rotational position of the wafer 108 compared to the expected notch position stored in memory 147. If the notch location is acceptable, the process 200 proceeds to block 212, where the wafer 108 undergoes ion processing. However, if the notch location is unacceptable, the process 200 proceeds to block 214, where the rotating platform 140 adjusts the rotation of the platen 118 and the wafer 108 to compensate for the rotational misalignment. Once rotated, the ion exposure process can be performed. By correcting the misalignment between wafer 108 and platen 118 before exposing wafer 108 to the ion beam, the uniformity of the ion exposure process across the surface of wafer 108 is improved, process variability between wafers is reduced, device defects are reduced, and device performance is improved. In various embodiments, the ion exposure process may be any suitable process such as an ion etching process or an ion implantation process. The ion beam can be generated by an ion beam generator. The ion beam generator may include any number of ion sources, a mass spectrometry magnet, a hole, a linear accelerator, a scanning unit, a focusing unit, a final energy magnet, an end station, and / or a controller 144.

[0032]

[0033] For convenience and clarity, terms such as “top,” “bottom,” “upper,” “lower,” “vertical,” “horizontal,” “lateral,” and “longitudinal” will be understood to describe the various components and the relative arrangement and orientation of their constituent parts, as seen in the diagram. Such terms include the specifically mentioned words, their derivatives, and words of similar importance.

[0033]

[0034] Where used herein, an element or process described in the singular form beginning with the word "a" or "an" should be understood to include multiple elements or processes unless explicitly stated to exclude them. Furthermore, references to "one embodiment" in this disclosure are not intended to be limiting. Additional embodiments may also encompass the described features.

[0034]

[0035] Furthermore, the terms “substantial” or “substantially,” and “approximate” or “approximately,” may be used interchangeably in some embodiments and may be described using any relative scale acceptable to those skilled in the art. For example, these terms may indicate a deviation that can serve as a comparison with a reference parameter and provide the intended function. Such deviations from a reference parameter may, but are not limited, be quantities such as less than 1%, less than 3%, less than 5%, less than 10%, less than 15%, or less than 20%.

[0035]

[0036] Furthermore, those skilled in the art will understand that when it is stated that an element such as a layer, region, or substrate is formed, deposited, or placed "on / atop" or "over" another element, that element may be in direct contact with the other element, or an intervening element may be present. In contrast, when it is stated that an element is "directly on, directly over, or directly atop" another element, no intervening element is present.

[0036]

[0037] While this specification has described specific embodiments of the Disclosure, the Disclosure is broad in scope as the art permits, and this specification may be read similarly; therefore, the Disclosure is not limited to the descriptions herein. Accordingly, the above descriptions should not be interpreted restrictively. Rather, the above descriptions are merely illustrative of specific embodiments. Those skilled in the art will anticipate other modifications within the scope of the claims and essence appended herein.

Claims

1. It is a method, Irradiating the underside of the platen positioned inside the chamber, Using an image device positioned outside the chamber, the outer edge of the platen is detected, The controller identifies the position data of the platen based on the detected outer edge of the platen, Positioning a wafer on the platen based on the position data of the platen, wherein the wafer has a positioning notch, and positioning the wafer on the platen. Using the aforementioned image device, the position of the wafer and the position of the positioning notch are detected. The position data of the platen is compared with the detected position of the wafer. Methods that include...

2. Based on a comparison of the detected position of the platen and the expected reference position of the platen, a determination is made as to whether to proceed with the injection process. The method according to claim 1, further comprising:

3. The position of the positioning notch is compared with the expected notch position. The method according to claim 1, further comprising:

4. To align the positioning notch with the expected notch position, the platen is rotated. The method according to claim 3, further comprising:

5. The method according to claim 4, wherein the platen rotates when the platen moves to the injection position.

6. Based on a comparison of the detected position of the wafer and the position data of the platen, and based on a comparison of the position of the positioning notch and the expected notch position, a determination is made as to whether to proceed with the injection process. The method according to claim 3, further comprising:

7. The method according to claim 1, further comprising positioning an irradiation source beneath the platen, detecting the position of the wafer comprising detecting the center point of the platen based on the detected outer edge, and positioning the wafer on the platen further comprising aligning the center point of the wafer with the center point of the platen.

8. A system for verifying and correcting wafer position insitu, wherein the system An irradiation device capable of irradiating the underside of a platen, wherein the platen is positioned inside a chamber, the irradiation device is positioned outside the chamber, and the irradiation device is, The outer edge of the platen is detected, The position of the outer edge of the wafer positioned on the platen and the position of the positioning notch formed within the wafer are detected. An irradiation device that is capable of performing the following: A controller that communicates with the irradiation device and the platen, wherein the controller The position data of the platen is determined based on the detected outer edge of the platen, Identifying the position of the wafer and the position of the positioning notch, The position of the wafer is compared with the position data of the platen, and the position of the positioning notch is compared with the expected notch position. A controller and A system that includes these features.

9. The system according to claim 8, wherein the controller is further operable to rotate the platen to align the positioning notch with the expected notch position.

10. The system according to claim 9, wherein the controller is further operable to rotate the platen when the platen moves to the injection position.

11. The system according to claim 8, wherein the controller is further operable to determine whether to proceed with the injection process based on a comparison of the detected position of the wafer and the position data of the platen.

12. The system according to claim 8, wherein the controller is further operable to determine whether to proceed with the injection process based on a comparison of the detected position of the platen with the expected reference position of the platen.

13. The system according to claim 8, wherein the controller is further operable to detect the center point of the platen based on the detected outer edge, and the wafer is positioned on the platen by aligning the center point of the wafer with the center point of the platen.

14. A method for verifying and correcting the insitu of wafer position, wherein the method is Irradiating the underside of the platen positioned within the processing chamber, Using an image device positioned outside the processing chamber and above the platen, the outer edge of the platen is detected. The controller identifies the position data of the platen based on the detected outer edge of the platen, Positioning a wafer on the platen based on the position data of the platen, wherein the wafer has a positioning notch, and positioning the wafer on the platen. Using the aforementioned image device, the position of the wafer and the position of the positioning notch are detected. The position data of the platen is compared with the detected position of the wafer. Methods that include...

15. The position of the positioning notch is compared with the expected notch position. The method according to claim 14, further comprising:

16. To align the positioning notch with the expected notch position, the platen is rotated. The method according to claim 15, further comprising:

17. The method according to claim 16, wherein the platen rotates when the platen moves to the injection position.

18. A determination is made as to whether to proceed with the injection process based on a comparison between the detected position of the platen and the expected reference position of the platen, a comparison between the detected position of the wafer and the position data of the platen, and a comparison between the position of the positioning notch and the expected notch position. The method according to claim 15, further comprising:

19. The method according to claim 14, further comprising positioning the irradiation source below the platen.

20. The method according to claim 14, further comprising detecting the center point of the platen based on the detected outer edge, and positioning the wafer on the platen further comprising aligning the center point of the wafer with the center point of the platen.