Handling memory with delegated tasks
By integrating an extension processing circuit for asynchronous task execution and shared TLB management, the data processing system enhances efficiency in handling frequent functions and memory operations, reducing runtime and power consumption.
JP2026520432APending Publication Date: 2026-06-23ARM LTD
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- ARM LTD
- Filing Date
- 2024-03-07
- Publication Date
- 2026-06-23
Smart Images
Figure 2026520432000001_ABST
Abstract
A device for data processing is provided. The device includes a data processing pipeline that performs one or more data processing operations, and an extension processing circuit associated with the data processing pipeline that performs one or more delegated tasks. The page table walk circuit performs a page table walk operation in memory in response to either one or more data processing operations or one or more delegated tasks. The extension processing circuit performs one or more delegated tasks asynchronously with respect to the one or more data processing operations performed by the data processing pipeline.
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