Alignment marks used in the wafer bonding process, and wafer bonding method using the same.
Symmetrical alignment marks with identical shapes on both wafers address misalignment issues in wafer bonding, enhancing precision and electrical connectivity by minimizing exposure and optical measurement distortions.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- AUROS TECH INC
- Filing Date
- 2024-07-29
- Publication Date
- 2026-06-23
AI Technical Summary
Existing wafer bonding methods face issues with misalignment between semiconductor wafers, leading to non-electrical connections between pads of memory and logic elements, which can be exacerbated by the stacking of patterns in the Z-axis direction.
The use of symmetrical alignment marks with identical shapes and sizes on both wafers, allowing for precise alignment by overlapping centers of symmetry, minimizing exposure process and optical measurement influences, and enabling accurate alignment through rotational and axial asymmetry.
The proposed alignment marks ensure minimal exposure and optical measurement distortions, facilitating precise alignment and bonding of semiconductor wafers, thereby reducing misalignment errors and ensuring effective electrical connections.
Smart Images
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Abstract
Description
Technical Field
[0001] The present invention relates to an alignment mark used for aligning a first semiconductor wafer and a second semiconductor wafer that is flipped, in a wafer bonding process of aligning and bonding the first semiconductor wafer and the second semiconductor wafer such that the surfaces on which semiconductor elements are formed face each other, and a wafer bonding method using the same.
Background Art
[0002] Conventionally, integration of semiconductor elements has been achieved through miniaturization of patterns on the X-Y plane. Recently, however, integration of semiconductors has been achieved by stacking patterns in the Z-axis direction.
[0003] In addition, semiconductor integration is achieved by using a wafer bonding technique for bonding two semiconductor wafers on which a plurality of semiconductor elements are formed into one. For example, a method is used in which a semiconductor wafer on which memory elements are formed and a semiconductor wafer on which logic elements are formed are bonded, and pads of the memory elements and pads of the logic elements are electrically connected.
[0004] At this time, if misalignment occurs between the semiconductor wafers, there is a problem that the pads of the memory elements and the pads of the logic elements are not electrically connected.
[0005] To solve such a problem, a method is used in which alignment marks are formed on each of the semiconductor wafers, and the semiconductor wafers are aligned using these alignment marks.
[0006] For example, US Patent Publication US2023 / 0135060A1 discloses a method of aligning a first alignment mark on a first wafer and a second alignment mark on a second wafer to align the first wafer and the second wafer.
Prior Art Documents
[0007] [Patent Document 1] U.S. Published Patent US2023 / 0135060A1 [Overview of the project] [Problems that the invention aims to solve]
[0008] The present invention aims to provide a novel alignment mark used in wafer bonding processes. [Means for solving the problem]
[0009] To achieve the above objective, the present invention provides an alignment mark used in a wafer bonding process for aligning and joining a first semiconductor wafer and a flipped second semiconductor wafer, comprising: a first alignment mark formed in a predetermined region of the first semiconductor wafer and having a first center of symmetry; and a second alignment mark formed in a predetermined region of the second semiconductor wafer and having a second center of symmetry, such that it overlaps with the first alignment mark in the flipped state when joining the first semiconductor wafer and the flipped second semiconductor wafer.
[0010] Here, when the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry and the second center of symmetry overlap, and the difference between the first center of symmetry and the second center of symmetry represents the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.
[0011] Furthermore, the first alignment mark is rotationally symmetrical with respect to the first center of symmetry by 90 and 180 degrees, and asymmetrical with respect to the first axis passing through the first center of symmetry.
[0012] The first alignment mark and the second alignment mark are identical in shape and size.
[0013] Furthermore, the first alignment mark may include a first alignment mark element and a third alignment mark element formed in two diagonally opposite quadrants of the four quadrants divided by the first axis and a second axis perpendicular to the first axis, and a second alignment mark element and a fourth alignment mark element formed in the remaining two quadrants.
[0014] The first alignment mark element includes at least one first bar that is elongated in the second axial direction, the second alignment mark element includes at least one second bar that is elongated in the first axial direction, the third alignment mark element includes at least one third bar that is elongated in the second axial direction, and the fourth alignment mark element may include at least one fourth bar that is elongated in the first axial direction.
[0015] Furthermore, the second alignment mark includes a fifth bar, a sixth bar, a seventh bar, and an eighth bar, which correspond to the first bar, the second bar, the third bar, and the fourth bar of the first alignment mark, respectively, and the bars of the first alignment mark and the flipped bars of the second alignment mark can be at right angles to each other, as they belong to the same quadrant.
[0016] Furthermore, the bars of the first alignment mark and the flipped bars of the second alignment mark, which belong to the same quadrant, can be perpendicular to each other.
[0017] The present invention also provides a wafer bonding method for aligning and joining a first semiconductor wafer and a flipped second semiconductor wafer, comprising the steps of: forming a first alignment mark having a first center of symmetry in a predetermined region of the first semiconductor wafer; forming a second alignment mark having a second center of symmetry in a predetermined region of the second semiconductor wafer so as to overlap the first alignment mark in the flipped state when joining the first semiconductor wafer and the flipped second semiconductor wafer; aligning the first alignment mark and the second alignment mark; and bonding the first semiconductor wafer and the second semiconductor wafer.
[0018] Here, when the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry and the second center of symmetry overlap, and the difference between the first center of symmetry and the second center of symmetry represents the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.
[0019] Furthermore, the first alignment mark is rotationally symmetrical with respect to the first center of symmetry by 90 and 180 degrees, and asymmetrical with respect to the first axis passing through the first center of symmetry. The first alignment mark and the second alignment mark are identical in shape and size. [Effects of the Invention]
[0020] The alignment marks according to the present invention have identical shapes for the first and second alignment marks formed on the first and second semiconductor wafers, respectively. Therefore, the influence of the exposure process that forms the first and second alignment marks can be minimized. Furthermore, the influence of the optical measuring device used to measure alignment errors can also be minimized. [Brief explanation of the drawing]
[0021] [Figure 1] Shows a first semiconductor wafer on which a first alignment mark is formed. [Figure 2] Shows a second semiconductor wafer on which a second alignment mark is formed. [Figure 3] It is a diagram for explaining a method of checking an alignment error between the first semiconductor wafer and the flipped second semiconductor wafer. [Figure 4] Shows an example of the first alignment mark shown in FIG. 1. [Figure 5] Shows an example of the second alignment mark shown in FIG. 2. [Figure 6] Shows the flipped second alignment mark. [Figure 7] It is a diagram showing an example of an alignment mark image. [Figure 8] It is a diagram for explaining a method of measuring an alignment error. [Figure 9] It is a diagram showing other examples of the first alignment mark and the second alignment mark. [Figure 10] Shows an alignment mark image in which the first alignment mark in FIG. 9 and the flipped second alignment mark overlap.
Embodiments for Carrying Out the Invention
[0022] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be deformed into various other forms, and the scope of the present invention should not be construed as being limited to the embodiments detailed below. The embodiments of the present invention are provided to more fully explain the present invention to those having ordinary knowledge in the art. Therefore, the shapes of elements in the drawings are exaggerated for the purpose of emphasizing a clearer explanation, and elements denoted by the same reference numerals in the drawings mean the same elements.
[0023] Figure 1 shows a first semiconductor wafer with a first alignment mark formed on it, and Figure 2 shows a second semiconductor wafer with a second alignment mark formed on it.
[0024] The first semiconductor wafer 1 and the second semiconductor wafer 2 may include a silicon wafer and multiple pattern layers forming a semiconductor device. Other wafers besides silicon wafers may also be used.
[0025] As shown in Figure 1, a first alignment mark 10 is formed in a predetermined area of the first semiconductor wafer 1. Multiple first alignment marks 10 can be formed on the first semiconductor wafer 1.
[0026] As shown in Figure 2, a second alignment mark 20 is formed in a predetermined area of the second semiconductor wafer 2. Multiple second alignment marks 20 can be formed on the second semiconductor wafer 2.
[0027] The second alignment mark 20 is positioned to overlap with the corresponding first alignment mark 10 when the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 are joined. For example, the central second alignment mark 20 in Figure 2 may overlap with the central first alignment mark 10 in Figure 1, the left second alignment mark 20 in Figure 2 may overlap with the left first alignment mark 10 in Figure 1, and the right second alignment mark 20 in Figure 2 may overlap with the right first alignment mark 10 in Figure 1.
[0028] Furthermore, if the second semiconductor wafer 2 is flipped so that the left and right sides of the drawing are reversed, the left-side second alignment mark 20 in Figure 2 may overlap with the right-side first alignment mark 10 in Figure 1, and the right-side second alignment mark 20 in Figure 2 may overlap with the left-side first alignment mark 10 in Figure 1.
[0029] In Figures 1 and 2, the first alignment mark 10 and the second alignment mark 20 are shown to be formed on the uppermost layer and exposed to the outside, but other layers may be formed on top of the first alignment mark 10 and the second alignment mark 20.
[0030] Figure 3 is a diagram illustrating the method for acquiring alignment mark images.
[0031] As shown in Figure 3, the overlapping first alignment mark 10 and second alignment mark 20 are simultaneously photographed using camera 5 to obtain an alignment mark image that includes both the first alignment mark 10 and the flipped second alignment mark 20. The acquired alignment mark image can then be analyzed to confirm the alignment error. The illumination used for photography may be one that has high reflectivity for the first alignment mark 10 and the second alignment mark 20, low reflectivity for the second semiconductor wafer 2, and high transmittance. For example, if a silicon wafer is used as the second semiconductor wafer 2, the wavelength range of the illumination is preferably 900 nm to 2000 nm. This is because, although it varies depending on the thickness of the silicon wafer, a light transmittance edge region is formed from around 900 nm where the transmittance changes sharply (becomes high).
[0032] When the first alignment mark 10 is embedded in the first semiconductor wafer 1, the illumination can also have high transmittance to the first semiconductor wafer 1. The illumination passes through the second semiconductor wafer 2 and is then reflected by the second alignment mark 20 and the first alignment mark 10.
[0033] The alignment mark image may be acquired during the alignment process, as shown in Figure 3, or after the bonding of the first semiconductor wafer 1 and the second semiconductor wafer 2 is completed. If acquired during the alignment process, the measured alignment error can be used for the alignment of the first semiconductor wafer 1 and the second semiconductor wafer 2. If acquired after bonding is completed, the measured alignment error can be used to determine whether or not there are defects in the bonded wafers.
[0034] The first semiconductor wafer 1 and the second semiconductor wafer 2 are fixed to a stage, table, vacuum chuck, etc., which can move in the X, Y, and Z directions, allowing for planar movement for alignment and adjustment of the distance between the first semiconductor wafer 1 and the second semiconductor wafer 2 for bonding.
[0035] Figure 4 shows an example of the first alignment mark shown in Figure 1. Figure 4 shows the first alignment mark 10 as viewed from above the first semiconductor wafer 1.
[0036] As shown in Figure 4, the first alignment mark 10 is rotationally symmetrical by 90 and 180 degrees with respect to the first center of symmetry COS1. However, it is asymmetrical with respect to the first axis (the X-axis or Y-axis in Figure 4) passing through the first center of symmetry COS1. It is also asymmetrical with respect to the second axis perpendicular to the first axis. In the following explanation, the X-axis will be considered the first axis.
[0037] The first alignment mark 10 includes a first alignment mark element 11, a second alignment mark element 13, a third alignment mark element 15, and a fourth alignment mark element 17.
[0038] The first alignment mark element 11 and the third alignment mark element 15 are placed in the first quadrant and the third quadrant, respectively, while the second alignment mark element 13 and the fourth alignment mark element 17 are placed in the second quadrant and the fourth quadrant, respectively.
[0039] The first alignment mark element 11 includes at least one first bar that is elongated in the Y-axis direction. If it includes multiple first bars, the first bars are spaced apart along the X-axis direction. Although it is shown that there are two first bars, there may be three or more.
[0040] The second alignment mark element 13 includes at least one second bar that is elongated in the X-axis direction. If it includes multiple second bars, the second bars are spaced apart along the X-axis direction. Although it is shown that there are two second bars, there may be three or more.
[0041] The third alignment mark element 15, like the first alignment mark element 11, includes at least one third bar that is elongated in the Y-axis direction.
[0042] The fourth alignment mark element 17, like the second alignment mark element 13, includes at least one fourth bar that is elongated in the X-axis direction.
[0043] Figure 5 shows an example of the second alignment mark shown in Figure 2. Figure 5 shows the second alignment mark 20 as viewed from above the second semiconductor wafer 2. Figure 6 shows the second alignment mark 20 flipped so that its top and bottom are inverted.
[0044] As shown in Figure 5, the second alignment mark 20 is exactly the same shape and size as the first alignment mark 10. Therefore, the influence of the exposure process that forms the first alignment mark 10 and the second alignment mark 20 can be minimized. Furthermore, the influence of the optical measuring device that measures the alignment error can also be minimized. For example, not only do the pattern shapes of each layer match, but the patterns are evenly distributed in the same area, and measurement distortion due to aberrations caused by the optical measuring device can be minimized.
[0045] The second alignment mark 20, like the first alignment mark 10, includes a fifth alignment mark element 21, a sixth alignment mark element 23, a seventh alignment mark element 25, and an eighth alignment mark element 27, each consisting of bars positioned in one of the four quadrants.
[0046] The second alignment mark 20, like the first alignment mark 10, is not symmetrical with respect to the X or Y axis. Therefore, as shown in Figure 6, the flipped second alignment mark 20 has a different shape from the first alignment mark 10. That is, it is a shape that has been inverted horizontally or vertically based on the shape on the plane.
[0047] Figure 7 shows an example of an alignment mark image. As shown in Figure 7, an alignment mark image can be obtained in which the first alignment mark 10 and the flipped second alignment mark 20 overlap. The alignment mark image shown in Figure 7 shows the state in which the first alignment mark 10 in Figure 4 and the second alignment mark 20 in Figure 6 overlap.
[0048] The COI in Figure 7 indicates the center of the alignment mark image. The center COI of the alignment mark image can be found in various ways. For example, the center of rotational symmetry of the alignment mark image and the image obtained by rotating the alignment mark image 180 degrees can be found as the center COI of the alignment mark image.
[0049] In Figure 7, for convenience, the symmetry center COS1 of the first alignment mark 10, the symmetry center COS2 of the second alignment mark 20, and the center COI of the alignment mark image are all shown to coincide. However, if there is an alignment error, the symmetry center COS1 of the first alignment mark 10 and the symmetry center COS2 of the second alignment mark 20 will not coincide. Furthermore, regardless of the presence or absence of an alignment error, the center COI of the alignment mark image may differ from the symmetry center COS1 of the first alignment mark 10 and the symmetry center COS2 of the second alignment mark 20.
[0050] The alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 can be measured by measuring the offset between the symmetry center COS1 of the first alignment mark 10 and the symmetry center COS2 of the second alignment mark 20.
[0051] When the alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 is 0 (zero), the symmetry center COS1 of the first alignment mark 10 and the symmetry center COS2 of the second alignment mark 20 coincide with each other. The difference between the symmetry center COS1 of the first alignment mark 10 and the symmetry center COS2 of the second alignment mark 20 indicates the alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2.
[0052] The following describes how to measure the X-axis alignment error using the alignment mark image shown in Figure 7.
[0053] Methods for measuring alignment errors may include the following steps:
[0054] First, the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image is calculated (S11).
[0055] As shown in Figure 7, region A1 is selected from the first quadrant of the acquired alignment mark image, and region A2 is selected which is 180 degrees symmetrical with respect to the central COI of the acquired alignment mark image. This region A2 is located approximately in the third quadrant.
[0056] Next, the two selected 2D images of regions A1 and A2 are projected onto 1D. That is, the gray values of pixels with the same X value in the 2D image are added together, the average of the gray values is calculated, or the gray values are normalized. As a result, graphs GX1 and GX2, showing the change in gray value due to the X value, can be drawn, as shown in Figures 8(a) and (b). In this case, graph GX2, which represents region A2, may be a graph obtained by projecting the 2D image of region A2 and then flipping it horizontally.
[0057] Since the gray value of the first bar 11 differs from the gray value of the space between the first bars 11, we can obtain graph GX1 in which a peak appears at the position of the first bar 11, as shown in Figure 8(a). The effect of the sixth bar 23 (horizontal bar) is the same for all X values, so the effect of the sixth bar 23 can be almost ignored. Similarly, in graph GX2 in Figure 8(b), the effect of the eighth bar 27 can be almost ignored for the same reason.
[0058] If the X value of the center of symmetry COS1 of the first alignment mark 10 is the same as the X value of the center COI of the acquired alignment mark image, then the two graphs GX1 and GX2 should be approximately identical to each other.
[0059] If the X value of the center of symmetry COS1 of the first alignment mark 10 is not the same as the X value of the center COI of the acquired alignment mark image, the peak values of the two graphs GX1 and GX2 will be offset. This offset value ΔX represents the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image.
[0060] Next, the difference between the X value of the center of symmetry COS2 of the second alignment mark 20 and the X value of the center COI of the acquired alignment mark image is calculated. In this step, region A3 in the second quadrant is selected from the acquired alignment mark image, and region A4 which is 180° symmetrical with respect to the center COI of the acquired alignment mark image is selected. This region A4 is located in the fourth quadrant. Then, after drawing graphs representing the two selected regions A2 and A4, the difference between the X value of the center of symmetry COS2 of the second alignment mark 20 and the X value of the center COI of the acquired alignment mark image is calculated using these graphs.
[0061] Next, the X-axis alignment error value is calculated using the difference between the X-value of the center of symmetry COS1 of the first alignment mark 10, which was determined earlier, and the X-value of the center COI of the acquired alignment mark image, as well as the difference between the X-value of the center of symmetry COS2 of the second alignment mark 20, which was determined earlier, and the X-value of the center COI of the acquired alignment mark image.
[0062] By changing only the projection direction, the difference between the Y value of the symmetry center COS1 of the first alignment mark 10 and the Y value of the center COI of the acquired alignment mark image, and the difference between the Y value of the symmetry center COS2 of the second alignment mark 20 and the Y value of the center COI of the acquired alignment mark image can be determined using the same method, and the alignment error value in the Y-axis direction can be determined using this.
[0063] The following describes a wafer bonding method in which a first semiconductor wafer 1 and a flipped second semiconductor wafer 2 are aligned and joined using the alignment marks described above.
[0064] First, as shown in Figures 1 and 2, a first alignment mark 10 and a second alignment mark 20 are formed in predetermined areas of the first semiconductor wafer 1 and the second semiconductor wafer 2, respectively.
[0065] The second alignment mark 20 is formed in a predetermined area of the second semiconductor wafer 2 so as to overlap with the first alignment mark 10 when the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 are joined together.
[0066] Next, as shown in Figure 3, the first semiconductor wafer 1 and the second semiconductor wafer 2 are provisionally aligned so that the surfaces on which the semiconductor elements are formed on the first semiconductor wafer 1 and the second semiconductor wafer 2 face each other. In this step, the coordinates of the first alignment mark 10 and the coordinates of the second alignment mark 20 are measured individually, and provisional alignment can be performed using these coordinates.
[0067] Next, camera 5 is used to acquire an alignment mark image (for example, the image in Figure 7) in which the first alignment mark 10 and the second alignment mark 20 overlap.
[0068] Furthermore, the alignment mark image is analyzed to calculate the alignment error between the first center of symmetry (COS1) and the second center of symmetry (COS2) of the first alignment mark 10 and the second alignment mark 20.
[0069] Furthermore, this alignment error is used to align the first alignment mark 10 and the second alignment mark 20. If the first center of symmetry COS1 and the second center of symmetry COS2 overlap (i.e., the alignment error is 0), then the first alignment mark 10 and the second alignment mark 20 can be considered aligned. Once the first alignment mark 10 and the second alignment mark 20 are aligned, the first semiconductor wafer 1 and the second semiconductor wafer 2 are also aligned.
[0070] Next, the aligned first semiconductor wafer 1 and the second semiconductor wafer 2 are bonded together.
[0071] Figure 9 is a diagram showing other examples of the first and second alignment marks, and Figure 10 shows an alignment mark image where the first alignment mark and the flipped second alignment mark from Figure 9 overlap.
[0072] The alignment marks shown in Figure 10 differ from those shown in Figure 7 in that the bars 111, 113, 115, and 117 constituting the first alignment mark 110 intersect with the bars 121, 123, 125, and 127 constituting the second alignment mark 120. In the alignment marks shown in Figure 10, the bars 111, 113, 115, and 117 constituting the first alignment mark 110 and the bars 121, 123, 125, and 127 constituting the second alignment mark 120 both form roughly squares. The bars 111, 113, 115, and 117 constituting the first alignment mark 110 and the bars 121, 123, 125, and 127 constituting the second alignment mark 120 overlap at the corners of the squares.
[0073] The embodiments described above merely illustrate preferred embodiments of the present invention, and the scope of the present invention is not limited to the embodiments described. Various modifications, alterations, or substitutions are possible by those skilled in the art within the technical spirit and claims of the present invention, and these embodiments should be understood to also fall within the scope of the present invention. [Explanation of Symbols]
[0074] 1. First semiconductor wafer 2. Second semiconductor wafer 5 Cameras 10, 110 First alignment mark 11. First alignment mark element 13. Second alignment mark element 15. Third alignment mark element 17. Fourth Alignment Mark Element 20, 120 Second alignment mark 21. Fifth Alignment Mark Element 23. Sixth Alignment Mark Element 25. 7th Alignment Mark Element 27. Eighth Alignment Mark Element
Claims
1. An alignment mark used in a wafer bonding process for aligning and joining a first semiconductor wafer and a flipped second semiconductor wafer, A first alignment mark formed in a predetermined region of the first semiconductor wafer and having a first center of symmetry, When joining the first semiconductor wafer and the flipped second semiconductor wafer, a second alignment mark is formed in a predetermined region of the second semiconductor wafer so as to overlap with the first alignment mark in the flipped state, and the second alignment mark has a second center of symmetry, including When the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry and the second center of symmetry overlap, The difference between the first center of symmetry and the second center of symmetry indicates the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer. The first alignment mark is rotationally symmetrical with respect to the first center of symmetry by 90 and 180 degrees, and asymmetrical with respect to the first axis passing through the first center of symmetry. The first alignment mark and the second alignment mark are identical in shape and size. Alignment marks used in a wafer bonding process, wherein the first alignment mark and the second alignment mark include a plurality of bars, and the bars of the first alignment mark and the flipped bars of the second alignment mark that belong to the same quadrant among the four quadrants divided by the first axis and the second axis perpendicular to the first axis are perpendicular to each other.
2. The first alignment mark is, The four quadrants include a first alignment mark element and a third alignment mark element formed in two quadrants located diagonally opposite each other, and a second alignment mark element and a fourth alignment mark element formed in the remaining two quadrants, respectively. The first alignment mark element includes at least one first bar that is elongated in the second axial direction, The second alignment mark element includes at least one second bar that is elongated in the first axial direction, The third alignment mark element includes at least one third bar that is elongated in the second axial direction, The alignment mark used in a wafer bonding process according to claim 1, wherein the fourth alignment mark element includes at least one fourth bar that is elongated in the first axial direction.
3. The second alignment mark is, The first alignment mark includes the fifth, sixth, seventh, and eighth bars, which correspond to the first, second, third, and fourth bars, respectively. Alignment marks used in a wafer bonding process according to claim 2, wherein the bar of the first alignment mark and the flipped bar of the second alignment mark, which belong to the same quadrant, are perpendicular to each other.
4. Alignment marks used in a wafer bonding process according to claim 3, wherein the bars of the first alignment mark and the flipped bars of the second alignment mark, which belong to the same quadrant, are orthogonal to each other.
5. A wafer bonding method for aligning and joining a first semiconductor wafer and a flipped second semiconductor wafer, The steps include forming a first alignment mark having a first center of symmetry in a predetermined region of the first semiconductor wafer, When joining the first semiconductor wafer and the flipped second semiconductor wafer, the steps include forming a second alignment mark having a second center of symmetry in a predetermined region of the second semiconductor wafer so as to overlap with the first alignment mark in the flipped state, A step of aligning the first alignment mark and the second alignment mark, The process includes the step of bonding the first semiconductor wafer and the second semiconductor wafer, When the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry and the second center of symmetry overlap, The difference between the first center of symmetry and the second center of symmetry indicates the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer. The first alignment mark is rotationally symmetrical with respect to the first center of symmetry by 90 and 180 degrees, and asymmetrical with respect to the first axis passing through the first center of symmetry. The first alignment mark and the second alignment mark are identical in shape and size. A wafer bonding method wherein the first alignment mark and the second alignment mark include a plurality of bars, and the bars of the first alignment mark and the flipped bars of the second alignment mark that belong to the same quadrant among the four quadrants divided by the first axis and the second axis perpendicular to the first axis are perpendicular to each other.
6. The first alignment mark is, The four quadrants include a first alignment mark element and a third alignment mark element formed in two quadrants located diagonally opposite each other, and a second alignment mark element and a fourth alignment mark element formed in the remaining two quadrants, respectively. The first alignment mark element includes at least one first bar that is elongated in the second axial direction, The second alignment mark element includes at least one second bar that is elongated in the first axial direction, The third alignment mark element includes at least one third bar that is elongated in the second axial direction, The wafer bonding method according to claim 5, wherein the fourth alignment mark element includes at least one fourth bar that is elongated in the first axial direction.
7. The second alignment mark is, The first alignment mark includes the fifth, sixth, seventh, and eighth bars, which correspond to the first, second, third, and fourth bars, respectively. The wafer bonding method according to claim 6, wherein the bar of the first alignment mark and the flipped bar of the second alignment mark, which belong to the same quadrant, are perpendicular to each other.
8. The wafer bonding method according to claim 7, wherein the first alignment mark bar and the flipped second alignment mark bar, which belong to the same quadrant, are orthogonal to each other.