Microelectronic devices including vertical planar memory cell structures, and related memory devices and electronic systems

The method addresses defects in vertical memory arrays by forming a pre-stack structure with cell slits and oxide separators, improving structural integrity and reliability in microelectronic devices.

JP2026520604APending Publication Date: 2026-06-23MICRON TECHNOLOGY INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
MICRON TECHNOLOGY INC
Filing Date
2024-05-17
Publication Date
2026-06-23

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Abstract

A method for forming a microelectronic device includes the steps of forming a pre-stack structure, forming a cell slit extending through the pre-stack structure, forming an oxide separator structure, forming a sacrificial backfill, removing the oxide separator structure to form a separator recess, forming a pre-separator structure within the separator recess, forming a vertical memory string structure within the cell slit, and replacing the sacrificial backfill with a conductive material. The pre-stack structure comprises a plurality of layers (tiers), each layer comprising a sacrificial material and an insulating material perpendicular to the sacrificial material. The oxide separator structure is arranged horizontally adjacent to the cell slit and may extend vertically through the pre-stack structure. The memory cell material is formed within the cell slit on the pre-separator structure and on the sidewalls of the pre-stack structure. The vertical memory string structure extends vertically through the pre-stack structure and is horizontally separated from each other by separator structures formed from the pre-separator structure.
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