Nested loop-type plasma-enhanced atomic layer deposition
The nested loop process in semiconductor processing efficiently produces high-quality silicon-oxygen-containing material by quickly forming intermediate-quality material and upgrading it through densification, addressing the throughput-quality trade-off in existing methods.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- APPLIED MATERIALS INC
- Filing Date
- 2024-04-18
- Publication Date
- 2026-06-30
Smart Images

Figure 2026521521000001_ABST
Abstract
Description
Technical Field
[0001] Cross - reference to Related Applications
[0001] This application claims the benefit and priority of U.S. Non - Provisional Application No. 18 / 209,700, filed on June 14, 2023, entitled "Nested - Loop Plasma Enhanced Atomic Layer Deposition", the content of which is hereby incorporated by reference in its entirety for all purposes.
[0002]
[0002] This technology relates to methods and components for semiconductor processing. More specifically, this technology relates to systems and methods for depositing silicon - containing materials while shortening the overall process time.
Background Art
[0003]
[0003] Integrated circuits are enabled by a process that creates a complexly patterned layer of material on a substrate surface. Creating a patterned material on a substrate is a multi - step process that includes multiple steps of forming a material on the substrate in a controlled manner and removing the material from the substrate. The longer each individual stage is, the lower the throughput of the product. Unfortunately, while throughput can be improved by shortening the time of an individual stage (or steps within an individual stage), the quality of the final product often suffers. Therefore, there is a need for improved systems and methods that can be used to more quickly produce high - quality devices and structures in order to enable higher throughput.
Summary of the Invention
[0004]
[0004] An exemplary method of semiconductor processing may include iteratively repeating a deposition cycle multiple times on a substrate placed within a processing area of a semiconductor processing chamber. Each deposition cycle may include depositing a silicon-containing material on the substrate and exposing the silicon-containing material to a first oxygen plasma to convert the silicon-containing material into a silicon-oxygen-containing material. After iteratively repeating the deposition cycle, the method may include performing a densification step by exposing the silicon-oxygen-containing material to a second oxygen plasma to produce a densified silicon-oxygen-containing material, wherein the quality of the densified silicon-oxygen-containing material is higher than that of the silicon-oxygen-containing material. The method may further include iteratively repeating the iteratively repeated deposition cycle and the densification step multiple times.
[0005]
[0005] An exemplary method of semiconductor processing may include repeating a deposition cycle x times on a substrate placed in a processing area of a semiconductor processing chamber, where 3 ≤ x ≤ 100. The deposition cycle may include depositing a silicon-containing material on the substrate, then purging the processing area after the process, then exposing the silicon-containing material to a first oxygen plasma to convert it into a silicon-oxygen-containing material, and then purging the processing area after the process. The first oxygen plasma is generated at a first plasma output, and the exposure may be carried out over a first time period. Optionally, the method may further include repeating the deposition step and the subsequent purging step. The method may then include performing a densification step by exposing the silicon-oxygen-containing material to a second oxygen plasma to produce a densified silicon-oxygen-containing material. The second oxygen plasma is generated at a second plasma output, and the exposure may be carried out over a second time period. The first plasma output may be lower than the second plasma output, and / or the first time may be shorter than the second time. The method may further include iteratively repeating the deposition cycle and densification process y times (e.g., 2 ≤ y ≤ 50).
[0006]
[0006] In some embodiments, 5 ≤ x ≤ 50 and / or 3 ≤ y ≤ 10 may be true. In some cases, the deposition cycle may be less than 3 seconds. The first plasma output may be about 100 W to about 2500 W, and the second plasma output may be about 1500 W to about 2500 W. The first time may be about 0.1 seconds to about 1 second, and the second time may be about 1 second to about 30 seconds. In some embodiments, the substrate may define one or more features along the substrate, and the silicon-oxygen-containing material extends along the substrate into one or more features. While the silicon-containing material is being deposited on the substrate, the pressure in the processing area may be maintained at about 100 Torr or higher. The silicon-containing material may be a silicon-containing precursor containing one or more of silane (SiH4), disilane (Si2H6), silicon tetrachloride (SiCl4), tetraethyl orthosilicate (TEOS), and aminosilane, or may be obtained from such silicon-containing precursor. After repeated deposition cycles, the silicon-oxygen-containing material may have a thickness of about 3 Å to about 100 Å. The compressive stress of the silicon-oxygen-containing material is greater than that of the high-density silicon-oxygen-containing material, as the silicon-oxygen-containing material may have a compressive stress of about -225 MPa to about -50 MPa, and the high-density silicon-oxygen-containing material may have a compressive stress of about -350 MPa to about -200 MPa. Silicon-oxygen-containing materials have a wet etching rate ratio (WERR) (in 1% HF) of approximately 1.5 to 4 relative to thermal oxides, while high-density silicon-oxygen-containing materials may have a WERR (in 1% HF) of approximately 0.1 to 2 relative to thermal oxides. Therefore, the WERR of silicon-oxygen-containing materials is greater than that of high-density silicon-oxygen-containing materials. Silicon-oxygen-containing materials have a refractive index of approximately 1 to 1.5, while high-density silicon-oxygen-containing materials may have a refractive index of approximately 1.1 to 2. Therefore, the refractive index of silicon-oxygen-containing materials is smaller than that of high-density silicon-oxygen-containing materials.
[0007]
[0007] Some embodiments of the present technology may encompass a semiconductor processing method. The method may include repeating a deposition cycle x times (e.g., 3 ≤ x ≤ 100) on a substrate in a processing area of a semiconductor processing chamber. The deposition cycle may include depositing a silicon-containing material on the substrate, then purging the processing area, then exposing the silicon-containing material to a first oxygen plasma to convert it into a silicon-oxygen-containing material, and then purging the processing area. The first oxygen plasma is generated at a first plasma power, and the exposure may be carried out over a first time. In each iteration of the deposition cycle, the first plasma power may be about 100 W to about 2500 W, and the first time may be about 0.2 seconds to about 3 seconds, and each is independently selected for each iteration of the deposition cycle. Optionally, the method may further include repeating a purging step following the deposition step. Next, the method may include performing a densification step by exposing a silicon-oxygen-containing material to a second oxygen plasma in order to produce a densified silicon-oxygen-containing material. The second oxygen plasma is generated at a second plasma power, and the exposure may be performed over a second time. The first plasma power may be lower than the second plasma power, and / or the first time may be shorter than the second time. In each iteration of the densification step, the second plasma power may be approximately 1000W to approximately 2500W, and the second time may be approximately 1 second to approximately 40 seconds, each independently selected for each iteration of the densification step. The method may further include repeating the deposition cycle and subsequent densification y times (e.g., 2 ≤ y ≤ 50) while the substrate is maintained within the processing area.
[0008]
[0008] In some embodiments, 5 ≤ x ≤ 50 and / or 3 ≤ y ≤ 20 may hold. The deposition cycle may be 1.5 seconds or less. The first plasma output may be about 500 W to about 2500 W, and the second plasma output may be about 1500 W to about 2500 W. The first time may be about 0.1 seconds to about 0.7 seconds, and the second time may be about 3 seconds to about 25 seconds.
[0009]
[0009] Some embodiments of the present technology may encompass a semiconductor processing method. The method may include repeating a deposition cycle x times (e.g., 3 ≤ x ≤ 100) on a substrate in a processing area of a semiconductor processing chamber. The deposition cycle may include depositing a silicon-containing material on the substrate, then purging the processing area, then exposing the silicon-containing material to a first oxygen plasma to convert it into a silicon-oxygen-containing material, and then purging the processing area. The first oxygen plasma is generated at a first plasma power, and the exposure may be carried out over a first time period. In each iteration of the deposition cycle, the first plasma power and the first time period may vary. Optionally, the method may further include repeating the deposition step and the subsequent purging step. The method may then include performing a densification step by exposing the silicon-oxygen-containing material to a second oxygen plasma to produce a densified silicon-oxygen-containing material. The second oxygen plasma is generated at a second plasma power, and exposure may occur over a second time. In each iteration of the densification process, the second plasma power and the second time may vary. The first plasma power may be lower than the second plasma power, and / or the first time may be shorter than the second time. The method may further include repeatedly performing the deposition cycle and subsequent densification y times (e.g., 2 ≤ y ≤ 50) while the substrate is maintained within the processing area. In each iteration of the repeatedly performed deposition cycle and subsequent densification process, a layer of densified silicon-oxygen-containing material having a thickness of about 3 Å to about 100 Å is formed.
[0010]
[0010] Such technologies can offer many advantages over conventional systems and techniques. For example, embodiments of this technology can reduce processing time and improve product throughput. Along with these numerous advantages and features, these embodiments and other embodiments will be described in more detail below, with the use of the accompanying drawings.
[0011]
[0011] Further understanding of the nature and advantages of the technology of this disclosure can be obtained by referring to the remainder of this specification and the drawings. [Brief explanation of the drawing]
[0012] [Figure 1]
[0012] A schematic cross-sectional view of an exemplary plasma system according to several embodiments of the present technology is shown. [Figure 2]
[0013] The process steps in a semiconductor processing method according to several embodiments of this technology are shown. [Figure 3A]
[0014] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Figure 3B] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Figure 3C] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Figure 3D] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Figure 3E] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Figure 3F] The following shows an exemplary schematic cross-sectional structure in which a material layer is contained and manufactured according to several embodiments of this technology. [Modes for carrying out the invention]
[0013]
[0015] Several drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes only and should not be considered to scale unless explicitly stated otherwise. Furthermore, as schematic diagrams, they are provided to aid understanding and may not include all aspects or information compared to a realistic depiction, and may include exaggerated material for illustrative purposes.
[0014]
[0016] In the attached drawings, similar components and / or features may have the same reference numeral. Furthermore, various components of the same type may be distinguished according to their reference numerals by letters that distinguish between similar components. Where only a first reference numeral is used in this specification, its description is applicable to any of the similar components having the same first reference numeral, regardless of the letters used.
[0015]
[0017] As demand for devices increases, improved production throughput is desired. However, simply speeding up by shortening the time of individual stages in the production process often degrades the quality of the final product. This technology aims to improve the speed of plasma-enhanced atomic layer deposition by using nested loops of processes. More specifically, the process includes a deposition cycle loop (or iteratively repeated deposition cycle) nested within a process loop. Each process loop includes performing a densification process following the deposition cycle loop. The deposition cycle loop forms a layer of silicon-oxygen-containing material, and the densification process improves the quality of the silicon-oxygen-containing material. Subsequently, the deposition cycle loop is repeated, forming another layer of silicon-oxygen-containing material on top of the improved silicon-oxygen-containing material. The newly deposited silicon-oxygen-containing material is processed again using a second densification process to improve the quality of the newly deposited silicon-oxygen-containing material. This is repeated until a desired amount of silicon-oxygen-containing material is present on the substrate, such as filling features on the substrate.
[0016]
[0018] In contrast, conventional plasma-enhanced atomic layer deposition typically involves a series of deposition cycles to deposit a desired amount of material, with each deposition cycle producing high-quality silicon-oxygen-containing material. Generally, the process within the deposition cycle that converts silicon-containing material into high-quality silicon-oxygen-containing material is the longest process within the deposition cycle.
[0017]
[0019] This technology can reduce the overall time required to deposit a desired amount of high-quality silicon-oxygen-containing material onto a substrate. This is because it first significantly reduces the cycle time to produce intermediate-quality silicon-oxygen-containing material, and then upgrades this intermediate-quality material to higher-quality silicon-oxygen-containing material through a short densification process.
[0018]
[0020] The quality of silicon-oxygen-containing materials can be characterized by compressive stress (where higher compressive stress indicates higher quality), wet etching rate ratio to thermal oxide (WERR) (in 1% HF) (lower WERR indicates higher quality), refractive index (RI) (higher RI indicates higher quality), shrinkage (lower shrinkage indicates higher quality), or any combination thereof.
[0019]
[0021] Figure 1 shows a cross-sectional view of an exemplary semiconductor processing chamber 100 according to several embodiments of the present technology. The figure may illustrate an overview of a system that incorporates one or more aspects of the present technology and / or can be specifically configured to perform one or more steps according to embodiments of the present technology. Additional details of the chamber 100 or the method performed may be described further below. While the chamber 100 may be used to form a film layer according to several embodiments of the present technology, it should be understood that the method can be similarly performed in any chamber in which film formation may be performed. The semiconductor processing chamber 100 may include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and sealing the substrate support 104 in the processing space 120. A substrate 103 is supplied to the processing space 120 through an opening 126, which can be conventionally sealed for processing using a slit valve or door. The substrate 103 can be placed on the surface 105 of the substrate support 104 during processing. The substrate support 104 may be rotatable along an axis 147 in which the shaft 144 of the substrate support 104 may be located, as indicated by arrow 145. Alternatively, the substrate support 104 may be lifted to rotate as needed during the deposition cycle and / or densification process.
[0020]
[0022] The plasma profile modulator 111 can be disposed within the semiconductor processing chamber 100 to control the plasma distribution across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 can include a first electrode 108. This first electrode 108 is disposed adjacent to the chamber body 102 and can separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 can be part of the lid assembly 106 or a separate sidewall electrode. The first electrode 108 is an annular or ring-shaped member and can be a ring electrode. The first electrode 108 is a continuous loop around the outer periphery of the semiconductor processing chamber 100 surrounding the processing space 120 and can be discontinuous at selected locations if desired. The first electrode 108 can also be a perforated electrode such as a perforated ring or mesh electrode, or, for example, a flat electrode such as a secondary gas distributor.
[0021]
[0023] One or more isolators 110a, 110b, which can be dielectric materials such as ceramic or metal oxide (e.g., aluminum oxide and / or aluminum nitride), contact the first electrode 108 and can electrically and thermally separate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 can define apertures 118 for distributing process precursors into the processing space 120. The gas distributor 112 can be connected to a first power source 142, such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that can be connected to the semiconductor processing chamber 100. In some embodiments, the first power source 142 can be an RF power source.
[0022]
[0024] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. Also, the gas distributor 112 may also be formed from conductive components and non-conductive components. For example, while the body of the gas distributor 112 is conductive, the faceplate of the gas distributor 112 may be non-conductive. The gas distributor 112 can be powered by a first power supply 142 as shown in FIG. 1, or in some embodiments, the gas distributor 112 can be connected to ground.
[0023]
[0025] The first electrode 108 can be coupled to a first tuning circuit 128 that can control the ground path of the semiconductor processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be a variable capacitor or other circuit element, or can include these. The first tuning circuit 128 can be one or more inductors 132, or can include these. The first tuning circuit 128 can be any circuit that enables a variable or controllable impedance under plasma conditions present within the processing space 120 during processing. In some embodiments as illustrated, the first tuning circuit 128 can include a first circuit leg and a second circuit leg connected in parallel between ground and the first electronic sensor 130. The first circuit leg can include a first inductor 132a. The second circuit leg can include a second inductor 132b connected in series with the first electronic controller 134. The second inductor 132b can be disposed between the first electronic controller 134 and a node connecting both the first circuit leg and the second circuit leg to the first electronic sensor 130. The first electronic sensor 130 is a voltage or current sensor and is connected to the first electronic controller 134, thereby providing some degree of closed-loop control to the plasma conditions inside the processing space 120.
[0024]
[0026] The second electrode 122 may be connected to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or connected to the surface 105 of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed configuration of conductive elements. The second electrode 122 is a tuning electrode and may be connected to a second tuning circuit 136 by a conduit 146 and a cable having a selected resistance, such as 50 ohms, which is located, for example, within the shaft 144 of the substrate support 104. The second tuning circuit 136 may have a second electronic sensor 138 and a second electronic controller 140 (which may be a second variable capacitor). The second electronic sensor 138 is a voltage or current sensor and may be connected to the second electronic controller 140 to provide further control over plasma conditions in the processing space 120.
[0025]
[0027] A third electrode 124 (which may be a bias electrode and / or an electrostatic chuck electrode) may be connected to the substrate support 104. The third electrode may be connected to a second power supply 150 through a filter 148 (which may be an impedance matching circuit). The second power supply 150 may be a DC power supply, a pulsed DC power supply, an RF bias power supply, a pulsed RF source or bias power supply, or a combination of these or other power supplies. In some embodiments, the second power supply 150 may be an RF bias power supply. The substrate support 104 may also include one or more heating elements configured to heat the substrate to a processing temperature which may be between about 25°C and about 800°C or higher.
[0026]
[0028] The lid assembly 106 and substrate support 104 in Figure 1 can be used with any processing chamber for plasma processing or heat processing. During operation, the semiconductor processing chamber 100 can control the plasma conditions in the processing space 120 in real time. The substrate 103 is placed on the substrate support 104, and process gas can flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gas can be discharged from the semiconductor processing chamber 100 through the outlet 152. Power can be coupled to the gas distributor 112 to form plasma in the processing space 120. In some embodiments, the substrate can be electrically biased using a third electrode 124.
[0027]
[0029] When the plasma in the processing space 120 is excited, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Electronic controllers 134, 140 can then be used to adjust the flow characteristics of the ground path, which are represented by two tuning circuits 128, 136. Setpoints can be provided for the first tuning circuit 128 and the second tuning circuit 136 to provide separate control over the deposition rate and the uniformity of plasma density from the center to the edge. In embodiments where both electronic controllers are variable capacitors, electronic sensors can separately adjust the variable capacitors to maximize the deposition rate and minimize thickness non-uniformity.
[0028]
[0030] Each of the tuning circuits 128 and 136 may have a variable impedance that can be adjusted using their respective electronic controllers 134 and 140. When the electronic controllers 134 and 140 are variable capacitors, the capacitance range of each variable capacitor, as well as the inductances of the first inductor 132a and the second inductor 132b, may be selected to provide a certain impedance range. This range depends on the frequency and voltage characteristics of the plasma and may have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at its minimum or maximum, the impedance of the first tuning circuit 128 becomes high, which can result in a plasma shape with minimal air- or lateral coverage over the substrate support 104. As the capacitance of the first electronic controller 134 approaches the value that minimizes the impedance of the first tuning circuit 128, the air-coverage of the plasma grows to its maximum, effectively covering the entire working area of the substrate support 104. If the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may contract away from the chamber wall, and the air coverage of the substrate support 104 may decrease. The second electronic controller 140 has a similar effect, and since the capacitance of the second electronic controller 140 can be changed, the air coverage of the plasma on the substrate support 104 can be increased or decreased.
[0029]
[0031] Electronic sensors 130 and 138 may be used to tune their respective circuits 128 and 136 in a closed loop. Depending on the type of sensor used, a current or voltage setpoint may be set for each sensor, and control software may be provided to the sensors to determine the adjustments to their respective electronic controllers 134 and 140 to minimize deviations from the setpoint. Thus, the plasma shape can be selected and dynamically controlled during processing. Although the above considerations are based on electronic controllers 134 and 140 (which may be variable capacitors), it will be understood that any electronic component with adjustable characteristics may be used to provide tuning circuits 128 and 136 with adjustable impedance.
[0030]
[0032] Figure 2 shows an example of a plasma-enhanced atomic layer deposition method 200 according to several embodiments of the present disclosure. Method 200 may be performed in a variety of processing chambers, including the semiconductor processing chamber 100 and other chambers described below. Method 200 may include one or more operations, including front-end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed before the operations described, prior to the commencement of Method 200. Method 200 may include a number of optional steps, which may or may not be particularly relevant to some embodiments of the method according to embodiments of the present art. For example, many of the steps are described to provide a broader range of processes to be performed, but are not critical to the present art or may be performed by alternative methods, which will be discussed further below. Method 200 may describe the steps schematically shown in Figures 3A–3F. These illustrations will be described in conjunction with the steps of Method 200. It should be understood that only partial schematic diagrams are shown in the figures, and the substrate may include any number of additional materials and features having various properties and characteristics as shown in the figures.
[0031]
[0033] Method 200 may or may not include optional steps for developing a semiconductor structure into a specific manufacturing process. It should be understood that Method 200 can be performed on any number of semiconductor structures or substrates 305, including exemplary structures 300 on which one or more silicon-oxygen-containing materials can be formed, as shown in Figure 3A. As shown in Figure 2, the operation of a semiconductor processing method according to several embodiments of the present technology is illustrated.
[0032]
[0034] Figures 3A to 3F show exemplary schematic cross-sectional structures that include and form material layers according to several embodiments of this technology.
[0033]
[0035] The substrate 305 may be processed to form one or more concave features 315, such as trenches, openings, or any other structures in semiconductor processing. The substrate 305 may be made of any number of materials, including a base wafer or substrate 305 made from silicon or a silicon-containing material, other substrate materials, and one or more materials that may be layered and formed on top of the substrate 305 during semiconductor processing. For example, in some embodiments, the substrate 305 may be processed to include one or more materials or structures for semiconductor processing. The substrate 305 may be or may contain dielectric materials, such as oxides or nitrides of any number of materials. In embodiments, one or more material layers 310 may be deposited on the substrate 305. In embodiments, one or more material layers 310 may be or may contain silicon-containing materials. The silicon-containing material may be or may contain silicon, including amorphous silicon, doped silicon, silicon oxide, silicon nitride, and silicon carbide.
[0034]
[0036] As illustrated, one or more features 315 may be defined by one or more material layers 310 and / or substrate 305, such as trenches, openings, or other recessed features. Feature 315 may have vertical sidewalls or tapered sidewalls, as illustrated. In embodiments of tapered sidewalls, the feature may have a larger diameter or width at the top of the feature than at the bottom of the feature. The aspect ratio of feature 315, i.e., the ratio of the depth of the feature to the width or diameter at the top of the feature, is about 1:1 or greater and may be about 2:1 or greater, about 3:1 or greater, about 4:1 or greater, about 5:1 or greater, about 6:1 or greater, about 7:1 or greater, about 8:1 or greater, about 9:1 or greater, about 10:1 or greater, or greater. Although only one feature 315 is shown in the figure, it should be understood that the exemplary structure may have any number of features 315 defined along the structure according to embodiments of the Art.
[0035]
[0037] Method 200 includes a deposition cycle 205, which is repeated x times 210 (or loops) before a densification step 215 is performed. After each densification step 215, the method includes repeating the deposition cycle 205, which is repeated 210, y times 220 (or loops). Thus, the deposition cycle 205, which is repeated 210, can be characterized as a loop nested within an overall loop that includes the deposition cycle 205 and the densification step 215.
[0036]
[0038] As shown in Figure 3B, a deposition cycle 205, which is repeated 210 times, deposits a layer 320a containing silicon-oxygen material onto a substrate 305 and / or one or more material layers 310. As shown in Figure 3C, a subsequent densification step 215 coats layer 320a with a densified layer 325a by densifying the silicon-oxygen material (described in more detail below). Densification improves the quality of the silicon-oxygen material, such as improving the desired mechanical properties of the material. As shown in Figure 3D, the method 200 includes repeating the deposition cycle 205, which is repeated 210 times, to construct another layer 320b containing silicon-oxygen material on top of the densified layer 325a. As shown in Figure 3E, layer 320b is then densified in the densification step 215 to produce a higher quality densified layer 325b than layer 320b. Method 200 includes repeating these steps 220 until a desired amount of high-density silicon-oxygen-containing material is formed on the substrate. In embodiments, as shown in Figure 3F, Method 200 may continue until feature 315 is filled with high-density silicon-oxygen-containing material 325c.
[0037]
[0039] The illustrated deposition cycle 205 comprises four steps. The first step 225 involves depositing a silicon-containing material onto a substrate. This can be achieved by supplying a silicon-containing precursor to a processing area in a semiconductor processing chamber. Prior to the start of Method 200, a silicon-containing precursor may be supplied to the same processing area in the semiconductor processing chamber to perform the processing. The silicon-containing precursor that can be used in Method 200 may be any number of silicon-containing precursors or may comprise any number of silicon-containing precursors. For example, the silicon-containing precursor may be or comprise silane (SiH4), disilane (Si2H6), silicon tetrachloride (SiCl4), tetraethyl orthosilicate (TEOS), diisopropylaminosilane (DIPAS), bis(diethylamino)silane (BDEAS), bis(t-butylamino)silane (BTBAS), or any other precursor that can form, for example, silicon oxide (SiO), silicon nitride (SiN), or silicon carbide (SiC) materials. In some embodiments, along with the silicon-containing precursor, one or more additional precursors may be supplied, such as one or more carrier gases or inert gases, including argon or helium, in addition to the hydrogen-containing precursor.
[0038]
[0040] The silicon-containing precursor is deposited on the substrate as a silicon-containing material. It should be noted that "deposited on the substrate" includes deposition on features, layers (e.g., layers of silicon-oxygen-containing material or high-density layers of silicon-oxygen-containing material) that already exist on the substrate. That is, the silicon-containing material, if exposed, may extend along any and / or all exposed surfaces along the substrate, and also along any other incorporated material (e.g., previously formed silicon-oxygen-containing material or high-density silicon-oxygen-containing material). During step 225, deposition of the silicon-containing material may occur, if present, from, for example, the sidewalls defining the feature toward the interior of the feature.
[0039]
[0041] The deposition of the silicon-containing material onto the substrate in step 225 can be carried out as a non-plasma process. By performing step 225 without plasma, the deposition of the silicon-containing material can be highly conformal. In embodiments, the deposition of the silicon-containing material may be characterized by conformality of about 80% or more, about 85% or more, about 90% or more, about 95% or more, about 97% or more, about 99% or more, or about 100%.
[0040]
[0042] Step 225 can be performed for approximately 5 seconds or less, approximately 4 seconds or less, approximately 3 seconds or less, approximately 2 seconds or less, approximately 1 second or less, approximately 0.5 seconds or less, approximately 0.1 seconds to approximately 5 seconds, approximately 0.1 seconds to approximately 0.5 seconds, approximately 0.25 seconds to approximately 1 second, approximately 0.25 seconds to approximately 1.5 seconds, approximately 1 second to approximately 3 seconds, or approximately 2 seconds to approximately 5 seconds. Although not theoretically constrained, it is thought that shorter times will result in a decrease in the amount (or thickness) of silicon-containing material deposited on the surface. Furthermore, if the amount of silicon-containing material is insufficient (for example, due to a short time for step 225), it is thought that lower quality silicon-oxygen-containing material will be produced at the end of each deposition cycle 205. However, since a single layer is deposited in step 225, longer times may lead to a self-limiting saturation.
[0041]
[0043] After step 225, step 230 may be performed to purge the processing area to remove excess silicon-containing precursor. Purging can be achieved by reducing the pressure in the semiconductor processing chamber or by flowing a gas (e.g., an inert gas such as argon or nitrogen) through the semiconductor processing chamber.
[0042]
[0044] While not constrained by theory, it is thought that if the purging time is too short, a sufficient amount of excess silicon-containing precursor may not be removed, making the next step 135 ineffective and potentially degrading the quality of the silicon-oxygen-containing material at the end of each deposition cycle 205.
[0043]
[0045] Step 230 can be performed for approximately 5 seconds or less, approximately 4 seconds or less, approximately 3 seconds or less, approximately 2 seconds or less, approximately 1 second or less, approximately 0.5 seconds or less, approximately 0.1 seconds to approximately 5 seconds, approximately 0.1 seconds to approximately 0.5 seconds, approximately 0.25 seconds to approximately 1 second, approximately 0.25 seconds to approximately 1.5 seconds, approximately 1 second to approximately 3 seconds, or approximately 2 seconds to approximately 5 seconds.
[0044]
[0046] Following step 230, method 200 may include step 235, in which the silicon-containing material is exposed to an oxygen plasma to convert the silicon-containing material into a silicon-oxygen-containing material. The plasma may be formed from an oxygen-containing precursor. The oxygen-containing precursor that can be used in method 200 may be any number of oxygen-containing precursors or may include these. For example, the oxygen-containing precursor may be nitrous oxide (N2O), water (H2O), diatomic oxygen (O2), ozone (O3), a combination of one or more of these, or any other oxygen-containing substance or may include these. An inert gas such as argon may also be present.
[0045]
[0047] The quality of the resulting silicon-oxygen-containing material depends, in particular, on the plasma power and exposure time. While not constrained by theory, it is thought that higher plasma power and / or longer exposure times improve the quality of the silicon-oxygen-containing material at the end of each deposition cycle 205, because this results in a higher density of the resulting silicon-oxygen-containing material. However, longer exposure times increase the time for each deposition cycle 205 and the entire method 200. Furthermore, if the plasma power is too low and / or the exposure time is too short, the conversion from silicon-containing material to silicon-oxygen-containing material may be incomplete, resulting in a decrease in the quality of the silicon-oxygen-containing material. Therefore, in this disclosure, a balance between plasma power and exposure time is desired to achieve an intermediate quality silicon-oxygen-containing material that can then be upgraded to a higher quality silicon-oxygen-containing material in the densification step 215.
[0046]
[0048] The plasma output in process 235 may be approximately 2500 watts (W) or less, approximately 2000 W or less, approximately 1750 W or less, approximately 1500 W or less, approximately 1250 W or less, approximately 1000 W or less, approximately 1 W to approximately 2500 W, approximately 1 W to approximately 500 W, approximately 100 W to approximately 2500 W, approximately 100 W to approximately 1000 W, approximately 500 W to approximately 2500 W, or approximately 1000 W to approximately 2500 W.
[0047]
[0049] The exposure time (or the length of time for which step 235 is performed) may be approximately 5 seconds or less, approximately 4 seconds or less, approximately 3 seconds or less, approximately 2 seconds or less, approximately 1 second or less, approximately 0.5 seconds or less, approximately 0.1 seconds to approximately 5 seconds, approximately 0.1 seconds to approximately 0.5 seconds, approximately 0.25 seconds to approximately 1 second, approximately 0.25 seconds to approximately 1.5 seconds, approximately 1 second to approximately 3 seconds, or approximately 2 seconds to approximately 5 seconds.
[0048]
[0050] During the formation of the oxygen-containing precursor plasma, the temperature in the semiconductor processing chamber is maintained at approximately 450°C or higher, and may be maintained at approximately 500°C or higher, approximately 550°C or higher, approximately 600°C or higher, or higher. The temperature is maintained at approximately 650°C or lower, and may be maintained at approximately 600°C or lower, approximately 550°C or lower, approximately 500°C or lower, or lower. In embodiments in which the oxygen-containing precursor plasma is formed, the oxygen-containing precursor may contain either or both N2O and O2.
[0049]
[0051] After step 235, step 240 may be performed to purge the processing area to remove residues from the oxygen plasma and by-products from the conversion of silicon-containing material to silicon-oxygen-containing material. Purging can be achieved by reducing the pressure in the semiconductor processing chamber or by flowing a gas (e.g., an inert gas such as argon or nitrogen) through the semiconductor processing chamber.
[0050]
[0052] Step 240 can be performed for approximately 5 seconds or less, approximately 4 seconds or less, approximately 3 seconds or less, approximately 2 seconds or less, approximately 1 second or less, approximately 0.5 seconds or less, approximately 0.1 seconds to approximately 5 seconds, approximately 0.1 seconds to approximately 0.5 seconds, approximately 0.25 seconds to approximately 1 second, approximately 0.25 seconds to approximately 1.5 seconds, approximately 1 second to approximately 3 seconds, or approximately 2 seconds to approximately 5 seconds. Although not limited by theory, the length of time for step 240 is thought to have minimal effect on the quality of the resulting silicon-oxygen-containing material, but it does affect the overall time of each of the deposition cycles 210. Therefore, step 240 can preferably be minimized.
[0051]
[0053] The illustrated sedimentation cycle 205 illustrates four steps 225, 230, 235, and 240, but the sedimentation cycle may include other steps, or may not include one or more of the illustrated steps 225, 230, 235, and 240.
[0052]
[0054] The conditions of each step within the deposition cycle 205 may be selected to realize a silicon-oxygen-containing material having the properties described above. Preferably, conditions other than time are selected so that each step takes the shortest possible time while achieving the desired properties for the silicon-oxygen-containing material (e.g., intermediate quality which can be characterized by compressive stress, WERR, RI, shrinkage, or any combination thereof, as described in further detail below). The total time for each deposition cycle 205 (including all steps within it) may be approximately 10 seconds or less, approximately 9 seconds or less, approximately 8 seconds or less, approximately 7 seconds or less, approximately 6 seconds or less, approximately 5 seconds or less, approximately 4 seconds or less, approximately 3 seconds or less, approximately 2.5 seconds or less, approximately 2 seconds or less, approximately 1.5 seconds or less, approximately 1 second or less, approximately 0.5 seconds or less, approximately 0.5 seconds to approximately 10 seconds, approximately 0.5 seconds to approximately 5 seconds, approximately 0.5 seconds to approximately 2.5 seconds, approximately 0.5 seconds to approximately 1.5 seconds, approximately 1 second to approximately 5 seconds, approximately 3 seconds to approximately 7 seconds, or approximately 5 seconds to approximately 10 seconds.
[0053]
[0055] The conditions for each step in the sedimentation cycle 205 may be the same in each iteration, or they may change in different iterations.
[0054]
[0056] Sedimentation cycle 205 is repeated x times. x may be approximately 3 or more, approximately 5 or more, approximately 10 or more, approximately 20 or more, approximately 30 or more, approximately 40 or more, approximately 50 or more, approximately 100 or less, approximately 90 or less, approximately 80 or less, approximately 70 or less, approximately 60 or less, approximately 50 or less, approximately 40 or less, approximately 3 to approximately 100, approximately 3 to approximately 50, approximately 5 to approximately 50, approximately 10 to approximately 50, approximately 20 to approximately 60, approximately 30 to approximately 70, approximately 40 to approximately 80, or approximately 50 to approximately 100 or more.
[0055]
[0057] After a deposition cycle 205 in which the deposition cycle 210 is repeated iteratively, the method 200 includes a densification step 215. Optionally, there may be one or more additional steps between the deposition cycle 205 in which the deposition cycle 210 is repeated iteratively and the densification step 215. For example, an additional step 225 and a subsequent additional step 230 may be performed before the densification step 215. The densification step 215 will convert the silicon-containing material deposited in the additional step 225 into a densified silicon-oxygen-containing material.
[0056]
[0058] The illustrated densification process 215 includes one step 245. Step 245 exposes the silicon-oxygen-containing material to an oxygen plasma, converting the silicon-oxygen-containing material into a densified silicon-oxygen-containing material, which, as described above, has higher quality than the silicon-oxygen-containing material. The plasma can be formed from an oxygen-containing precursor. The oxygen-containing precursor that can be used in method 200 can be any number of oxygen-containing precursors or may include these. For example, the oxygen-containing precursor can be nitrous oxide (N2O), water (H2O), diatomic oxygen (O2), ozone (O3), a combination of one or more of these, or any other oxygen-containing substance or may include these. An inert gas such as argon may also be present.
[0057]
[0059] The resulting improvement in the quality of the high-density silicon-oxygen-containing material depends, in particular, on the plasma power and exposure time. Generally, increasing the plasma power and extending the exposure time improves the quality of the silicon-oxygen-containing material. However, both the plasma power and exposure time reach a self-regulating saturation point. Therefore, the plasma power and exposure time should preferably be selected to minimize the time while achieving the desired properties (e.g., higher quality, which can be characterized by compressive stress, WERR, RI, shrinkage, or any combination thereof, which will be described in more detail below) for the high-density silicon-oxygen-containing material.
[0058]
[0060] Generally, the plasma power in step 245 may be greater than the plasma power in step 235, and / or the exposure time in step 245 may be longer than the exposure time in step 235. In a non-limiting example, the plasma power in step 245 may be about 1500W to about 2500W, and the plasma power in step 235 may be about 1W to about 2000W, provided that the plasma power in step 235 is lower than the plasma power in step 245. In another non-limiting example, the exposure time in step 245 may be about 1 second to about 30 seconds, and the exposure time in step 235 may be about 0.1 seconds to about 1 second, provided that the exposure time in step 235 is shorter than the exposure time in step 245. In yet another non-limiting example, the plasma output in step 245 may be approximately 1500W to 2500W for an exposure time of approximately 1 second to 30 seconds, and the plasma output in step 235 may be approximately 1W to 2000W for an exposure time of approximately 0.1 seconds to 1 second, provided that (a) the plasma output in step 235 is lower than the plasma output in step 245, and / or (b) the exposure time in step 235 is shorter than the exposure time in step 245.
[0059]
[0061] The plasma output in process 245 may be approximately 500W or more, approximately 1000W or more, approximately 1250W or more, approximately 1500W or more, approximately 500W to approximately 2500W, approximately 500W to approximately 1500W, approximately 1000W to approximately 2500W, approximately 1000W to approximately 2000W, or approximately 1500W to approximately 2500W or more.
[0060]
[0062] The exposure time (or the length of time that process 245 is performed) may be approximately 1 second or more, approximately 1.5 seconds or more, approximately 2 seconds or more, approximately 2.5 seconds or more, approximately 5 seconds or more, approximately 10 seconds or more, approximately 1 second to approximately 60 seconds, approximately 1 second to approximately 40 seconds, approximately 1 second to approximately 30 seconds, approximately 3 seconds to approximately 25 seconds, approximately 5 seconds to approximately 45 seconds, or approximately 10 seconds to approximately 60 seconds.
[0061]
[0063] While the plasma of the oxygen-containing precursor is being formed in step 245, the temperature inside the semiconductor processing chamber is maintained at about 450°C or higher, and may be maintained at about 500°C or higher, about 550°C or higher, about 600°C or higher, or higher. The temperature is maintained at about 650°C or lower, and may be maintained at about 600°C or lower, about 550°C or lower, about 500°C or lower, or lower. In embodiments in which the plasma of the oxygen-containing precursor is being formed, the oxygen-containing precursor may contain either or both N2O and O2.
[0062]
[0064] Following step 245, the densification step 215 may optionally include a step (not shown) of purging the processing area to remove excess oxygen plasma and / or by-products from the processing of the silicon-oxygen-containing material to produce a densified silicon-oxygen-containing material. Purging can be achieved by reducing the pressure in the semiconductor processing chamber or by flowing a gas (e.g., an inert gas such as argon or nitrogen) through the semiconductor processing chamber.
[0063]
[0065] The conditions of each step within the densification process 215 can be selected to achieve a densified silicon-oxygen-containing material having the above-described properties. Preferably, conditions other than time are selected so that each step takes the minimum amount of time while achieving the desired properties of the densified silicon-oxygen-containing material. The total time for each densification process 215 (including all steps within it) may be about 120 seconds or less, about 90 seconds or less, about 60 seconds or less, about 50 seconds or less, about 40 seconds or less, about 30 seconds or less, about 1 second to about 120 seconds, about 1 second to about 90 seconds, about 5 seconds to about 120 seconds, about 5 seconds to about 90 seconds, about 10 seconds to about 120 seconds, or about 10 seconds to about 90 seconds.
[0064]
[0066] The deposition cycle 205 and densification process 215, which are repeated 210 times, are repeated y times 220. Y may be approximately 2 or more, approximately 3 or more, approximately 4 or more, approximately 5 or more, approximately 10 or more, approximately 15 or more, approximately 50 or less, approximately 40 or less, approximately 30 or less, approximately 20 or less, approximately 10 or less, approximately 2 to approximately 50, approximately 2 to approximately 30, approximately 3 to approximately 50, approximately 3 to approximately 30, approximately 3 to approximately 10, approximately 5 to approximately 25, approximately 10 to approximately 40, or approximately 15 to approximately 50 or more.
[0065]
[0067] The conditions for each step in the densification process 215 may be the same in each iteration, or they may change in different iterations.
[0066]
[0068] During each step, the semiconductor processing chamber, pedestal, or substrate may be maintained at various temperatures. In some embodiments, the temperature of the semiconductor processing chamber, pedestal, or substrate may be maintained at or below approximately 700°C, 650°C, 600°C, 550°C, 500°C, or below. In some embodiments, the temperature of the semiconductor processing chamber, pedestal, or substrate may be maintained at or above approximately 300°C, 350°C, 400°C, 450°C, 500°C, or above. This may accelerate the thermal decomposition of the precursor and enable plasma-free deposition. The pressure may be changed between two consecutive steps. In some embodiments, the temperature may be constant throughout the entire process (e.g., within a range of 50°C).
[0067]
[0069] During each process, the semiconductor processing chamber may be maintained at various pressures under which deposition can be carried out. For example, the pressure in the semiconductor processing chamber may be maintained at about 100 Torr or higher while depositing silicon-containing material, and may be maintained at about 150 Torr or higher, about 200 Torr or higher, about 250 Torr or higher, about 300 Torr or higher, about 350 Torr or higher, about 400 Torr or higher, or higher. Similarly, the pressure in the semiconductor processing chamber may be maintained at about 500 Torr or lower while depositing silicon-containing material, and may be maintained at about 450 Torr or lower, about 400 Torr or lower, about 350 Torr or lower, about 300 Torr or lower, about 250 Torr or lower, about 200 Torr or lower, or lower. The pressure may be changed between two consecutive processes. In some embodiments, the pressure may be constant throughout all processes (e.g., within the range of 50 Torr).
[0068]
[0070] After the completion of the deposition cycle 205, in which the process 210 is repeated iteratively, and prior to the densification process 215, the layers containing silicon-oxygen material (e.g., layers 320a, 320b) may be characterized by thicknesses of approximately 3 Å or more, approximately 5 Å or more, approximately 10 Å or more, approximately 3 Å to approximately 100 Å, approximately 3 Å to approximately 50 Å, approximately 3 Å to approximately 20 Å, approximately 5 Å to approximately 30 Å, approximately 10 Å to approximately 50 Å, or approximately 10 Å to approximately 100 Å. While not limited by theory, it is conceivable that thicker layers of silicon-oxygen material may require higher plasma power and / or longer exposure times to effectively carry out the densification process 215.
[0069]
[0071] Here again, the quality of silicon-oxygen-containing materials can be characterized by compressive stress (where higher compressive stress indicates higher quality), wet etching rate ratio to thermal oxide (WERR) (in 1% HF) (lower WERR indicates higher quality), refractive index (RI) (higher RI indicates higher quality), shrinkage (lower shrinkage indicates higher quality), or any combination thereof. As described above, the conditions of each step in this method (e.g., time, plasma power, etc.) affect the quality of silicon-oxygen-containing materials and densified silicon-oxygen-containing materials.
[0070]
[0072] In this application, higher-stress materials are characterized by having a greater absolute value (positive or negative) of stress than lower-stress materials. By convention, positive stress is characterized as tensile stress, negative stress as compressive stress, and the absence of stress (i.e., 0 GPa) as neutral stress. Positive (i.e., tensile) stress may be characterized by an outward extruding force resulting from the expansion of the material. Negative (i.e., compressive) stress may be characterized by an inward tensile force resulting from the contraction of the material. Silicon-oxygen-containing materials after repeatedly repeated deposition cycles may be characterized by compressive stresses of approximately -100 MPa or higher, approximately -150 MPa or higher, approximately -200 MPa or higher, approximately -250 MPa or higher, approximately -250 MPa to approximately -50 MPa, approximately -225 MPa to approximately -50 MPa, approximately -200 MPa to approximately -50 MPa, approximately -175 MPa to approximately -50 MPa, or approximately -150 MPa to approximately -50 MPa. High-densification silicon-oxygen-containing materials after the deposition cycle can be characterized by compressive stresses of approximately -200 MPa or less, approximately -225 MPa or less, approximately -250 MPa or less, approximately -275 MPa or less, approximately -300 MPa or less, approximately -350 MPa to approximately -200 MPa or less, approximately -325 MPa to approximately -200 MPa or less, approximately -300 MPa to approximately -200 MPa or less, approximately -275 MPa to approximately -200 MPa or less, or approximately -300 MPa to approximately -225 MPa. The improvement in compressive stress from silicon-oxygen-containing material to high-density silicon-oxygen-containing material (calculated as a percentage obtained by dividing the absolute difference between two compressive stresses by the absolute value of the compressive stress of the silicon-oxygen-containing material) can be approximately 10% or more, approximately 20% or more, approximately 30% or more, approximately 40% or more, approximately 50% or more, approximately 10% to approximately 200%, approximately 10% to approximately 100%, approximately 25% to approximately 100%, approximately 50% to approximately 150%, or approximately 75% to approximately 200% or more. Compressive stress can be measured by a method that includes using an ellipsometer to measure the warpage of the wafer before and after deposition. By combining the warpage value with the film thickness, the stress can be calculated.
[0071]
[0073] Silicon-oxygen-containing materials after repeated deposition cycles may be characterized by a WERR (in 1% HF) relative to thermal oxides of approximately 1.5 or higher, approximately 2 or higher, approximately 2.5 or higher, approximately 1.5 to approximately 4, approximately 1.5 to approximately 3, approximately 2 to approximately 4, or approximately 2 to approximately 3. High-densification silicon-oxygen-containing materials after deposition cycles may be characterized by a WERR (in 1% HF) relative to thermal oxides of approximately 2 or less, approximately 1.5 or less, approximately 1 or less, approximately 0.1 to approximately 2, approximately 0.1 to approximately 1.5, approximately 0.1 to approximately 1, or approximately 0.5 to approximately 1.5. The improvement in WERR from silicon-oxygen-containing material to high-density silicon-oxygen-containing material (calculated as a percentage by dividing the absolute difference between the two WERRs by the WERR of the silicon-oxygen-containing material) can be approximately 10% or more, approximately 10% or more, approximately 20% or more, approximately 30% or more, approximately 40% or more, approximately 50% or more, approximately 10% to approximately 200%, approximately 10% to approximately 100%, approximately 25% to approximately 100%, approximately 50% to approximately 150%, or approximately 75% to approximately 200% or more. WERR can be defined as the relative etching rate (e.g., Å / min) of the silicon-oxygen-containing material at 1% HF compared to the etching rate at 1% HF of a thermally grown silicon oxide layer formed on the same substrate. A WERR of 1.0 means that the silicon-oxygen-containing material in question has the same etching rate as the thermal oxide layer, and a WERR greater than 1 means that the silicon-oxygen-containing material is etched at a faster rate than the thermal oxide layer.
[0072]
[0074] The radioisotopes (RI) of silicon-oxygen-containing materials (high-densification or otherwise) correlate with the amount of oxidation in the material; a higher RI indicates higher quality of the silicon-oxygen-containing material. Silicon-oxygen-containing materials after repeated deposition cycles may be characterized by RIs of approximately 1.5 or less, approximately 1.4 or less, approximately 1.3 or less, approximately 1 to approximately 1.5, approximately 1 to approximately 1.4, approximately 1 to approximately 1.3, or approximately 1 to approximately 1.2. High-densification silicon-oxygen-containing materials after deposition cycles may be characterized by RIs of approximately 1.1 or more, approximately 1.3 or more, approximately 1.5 or more, approximately 1.1 to approximately 2, approximately 1.3 to approximately 2, or approximately 1.5 to approximately 2. The improvement in radioisotopes (RI) from silicon-oxygen-containing material to high-density silicon-oxygen-containing material (calculated as a percentage obtained by dividing the absolute difference between the two RIs by the RI of the silicon-oxygen-containing material) can be approximately 10% or more, approximately 20% or more, approximately 30% or more, approximately 40% or more, approximately 50% or more, approximately 10% to approximately 100%, approximately 25% to approximately 100%, or approximately 50% to approximately 100% or more. The refractive index can be measured using an ellipsometer.
[0073]
[0075] Shrinkage of silicon-oxygen-containing materials (high-densification or otherwise) measures the change in thickness of the silicon-oxygen-containing material after annealing, with lower shrinkage indicating higher quality silicon-oxygen-containing material. Silicon-oxygen-containing materials after iteratively repeated deposition cycles can be characterized by shrinkage amounts of approximately 0.3% or less, approximately 0.2% or less, approximately 0.1% or less, approximately 0.01% to approximately 0.3%, approximately 0.01% to approximately 0.2%, or approximately 0.01% to approximately 0.1%. High-densification silicon-oxygen-containing materials after deposition cycles can be characterized by shrinkage amounts of approximately 0.1% or less, approximately 0.08% or less, approximately 0.06% or less, approximately 0.001% to approximately 0.1%, approximately 0.001% to approximately 0.08%, or approximately 0.001% to approximately 0.06%. The improvement in shrinkage from silicon-oxygen-containing material to high-density silicon-oxygen-containing material (calculated as a percentage by dividing the absolute difference between the two shrinkage amounts by the shrinkage amount of the silicon-oxygen-containing material) can be approximately 10% or more, approximately 20% or more, approximately 30% or more, approximately 40% or more, approximately 50% or more, approximately 10% to approximately 100%, approximately 25% to approximately 100%, or approximately 50% to approximately 100% or more. Shrinkage can be determined by comparing the thickness of the silicon-oxygen-containing material before and after annealing at 800°C for 1 hour in 100% nitrogen.
[0074]
[0076] The above description includes numerous details for illustrative purposes to facilitate understanding of the various embodiments of this technology. However, it will be apparent to those skilled in the art that certain embodiments can be implemented without some of these details, or with additional details.
[0075]
[0077] While several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, many well-known processes and elements have not been described in order to avoid unnecessarily obscuring the art of the present invention. Therefore, the above description should not be construed as limiting the scope of the art.
[0076]
[0078] Where a range of values is given, unless explicitly stated otherwise in the context, each intervening value between the upper and lower limits of that range is understood to be specifically disclosed down to the smallest unit of the lower limit. Any narrow range between any stated or unstated intervening values within the stated range, and any other stated or intervening values within that stated range, are also included. The upper and lower limits of such narrower ranges may be individually included in or excluded from that range. Each range in which one, neither, or both of the limit values are included is also included in the Art, provided that there are any limit values specifically excluded within the stated range. Where a stated range includes one or both limit values, it also includes ranges that exclude one or both of the included limit values.
[0077]
[0079] As used herein and in the appended claims, the singular forms "a," "an," and "the" include multiple references unless otherwise explicitly stated in the context. For example, where “silicon-containing precursors” is mentioned, it includes multiple such precursors; where “silicon-containing materials” is mentioned, it includes references to one or more materials and equivalents well known to those skilled in the art, and so on.
[0078]
[0080] Furthermore, the terms “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including,” as used herein and in the claims, are intended to identify the presence of the described feature, integer, component, or action, but not to exclude the presence or addition of one or more other features, integers, components, actions, or groups.
Claims
1. A semiconductor processing method, i) Repeating the deposition cycle x times on a substrate placed within the processing area of a semiconductor processing chamber, wherein 3 ≤ x ≤ 100, and the deposition cycle is i-a) Depositing a silicon-containing material on the substrate, i-b) Purging the processing area after step i-a, i-c) Exposing the silicon-containing material to a first oxygen plasma in order to convert the silicon-containing material to a silicon-oxygen-containing material, wherein the first oxygen plasma is generated at a first plasma output and the exposure is performed over a first time period, and i-d) Purge the processing area after step i-c. This involves repeatedly performing the deposition cycle x times, ii) Optionally, repeat steps i-a and i-b, iii) To produce a high-density silicon-oxygen-containing material, a densification process is performed by exposing the silicon-oxygen-containing material to a second oxygen plasma, wherein the second oxygen plasma is generated at a second plasma output, the exposure is performed over a second time, the first plasma output is lower than the second plasma output, and / or the first time is shorter than the second time. iv) Iteratively executing steps i through iii y times, where 2 ≤ y ≤ 50, and A semiconductor processing method, including the following.
2. The semiconductor processing method according to claim 1, wherein 5 ≤ x ≤ 50.
3. The semiconductor processing method according to claim 1, wherein 3 ≤ y ≤ 10.
4. The semiconductor processing method according to claim 1, wherein the deposition cycle is 3 seconds or less.
5. The semiconductor processing method according to claim 1, wherein the first plasma output is approximately 100W to approximately 2500W, and the second plasma output is approximately 1500W to approximately 2500W.
6. The semiconductor processing method according to claim 1, wherein the first time is approximately 0.1 seconds to approximately 1 second, and the second time is approximately 1 second to approximately 30 seconds.
7. The semiconductor processing method according to claim 1, wherein the substrate defines one or more features along the substrate, and the silicon-oxygen-containing material extends along the substrate within the one or more features.
8. The semiconductor processing method according to claim 1, wherein the pressure in the processing area is maintained at approximately 100 Torr or more while the silicon-containing material is deposited on the substrate.
9. The silicon-containing material is silane (SiH 4 ), disilane (Si 2 H 6 ), silicon tetrachloride (SiCl 4 The semiconductor processing method according to claim 1, comprising a silicon-containing precursor containing one or more of ), tetraethyl orthosilicate (TEOS), and aminosilane, or obtained from said silicon-containing precursor.
10. The semiconductor processing method according to claim 1, wherein the silicon-oxygen-containing material after step i has a thickness of about 3 Å to about 100 Å.
11. The semiconductor processing method according to claim 1, wherein the silicon-oxygen-containing material has a compressive stress of about -225 MPa to about -50 MPa, the high-density silicon-oxygen-containing material has a compressive stress of about -350 MPa to about -200 MPa, and the compressive stress of the silicon-oxygen-containing material is greater than the compressive stress of the high-density silicon-oxygen-containing material.
12. The semiconductor processing method according to claim 1, wherein the silicon-oxygen-containing material has a wet etching rate ratio (WERR) (in 1% HF) of about 1.5 to about 4 for thermal oxides, the high-density silicon-oxygen-containing material has a WERR (in 1% HF) of about 0.1 to about 2 for thermal oxides, and the WERR of the silicon-oxygen-containing material is greater than the WERR of the high-density silicon-oxygen-containing material.
13. The semiconductor processing method according to claim 1, wherein the silicon-oxygen-containing material has a refractive index of about 1 to about 1.5, the high-density silicon-oxygen-containing material has a refractive index of about 1.1 to about 2, and the refractive index of the silicon-oxygen-containing material is smaller than the refractive index of the high-density silicon-oxygen-containing material.
14. A semiconductor processing method, i) Repeating the deposition cycle x times on a substrate within the processing area of a semiconductor processing chamber, wherein 3 ≤ x ≤ 100, and the deposition cycle is i-a) Depositing a silicon-containing material on the substrate, i-b) Purging the processing area after step i-a, i-c) Exposing the silicon-containing material to a first oxygen plasma in order to convert the silicon-containing material to a silicon-oxygen-containing material, wherein the first oxygen plasma is generated at a first plasma output, the exposure is performed for a first time, and in each iteration of the deposition cycle, the first plasma output is approximately 100 W to approximately 2500 W, the first time is approximately 0.2 seconds to 3 seconds, and the exposure of the silicon-containing material is independently selected for each iteration of the deposition cycle. i-d) Purge the processing area after step i-c. This involves repeatedly performing the deposition cycle x times, ii) Optionally, repeat steps i-a and i-b, iii) Performing a densification process to produce a high-density silicon-oxygen-containing material by exposing the silicon-oxygen-containing material to a second oxygen plasma, wherein the second oxygen plasma is generated at a second plasma output, the exposure is performed over a second time, the first plasma output is lower than the second plasma output and / or the first time is shorter than the second time, and in each iteration of the densification process, the second plasma output is approximately 1000W to approximately 2500W, the second time is approximately 1 second to 40 seconds, and each iteration of the densification process is independently selected. iv) While the substrate is maintained within the processing area, the process from i to iii is repeated y times, wherein 2 ≤ y ≤ 50, and the process from i to iii is repeated y times. A semiconductor processing method, including the following.
15. The semiconductor processing method according to claim 14, wherein 5 ≤ x ≤ 50.
16. The semiconductor processing method according to claim 14, wherein 3 ≤ y ≤ 20.
17. The semiconductor processing method according to claim 14, wherein the deposition cycle is 1.5 seconds or less.
18. The semiconductor processing method according to claim 14, wherein the first plasma output is approximately 500W to approximately 2500W, and the second plasma output is approximately 1500W to approximately 2500W.
19. The semiconductor processing method according to claim 14, wherein the first time is approximately 0.1 seconds to approximately 0.7 seconds, and the second time is approximately 3 seconds to approximately 25 seconds.
20. A semiconductor processing method, i) Repeating the deposition cycle x times on a substrate within the processing area of a semiconductor processing chamber, wherein 3 ≤ x ≤ 100, and the deposition cycle is i-a) Depositing a silicon-containing material on the substrate, i-b) After step i-a, the semiconductor processing chamber is purged. i-c) Exposing the silicon-containing material to a first oxygen plasma in order to convert the silicon-containing material to a silicon-oxygen-containing material, wherein the first oxygen plasma is generated at a first plasma output, the exposure is performed over a first time period, and in each iteration of the deposition cycle, the first plasma output and the first time may vary; i-d) Purge the semiconductor processing chamber after step i-c. This involves repeatedly performing the deposition cycle x times, ii) Optionally, repeat steps i-a and i-b, iii) Performing a densification process to produce a high-density silicon-oxygen-containing material by exposing the silicon-oxygen-containing material to a second oxygen plasma, wherein the second oxygen plasma is generated at a second plasma output, the exposure is performed over a second time, and in each iteration of the densification process, the second plasma output and the second time may change, wherein the first plasma output is lower than the second plasma output and / or the first time is shorter than the second time. iv) Iteratively performing steps i through iii while the substrate is maintained within the processing area of the semiconductor processing chamber, wherein 2 ≤ y ≤ 50, and each iteration of steps i through iii generates a layer of the high-density silicon-oxygen-containing material having a thickness of approximately 3 Å to approximately 100 Å. A semiconductor processing method, including the following.