Thin-film transistor and its manufacturing method, display panel

Abstract

This disclosure provides a thin-film transistor, a method for manufacturing the same, and a display panel. The thin-film transistor includes a substrate, an active layer located on the substrate, and a first gate electrode. The active layer includes a first film layer and a second film layer stacked on the substrate, the second film layer is located between the first film layer and the first gate electrode, the first film layer contains oxygen, the second film layer contains a crystalline oxide, and the first and second film layers are formed by simultaneous annealing. In the thin-film transistor, some of the oxygen elements originally present in the first film layer can be replenished in the second film layer by annealing. Therefore, the second film layer does not need to be manufactured in a high-oxygen atmosphere (e.g., high oxygen partial pressure). In this way, conduction of the channel of the thin-film transistor due to an excessively low oxygen content in the second film layer can be avoided, and etching residue can be avoided in the etching process due to an excessively high oxygen content in the second film layer, which makes etching difficult.

Description

Technical Field

[0001] This invention claims the priority of Chinese Patent Application No. 202310790822.3, titled "Thin Film Transistor and Its Manufacturing Method, Display Panel", filed on June 29, 2023, and all the contents of this application are incorporated herein by reference.

[0002] This disclosure relates to the field of display technology, specifically, to thin film transistors, their manufacturing methods, and display panels.

Background Art

[0003] With the development of information technology, the usage rate of electronic display products in daily life is increasing. A thin film transistor is a main switching element in the drive circuit of an electronic display product. However, the active layer in the current thin film transistor is restricted by its own structural design and formation process, making it difficult to guarantee the film formation effect and at the same time guarantee high mobility and high stability, thus limiting the further improvement of the performance of the thin film transistor.

Summary of the Invention

[0004] A first aspect of this disclosure provides a thin film transistor, which includes a substrate, an active layer and a first gate electrode located on the substrate. The active layer includes a first film layer and a second film layer laminated on the substrate. The second film layer is located between the first film layer and the first gate electrode. The first film layer contains oxygen element, the second film layer contains crystalline oxide, and the first film layer and the second film layer are formed by simultaneous annealing.

[0005] In the aspects described above, since annealing can replenish some of the oxygen elements originally present in the first film layer to the second film layer, the second film layer does not need to be manufactured in a high-oxygen atmosphere (e.g., high oxygen partial pressure). In this way, it is possible to avoid channel conduction in thin-film transistors due to an excessively low oxygen content in the second film layer, and to avoid etching residues that occur in the etching process due to an excessively high oxygen content in the second film layer, which makes etching difficult.

[0006] A second aspect of this disclosure provides a display panel which may include the thin-film transistors described in the first aspect above.

[0007] A third aspect of this disclosure provides a method for manufacturing a thin-film transistor, the method comprising: providing a substrate; forming a first pattern layer having an oxygen element on the substrate; forming a second pattern layer by depositing and patterning a semiconductor thin film on the substrate so that the first and second pattern layers are stacked on the substrate and in contact with each other; annealing the first and second pattern layers so that the oxygen element in the first pattern layer diffuses into the second pattern layer, forming a first film layer after the first pattern layer is annealed, forming a second film layer after the second pattern layer is annealed; and forming a first gate electrode by depositing and patterning a conductive material thin film, wherein the second film layer is located between the first film layer and the first gate electrode. [Brief explanation of the drawing]

[0008] [Figure 1] This is a cross-sectional view of a thin-film transistor according to one embodiment of the present disclosure. [Figure 2] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 3] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 4] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 5] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 6] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 7] This is a cross-sectional view of another thin-film transistor according to one embodiment of the present disclosure. [Figure 8] This is a cross-sectional view of an array substrate according to one embodiment of the present disclosure. [Figure 9] This is a schematic diagram of the planar structure of a display panel according to one embodiment of the present disclosure. [Figure 10] This is a cross-sectional view of the display panel shown in Figure 9, along the midline (MN). [Figure 11] This is a flowchart of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 12] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 13] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 14] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 15] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 16] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Figure 17] This is a process diagram of a method for manufacturing a thin-film transistor according to one embodiment of the present disclosure. [Modes for carrying out the invention]

[0009] In the manufacturing process of thin-film transistors, crystalline oxides with high mobility and high stability are selected as channel materials. This is because crystalline oxide materials have a high dielectric constant, which increases the capacitance of the transistor and improves the performance of the thin-film transistor; crystalline oxide materials have a high carrier mobility, which improves the response speed and output power of the thin-film transistor; crystalline oxide materials have high chemical and thermal stability, which ensures the long-term stability and reliability of the thin-film transistor; and crystalline oxide materials can be manufactured using modern manufacturing processes such as chemical vapor deposition, enabling high-precision and high-quality production.

[0010] However, in current processes, in order to ensure high mobility and high stability of crystalline oxides, they are formed in a high oxygen partial pressure environment. However, film layers formed in this manner are difficult to etch (pattern), and residues can easily remain, causing device defects. If the film layer is manufactured in a low oxygen partial pressure environment, channel conduction becomes easier, and leakage current is more likely to occur in thin-film transistors.

[0011] Embodiments of this disclosure provide a thin-film transistor, a method for manufacturing the same, and a display panel to solve at least the technical problems described above. The thin-film transistor includes a substrate, an active layer located on the substrate, and a first gate electrode. The active layer includes a first layer and a second layer stacked on the substrate, the second layer is located between the first layer and the first gate electrode, the first layer contains oxygen, and the second layer contains a crystalline oxide. In this design, the active layer needs to be annealed, and in the annealing process, oxygen originally present in the first layer can be replenished to the second layer. Therefore, the second layer does not need to be manufactured in a high-oxygen atmosphere (e.g., high oxygen partial pressure). In this way, conduction of the channel of the thin-film transistor due to an excessively low oxygen content in the second layer can be avoided, and etching residue can be avoided in the etching process due to an excessively high oxygen content in the second layer, which makes etching difficult.

[0012] Hereinafter, with reference to the drawings, a thin-film transistor and its manufacturing method, as well as a structure related to a display panel, in at least one embodiment of the present disclosure will be described. In these embodiments, a spatial orthogonal coordinate system is established with reference to the surface on which the substrate of the thin-film transistor is located (e.g., the display surface of the display panel), and the positions of each structure in the thin-film transistor and the display panel will be described. In this spatial orthogonal coordinate system, the X and Y axes are parallel to the substrate, and the Z axis is perpendicular to the substrate.

[0013] As shown in Figure 1, the thin-film transistor 100 includes an active layer 120, a first gate electrode 131, a source electrode 141, and a drain electrode 142. The source electrode 141 and the drain electrode 142 are connected to the active layer 120, while the first gate electrode 131 is separated from the active layer 120. A substrate 110 is used to support the active layer 120, the first gate electrode 131, the source electrode 141, and the drain electrode 142. By controlling the voltage at the first gate electrode 131, a voltage float can be generated in the active layer 120, creating carriers and forming a current path. In this way, the on / off state and the degree of on state of the thin-film transistor 100 can be controlled.

[0014] The active layer 120 includes a first film layer 121 and a second film layer 122 that are stacked together. The second film layer 122 contains a crystalline oxide (semiconductor layer), and the first film layer 121 contains oxygen. The first film layer 121 and the second film layer 122 are formed by simultaneous annealing. In this way, during annealing, the oxygen in the first film layer 121 diffuses into the second film layer 122, thereby reaching the expected oxygen content in the second film layer 122. This gives the second film layer 122 high mobility and high stability, and accordingly, the oxygen content that needs to be included in the second film layer 122 before annealing is reduced. Thus, before annealing, the second film layer 122 is easily etched due to its low oxygen content during manufacturing, thereby preventing the second film layer 122 from remaining after etching.

[0015] In an embodiment of the present disclosure, when the second film layer 122 is located between the first film layer 121 and the first gate electrode 131 as the main film layer constituting the channel in the active layer 120, the distance to the first gate electrode 131 is closer, thereby increasing the sensitivity during the driving of the thin film transistor.

[0016] For example, in at least one embodiment of the present disclosure, as shown in FIG. 1, the thin film transistor 100 may further include a first gate insulating layer 151 and an interlayer insulating layer 160 for defining each structure in the thin film transistor 100. For example, the first gate insulating layer 151 is located between the first gate electrode 131 and the active layer 120 to separate the first gate electrode 131 and the active layer 120, and the interlayer insulating layer 160 is located between the source-drain electrode layer (including the source electrode 141 and the drain electrode 142) and the active layer 120 to separate the source-drain electrode layer and the active layer 120.

[0017] For example, in at least one embodiment of the present disclosure, as shown in FIG. 1, the thin film transistor 100 may further include a buffer layer 170 located between the substrate 110 and the active layer 120. The buffer layer 170 can block harmful ions that penetrate from the substrate 110 into the active layer 120.

[0018] In addition, in an embodiment of the present disclosure, the first film layer may provide an oxygen element to the second film layer during annealing, and the specific material of the first film layer is not limited. Hereinafter, different selections of the material of the first film layer and the structure of the thin film transistor in the corresponding selections will be exemplarily described.

[0019] In some embodiments of the present disclosure, as shown in FIG. 1, the first film layer 121 can be a semiconductor layer, and it is a film layer formed by annealing a non-crystalline oxide film layer, that is, a semiconductor layer formed of a non-crystalline oxide material.

[0020] During annealing, the chemical bonds within molecules in amorphous oxides become unstable, leading to the release of oxygen ions. Additionally, at high temperatures, the number of active sites on the oxide surface increases, facilitating chemical reactions with other molecules, thus resulting in further loss of oxygen ions.

[0021] Furthermore, the mobility of the first film layer, which is composed of amorphous oxide, is lower than that of the second film layer, which is composed of crystalline oxide. Therefore, the second film layer is used to form a channel, and that is, when the thin-film transistor is in operation (for example, when it is turned on), a two-dimensional electron gas (carrier) is formed in the second film layer. For example, the two-dimensional electron gas accumulates on the surface of the second film layer facing the gate electrode (for example, the first gate electrode).

[0022] For example, as shown in Figure 1, if the first film layer 121 is a semiconductor layer, the first film layer 121 and the second film layer 122 can be manufactured using the same patterning process to reduce the manufacturing process flow of the active layer 120. In this case, the patterns of the first film layer 121 and the second film layer 122 are nearly identical; that is, the orthographic projection of the first film layer 121 on the substrate 110 matches the orthographic projection of the second film layer 122 on the substrate 110.

[0023] In the embodiments of this disclosure, two objects whose projections "coincide" have the same planar shape, equal area, and are directly opposite each other along the direction of projection (the direction of orthographic projection is the direction of the Z axis).

[0024] In the embodiments of this disclosure, if the first film layer is a semiconductor layer and the thin-film transistor contains only one gate electrode (first gate electrode), the thin-film transistor may be a top-gate type thin-film transistor or a bottom-gate type thin-film transistor, specifically as follows.

[0025] For example, in some embodiments of this disclosure, as shown in Figure 1, when the first film layer 121 is a semiconductor layer, the first film layer 121 is located between the second film layer 122 and the substrate 110, that is, the thin-film transistor 100 is a top-gate thin-film transistor.

[0026] For example, in some other embodiments of the present disclosure, as shown in Figure 2, when the first film layer 121 is a semiconductor layer, the second film layer 122 is located between the first film layer 121 and the substrate 110, i.e., the thin-film transistor 100 is a bottom-gate thin-film transistor.

[0027] For example, as shown in Figure 2, if the thin-film transistor 100 is a bottom-gate thin-film transistor, the orthographic projection of the active layer 120 on the substrate 110 lies within the orthographic projection of the first gate electrode 131 on the substrate 110. In this way, the adverse effect on the flatness of the active layer 120 caused by the provision of the first gate electrode 131 can be avoided. Furthermore, the first gate electrode 131 can block light rays transmitted from the substrate 110 side, thereby reducing the problem of photogenerated carriers in the active layer 120. In addition, the first gate electrode 131 can block harmful ions from entering the active layer 120 from the substrate 110.

[0028] When the first film layer is composed of an amorphous oxide, both the first and second film layers are formed in an environment with a constant oxygen partial pressure (e.g., physical vapor deposition, physicochemical vapor deposition, etc.). Therefore, by controlling the oxygen partial pressure environment during the deposition of the first and second film layers, the oxygen content in the initial state of film formation of the first and second film layers can be controlled, and the amount of diffusible oxygen element can be controlled under the annealing conditions of the first film layer.

[0029] For example, in some embodiments of this disclosure, when the first film layer contains an amorphous oxide, the partial oxygen pressure at which the amorphous oxide film layer forming the first film layer is deposited by annealing is greater than the partial oxygen pressure at which the semiconductor film layer forming the second film layer is deposited by annealing. Thus, the first film layer formed under high oxygen partial pressure conditions contains more easily separable oxygen elements, which are more easily removed during annealing, thereby allowing the oxygen elements within it to diffuse into the second film layer.

[0030] For example, the partial oxygen pressure at which the amorphous oxide film layer forms the first film layer through annealing is 30% to 90%, and the partial oxygen pressure at which the semiconductor film layer forms the second film layer through annealing (for example, the second pattern layer described later) is 10% to 60%.

[0031] "Oxygen partial pressure" refers to the partial pressure occupied by oxygen gas in a gas mixture at a specific temperature and environment. For example, in some embodiments of this disclosure, the gas mixture used for oxygen partial pressure is oxygen gas and an inert gas (e.g., argon gas), and the oxygen partial pressure represents the ratio of the pressure supplied by the oxygen gas to the pressure of the gas mixture.

[0032] If the material of the first film layer includes an amorphous oxide, the specific type of amorphous oxide is not limited and can be determined according to the requirements of the actual process. For example, the material of the first film layer may include at least one of In, Ga, and Zn. For example, the first film layer may be a quaternary material, i.e., it may contain four different elemental materials. Exemplarily, the material of the first film layer may include IGZO. For example, selectively, the material of the first film layer may be further doped with at least one of Fe, Cu, Al, Zr, and Ti.

[0033] If the material of the second film layer includes a crystalline oxide, the specific type of crystalline oxide is not limited and can be determined according to the requirements of the actual process. For example, the material of the second film layer may include at least one of In, Sn, Ga, Zn, etc. For example, the second film layer may be a ternary material, i.e., it may contain three different elemental materials. Exemplarily, the material of the second film layer may include ITO, IZO, or IGO. For example, selectively, the material of the second film layer may be further doped with at least one of Fe, Cu, Al, Zr, or Ti. The material film layer used to manufacture the second film layer may be an amorphous oxide film layer or a crystalline oxide film layer before annealing.

[0034] In the embodiments of this disclosure, the thickness range of the first and second film layers may all be 40 to 250 angstroms, for example, 150 angstroms, 200 angstroms, etc., and the specific thickness can be designed according to the requirements of the actual process and is not limited to the above range.

[0035] In some other embodiments of this disclosure, as shown in Figure 3, the first film layer 121 is a film layer formed by annealing an oxygen-enriched oxide film layer. The oxygen element in the oxygen-enriched oxide readily separates to form oxygen ions, which then diffuse into the surroundings.

[0036] In the embodiments of this disclosure, if the first film layer is an oxygen-enriched oxide before annealing and the thin-film transistor contains only one gate electrode (first gate electrode), the thin-film transistor may be a top-gate type thin-film transistor or a bottom-gate type thin-film transistor, specifically as follows.

[0037] For example, in some embodiments of the present disclosure, as shown in Figure 3, if the first film layer 121 is an oxygen-enriched oxide film layer before annealing, the first film layer 121 is located between the second film layer 122 and the substrate 110, and the orthographic projection of the second film layer 122 on the substrate 110 is located within the orthographic projection of the first film layer 121 on the substrate 110, i.e., the thin-film transistor 100 is a top-gate thin-film transistor.

[0038] For example, in some other embodiments of the present disclosure, if the first film layer is an oxygen-enriched oxide film layer before annealing, the second film layer can be located between the first film layer and the substrate, i.e., the thin-film transistor is a bottom-gate thin-film transistor. For example, in this situation, the first film layer can cover only the channel portion of the second film layer (overlapping with the first gate electrode) so that the source and drain electrodes are in direct contact with the second film layer. Alternatively, the first film layer completely covers the second film layer, but via holes are provided in the first film layer, and the source and drain electrodes are connected to the second film layer through these via holes.

[0039] An "oxygen-enriched oxide" is an oxide with a high oxygen content in the compound. These compounds typically contain a large number of oxygen atoms and have active chemical properties, making them prone to oxygen depletion during the annealing process. In the embodiments of this disclosure, the material of the oxygen-enriched oxide is not limited and can be selected according to the requirements of the actual process. For example, the oxygen-enriched oxide may include at least one of iron oxides, copper oxides, aluminum oxides, aluminum oxides, zirconium oxides, titanium oxides, and the like.

[0040] In some other embodiments of this disclosure, as shown in Figure 4, the first film layer 121 is configured as a substrate layer containing oxygen ions, and the substrate layer covers the substrate 110 and contains oxygen ions in at least a portion of its area. The region of the substrate layer containing oxygen ions can be the first film layer 121, that is, the orthographic projection of the second film layer 122 on the substrate 110 at least partially overlaps with the orthographic projection of the region of the substrate layer containing oxygen ions on the substrate 110. For example, oxygen ions can be implanted into the substrate layer by an ion implantation method such that the region of the substrate layer overlapping with the second film layer 122 has oxygen ions.

[0041] For example, in some embodiments, as shown in Figure 4, when the first film layer 121 is configured as a substrate layer containing oxygen ions, the entire region of the substrate layer contains oxygen ions. For example, during the manufacture of a thin-film transistor, a full-layer substrate layer is deposited on the substrate, and then the second film layer 122 is manufactured after the substrate layer is enriched with oxygen ions. In this situation, the first film layer 121 is considered to be a full-surface film layer covering the substrate 110.

[0042] For example, in some embodiments, as shown in Figure 5, when the first film layer 121 is configured as a substrate layer containing oxygen ions, the region of the substrate layer that coincides with the second film layer 122 contains oxygen ions, and the portion of the substrate layer containing oxygen ions is the first film layer 121. For example, during the manufacture of a thin-film transistor, the entire substrate layer is deposited on the substrate, and then oxygen ions are added to a portion of the substrate layer before manufacturing the second film layer 122. Of these, the region containing oxygen ions and the second film layer 122 almost coincide. In this situation, the first film layer 121 coincides with the second film layer 122. Furthermore, during annealing, the oxygen ions contained in the substrate layer can all be used to diffuse into the second film layer 122 without penetrating into other film layers and becoming liberated, thus not adversely affecting the performance of the thin-film transistor or other elements (e.g., elements in a display panel).

[0043] For example, as shown in Figure 5, if the first film layer 121 is configured as a substrate layer containing oxygen ions, the first film layer 121 is located between the second film layer 122 and the substrate 110, that is, the thin-film transistor is at least a top-gate thin-film transistor (it can also be designed as, for example, a dual-gate thin-film transistor).

[0044] For example, as shown in Figure 5, if the first film layer 121 is configured as a substrate layer containing oxygen ions, the substrate layer can be designed as an inorganic layer. The inorganic layer has high density, improves surface defects in the substrate 110, and can block harmful ions in the substrate 110. In this case, the substrate layer is actually filled with a buffer layer 170, that is, in this design, the first film layer 121 and the buffer layer 170 are integrated together to reduce the number of modules required for design.

[0045] For example, if the base layer serves as a buffer layer, the material of the base layer may be silicon nitride, silicon oxide, silicon nitride oxide, etc.

[0046] In at least one embodiment of the present disclosure, as shown in Figure 6, the active layer 120 may further include a third film layer 123, the third film layer 123 located between the second film layer 122 and the first gate electrode 131, and the third film layer 123 is an amorphous oxide film layer formed by annealing. In this way, when annealing is performed, the oxygen elements in the first film layer 121 and the third film layer 123 located on both sides of the second film layer 122 can simultaneously diffuse into the second film layer 122, thereby increasing the efficiency of oxygen elements entering the second film layer 122, and the first film layer 121 and the third film layer 123 can block both sides of the second film layer 122, thereby reducing the risk of harmful ions entering the second film layer 122.

[0047] Furthermore, the mobility of the third film layer, which is composed of amorphous oxide, is lower than that of the second film layer, which is composed of crystalline oxide. Therefore, the second film layer is still used to form the channel.

[0048] For example, in some embodiments of this disclosure, as shown in Figure 6, when the third film layer is a semiconductor material (amorphous oxide film layer), the third film layer 123 and the second film layer 122 can be manufactured using the same patterning process, thereby reducing the manufacturing process flow of the active layer 120. In this case, the orthographic projection of the third film layer 123 on the substrate 110 coincides with the orthographic projection of the second film layer 122 on the substrate 110. For example, furthermore, the orthographic projections of the first film layer 121, the second film layer 122 and the third film layer 123 on the substrate 110 coincide, i.e., the first film layer 121, the second film layer 122 and the third film layer 123 are formed using the same patterning process, thus preventing the second film layer 122 from coming into contact with other materials (e.g., photoresist) and becoming contaminated (e.g., ion intrusion).

[0049] Furthermore, in order to ensure electrical connection between the active layer and the source and drain electrodes, it is necessary to dope both ends of the second film layer (e.g., high-concentration doping) to make it conductive. In this case, it is necessary to ensure that the first and third film layers do not adversely affect the doping of the second film layer.

[0050] For example, in at least one embodiment of the present disclosure, as shown in Figure 6, when the first film layer 121, the second film layer 122, and the third film layer 123 are sequentially laminated on the substrate 110, the partial oxygen pressure of the amorphous oxide film layer forming the third film layer 123 by annealing is greater than the partial oxygen pressure of the semiconductor film layer forming the second film layer 122 by annealing, and less than the partial oxygen pressure of the amorphous oxide film layer forming the first film layer 121 by annealing. In this way, it is possible to avoid the difficulty of high-concentration doping to both ends of the second film layer 122 due to an excessively high oxygen content in the third film layer 123.

[0051] For example, the partial oxygen pressure of the amorphous oxide film layer forming the third film layer through annealing is 15% to 85%.

[0052] If the material of the third film layer includes an amorphous oxide, the specific type of amorphous oxide is not limited and can be determined according to the requirements of the actual process. For example, the material of the third film layer may include at least one of In, Ga, and Zn. For example, the third film layer is a quaternary material, and exemplary, the material of the third film layer may include IGZO. For example, selectively, the material of the third film layer may be further doped with at least one of Fe, Cu, Al, Zr, and Ti.

[0053] In the embodiments of this disclosure, the thickness range of the third film layer may be 40 to 250 angstroms, for example, 150 angstroms, 200 angstroms, etc., and the specific thickness can be designed according to the requirements of the actual process and is not limited to the above range.

[0054] In the embodiments of this disclosure, the active layer may be provided as a laminate consisting of four or more additional film layers, the properties of which the additionally provided film layers may be similar to those of the first and third film layers, thereby allowing more oxygen elements to diffuse into the second film layer. For example, these additionally added film layers can be located between the second film layer and the substrate so as not to interfere with the doping process of the second film layer.

[0055] In at least one embodiment of the present disclosure, as shown in Figure 7, the thin-film transistor 100 can be designed as a dual-gate thin-film transistor to improve the response speed of the thin-film transistor. For example, the thin-film transistor 100 may include a second gate electrode 132, the second gate electrode 132 located on the side of the active layer 120 away from the first gate electrode 131.

[0056] Furthermore, for the first and second gate electrodes, in order to block the active layer and ensure the flatness of the active layer, the area of ​​one of them located between the active layer and the substrate must be larger than the area of ​​the active layer. For example, as shown in Figure 7, the second gate electrode 132 is located between the active layer 120 and the substrate 110, and the orthographic projection of the active layer 120 on the substrate 110 is located within the orthographic projection of the second gate electrode 132 on the substrate 110.

[0057] For example, as shown in Figure 7, if a second gate electrode 132 is provided, the thin-film transistor 100 may further include a second gate insulating layer 152 located between the active layer 120 and the second gate electrode 132.

[0058] In the embodiments of this disclosure, whether or not two gate electrodes are provided in the thin-film transistor is not limited by the number of film layers in the active layer, but can be selected according to actual needs. For example, if a second gate electrode is not provided, a second gate electrode may still be provided on the side of the active layer away from the first gate electrode, thereby improving the response speed of the thin-film transistor.

[0059] At least one embodiment of the present disclosure provides an array substrate. As shown in Figure 8, the array substrate may include a drive circuit layer 10 which includes a plurality of pixel drive circuits, each pixel drive circuit which includes a plurality of thin-film transistors 100, and at least one of the thin-film transistors is the thin-film transistor in the above-described embodiment.

[0060] For example, the pixel driving circuit may include multiple transistors (TFTs) and capacitors, and can be formed in various forms such as 2T1C (i.e., two transistors (TFTs) and one capacitor (C)), 3T1C, or 7T1C. The pixel driving circuit is connected to a light-emitting element (see light-emitting element 200 in the embodiment described later) and controls the on / off state and luminescence brightness of the light-emitting element.

[0061] For example, in at least one embodiment of the present disclosure, as shown in Figure 8, the array substrate may further include a planarization layer 180 and an anode 210 located in the planarization layer 180, the planarization layer 180 is provided with via holes, a pixel driving circuit is provided corresponding to the anode 210, and the source electrode or drain electrode of one thin-film transistor in the pixel driving circuit is connected to the corresponding anode 210 via the via hole.

[0062] At least one embodiment of the present disclosure provides a display panel. As shown in Figures 9 and 10, the display panel includes a display function layer 20 and an array substrate 10 in the above-described embodiment. The display panel can be divided into a display area 1 and a frame area 2 located on at least one side of the display area, the display area 1 having a plurality of subpixels R, G, and B arranged in a row. The display function layer 20 is located on the array substrate 10 and includes a plurality of light-emitting elements 200, the light-emitting elements 200 being physical light-emitting structures for the subpixels R, G, and B. For example, the light-emitting elements 200 located at subpixels R, G, and B are designed to emit red light (R), green light (G), and blue light (B), respectively. For example, the light-emitting elements 200 are connected to a pixel driving circuit in the array substrate 100.

[0063] The light-emitting element 200 may include an anode 210, a light-emitting functional layer 230, and a cathode 220 that are sequentially stacked on an array substrate. The light-emitting functional layer 230 may include a first common layer 231, a light-emitting layer 232, and a second common layer 233 that are sequentially stacked on the anode 210. For example, the first common layer 231 may include a hole injection layer, a hole transport layer, and may further include an electron blocking layer. For example, the second common layer 233 may include an electron injection layer, an electron transport layer, and may further include a hole blocking layer.

[0064] For example, as shown in Figure 10, the display panel may further include a pixel definition layer 300, which includes a plurality of apertures for defining the positions of light-emitting elements, for example, the light-emitting layer of each light-emitting element 200 is located in the aperture.

[0065] For example, as shown in Figure 10, the display panel may further include a sealing layer 30 to cover the display function layer 20 and protect the light-emitting element 200. For example, the sealing layer 30 may include a first inorganic sealing layer 31, an organic sealing layer 32, and a second inorganic sealing layer 33 that are sequentially laminated on the display function layer 20.

[0066] For example, in embodiments of the present disclosure, the display panel may further include functional structures such as a touch function layer, a polarizing plate, a lens layer, and a cover plate located on the display side (e.g., above the sealing layer).

[0067] For example, in embodiments of this disclosure, the display panel may be any product or component having a display function, such as a television, digital camera, mobile phone, wristwatch, tablet, laptop computer, or navigation system.

[0068] At least one embodiment of the present disclosure provides a method for manufacturing the thin-film transistors described in the embodiments described above. As shown in Figure 11, the manufacturing method may include the following steps S100 to S300.

[0069] In S100, a substrate is provided, a first pattern layer having an oxygen element is formed on the substrate, and a second pattern layer is formed by depositing and patterning a semiconductor thin film on the substrate, so that the first pattern layer and the second pattern layer are stacked on the substrate and in contact with each other.

[0070] In S200, the first and second pattern layers are annealed so that the oxygen element in the first pattern layer diffuses into the second pattern layer, a first film layer is formed after the first pattern layer is annealed, a second film layer is formed after the second pattern layer is annealed, and the second film layer contains a crystalline oxide.

[0071] Whether or not a semiconductor material crystallizes during annealing is determined by the structure and chemical composition of the material. Specifically, with respect to amorphous semiconductor materials, some amorphous semiconductor materials do not crystallize during the annealing process, while others undergo re-arrangement of crystals and re-crystallization during the annealing process, thereby forming orderly arranged crystal grains. Therefore, in the embodiments of this disclosure, the material for the second pattern layer (semiconductor thin film) can be selected as either a crystalline oxide or an amorphous oxide, depending on the requirements of the actual process. If an amorphous oxide is selected, the material for the second pattern layer must be such that it can complete crystallization during annealing.

[0072] In S300, a first gate electrode is formed by depositing and patterning a conductive material thin film, and a second film layer is located between the first film layer and the first gate electrode.

[0073] In this manufacturing method, since oxygen is replenished in the second film layer (second pattern layer) by annealing, the second film layer does not need to be manufactured in a high-oxygen atmosphere (e.g., high oxygen partial pressure). In this way, conduction of the channel of the thin-film transistor due to an excessively low oxygen content in the second film layer can be avoided, and etching residue can be avoided in the etching process due to an excessively high oxygen content in the second film layer, which makes etching difficult.

[0074] For example, in at least one embodiment of the present disclosure, step S100 described above may include obtaining a first pattern layer by depositing and patterning a first amorphous oxide thin film. That is, the material of the first pattern layer for forming the first film layer is a semiconductor material (amorphous oxide). In this design, the specific materials and formation environment of the first and second film layers can be found in the relevant descriptions in the embodiments described above and will not be repeated here.

[0075] For example, in some embodiments of the present disclosure, when step S100 described above is performed, the conditions provided are that a first amorphous oxide thin film is deposited in an environment of a first oxygen partial pressure, and a semiconductor thin film is deposited in an environment of a second oxygen partial pressure, where the first oxygen partial pressure is greater than the second oxygen partial pressure.

[0076] For example, the partial pressure of oxygen I is 30% to 90%, and the partial pressure of oxygen II is 10% to 60%.

[0077] For example, in some embodiments of this disclosure, the step of forming a first pattern layer having an oxygen element on a substrate may include depositing an oxygen-enriched oxide film layer and patterning a first amorphous oxide thin film to obtain the first pattern layer. For explanations relating to the formation of the first film layer by annealing the oxygen-enriched oxide film layer, refer to the relevant explanations in the above embodiments and will not be repeated here.

[0078] For example, in at least one embodiment of the present disclosure, the manufacturing method may further include: depositing and patterning a second amorphous oxide thin film to obtain a third pattern layer, wherein the first, second, and third pattern layers are stacked on a substrate, with the second pattern layer positioned between the first and third pattern layers and in contact with the third pattern layer; and simultaneously annealing the third pattern layer in a process of annealing the first and second pattern layers such that the third pattern layer forms a third film layer. In this design, the specific material and formation environment of the third film layer can be found in the relevant descriptions in the embodiments described above and will not be repeated here.

[0079] For example, a second amorphous oxide thin film can be deposited in an environment with a third partial pressure of oxygen, where the first partial pressure of oxygen is greater than the third partial pressure of oxygen, and the third partial pressure of oxygen is greater than the second partial pressure of oxygen. For example, the third partial pressure of oxygen is between 15% and 85%.

[0080] In at least one embodiment of this disclosure, the manufacturing method may further include forming a second gate electrode by depositing and patterning a conductive material thin film on a substrate, wherein the second gate electrode is formed on the side of the active layer away from the first gate electrode. The structure when the thin-film transistor is formed as a dual-gate thin-film transistor can be found in the relevant descriptions in the embodiments described above and will not be repeated here.

[0081] The following describes the steps for manufacturing a thin-film transistor in at least one embodiment of this disclosure, using the manufacturing of a thin-film transistor as shown in Figure 7 as an example, and specifically refers to the process steps shown in Figures 12 to 17, which will be described later.

[0082] As shown in Figure 12, a substrate 110 is provided, and an insulating material film layer and a conductive material thin film are sequentially deposited on the substrate 110, with the insulating material film layer forming a buffer layer 170, and a patterning process is performed on the conductive material thin film to form a second gate electrode 132.

[0083] In embodiments of this disclosure, the patterning process may be a photolithography patterning process, which may include, for example, applying a photoresist to a structural layer to be patterned, exposing the photoresist using a mask plate, developing the exposed photoresist to obtain a photoresist pattern, etching the structural layer using the photoresist pattern (wet etching or dry etching is selectable), and selectively removing the photoresist pattern. If the material of the structural layer includes a photoresist, the structural layer can be directly exposed with a mask plate to form the desired pattern.

[0084] As shown in Figures 12 to 13, an insulating material film layer is deposited on the substrate 110 on which the second gate electrode 132 is formed to form a second gate insulating layer 152, and then a first amorphous oxide thin film 121a, a semiconductor thin film 122a, and a second amorphous oxide thin film 123a are sequentially deposited on the second gate insulating layer 152. The first amorphous oxide thin film 121a, the semiconductor thin film 122a, and the second amorphous oxide thin film 123a are formed in environments where the oxygen partial pressures are 30% to 90%, 10% to 60%, and 15% to 85%, respectively.

[0085] As shown in Figures 13 and 14, a patterning process is performed on the first amorphous oxide thin film 121a, the semiconductor thin film 122a, and the second amorphous oxide thin film 123a to form the first pattern layer 121b, the second pattern layer 122b, and the third pattern layer 123b, respectively.

[0086] As shown in Figures 14 and 15, annealing is performed on the first pattern layer 121b, the second pattern layer 122b, and the third pattern layer 123b to form the first film layer 121, the second film layer 122, and the third film layer 123, respectively. The first film layer 121, the second film layer 122, and the third film layer 123, which are stacked together, constitute a single active layer 120.

[0087] For example, in the steps shown in Figure 15, the doping process can be carried out so that both ends of the second film layer 122 become conductive.

[0088] As shown in Figures 15 to 16, an insulating material is deposited on the active layer 120 to form a first gate insulating layer 151, and then a conductive material thin film is deposited on the first gate insulating layer 151, and a patterning process is performed on the conductive material thin film to form a first gate electrode 131.

[0089] As shown in Figures 16 to 17, an insulating material film layer is deposited on the substrate 110 on which the first gate electrode 131 is formed to form an interlayer insulating layer 160.

[0090] As shown in Figures 17 and 7, a patterning process is performed on the interlayer insulating layer 160 to form via holes, a conductive material thin film is deposited on the interlayer insulating layer 160, and a patterning process is performed on the conductive material thin film to form source electrodes 141 and drain electrodes 142. The source electrodes 141 and drain electrodes 142 are connected to the active layer 120 via via holes in the interlayer insulating layer 160.

Claims

1. The substrate comprises an active layer and a first gate electrode located on the substrate, The active layer includes a first film layer and a second film layer laminated on the substrate, the second film layer being located between the first film layer and the first gate electrode. The first film layer contains oxygen, and the second film layer contains a crystalline oxide. Thin-film transistor.

2. The first film layer is a semiconductor layer, and the first film layer is an amorphous oxide film layer. The second film layer is located between the first film layer and the substrate, or the first film layer is located between the second film layer and the substrate. The thin-film transistor according to claim 1.

3. The orthographic projection of the first film layer on the substrate coincides with the orthographic projection of the second film layer on the substrate. The thin-film transistor according to claim 2.

4. The material of the first film layer includes at least one of In, Ga, and Zn. and / or, the material of the second film layer includes at least one of In, Sn, Ga, and Zn. The thin-film transistor according to claim 2 or 3.

5. The first film layer is doped with at least one of Fe, Cu, Al, Zr, and Ti. and / or, the second film layer is doped with at least one of Fe, Cu, Al, Zr, and Ti. The thin-film transistor according to claim 4.

6. The first film layer is configured as a substrate layer containing oxygen ions, and the substrate layer covers the substrate and contains oxygen ions in at least a portion of its region. The orthographic projection of the second film layer on the substrate at least partially overlaps with the orthographic projection of the region containing the oxygen ions in the substrate layer. The substrate layer contains oxygen ions in all regions, or the region that coincides with the second film layer contains oxygen ions, and the portion of the substrate layer containing oxygen ions is the first film layer. The thin-film transistor according to claim 5.

7. The first film layer is located between the second film layer and the substrate, and the substrate layer is an inorganic layer. The thin-film transistor according to claim 6.

8. The active layer further comprises a third membrane layer, The third film layer is located between the second film layer and the first gate electrode, and the third film layer is an amorphous oxide film layer. The thin-film transistor according to claim 7.

9. The orthographic projection of the third film layer on the substrate coincides with the orthographic projection of the second film layer on the substrate. The thin-film transistor according to claim 8.

10. The material of the third film layer includes at least one of In, Ga, and Zn. The thin-film transistor according to claim 8.

11. The material of the third film layer is doped with at least one of Fe, Cu, Al, Zr, and Ti. The thin-film transistor according to claim 10.

12. The active layer further includes a second gate electrode located on the side opposite to the first gate electrode, A thin-film transistor according to any one of claims 1 to 11.

13. A thin-film transistor according to any one of claims 1 to 12, Display panel.

14. To provide a substrate, A first pattern layer having an oxygen element is formed on the substrate, and a second pattern layer is formed by depositing and patterning a semiconductor thin film on the substrate, wherein the first pattern layer and the second pattern layer are stacked on the substrate and in contact with each other. Annealing the first pattern layer and the second pattern layer so that the oxygen element in the first pattern layer diffuses into the second pattern layer, wherein the first pattern layer forms a first film layer after annealing, the second pattern layer forms a second film layer after annealing, and the second film layer contains a crystalline oxide. This includes forming a first gate electrode by depositing and patterning a conductive material thin film, The second film layer is located between the first film layer and the first gate electrode. A method for manufacturing thin-film transistors.

15. Forming the first pattern layer having an oxygen element on the aforementioned substrate is, This includes obtaining the first pattern layer by depositing and patterning a first amorphous oxide thin film, The first amorphous oxide thin film is deposited in an environment with a first partial oxygen pressure, and the semiconductor thin film is deposited in an environment with a second partial oxygen pressure, where the first partial oxygen pressure is greater than the second partial oxygen pressure. The manufacturing method according to claim 14.

16. The first oxygen partial pressure is 30% to 90%, and the second oxygen partial pressure is 10% to 60%. The manufacturing method according to claim 15.

17. A third pattern layer is obtained by depositing and patterning a second amorphous oxide thin film, wherein the first pattern layer, the second pattern layer, and the third pattern layer are stacked on the substrate, and the second pattern layer is located between the first pattern layer and the third pattern layer and is in contact with the third pattern layer. The process of annealing the first pattern layer and the second pattern layer further includes simultaneously annealing the third pattern layer such that the third pattern layer forms a third film layer, The second amorphous oxide thin film is deposited in an environment with a third oxygen partial pressure, where the first oxygen partial pressure is greater than the third oxygen partial pressure, and the third oxygen partial pressure is greater than the second oxygen partial pressure. The manufacturing method according to claim 16.

18. The third oxygen partial pressure is between 15% and 85%. The manufacturing method according to claim 17.

19. Forming the first pattern layer having an oxygen element on the aforementioned substrate is, This includes depositing an oxygen-enriched oxide film layer and patterning the first amorphous oxide thin film to obtain the first pattern layer, The second film layer is formed between the first film layer and the substrate, or The first film layer is formed between the second film layer and the substrate, and the orthogonal projection of the second film layer on the substrate is located within the orthogonal projection of the first film layer on the substrate. The manufacturing method according to claim 14.

20. The method further includes forming a second gate electrode by depositing and patterning a thin film of conductive material, The second gate electrode is formed on the side of the active layer that is away from the first gate electrode. The manufacturing method according to any one of claims 14 to 19.

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