Improved direct block copying system and method for color difference coding

Abstract

A method and system for video processing are provided. In some embodiments, the method includes: (i) identifying the division mode of the current block of video; (ii) identifying the corresponding luminance blocks of the current block; and (iii) determining, based on a predefined order, whether one or more of the corresponding luminance blocks are coded in a predetermined mode. In response to determining that one or more of the corresponding luminance blocks are coded in a predetermined mode, the method further includes applying the predetermined mode to the chrominance blocks of the current block.

Description

Technical Field

[0001] The present disclosure relates to imaging and video coding technologies. More specifically, a video coding scheme including an improved direct block copy scheme for chrominance component coding will be described.

Background Art

[0002] In existing video compression methods, for example, in High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC), blocking and quantization processing are performed during coding. The HEVC and VVC standards define a block-based spatio-temporal hybrid prediction coding scheme. During coding, each picture is first divided into square blocks called Coding Tree Units (CTUs). Each CTU within a picture can be divided into one or more Coding Units (CUs) that can be used for prediction and transformation. Various prediction tools including inter-prediction tools and intra-prediction tools can be used. When single-tree partition is used, the chrominance components and the corresponding luminance components use the same partitioning scheme. When dual-tree partition is used, the chrominance components and the corresponding luminance components can use different partitioning schemes. In the existing methods, no tool is provided that enables an effective filtering and fusion scheme for dual-tree partition. Therefore, it is advantageous to provide an improved system and method to meet the aforementioned needs.

Summary of the Invention

[0003] This disclosure relates to a system and method of direct block copying for intra-color difference prediction in video coding. More specifically, the system and method enable copying a reference color difference block based on the block vector of the corresponding luminance block in order to code a color difference block. The proposed method can be used to improve the bitstream structure, syntax, constraints, and mapping for generating a decoded picture.

[0004] For example, the system and method enable the following: If the corresponding luminance block is coded as a filtered intra-template-matching-prediction (IntraTMP) block or a filtered intra-block-copy (IBC) block, then a direct block vector (DBV) chrominance reference block can also be filtered.

[0005] In some embodiments, when dual-tree splitting is enabled for an intra-prediction slice, five corresponding luminance blocks of a chrominance block can be checked according to a predefined order. For example, these five corresponding luminance blocks may be the center (C) block, the top-left (TL) block, the top-right (TR) block, the bottom-left (BL) block, and the bottom-right (BR) block. Embodiments of these five corresponding luminance blocks will be described in detail with reference to Figure 5A.

[0006] If any of these five blocks are coded in IBC mode or IntraTMP mode, the first luminance block coded in IBC mode or IntraTMP mode in a predefined order can be selected as the corresponding luminance block, and the current chrominance block becomes subject to DBV mode. When DBV mode is selected, the block vector (BV) of the corresponding luminance block (e.g., the first luminance block) can be used to derive a scaled BV for the current chrominance block based on the chrominance format (e.g., "4:2:0"). Furthermore, in some embodiments, the coding mode of the corresponding luminance block can be inherited to code the current chrominance block.

[0007] For example, if the corresponding luminance block is coded as a filtered IntraTMP block or a filtered IBC block, the DBV chrominance reference block is also further filtered. Embodiments of the filtering process will be described in detail with reference to Figures 1A and 1B.

[0008] This disclosure also provides a method for applying to a single-tree splitting scheme. When single-tree splitting is enabled for an intra-slice, the corresponding luminance block of the current chrominance block can be checked. If the corresponding luminance block is coded in IBC mode or IntraTMP mode, the current chrominance block can be coded in direct mode (DM). The BV of the luminance block can be used to derive a scaled BV for the current chrominance block based on the chrominance format (e.g., "4:2:0"). Furthermore, the coding mode of this luminance block can be inherited to code the current chrominance block. For example, if this luminance block is coded as a filtered IntraTMP block or a filtered IBC block, the DM chrominance reference block can also be further filtered.

[0009] In some embodiments, if a luminance block is predicted by a filtered IntraTMP block or a filtered IBC block, the filter parameters of the luminance block may also be inherited for coding the corresponding chrominance block. In some embodiments, if a luminance block is predicted by a filtered IntraTMP block or a filtered IBC block, the filter parameters may be derived based on the template of the current chrominance block and the template of the DBV or DM reference chrominance block indicated by the corresponding parameter (e.g., “bvC” as described in detail with reference to Figure 5B).

[0010] In some embodiments, if the corresponding luminance blocks are coded in IntraTMP fusion mode (for example, by fusing "N" luminance blocks to generate a luminance prediction block), then the coding of the current color difference block can also follow the IntraTMP fusion process to generate a color difference prediction block. More specifically, if predefined weights and "N" luminance blocks are used together, then the same weights and "N" corresponding color difference blocks can be used together to generate a color difference prediction.

[0011] This disclosure also relates to systems and methods for coding and / or encoding. Intra-template matching prediction (IntraTMP), the current coding unit (CU) is predicted by a block of samples from the current picture. During the encoding and / or decoding process, the coding device (e.g., encoder or decoder) identifies an IntraTMP predictor block by comparing a predefined “L-shaped” or other shaped template of reconstructed samples adjacent to the current CU with a template of the same shape of a predictor within a predetermined search area. If the template is “L-shaped,” both the adjacent samples to the left and above the current CU are used as the template for the current CU. Similarly, the adjacent samples to the left and above a predictor are used as the candidate template for each predictor. The IntraTMP predictor block is identified by finding the best candidate template that matches the current CU template. Embodiments of the “L-shaped” template are described in detail with reference to Figure 2. In some embodiments, different template shapes are available, in which case a different template shape is used as the candidate template for each predictor.

[0012] The following systems and methods are described in relation to video processing, but in some embodiments, the systems and methods are also applicable to other image processing systems and methods. This disclosure also provides frameworks / networks that can be trained by deep learning and / or artificial intelligence schemes.

[0013] In some embodiments, the methods for a "picture" or "frame" described herein can be applied to a portion or region of the "picture" or "frame." For example, the methods described herein can be applied to a subpicture, a region of a picture (e.g., a region showing an object of interest), and so on.

[0014] In some embodiments, the method may be implemented by a tangible, non-temporary computer-readable medium. The medium stores processor instructions, and when these instructions are executed by one or more processors, the one or more processors are caused to perform one or more aspects / features of the method described herein. In other embodiments, the method may be implemented by a system comprising a computer processor and a non-temporary computer-readable storage medium. The medium stores instructions, and when these instructions are executed by the computer processor, the computer processor is caused to perform one or more operations of the method described herein. [Brief explanation of the drawing]

[0015] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings are briefly described below. These accompanying drawings only illustrate some aspects or embodiments of this disclosure, and those skilled in the art can derive other drawings from these accompanying drawings without creative effort. [Figure 1A] Figure 1A is a schematic diagram showing a system according to one or more embodiments of the present disclosure. [Figure 1B] Figure 1B is a schematic diagram showing a decoding system according to one or more embodiments of the present disclosure. [Figure 2] Figure 2 is a schematic diagram showing an IntraTMP process according to one or more embodiments of the present disclosure. [Figure 3] Figure 3 is a schematic diagram illustrating an intra-prediction process according to one or more embodiments of the present disclosure. [Figure 4A] Figure 4A is a schematic diagram showing an IntraTMP process in a search area according to one or more embodiments of the present disclosure. [Figure 4B] Figure 4B is a schematic diagram showing an example of the division of a CTU into a CU according to one or more embodiments of the present disclosure. [Figure 4C] Figure 4C is a schematic diagram showing a slice division according to one or more embodiments of the present disclosure. [Figure 4D]Figure 4D is a schematic diagram showing tile division according to one or more embodiments of the present disclosure. [Figure 4E] Figure 4E is a schematic diagram showing the division of a picture into a wavefront according to one or more embodiments of the present disclosure. [Figure 5A] Figure 5A is a schematic diagram showing the check of five corresponding luminance blocks of a color difference block according to one or more embodiments of the present disclosure. [Figure 5B] Figure 5B is a schematic diagram showing the prediction process of a direct block vector (DBV) method according to one or more embodiments of the present disclosure. [Figure 6] Figure 6 is a schematic diagram showing a wireless communication system according to one or more embodiments of the present disclosure. [Figure 7] Figure 7 is a block diagram showing a terminal device according to one or more embodiments of the present disclosure. [Figure 8] Figure 8 is a block diagram showing an electronic device according to one or more embodiments of the present disclosure. [Figure 9] Figure 9 is a flowchart of a method according to one or more embodiments of the present disclosure.

Embodiments for Carrying out the Invention

[0016] To more clearly explain the technical solutions in the embodiments of the present disclosure, the accompanying drawings will be briefly described below. These accompanying drawings only show some aspects or embodiments of the present disclosure, and those skilled in the art can derive other drawings from these accompanying drawings without creative efforts.

[0017] FIG. 1A is a schematic diagram showing a system 100A according to one or more embodiments of the present disclosure. The system 100A has an IntraTMP module 101 (within the Intra Prediction module 102). The IntraTMP module 101 is configured to perform a template search process in a search area (e.g., FIGS. 2 and 4A). In some embodiments, in addition to the IntraTMP module 101, the Intra Prediction module 102 can also include other intra prediction modules / tools. By way of example, these can include Intra Block Copy (IBC), Spatial Geometric Partitioning Mode (SGPM), Matrix-based Intra Prediction (MIP), a normal angle intra prediction tool, and the like.

[0018] The system 100A includes a video sequence 10 that is input to the Intra Prediction module 102 and / or the Inter Prediction module 103. A residual R can be generated by subtracting the output of the Intra Prediction module 102 and / or the Inter Prediction module 103 from the current CU of the video sequence 10. Thereafter, the residual R can be sent to the transform module 104. The output of the transform module 104 can be quantized by the quantization module 105. The output of the quantization module 105 can be sent to the inverse quantization module 106 and the inverse transform module 107.

[0019] As shown in Figure 1A, in the adder 108, the outputs of the intra-prediction module 102 and / or the inter-prediction module 103 can be added with the output of the inverse transform module 107. The added result can then be sent to the in-loop filter 109. The output of the in-loop filter 109 can then be sent to the decoded picture buffer 110 for further processing by the inter-prediction module 103. System 100A uses loop filters to suppress compression artifacts and reduce distortion. These loop filters include a deblocking filter (DBF), a sample adaptive offset (SAO) filter, and an adaptive loop filter (ALF). In some embodiments, the in-loop filter 109 does not need to include all of the above filters. In some embodiments, the DBF and SAO filters are two filters designed to reduce artifacts caused by the encoding process. The DBF focuses on visual artifacts at block boundaries. Complementarily, the SAO filter reduces artifacts that may arise from the quantization of transformation coefficients within the block. The ALF enhances the adaptive filter of the reconstructed signal, and a Wiener-based adaptive filter can be used to reduce the mean square error (MSE) between the original and reconstructed samples. System 100A further includes an entropy coding module 111 configured to perform data compression before generating the bitstream 11.

[0020] Direct Block Vector (DBV) mode - Dual Tree Splitting

[0021] The intra-prediction module 102 is configured to allow copying a reference chrominance block based on the block vector of the corresponding luminance block for encoding the chrominance block. For example, the intra-prediction module 102 allows the DBV chrominance reference block to be filtered if the corresponding luminance block is coded as a filtered IntraTMP block or a filtered IBC block.

[0022] In some embodiments, when dual-tree splitting is enabled for intra-predictive slices, several (e.g., five) corresponding luminance blocks of a chrominance block can be checked according to a predefined order. For example, as shown in Figure 5A, these five corresponding luminance blocks may be the center (C) block, the upper left (TL) block, the upper right (TR) block, the lower left (BL) block, and the lower right (BR) block. In some embodiments, the predefined order may be the center (C) block, the upper left (TL) block, the upper right (TR) block, the lower left (BL) block, and the lower right (BR) block.

[0023] In some embodiments, if any of these five blocks are coded in IBC mode or IntraTMP mode, the first luminance block coded in IBC mode or IntraTMP mode in a predefined order can be selected as the corresponding luminance block, and the current chrominance block is subject to DBV mode. In other embodiments, other suitable modes besides IBC mode and IntraTMP mode may also be identified and processed in the manner described above.

[0024] When DBV mode is selected, the BV of the corresponding luminance block (e.g., the first luminance block) can be used to derive the BV of the current chrominance block based on the chrominance format (e.g., "4:2:0"). Furthermore, in some embodiments, the coding mode of the corresponding luminance block can be inherited to code the current chrominance block. For example, if the corresponding luminance block is coded as a filtered IntraTMP block or a filtered IBC block, the DBV chrominance reference block is also further filtered.

[0025] Direct Mode (DM) - Single Tree Splitting

[0026] The intra-prediction module 102 is also configured to apply to single-tree splitting schemes. For example, if the intra-prediction module 102 determines that single-tree splitting is enabled for an intra-slice, it can check the corresponding luminance block of the current chrominance block. If the corresponding luminance block is coded in IBC mode or IntraTMP mode (or other appropriate mode), the current chrominance block can be coded in DM. The BV of the luminance block can be used to derive the BV of the current chrominance block based on the chrominance format (e.g., "4:2:0"). Furthermore, the coding mode of this luminance block can be inherited to code the current chrominance block. For example, if this luminance block is coded as a filtered IntraTMP block or a filtered IBC block, the DM chrominance reference block is also filtered.

[0027] In some embodiments, if a luminance block is predicted by a filtered IntraTMP block or a filtered IBC block, the filter parameters of the luminance block may also be inherited for coding the corresponding chrominance block. In some embodiments, if a luminance block is predicted by a filtered IntraTMP block or a filtered IBC block, the filter parameters may be derived based on the template of the current chrominance block and the template of the DBV or DM reference chrominance block indicated by the corresponding parameter (e.g., “bvC” as described in detail with reference to Figure 5B).

[0028] In some embodiments, if the corresponding luminance blocks are coded in IntraTMP fusion mode (for example, by fusing "N" luminance blocks to generate a luminance prediction block), the coding of the current color difference block can also follow the IntraTMP fusion process to generate a color difference prediction block. More specifically, if predefined weights and "N" luminance blocks are used together, the same weights and "N" corresponding color difference blocks can be used together to generate a color difference prediction.

[0029] Figure 1B is a schematic diagram showing a decoding system 100B including an IntraTMP module according to one or more embodiments of the present disclosure. System 100B includes an entropy decoding module 121, an inverse quantization module 122, and an inverse transform module 123, configured to process a bitstream 12. Decoding system 100B further includes an inter-prediction module 124 and an intra-prediction module 125 (corresponding, for example, to an intra-prediction module 102 on the encoding side). The inter-prediction module 124 and the intra-prediction module 125 are configured to process the bitstream 12 and produce a decoded video 13. The intra-prediction module 125 can perform functions similar to those of the intra-prediction module 102 on the decoding side.

[0030] As shown in Figure 1B, the decoding system 100B further includes a picture buffer 126 and a loop filter 127 to facilitate the aforementioned decoding task. As shown in Figure 1B, in the adder 128, the outputs of the intra-prediction module 125 and / or the inter-prediction module 124 can be added with the output of the inverse transform module 123. The addition result is then sent to the loop filter 127 to generate the decoded video 13.

[0031] Figure 2 is a schematic diagram showing a candidate prediction value 201 for a CU for an IntraTMP process according to one or more embodiments of the present disclosure. As shown in Figure 2, the candidate prediction value 201 includes a first region 203 located above the CU and a second region 205 located to the left of the CU. The first region 203 and the second region 205 form an "L-shape". In some embodiments, the candidate prediction value 201 may have other shapes (e.g., including either the first region 203 or the second region 205). The candidate prediction value 201 is configured to be used to search for a matching candidate MC from a plurality of candidates (e.g., candidates A, B, C shown in Figure 2) within a search area (e.g., the current CTU, the reconstruction area, etc.). In the illustrated embodiment, candidate B is selected as the matching candidate BC. The IntraTMP process then uses the data (e.g., pixels) enclosed by the candidate prediction value 201 as reference data for the CU.

[0032] In some embodiments, the optimal candidate template can be identified by finding a template that minimizes the sum of absolute differences (SAD) or the sum of absolute transformed differences (SATD), or by comparing hash values ​​between templates. In some embodiments, several search algorithms can be used. In some embodiments, the search algorithm through a predetermined search area can be exhaustive (e.g., scanning templates within the search area using sample resolution shifts) or fast (e.g., performing a coarse search first, and then a local refinement search around the best matching result obtained from the coarse search). The search algorithm can be executed identically in both the encoder and decoder. Thus, the IntraTMP prediction is implicitly recognized in both the encoder and decoder without requiring signaling to the bitstream.

[0033] Figure 3 is a schematic diagram illustrating an intra-prediction process according to one or more embodiments of the present disclosure. In the embodiments, an exemplary search area of ​​the IBC tool is shown. As shown in the figure, in the example of Figure 3, the intra-block copy process can search the decoded current CTU row 307 and the upper CTU row 305. In the illustrated embodiment, for example, the predicted value block 309 is shown in the upper CTU row 305. The predicted value block 309 is indicated by a block vector 311. The block vector 311 points from the upper left corner of the current CU 301 to the upper left corner of the predicted value block 309. A particular block vector is not "legal" if it points to an unavailable area (e.g., an undecoded area). For example, the illegal block vector 313 shown in Figure 3 points to an area after the current CU 301 in the decoding order.

[0034] In some embodiments, block vectors 311 can be signaled to indicate which blocks within the same picture are to be copied as predicted values ​​for the current block. Signaling of block vectors 311 can be performed by signaling a block vector difference (BVD) to the bitstream. This allows the block vector 311 to be identified by adding the BVD to the predicted block vector value. In some embodiments, if a block vector from a previous CU perfectly matches the current block vector, it can be signaled by a merge flag.

[0035] As shown in the figure, the block vector 311 points to a location within the same picture to indicate a block of samples of the same size as the current CU301. This block of samples is used as the predicted value block 309 for the current CU301. In some embodiments, the block vector 311 can be subject to several constraints. For example, the block vector 311 needs to point to a block of samples within the current picture that is available for intra-prediction. As another example, the block vector may be confined to a search area defined by a search tool (e.g., an IBC tool), and the search area may be smaller than the current picture. For example, in VVC, the IBC search area is the current CTU and the previous CTU. In some embodiments, if the CTU size is 256x256, the IBC search area is the current CTU row and the uppermost CTU row. Or, if the CTU size is 128x128 or less, the IBC search area is the current CTU row and the uppermost two CTU rows. In some embodiments, the system can execute an IntraTMP process and, in addition, restrict the IntraTMP search area to the search area of ​​an existing tool (e.g., an IBC tool) for the purpose of aligning buffering requirements.

[0036] Figure 4A is a schematic diagram showing a search sequence of the IntraTMP process in a search region 400 according to one or more embodiments of the present disclosure. The search region 400 is identified by setting a maximum length for the IntraTMP block vector. As shown in Figure 4A, the block vector points from the upper left corner of the current CU to the upper left corner of the IntraTMP predicted value. The maximum length of the IntraTMP block vector is (searchRangeWidth, searchRangeHeight), with searchRangeWidth being the maximum value horizontally and searchRangeHeight being the maximum value vertically. The values ​​of searchRangeWidth and searchRangeHeight are identified as functions of the width BlkW and height BlkH of the current CU. For example, in one embodiment, they may be identified according to the following numbers (A) and (B).

number

number

[0037] In numbers (A) and (B), "max (x, y)" returns the maximum value between "x" and "y".

[0038] In some embodiments, in numbers A and B, "a" may be set to "5" and "minSearchRange" may be set to "128". In other embodiments, different values ​​may be used for "a" and "minSearchRange".

[0039] The current upper-left corner of CU is represented by the coordinate position (currCuX, currCuY) in the coordinate system. In this coordinate system, (0, 0) is the upper-left corner of the picture, and increasing the horizontal and vertical coordinate positions indicates movement to the right and downwards, respectively. The parameter "currCuX" represents the horizontal position, and "currCuY" represents the vertical position. In this coordinate system, the upper-left corner of search region 400 is located at (currCuX - searchRangeWidth, currCuY - searchRangeHeight). The upper-right corner of search region 400 is located at (currCuX + BlkW - 1 + searchRangeWidth, currCuY - searchRangeHeight). Theoretically, the lower-left corner of search region 400 can be located at (currCuX - searchRangeWidth, currCuY + BlkH - 1 + searchRangeHeight).

[0040] In the example in Figure 4A, the lower left corner is confined by the lower boundary of the left CTU. The lower right corner of search region 400 can theoretically be located at (currCuX + BlkW - 1 + searchRangeWidth, currCuY + BlkH - 1 + searchRangeHeight). The IntraTMP block vector cannot point to the right or downwards, because the right and downwards are regions located after the current CU in the coding order within the picture. The lower right boundary of search region 400 depends on the availability of the sample.

[0041] Prior to limitations imposed by sample availability, the search region 400 is theoretically rectangular. In this disclosure, the search region 400 is defined such that a block of samples corresponding to any IntraTMP prediction value fits entirely within the search region 400. As can be understood, equivalent search regions can be defined based on the nature of the objects that need to fit within the search region. For example, if the coordinates pointed to by the IntraTMP block vector need to fit entirely within the search region, a smaller but equivalent search region is defined. Its upper-left, upper-right, lower-left, and lower-right corners are located at (currCuX - searchRangeWidth, currCuY - searchRangeHeight), (currCuX + searchRangeWidth, currCuY - searchRangeHeight), (currCuX - searchRangeWidth, currCuY + searchRangeHeight), and (currCuX + searchRangeWidth, currCuY + searchRangeHeight), respectively.

[0042] In another example, if a sample block and its template corresponding to an arbitrary IntraTMP prediction value must fit entirely within the search area, a larger but equivalent search area is defined. Its top-left, top-right, bottom-left, and bottom-right corners are located at (currCuX - searchRangeWidth - templateWidth, currCuY - searchRangeHeight - templateHeight), (currCuX + BlkW - 1 + searchRangeWidth, currCuY - searchRangeHeight - templateHeight), (currCuX - searchRangeWidth - templateWidth, currCuY + BlkH - 1 + searchRangeHeight), and (currCuX + BlkW - 1 + searchRangeWidth, currCuY + BlkH - 1 + searchRangeHeight), respectively. templateWidth and templateHeight represent the dimensions of the template shape. To ensure clarity, changes in the definition of the search area do not affect the operation of the IntraTMP search algorithm described in this disclosure.

[0043] The availability of the sample further restricts the aforementioned theoretical rectangular search area 400. The availability of the sample depends on two factors: firstly, whether the sample has already been reconstructed, and secondly, whether the sample belongs to a logical unit for which the current CU is permitted to be used.

[0044] To determine whether a sample has already been reconstructed, consider the partitioning structure of the VVC. Each picture is divided into a tiling of square CTUs, and these CTUs are processed in raster scan order. If the intra-prediction method is run on the current CU401 within the current CTU403, then samples belonging to other CTUs preceding the current CTU403 in raster scan order have already been reconstructed and are available for prediction. Samples belonging to CTUs after the current CTU403 in raster scan order have not been reconstructed and are therefore not available.

[0045] Each CTU itself is divided into multiple CUs by a hierarchical structure consisting of quadtree splits, binary tree splits, and ternary tree splits. An example of such a split is shown in Figure 4B. Figure 4B is a schematic diagram showing an example of the splitting of a CTU into CUs according to one or more embodiments of the present disclosure. The scan order of the CUs within the CTU is determined by the split structure. In the case of a single-level split, the partitions are scanned in the following order:

[0046] [1] In the case of horizontal binary or horizontal ternary tree partitioning, the order is from left to right.

[0047] [2] In the case of a vertical binary or vertical ternary tree partition, the order is from top to bottom.

[0048] [3] In the case of a quadtree partition, the order is top left, top right, bottom left, bottom right.

[0049] If a partition contains further hierarchical divisions, all CUs within that partition are scanned before proceeding to the CUs of the next partition. Figure 4B shows an example where a CTU is divided into 15 CUs, numbered 1 through 15 to indicate the scan order. When the intra-prediction method is performed on the current CU within the current CTU, samples belonging to other CUs within the current CTU that precede the current CU in the current CTU's partition scan order have already been reconstructed and are available for prediction. Samples belonging to the current CU, or samples belonging to CUs that follow the current CU in the current CTU's partition scan order, have not been reconstructed and are therefore not available.

[0050] According to the above definition, samples belonging to the CTU preceding the current CTU in the raster scan order are considered to have already been reconstructed. However, these samples are not necessarily available for intra-prediction. To be considered available for prediction, these samples must also belong to a logical unit in which the current CU is permitted to be used. The picture is divided into sub-picture partitions, each sub-picture partition containing an integer number of CTUs. Figure 4C shows an example where the picture is divided into multiple slices. Samples belonging to slices other than the slice containing the current CU are not available for intra-prediction. This restriction makes it possible to decode slices independently.

[0051] Figure 4D is a schematic diagram illustrating a tile division according to one or more embodiments of the present disclosure. Figure 4D shows an example where a picture is divided into multiple tiles. Samples belonging to tiles other than the tile containing the current CU are not available for intra-prediction. This restriction allows for independent decoding of the tiles.

[0052] Figure 4E shows an example where a picture is divided into wavefronts. Each wavefront corresponds to one row of CTUs, and the dependencies between CTU rows are reduced, allowing each wavefront to be decoded in parallel with a staggered relationship to one another. In the example in Figure 7, the wavefronts are processed with a delay of one CTU. CTUs are indicated by their position on the CTU grid, where CTU_(i, j) indicates the CTU located in the i-th CTU row and the j-th CTU column. Next, when wavefront parallel processing is enabled by setting the sequence parameter set (SPS) syntax element "sps_entropy_coding_sync_enabled_flag", if the CTU column position of CTU_(a, b) is greater than the CTU column position of the current CTU_(i, j) (i.e., b > j), then CTU_(a, b) is not available.

[0053] In intra-prediction methods, how to handle the unavailability of reference samples necessary for prediction varies depending on the method. If such samples are unavailable, the method may simply be invalidated. Alternatively, extrapolation may be performed for the unavailable samples, such as boundary extension.

[0054] Figure 5A is a schematic diagram showing the checking of five corresponding luminance blocks of a chrominance block according to one or more embodiments of the present disclosure. Figure 5A shows a dual-tree splitting mode. In the illustrated embodiment, the entire luminance tree of the luminance CU is decoded first, and then the chrominance tree is decoded. Thus, when identifying the chrominance intra-prediction mode of the chrominance CU, information such as the selected luminance intra-prediction mode of the co-located luminance CU is available. A DBV flag may be signaled to indicate that the chrominance CU copies the IntraTMP or IBC block vector of the co-located luminance CU and scales this luminance BV based on the chrominance format (e.g., "4:2:0") to obtain the chrominance BV. The chrominance BV is then used to copy a reference chrominance block from the previously decoded chrominance region. Similarly, in the case of single-tree partitioning, the DM flag may be signaled to indicate that the chrominance CU copies the block vector of the color caution's luminance CU, and that this luminance BV is scaled based on the chrominance format (e.g., "4:2:0") to obtain the chrominance BV. The chrominance BV is then used to copy the reference chrominance block from the previously decoded chrominance region.

[0055] As shown in Figure 5A, five corresponding luminance blocks of a color difference block can be checked according to a predefined order. For example, as shown in Figure 5A, these five corresponding luminance blocks may be the center (C) block, the upper left (TL) block, the upper right (TR) block, the lower left (BL) block, and the lower right (BR) block. In some embodiments, the predefined order may be the center (C) block, the upper left (TL) block, the upper right (TR) block, the lower left (BL) block, and the lower right (BR) block.

[0056] In some embodiments, if any of these five blocks are coded in IBC mode or IntraTMP mode, the first luminance block coded in IBC mode or IntraTMP mode in a predefined order can be selected as the corresponding luminance block, and the current chrominance block is subject to DBV mode. In other embodiments, other suitable modes besides IBC mode and IntraTMP mode may also be identified and processed in the manner described above.

[0057] When DBV mode is selected, the BV of the corresponding luminance block (e.g., the first luminance block) can be used to derive the BV of the current chrominance block. Furthermore, in some embodiments, the coding mode of the corresponding luminance block can be inherited to code the current chrominance block. For example, if the corresponding luminance block is coded as a filtered IntraTMP block or a filtered IBC block, the DBV chrominance reference block can also be further filtered.

[0058] Figure 5B is a schematic diagram illustrating the prediction process of a direct block vector (DBV) method according to one or more embodiments of the present disclosure. The BV of a selected luminance block (e.g., the first luminance block) is denoted as "bvL". The selected luminance block may be coded in IBC mode or IntraTMP mode. The BV "bvL" can be used to derive the BV of the current chroma difference block, i.e., "bvC". bvC[0] and bvC[1] represent the horizontal and vertical pixel displacements relative to the upper-left corner of the current chroma difference block, respectively. In some embodiments, "bvC" can be derived by scaling "bvL" by the chroma sampling ratio. For example, if the chroma difference format is 4:2:0 and the chroma difference components are subsampled by a factor of 2 in both the vertical and horizontal directions, then "bvC" is obtained as "0.5*bvL".

[0059] In some embodiments, as shown in Figure 5B, a reference chrominance block, denoted by the derived "bvC", can be directly copied to predict the current chrominance block. Assume that the coordinates of the upper-left corner of the current chrominance block are (xCb, yCb). A reference chrominance block means a block of the same size, whose upper-left corner coordinates may be (xCb + bvC[0], yCb + bvC[1]).

[0060] Figure 6 is a schematic diagram showing a wireless communication system 600 according to one or more embodiments of the present disclosure. The wireless communication system 600 can implement the framework described herein. As shown in Figure 6, the wireless communication system 600 may include a network device (or base station) 601. Examples of network devices 601 include a base transceiver station (BTS), a node B (NB), an evolved node B (eNB or eNodeB), a next-generation node B (gNB or gNodeB), a wireless fidelity (Wi-Fi) access point (AP), and the like. In some embodiments, the network device 601 may include a relay station, an access point, an in-vehicle device, a wearable device, and the like. The network device 601 may include a wireless connectivity device for a communication network. Examples include Global System for Mobile Communications (GSM) networks, Code Division Multiple Access (CDMA) networks, Wideband CDMA (WCDMA) networks, Long-Term Evolution (LTE) networks, Cloud Radio Access Network (CRAN), IEEE 802.11-based networks (e.g., Wi-Fi networks), Internet of Things (IoT) networks, device-to-device (D2D) networks, next-generation networks (e.g., 5G networks), and future evolved Public Land Mobile Networks (PLMN).5G systems or networks may also be called New Radio (NR) systems or networks.

[0061] In Figure 6, the wireless communication system 600 also includes a terminal device 603. The terminal device 603 may be an end-user device configured to facilitate wireless communication. The terminal device 603 may be configured to wirelessly connect to a network device 601 (for example, via wireless channel 605) according to one or more corresponding communication protocols / standards. The terminal device 603 may be mobile or fixed. The terminal device 603 may be user equipment (UE), access terminal, user unit, user station, mobile site, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user equipment. Examples of terminal devices 603 include modems, cellular phones, smartphones, cordless phones, Session Initiation Protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, Internet of Things (IoT) devices, devices used in 5G networks, and devices used in public land mobile networks.

[0062] For illustrative purposes, Figure 6 shows only one network device 601 and one terminal device 603 in the wireless communication system 600. However, in some examples, the wireless communication system 600 may include additional network devices 601 and / or terminal devices 603.

[0063] Figure 7 is a block diagram showing a terminal device 703 (for example, capable of implementing the methods described herein) according to one or more embodiments of the present disclosure. As shown in the figure, the terminal device 703 includes a processing unit 710 and a memory 720. The processing unit 710 may be configured to execute instructions and / or other aspects of the above embodiments corresponding to the methods described herein. To be understood, the processor 710 in embodiments of the present art may be an integrated circuit chip having signal processing capabilities. In implementation, the steps in the above-described methods may be completed using hardware integrated logic circuits in the processor 710 or instructions in software form. The processor 710 may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. The methods, steps and logic block diagrams disclosed in embodiments of the present art may be implemented or executed. The general-purpose processor 710 may be a microprocessor, or the processor 710 may be any ordinary processor. The steps of the method disclosed in embodiments of this technology may be performed or completed directly by a decoding processor implemented as hardware, or by a combination of hardware and software modules in the decoding processor. The software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers, or mature storage media in the art. The storage medium is located in memory 720. The processor 710 reads information from memory 720 and, together with its hardware, completes the steps of the method.

[0064] To ensure understanding, the memory 720 in embodiments of this technology may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random-access memory (RAM) used as an external cache. As an illustrative but non-exclusive explanation, various forms of RAM are available, including, for example, static random-access memory (SRAM), dynamic random-access memory (DRAM), synchronous dynamic random-access memory (SDRAM), double data rate synchronous dynamic random-access memory (DDR SDRAM), enhanced synchronous dynamic random-access memory (ESDRAM), synchronous link dynamic random-access memory (SLDRAM), and direct rambus random-access memory (DRRAM).The memory in the systems and methods described herein includes, but is not limited to, the above-mentioned memory and any other suitable type of memory. In some embodiments, the memory may be a non-temporary computer-readable storage medium that stores instructions that can be executed by the processor.

[0065] Figure 8 is a block diagram showing an electronic device 800 according to one or more embodiments of the present disclosure. The electronic device 800 may include one or more components, including a processing component 802, a memory 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0066] The processing component 802 typically controls the overall operation of an electronic device, such as operations related to display, telephone calls, data communication, camera operation, and recording. The processing component 802 may include one or more processors 820 to implement all or some of the steps of the above method by executing instructions. Furthermore, the processing component 802 may include one or more modules to facilitate interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.

[0067] Memory 804 is configured to store various types of data to support the operation of the electronic device. Examples of such data include instructions for any application program or method running on the electronic device, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented by any type of volatile or non-volatile memory device, or a combination thereof, examples of which include SRAM, EEPROM, EPROM, PROM, ROM, magnetic memory, flash memory, magnetic disk, or optical disk.

[0068] The power supply component 806 supplies power to various components of the electronic device. The power supply component 806 may include a power management system, one or more power supplies, and other components related to the generation, management, and distribution of power for the electronic device.

[0069] The multimedia component 808 may include a screen that provides an output interface between the electronic device and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a TP, the screen may be implemented as a touchscreen to receive input signals from the user. The TP may include one or more touch sensors for sensing touches, slides, and gestures in the TP. The touch sensors may not only sense the boundary of a touch or slide operation but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 may include a front camera and / or a rear camera. When the electronic device is in an operating mode such as shooting mode or video mode, the front camera and / or the rear camera may receive external multimedia data. The front camera and the rear camera may each be a fixed optical lens system and may have focusing and optical zoom capabilities.

[0070] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 may include a microphone (MIC). The MIC is configured to receive external audio signals when the electronic device is in an operating mode such as call mode, recording mode, and voice recognition mode. The received audio signals can be stored in memory 804 or transmitted via communication component 816. In some embodiments, the audio component 810 may further include a speaker for outputting audio signals.

[0071] The I / O interface 812 provides an interface between the processing component 802 and a peripheral interface module. The peripheral interface module may be a keyboard, click wheel, buttons, etc. The buttons include, but are not limited to, a home button, volume buttons, a start button, and a lock button.

[0072] The sensor component 814 may include one or more sensors to provide state evaluation of various aspects of an electronic device. For example, the sensor component 814 can detect the on / off state of an electronic device, the relative position between components, etc. Exemplary components include the display and a small keypad of an electronic device. The sensor component 814 may further detect changes in the position of the electronic device or its components, the presence or absence of contact between the user and the electronic device, the orientation or acceleration / deceleration of the electronic device, and temperature changes of the electronic device, etc. The sensor component 814 may include proximity sensors configured to detect the presence of nearby objects without physical contact. The sensor component 814 may further include optical sensors used in imaging applications, such as CMOS (complementary metal oxide semiconductor) or charge-coupled device (CCD) image sensors. In some embodiments, the sensor component 814 may further include accelerometers, gyroscopes, magnetic sensors, pressure sensors, or temperature sensors.

[0073] The communication component 816 is configured to facilitate wired or wireless communication between an electronic device and other equipment. The electronic device can access a wireless network based on a communication standard. Examples include a WiFi network, a 2G (2nd-Generation) or 3G (3rd-Generation) network, or a combination thereof. In an exemplary embodiment, the communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 may further include a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0074] In exemplary embodiments, the electronic device 810 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components, and may be configured to perform the above method.

[0075] In exemplary embodiments, non-temporary computer-readable storage media containing instructions are also provided, such as a memory 804 containing instructions. These instructions are executed by a processing component 802 of an electronic device 800 to implement the methods described herein. For example, non-temporary computer-readable storage media can be ROM, random access memory (RAM), compact disc read-only memory (CD-ROM), magnetic tape, floppy disk, optical data storage device, and the like.

[0076] Figure 9 is a flowchart of a method according to one or more embodiments of the present disclosure. Method 900 can be implemented by a system or apparatus (for example, a system or apparatus having an intra-predictive module as described herein). Method 900 is for processing video. Method 900 may include, in block 901, identifying the splitting mode of the current block of video. In some embodiments, the splitting mode may be a dual-tree splitting mode or a single-tree splitting mode.

[0077] In block 903, method 900 includes identifying the corresponding luminance block of the current chrominance block. In block 905, method 900 continues to determine, based on a predefined order, whether one or more of the corresponding luminance blocks are coded in a predetermined mode. In block 905, in response to identifying that one or more of the corresponding luminance blocks are coded in a predetermined mode, method 900 continues to apply a predetermined mode to the current chrominance block.

[0078] In some embodiments, method 900 may further include (1) identifying the current block splitting mode as a dual-tree split, and (2) processing the chrominance block based on a direct block vector (DBV) chrominance reference block.

[0079] In some embodiments, the method 900 may further include (i) generating a DBV chrominance reference block, and (ii) filtering the DBV chrominance reference block with a filter in response to identifying that one or more of the corresponding luminance blocks have been filtered by the filter.

[0080] In some embodiments, the predetermined mode includes an Intra-Template Matching Prediction (IntraTMP) mode. In some embodiments, the predetermined mode includes an Intra-Block Copy (IBC) mode. In some embodiments, the corresponding luminance blocks include the center block, top-left block, top-right block, bottom-left block, and bottom-right block. In some embodiments, the predetermined order includes the center block, top-left block, top-right block, bottom-left block, and bottom-right block. In other embodiments, the predetermined order can be any appropriate order.

[0081] In some embodiments, method 900 may further include determining whether the first luminance block of one or more luminance blocks among the corresponding luminance blocks is coded in a predetermined mode. In other words, method 900 can determine the predetermined mode using the center block, the upper left block, the upper right block, the lower left block, or the lower right block.

[0082] In some embodiments, method 900 may include (i) identifying the current block division mode as single-tree division, and (ii) processing the chrominance block based on the direct mode (DM). In some embodiments, method 900 may further include filtering the chrominance block with a filter in response to identifying that one or more of the corresponding luminance blocks have been filtered by the filter.

[0083] In some embodiments, the predetermined mode is a fusion mode, which involves fusing "N" original luminance blocks based on predefined weights to produce a corresponding luminance block. In such embodiments, method 900 may further include generating a fused chroma block prediction according to the fusion mode based on predefined weights. <Additional considerations>

[0084] The detailed description of the examples of the disclosed technology above is not intended to be exhaustive or to limit the disclosed technology to the exact forms disclosed above. Specific examples of the disclosed technology are given above for illustrative purposes, but various equivalent modifications are possible within the scope of the described technology, as will be recognized by those skilled in the art. For example, processes and blocks are presented in a specific order, but in alternative embodiments, routines including steps may be executed in a different order, or systems including blocks may be employed in a different order. Also, some processes and blocks may be deleted, moved, added, subdivided, combined, and / or modified to provide alternative embodiments and subcombinations. Each of these processes and blocks may be implemented in a variety of different ways. Also, while processes and blocks may be shown to be executed in series, these processes and blocks may instead be executed or implemented in parallel, or executed at different times. Furthermore, any specific numerical values ​​described herein are illustrative only, and different values ​​or ranges may be adopted in alternative embodiments.

[0085] The detailed description includes numerous specific details to ensure a full understanding of the technology being described. In other embodiments, the technology described herein can be implemented without these specific details. In other examples, detailed descriptions of well-known features, such as certain functions or routines, are omitted to avoid unnecessarily obscuring this disclosure. Expressions such as “one embodiment / example” or “one embodiment / example” in this specification mean that the specific feature, structure, material, or property described is included in at least one embodiment of the technology described. Therefore, the appearance of these expressions in this specification does not necessarily refer to the same embodiment / example. On the other hand, these expressions are not necessarily mutually exclusive. Furthermore, specific features, structures, materials, or properties can be combined in any suitable way in one or more embodiments. It should be understood that the various embodiments shown in the drawings are merely illustrative and are not necessarily drawn to actual size.

[0086] For clarity, some details describing structures and processes, which are well-known and often relevant to communication systems and subsystems, but which could unnecessarily obscure some important aspects of the disclosed technology, are omitted herein. Furthermore, while the following disclosure describes some embodiments of different aspects of this disclosure, some other embodiments may have configurations and components different from those described in this section. Accordingly, the disclosed technology may have other embodiments that have additional elements or that do not have some of the elements described.

[0087] Many embodiments or aspects of the technologies described herein can take the form of computer or processor-executable instructions, including routines performed by a programmable computer or processor. Those skilled in the art will understand that the technologies described herein can be implemented on computer or processor systems other than those shown and described herein. The technologies described herein can be implemented on a dedicated computer or data processor specifically programmed, configured, or constructed to perform one or more of the computer-executable instructions described below. Therefore, the terms “computer” and “processor” as used herein refer to any data processor. Information processed by these computers and processors can be presented on any suitable display medium. Instructions for performing computer or processor-executable tasks can be stored on any suitable computer-readable medium, including hardware, firmware, or a combination of hardware and firmware. Instructions can be stored on any suitable storage device, including, for example, flash drives and / or other suitable media.

[0088] In this specification, the term "and / or" describes a relationship that explains the related objects, and indicates that there are three types of relationships. For example, A and / or B indicates three situations: A exists alone, A and B exist simultaneously, or B exists alone.

[0089] Based on the detailed description above, these and other modifications can be made to the disclosed technology. While the detailed description outlines specific examples and anticipated best practices of the disclosed technology, the disclosed technology is implementable in many ways, no matter how detailed the description may appear in text. System details may vary considerably in specific embodiments, but are still within the scope of the technology described herein. As stated above, any specific terms used to describe particular features or aspects of the disclosed technology are not to be redefined herein to limit the term to the specific characteristics, features, or aspects of the disclosed technology to which it relates. Accordingly, the present invention is not limited to the above and is limited only by the claims. In general, terms used in the claims should not be construed as limiting the disclosed technology to the specific examples disclosed in the specification unless explicitly defined in the detailed description above.

[0090] It will be apparent to those skilled in the art, in conjunction with the examples described in the embodiments disclosed herein, that the units and algorithmic steps can be implemented by electronic hardware, or by a combination of computer software and electronic hardware. Whether these functions are performed by hardware or software will depend on the specific application of the proposed technology and design constraints. Those skilled in the art may implement the described functions using different methods for each specific application, but such implementations should not be considered beyond the scope of this application.

[0091] While certain aspects of the present invention are presented herein in the form of certain claims, the applicant believes that various aspects of the present invention can be expressed in any number of claim forms. Accordingly, the applicant reserves the right to pursue additional claims in either this application or a continuation application after the filing of this application in order to pursue additional claim forms.

Claims

1. A method for decoding video, Identifying the current block splitting mode of the aforementioned video, Identifying the corresponding luminance block in the current color difference block, Based on a predefined order, determine whether one or more of the corresponding luminance blocks are coded in a predetermined mode, In response to identifying that one or more of the corresponding luminance blocks are coded in the predetermined mode, the predetermined mode is applied to the current color difference block. including, A video decoding method characterized by the following:

2. Identifying that the current block's partitioning mode is a dual-tree partition, Processing the color difference block based on a direct block vector (DBV) color difference reference block, Further including, The method according to feature 1.

3. The above DBV color difference reference block is generated, In response to identifying that one or more of the corresponding luminance blocks have been filtered by the filter, the DBV color difference reference block is filtered by the filter, Further including, The method according to feature 2.

4. The aforementioned predetermined modes include the IntraTemplate Matching Prediction (IntraTMP) mode. The method according to feature 1.

5. The aforementioned predetermined modes include intrablock copy (IBC) mode. The method according to feature 1.

6. The corresponding brightness block includes the center block, the top left block, the top right block, the bottom left block, and the bottom right block. The method according to feature 1.

7. The aforementioned predefined order includes starting from the central block, The method according to feature 6.

8. The aforementioned predefined sequence includes ending with the lower right block. The method according to feature 6.

9. The aforementioned predefined order includes the central block, the upper left block, the upper right block, the lower left block, and the lower right block. The method according to feature 6.

10. Based on the aforementioned predefined order, determining whether one or more of the corresponding luminance blocks are coded in the predetermined mode is: Further including determining whether the first luminance block of one or more of the corresponding luminance blocks is coded in the predetermined mode, The method according to feature 1.

11. Identifying that the partitioning mode of the current block is a single-tree partition, Processing the color difference block based on direct mode (DM), Further including, The method according to feature 1.

12. The further step includes filtering the color difference block with the filter in response to identifying that one or more of the corresponding luminance blocks have been filtered by the filter, The method according to 11, characterized by the features described above.

13. The aforementioned predetermined mode is a fusion mode, and the fusion mode indicates that "N" original luminance blocks are fused based on a predetermined weight to generate the corresponding luminance block. The method according to feature 1.

14. The further includes generating fused color difference block predictions according to the fusion mode based on the predefined weights, The method according to the present invention, characterized by the present invention.

15. A video encoding method, Identifying that the current block partitioning mode is a dual-tree partition, Identifying the corresponding luminance block in the current color difference block, Based on a predefined order, determine whether one or more of the corresponding luminance blocks are coded in a predetermined mode, In response to identifying that one or more of the corresponding luminance blocks are coded in the predetermined mode, the predetermined mode is applied to the color difference block. Processing the color difference block based on a direct block vector (DBV) color difference reference block, including, A video encoding method characterized by the following.

16. The aforementioned predetermined modes include the IntraTemplate Matching Prediction (IntraTMP) mode and the IntraBlock Copy (IBC) mode. The method according to the present invention, characterized by the present invention.

17. The corresponding brightness block includes the center block, the top left block, the top right block, the bottom left block, and the bottom right block. The method according to the present invention, characterized by the present invention.

18. The aforementioned predefined order includes the central block, the upper left block, the upper right block, the lower left block, and the lower right block. The method according to the present invention, characterized by the present invention.

19. A video decoding device, Equipped with a processor and memory, The memory is coupled to the processor and configured to store instructions, and when an instruction is executed, Identifying the current block splitting mode of the aforementioned video, Identifying the corresponding luminance block in the current color difference block, Based on a predefined order, determine whether one or more of the corresponding luminance blocks are coded in a predetermined mode, In response to identifying that one or more of the corresponding luminance blocks are coded in the predetermined mode, the predetermined mode is applied to the current color difference block. Execute A video decoding device characterized by the following:

20. A video encoding device, Equipped with a processor and memory, The memory is coupled to the processor and configured to store instructions, and when an instruction is executed, Identifying the current block splitting mode of the aforementioned video, Identifying the corresponding luminance block in the current color difference block, Based on a predefined order, determine whether one or more of the corresponding luminance blocks are coded in a predetermined mode, In response to identifying that one or more of the corresponding luminance blocks are coded in the predetermined mode, the predetermined mode is applied to the current color difference block. Execute A video encoding device characterized by the following.

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