Qubit initialization method and device

Abstract

A method for initializing a qubit, comprising: (i) setting the two-qubit state of a pair of spin qubits to an arbitrary state; (ii) verifying the qubit state associated with the pair of spin qubits for a corresponding target state; and (iii) repeating steps (i) to (ii) in response to determining in step (ii) that the qubit state is not a target state, until it is determined that the qubit state is a target state. Determining that the qubit state is a target state involves performing one or more Pauli spin block (PSB) checks and at least one two-qubit state conversion operation for the pair of spin qubits.

Description

[Technical Field]

[0001] Related applications This application claims priority to Australian Provisional Patent Application No. 2023 / 902138, filed on 3 July 2023, the contents of which are incorporated herein by reference in their entirety. The contents of the document Huang[1] are incorporated herein by reference in their entirety.

[0002] This disclosure relates to qubit initialization in quantum computing devices that can be realized with current quantum technologies, such as metal oxide semiconductor compatible quantum processors. [Background technology]

[0003] Quantum computing is an emerging technology developed to surpass current classical transistor-based computing and enable specific tasks in science, engineering, finance, and defense. While qubits possess rich properties and capabilities, they are more susceptible to noise and more difficult to implement compared to conventional bits.

[0004] Recently, spin qubits in semiconductors have been recognized as a relatively suitable implementation, offering a balanced advantage in gate fidelity, interoperability, and industrial compatibility. The main challenge, to date, has been providing a low-noise environment, which has traditionally relied on cryogenic cooling to tens of millikelvins and operation in high magnetic fields.

[0005] Recent studies in strongly confined quantum dots have demonstrated qubit control and readout that are feasible above 1 Kelvin in low magnetic fields. These relaxed conditions foreshadow significant reductions in cryogenic equipment and electronic hardware costs, and further enable the integration of quantum processors in a single cryogenic equipment environment. Qubit initialization concerns selectively preparing the states of one or more qubits, such as spin states, to target values ​​(i.e., predetermined desired states). The ability to perform high-fidelity qubit initialization is strongly influenced by thermal and magnetic field conditions. Despite improvements in qubit control and readout methods, qubit initialization remains an unresolved challenge.

[0006] Any consideration of documents, actions, materials, devices, articles, etc., included herein is solely for the purpose of providing context for this disclosure. It should not be construed as an admission that any or all of these matters constituted part of the foundation of the prior art in the art relating to this disclosure, or were common general knowledge, prior to the priority date of each claim of this application.

[0007] Throughout this specification, the word “comprise,” or variations such as “comprises” or “comprising,” will be understood to mean the inclusion of the element, component, or step, or group of elements, components, or steps, described herein, but not the exclusion of any other element, component, or step, or group of elements, components, or steps. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] Huang, JY, Su, RY, Lim, WHet al.High-fidelity spin qubit operation and algorithmic initialization above 1 K.Nature 627,772-777(2024).

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[0009] A method for initializing qubits is provided, comprising: (i) setting the two-qubit state of a pair of spin qubits to an arbitrary state; (ii) verifying the qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) repeating steps (i) to (ii) until the qubit state is determined to be a target state, in response to determining in step (ii) that the qubit state is not a target state, wherein determining that the qubit state is a target state includes performing one or more Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation for the pair of spin qubits.

[0010] In some embodiments, the two-qubit state is reset by performing step (i) in response to one or more PSB checks determining that the two-qubit state is not sealed.

[0011] In some embodiments, each PSB check includes performing a readout operation on a pair of spin qubits within the PSB lifetime in order to maintain the two-qubit state in response to the two-qubit state being a sealed state.

[0012] In some embodiments, the qubit state associated with a pair of spin qubits is a single qubit state of one of the pair of spin qubits.

[0013] In some embodiments, the qubit state associated with a pair of spin qubits is a 2-qubit state, and the target state is a sealed state.

[0014] In some embodiments, each two-qubit state transformation operation includes a two-qubit gate configured to transform a two-qubit state from a blocked state to an unblocked state in response to the two-qubit state being in a blocked state and different from the target state.

[0015] In some embodiments, each of the PSB checks is a parity PSB check performed over the two-qubit basis states of |↓↓>, |↓↑>, |↑↓>, and |↑↑>.

[0016] In some embodiments, the target state is an even spin parity state that is one of the |↑↑> and |↓↓> states, and the two-qubit gate transforms the other of the even states |↑↑> and |↓↓> into an odd parity state that is one of the |↑↓> and |↓↑> states.

[0017] In some embodiments, the target state is |↓↓>, and the two-qubit gate is a zero-controlled NOT gate (zCNOT) configured to transform |↑↑> into |↑↓>.

[0018] In some embodiments, if the first PSB check indicates blocking, the two-qubit state is determined to be an even parity state that is one of |↓↓> and |↑↑>, or if the first PSB check indicates no blocking, the two-qubit state is determined to be an odd parity state that is one of |↓↑> and |↑↓>.

[0019] In some embodiments, if the second PSB check indicates blocking, the two-qubit state is determined to be the even parity state |↓↓>, or if the second PSB check indicates no blocking, the two-qubit state is determined to be the odd parity state |↑↓>.

[0020] In some embodiments, each of the PSB checks is a singlet-triplet (ST) PSB check performed over the two-qubit basis states of |↓↓>, |S>, |T0>, and |↑↑>, where the states |S> and |T0> are a singlet state and a triplet state, respectively.

[0021] In some embodiments, determining that a two-qubit state is a target state includes performing, on a pair of spin qubits, a first PSB check, one or more single-qubit rotations on the spin qubits to convert |T0> to |S>, a second PSB check, a two-qubit gate, and a third PSB check.

[0022] In some embodiments, the target state is |↓↓>, and the two-qubit gate is a zero-controlled NOT gate (zCNOT) configured to convert |↑↑> to |S>.

[0023] In some embodiments, if the first PSB check indicates a block, the two-qubit state is determined to be one of |↓↓>, |↑↑>, and |T0>, or if the first PSB check indicates the absence of a block, the two-qubit state is determined to be |S>.

[0024] In some embodiments, if the second PSB check indicates a block, the two-qubit state is determined to be one of |↓↓> and |↑↑>, or if the second PSB check indicates the absence of a block, the two-qubit state is determined to be |S>.

[0025] In some embodiments, if the third PSB check indicates a block, the two-qubit state is determined to be the target state, or if the third PSB check indicates the absence of a block, the two-qubit state is determined to be |S>.

[0026] In some embodiments, a two-qubit state is set in step (i) by pulsing the two spin qubits from a (m+2,n) or (m,n+2) charged state to a (m+1,n+1) charged state (wherein m and n are any even numbers).

[0027] In some embodiments, spin qubits are formed from the electron spins or hole spins of silicon quantum dots.

[0028] Furthermore, a quantum processing device is provided, comprising a plurality of spin qubits and a control configuration including one or more gate electrodes arranged to control the spin states of the plurality of spin qubits, wherein the control configuration is configured to initialize a pair of spin qubits to a target state by (i) setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) verifying the qubit state associated with the pair of spin qubits for a corresponding target state, and (iii) repeating steps (i) to (ii) in response to determining in step (ii) that the qubit state is not a target state, until it is determined that the qubit state is a target state, and determining that the qubit state is a target state involves the control configuration performing one or more Pauli spin block (PSB) checks and at least one two-qubit state conversion operation for the pair of spin qubits.

[0029] In some embodiments, one or more gate electrodes are arranged to set a single-qubit state for each qubit of a pair of spin qubits and to construct a single-qubit logic gate for the pair of spin qubits.

[0030] In some embodiments, one or more gate electrodes are arranged to form a pair of spin qubits by generating an exchange coupling between the two spins of each spin qubit.

[0031] In some embodiments, the quantum processing device further comprises a plurality of quantum dots on which a plurality of spin qubits are formed.

[0032] In some embodiments, one or more gate electrodes are positioned to apply a voltage to electrically insulate and confine one or more electrons or holes in the silicon layer of the quantum processing device to form the corresponding quantum dots.

[0033] In some embodiments, the control arrangement is configured to perform one of the qubit initialization methods disclosed herein.

[0034] Furthermore, a method is provided for verifying a two-qubit state of a pair of spin qubits against a locked target state, the method comprising: (i) performing a first Pauli spin blockage (PSB) check; (ii) performing at least one two-qubit state conversion operation on the pair of qubits in response to determining from the first PSB check that the two-qubit state is locked; (iii) performing at least one additional PSB check; and (iv) verifying that the two-qubit state is a target state by determining, in response to performing at least one additional PSB check, that the two-qubit state is still locked.

[0035] In some embodiments, the target state is |↓↓>, and the 2-qubit gate is a zero-controlled NOT gate (zCNOT) 2-qubit gate.

[0036] In some embodiments, verifying that a two-qubit state is a target state involves sequentially performing a first PSB check, a first two-qubit state conversion operation as one or more single-qubit rotations performed on the spin qubits to convert |T0> to |S>, a second PSB check, a second two-qubit state conversion operation as a two-qubit gate, and a third PSB check on a pair of spin qubits.

[0037] Furthermore, a method for initializing a qubit is provided, comprising: (i) setting the two-qubit state of a pair of spin qubits to an arbitrary state; (ii) verifying the qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) repeating steps (i) to (ii) until the qubit state is determined to be a target state, in response to determining in step (ii) that the qubit state is not a target state, wherein the qubit state is the two-qubit state of a pair of spin qubits and the target state is a sealed state, and determining that the qubit state is a target state involves sequentially performing at least a first Pauli spin-block (PSB) check, a two-qubit state conversion operation, and a second PSB check on the pair of spin qubits.

[0038] Furthermore, a method for initializing a qubit is provided, comprising: (i) setting the two-qubit states of a pair of spin qubits to an arbitrary state; (ii) verifying the qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) repeating steps (i) to (ii) until the qubit state is determined to be a target state, in response to determining in step (ii) that the qubit state is not a target state, wherein the qubit state is a single-qubit state of one of the pair of spin qubits, and determining that the qubit state is a target state involves sequentially performing PSB checks and two-qubit state conversion operations on the pair of spin qubits.

[0039] Furthermore, a method for initializing a qubit is provided, which includes (i) setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) verifying the qubit state associated with the pair of spin qubits against a corresponding target state, and (iii) repeating steps (i) to (ii) until the qubit state is determined to be a target state, in response to determining in step (ii) that the qubit state is not a target state, wherein determining that the qubit state is a target state includes sequentially performing at least a first Pauli spin block (PSB) check, a two-qubit state conversion operation, and a second PSB check on the pair of spin qubits in response that the qubit state is a two-qubit state of a pair of spin qubits and the target state is a blocked state, and sequentially performing at least a PSB check and a two-qubit state conversion operation on the pair of spin qubits in response that the qubit state is a single-qubit state of one of the spin qubits.

[0040] Next, some embodiments of the present disclosure will be described with reference to the accompanying drawings. [Brief explanation of the drawing]

[0041] [Figure 1a] Flowcharts of methods for performing deterministic initialization of the qubit state of a pair of qubits, according to several embodiments. [Figure 1b] A flowchart of the setup and verification steps for performing the deterministic initialization of a 2-qubit state using the method shown in Figure 1a. [Figure 1c] Flowcharts of methods for verifying a two-qubit state of a pair of spin qubits against a target state, according to several embodiments. [Figure 1d] Schematic diagram illustrating the steps of an exemplary 2-qubit initialization method for implementing the parity PSB check shown in Figure 1b. [Figure 1e]Schematic diagram of exemplary steps for a 2-qubit initialization method for implementing a singlet-triplet (ST) PSB check, as shown in Figure 1b. [Figure 1f] A flowchart of the setup and verification steps for performing the deterministic initialization of a single-qubit state using the method shown in Figure 1a. [Figure 1g] A schematic diagram illustrating the steps of an exemplary single-qubit initialization method for the implementation of Figure 1f. [Figure 2a] Top views of a quantum processing device configured to perform the deterministic qubit initialization and verification methods shown in Figures 1a to 1g. [Figure 2b] Figure 2a shows a cross-sectional view of the quantum processing device. [Figure 3] A schematic energy level diagram of anticrossing between a double quantum dot charge state with paired spins and a charge state with unpaired spins, according to several embodiments. [Figure 4] Visualization of the tuning procedure starting with the measurement of the charge state of the quantum processing device in Figure 2a. [Figure 5a] Visualization of the Pauli spin blockage (PSB) region in the gate voltage plot of the quantum processing device in Figure 2a. [Figure 5b] Visualization of the Pauli spin block (PSB) region in the gate voltage plot of a quantum processing device with a constant background signal in Figure 2a. [Figure 6] Graphs of qubit sealing probabilities over time, with gate duration calibrated from each resonant-driven Rabi oscillation in several embodiments. [Figure 7] Graphs of qubit sealing probabilities over time, measured across sequence exchanges, according to several embodiments. [Figure 8] Graphs of electron spin resonance (ESR) transitions at each stage of the deterministic initialization method of Figure 1d, according to several embodiments. [Figure 9a] A graph of the average number of iterations for an initialization method in Figure 1d, having only the steps corresponding to the first stage of initialization, according to several embodiments. [Figure 9b]A graph of the average number of iterations, having steps corresponding to both the first and second stages of initialization, for the initialization method of Figure 1d, according to several embodiments. [Modes for carrying out the invention]

[0042] Conventional approaches to qubit initialization rely on spin polarization, and in some cases, on a combination of spin polarization and single-qubit rotation (see Philips[2]). The effectiveness of these methods is heavily dependent on spin physics, and therefore, fidelity of initialization is crucial. This is especially true when initializing a two-qubit state, which arises from the coupling of a pair of individual qubits, each having a corresponding single-qubit state.

[0043] In operations above 1 Kelvin and at low magnetic fields, in the context of a two-qubit system, thermal energy eventually exceeds the qubit energy, including the Zeeman energy and exchange coupling energy. Due to thermalization, spin depolarization begins to dominate, and therefore, a pure two-qubit state cannot be obtained by adiabatically or non-adiabatically loading two spins into two quantum dots (i.e., setting the spin state of each quantum dot). Instead, the initialized two-qubit state tends to be a mixture of single-qubit spin-up and spin-down states with arbitrary probability. Therefore, it is desirable to devise techniques that improve upon these shortcomings of prior art or one or more other shortcomings, or at least provide a useful alternative.

[0044] overview Disclosed herein are devices and methods for deterministically initializing a qubit state associated with a pair of spin qubits, wherein the qubit state is a 2-qubit state of the spin qubit pair or a single qubit state of one of the spin qubits, and the initialization is performed by i) setting the 2-qubit state of the pair of qubits to any one of the possible 2-qubit states without certainty; ii) verifying the qubit state against a target state (i.e., a predetermined state desired for initialization); and iii) repeating steps (i) to (ii) in response to determining that the qubit state is not the target state until it is determined that the qubit state is the target state. Determining that the qubit state is the target state is achieved by performing one or more Pauli spin block (PSB) checks and at least one 2-qubit state conversion operation on the pair of spin qubits.

[0045] In one embodiment, the qubit state associated with a pair of spin qubits is a 2-qubit state, and the devices and methods disclosed herein are configured to deterministically initialize the 2-qubit state by i) setting the 2-qubit state of the pair of spin qubits to an arbitrary state (e.g., any one of the 2-qubit states without certainty); ii) verifying the 2-qubit state against a target state (i.e., a predetermined state desired for initialization); and iii) repeating steps (i) to (ii) until it is determined that the 2-qubit state is a target state, in response to determining in step (ii) that the 2-qubit state is not a target state. Determining that the 2-qubit state is a target state involves performing multiple Pauli spin block (PSB) checks and at least one 2-qubit state conversion operation on the pair of spin qubits.

[0046] The target state can be selected as a PSB-locked state of the 2-qubit ground state set (e.g., as a spin-down state or a spin-up state of the 2 qubits, respectively). In step (i), the 2-qubit state is set to an arbitrary state, which can contain any mixed or pure state of the 2-qubit ground states with any probability of occurrence, for example, by loading spins onto the corresponding charge carriers. Resetting the 2-qubit state to an arbitrary state (by repeating step (i)) is conditioned on the result of one of the PSB checks (in step (ii)). Each PSB check determines whether the (currently set) 2-qubit state is an unlocked state of the 2-qubit ground state set, and if so, the 2-qubit state is reset to the arbitrary state. A "locked" or "unlocked" 2-qubit state is a state in which the spins of the individual qubits block or allow the energetic tunneling of the individual qubits, respectively.

[0047] The repetition of steps (i) to (iii) continues until, in step (iii), it is determined that the two-qubit state has been set to the target state. Following the initialization of the selected target state, any arbitrary two-qubit state can be deterministically achieved by applying, as necessary, a single-qubit or two-qubit gate(s) to the selected target state. This is advantageous for spin-qubit-based quantum computing devices, as it allows for the initialization of a desired target two-qubit state independently of spin polarization and therefore functions even at high temperatures.

[0048] In some embodiments, each PSB check involves performing a readout operation on a pair of spin qubits. The readout operation involves performing a measurement of the spin states of the two qubits by taking advantage of the property that tunneling of the underlying qubit charge carriers (e.g., electrons or holes in the quantum dot encoding the single qubit spin) conditionally occurs in the presence of spin dissimilarity of the coupled qubits.

[0049] PSB checks can be performed according to different PSB mechanisms, including, for example, parity PSB readouts and singlet-triplet (ST) PSB readouts. Furthermore, if sealed, a two-qubit state is not destroyed by a readout operation as long as the readout time is within the PSB lifetime. This allows the readout operation to reset the state following the detection of an unsealed two-qubit state, because it is desirable to retain only the sealed target state in each iteration.

[0050] At least one two-qubit state transformation operation is performed to transform the current state with respect to the remaining non-target states in a given iteration. In some embodiments, each two-qubit state transformation operation is performed in response to its respective PSB check. For example, a two-qubit state transformation operation may be performed after a first PSB check (which may then be followed by a second PSB check). In this example, the two-qubit state transformation operation transforms the current two-qubit state, which is known to be a sealed state from the results of a previously performed PSB check, into an unsealed state. The transformation does not change the two-qubit state to which the transformation operation is applied if this two-qubit state is a target state. Depending on the PSB check mechanism and the corresponding set of two-qubit ground states, the two-qubit state transformation operation may include a two-qubit gate, a single-qubit gate, and / or a series of single-qubit rotations.

[0051] In one embodiment, the PSB check is a parity check used to determine the parity of a two-qubit state at some point in the initialization procedure. The operation is performed over a two-qubit basis set {|↓↓>,|↓↑>,|↑↓>,|↑↑>}, where ↓ and ↑ represent the spin-down and spin-up states of individual qubits, and the two qubits are in one of the following states: spin-down-down (|↓↓>), spin-down-up (|↓↑>), spin-up-down (|↑↓>), or spin-up-up (|↑↑>).

[0052] The parity of a two-qubit state provides an indicator of whether the two individual qubit spins have the same direction (i.e., even parity states |↓↓>, |↑↑>) or opposite spin directions (i.e., odd parity states |↓↑>, |↑↓>). For example, a parity PSB readout operation may be configured to indicate that the two-qubit state is an even parity state, which is one of (|↓↓>, |↑↑>), if a PSB blockage is detected (e.g., from a zero or "flat" readout signal). Conversely, a parity PSB readout operation may be configured to indicate that the two-qubit state is an odd parity state, which is one of (|↓↑>, |↑↓>), if the operation indicates the absence of a PSB blockage (e.g., from a readout signal with a non-zero magnitude).

[0053] The 2-qubit transformation operation(s) are selected and configured according to the PSB mechanism and the desired target state. In some embodiments using parity PSB checks, the 2-qubit gate is applied to change the parity of the 2-qubit state if the state has the same parity as the target state but is a different state from the target state. The 2-qubit gate does not change the state if the state is equal to the target state.

[0054] For example, the target state may be selected as an even parity 2-qubit state (e.g., one of the |↑↑> and |↓↓> states), and the 2-qubit gate converts the other even state (e.g., |↑↑> or |↓↓>) to an odd parity state which is one of the |↑↓> and |↓↑> states. In one implementation, the target state is a spin-down state (|↓↓>), and the 2-qubit gate is a zero-controlled NOT gate (zCNOT) configured to convert |↑↑> to |↑↓>. It will be understood that the zCNOT gate is sometimes referred to as an uncontrolled NOT gate (NCNOT) in the literature.

[0055] In another implementation, the target state is a spin-up state (|↑↑>), and the two-qubit gate is a controlled NOT gate (CNOT) configured to convert |↓↓> to |↓↑>. Any arbitrary unblocked states |↑↓> and |↓↑> can be prepared from a deterministically initialized blocked state (for example, by applying a control signal to the first or second qubit, starting from an initialized state |↓↓>).

[0056] The method for initializing a two-qubit state proposed herein is advantageous in that, without certainty, the existence of a target state (i.e., positive verification) for a two-qubit state initialized to a mixed state which is one of the ground states (e.g., |↓↓>, |↓↑>, |↑↓>, and |↑↑>) can be achieved by two parity PSB checks and one two-qubit transformation operation. Otherwise, negative verification can be performed by a single parity PSB check, thereby enabling an iterative process that restarts conditionally (i.e., by resetting the two-qubit state to an arbitrary state) based on the result of the parity PSB check.

[0057] In an alternative embodiment, each PSB check is a singlet-triplet (ST) PSB check performed over the two-qubit ground states |↓↓>, |S>, |T0>, and |↑↑>, where the |S> and |T0> states are singlet and triplet states defined as |S>=(|↓↑>-|↑↓>) / √2 and |T0>=(|↓↑>+|↑↓>) / √2, respectively. During the ST PSB readout check, if the spins of the two qubits are in the singlet state |S>, which is an unsealed state, one of the individual qubits tunnels to form a pair with the other qubit. If the two spins are in the triplet state |T0>, or in either the even state |↓↓> and |↑↑>, the two-qubit state is sealed.

[0058] In relation to the use of parity PSB checks, initializing a two-qubit state using singlet-triplet states involves an additional two-qubit state transformation operation in which a series of single-qubit rotations are applied to transform state |T0> to state |S>. As a condition for resetting the two-qubit state to any state, an additional PSB check is performed to detect the transformed state (i.e., a total of three checks). Thus, determining that a two-qubit state is a target state involves performing a first PSB check, one or more single-qubit rotations on the spin qubits to transform |T0> to |S>, a second PSB check, a two-qubit gate, and a third PSB check for a pair of spin qubits. Each of the PSB checks may be performed as an ST readout check.

[0059] In one example, the target state is selected as a sealed state (|↓↓>), and the two-qubit gate is a zero-controlled NOT gate (zCNOT) configured to convert state |↑↑> to state |S>. The first PSB check is an ST readout indicating a sealed state if the two-qubit state is one of |↓↓>, |↑↑>, and |T0>. The second ST readout check indicates a sealed state if the two-qubit state is determined to be one of |↓↓> and |↑↑>. The third ST readout check indicates a sealed state if the two-qubit state is determined to be the target state of |↓↓>. Each of the first, second, and third checks indicates the absence of a sealed state (i.e., an unsealed two-qubit state) if the two-qubit state is state |S>. Each two-qubit state transformation operation (i.e., a two-qubit gate and a series of single-qubit rotations) can be performed in any order to eliminate the |↑↑> and |T0> states, as long as the operation is performed between the first PSB check and the final (third) PSB check.

[0060] In another embodiment, the qubit state associated with a pair of spin qubits is a single qubit state of one of the qubits, and the devices and methods disclosed herein are configured to deterministically initialize a single qubit state by i) setting the two qubit states of the pair of qubits to an arbitrary state (which is any one of the possible two qubit states, without certainty); ii) verifying the single qubit state against a target state (i.e., a predetermined state desired for initialization); and iii) repeating steps (i) to (ii) until the single qubit state is determined to be the target state, in response to the determination in step (ii) that the single qubit state is not the target state. Determining that the single qubit state is the target state is achieved by performing one Pauli spin block (PSB) check and one two qubit state conversion operation for the pair of spin qubits.

[0061] For example, before applying a two-qubit state conversion operation, a parity PSB check may be performed to determine that the spin qubits are sealed, and therefore in either an even spin-up (|↓↓>) or even spin-down (|↑↑>) two-qubit state. The two-qubit state conversion operation is then performed to selectively convert the states of a particular pair of individual qubits to a desired target state, thereby achieving deterministic initialization of the individual spin qubits. The two-qubit state conversion operation may include a two-qubit gate operation or a single-qubit gate, depending on the PSB check mechanism and the corresponding set of two-qubit ground states. This advantageously provides a means for the deterministic initialization of the single-qubit states of the spin qubits of a pair of qubits.

[0062] In some embodiments, the techniques described herein are performed for the purpose of verifying a two-qubit state or a single-qubit state with respect to a corresponding target state (i.e., performing step (ii) only once without resetting the two-qubit state to any arbitrary state). For example, in response to the initialization of a two-qubit state by an alternative initialization method, the verification method is performed to provide a positive or negative verification of the initialized two-qubit (or single-qubit) state with respect to a desired target state. In embodiments relating to the verification of a two-qubit state, a first Pauli spin-blocking (PSB) check, at least one two-qubit state conversion operation, and at least one additional PSB check are performed on a pair of spin qubits according to the techniques described for embodiments performing deterministic initialization of a two-qubit state. A positive verification of a two-qubit state equal to the target state is provided as a result of determining that the two-qubit state remains blocked after performing the above sequence.

[0063] Deterministic initialization of two-qubit or single-qubit states can be performed by a quantum processing device configured to perform quantum computations using multiple spin qubits. For example, a processing device may deterministically prepare a two-qubit state with even parity (i.e., |↓↓> or |↑↑>) by repeatedly verifying parity and reinitializing the state until a sealed readout is obtained across both the first and second parity PSB checks. The processing device then performs two-qubit gate operations according to the desired pure (i.e., sealed) target state. For example, to initialize the target state |↓↓>, the processing device selects a zero-controlled NOT (zCNOT) gate from a two-qubit gate library to convert |↑↑> to |↑↓> but not |↓↓>. The unwanted conversion from the pure state |↑↑> to the state |↑↓> is then detected as an unsealed state, triggering a reinitialization to the arbitrary two-qubit state.

[0064] Experimental evaluations of the processing device have demonstrated that the proposed technique for deterministic initialization of a pair of qubits is robust against variations in qubit properties and physical conditions such as temperature and magnetic fields. For example, the deterministic initialization of a two-qubit state can proceed even during operation of the quantum processing device at cryogenic temperatures below 4 Kelvin.

[0065] Method for initializing 2 qubits Figure 1a shows a method 100 for performing deterministic initialization of the qubit states of a pair of spin qubits. This method involves the repeated application of two-qubit state transformation and PSB check operations to process a two-qubit state initially set to an arbitrary state. The two-qubit state transformation and PSB check are repeated until a predetermined target state is reached. In the example described, method 100 performs deterministic initialization of a two-qubit state where the target state is the spin-down state |↓↓>. However, it will be understood that the same process may be applied to deterministically initialize alternative states, including the spin-up state |↑↑>.

[0066] Optionally, the method includes performing a configuration (in step 101). In some embodiments, the configuration includes selecting a pair of qubits to initialize a two-qubit state, determining the target state, and specifying one or more parameters or rules for configuring operations (e.g., PSB mechanism and readout operation) used to perform checks. In some embodiments, the configuration involves selecting a suitable two-qubit gate, single-qubit gate, and / or single-qubit rotation for performing a state transformation. The two-qubit gate may be selected from a function library based on the configured target state (e.g., a zero-controlled NOT gate (zCNOT) when the target state is |↓↓>).

[0067] In step 102, the two-qubit state is set to an arbitrary state. Method 100 then verifies the two-qubit state against the target state in step 104. Method 100 repeats steps 102 and 104 until a positive verification of the target state is achieved.

[0068] Figure 1b shows the setup 102 and verification 104 steps of method 100 for performing deterministic initialization of a two-qubit state. In the first embodiment, the PSB check is a parity PSB check performed over the two-qubit ground states |↓↓>, |↓↑>, |↑↓>, and |↑↑>. Determining that the two-qubit state is a target state involves performing a first PSB check, a two-qubit conversion operation, and a second PSB check on a pair of spin qubits. Each of the first and second PSB checks is a parity check (as determined, for example, by a readout signal).

[0069] Setting up a two-qubit state involves preparing a single spin state for each qubit in a qubit pair (in step 112). Once the two-qubit state is formed, it is set to an arbitrary state nondeterministically (in step 113) by a mechanism such as a charge that pulses the single spin state. An exchange coupling is performed between the two spins of the single qubit to form the two-qubit state as one of four possible states |↓↓>, |↓↑>, |↑↓>, and |↑↑> with arbitrary probability.

[0070] Steps 114, 116, and 118 involve verifying a two-qubit state to determine if it is equal to the target state, and include a first PSB check 114, a transformation operation 116, and a second PSB check 118. In some cases, the target state, and therefore the parity of the target state, is predetermined (e.g., by the configuration in step 101). In response to a two-qubit state with a parity other than the parity of the target state, in either PSB checks 114 or 118, the two-qubit state is nondeterministically reset to an arbitrary state in step 113.

[0071] As a result of the first PSB check 114, a first two-qubit state transformation operation 116 is applied to a pair of spin qubits, taking into account that the two-qubit state is either an even state (i.e., one of |↓↓> and |↑↑) or an odd state (i.e., one of |↓↑> and |↑↓>) and has the same parity as the target state ("target parity"). Under the condition that the two-qubit state is purely odd or even, the first transformation operation 116 is a two-qubit gate configured to transform the two-qubit state into a state with the opposite parity only if the two-qubit state is not equal to the target state. Then, in step 118, a second PSB check forces a re-establishment of the two-qubit state if the check indicates that the parity is not the same as the target parity (i.e., the state has experienced the transformation by the two-qubit gate 116 and is therefore not equal to the target state).

[0072] In the second embodiment, each PSB check is a singlet-triplet (ST) PSB check performed over the two-qubit ground states |↓↓>, |S>, |T0>, and |↑↑>, where states |S> and |T0> are singlet and triplet states, respectively. In relation to the first embodiment, there is an additional (third) PSB check 122 and a second two-qubit state transformation operation 120 performed between the second PSB check 118 and the third PSB check 122. The first transformation operation 116 is a series of single-qubit rotations configured to transform |T0> into |S>. The second transformation operation 120 is a two-qubit gate configured to transform a non-target state of state |↓↓> or |↑↑> into |S> without changing the target state.

[0073] Figure 1c shows a method 130 for verifying a two-qubit state of a pair of spin qubits against a target state. The solid lines in Figure 1c show the steps for performing the verification using a parity PSB readout implementation. The dashed lines in Figure 1c show additional steps for performing the verification using an ST PSB readout implementation. Verification method 130 can be performed to verify a two-qubit state initialized from an alternative initialization process, for example, to determine whether the two-qubit state is correctly initialized to a selected sealed target state (positive verification) or to determine whether the two-qubit state is not set to a target state (negative verification).

[0074] In step 132, a first PSB check is performed on the two-qubit state. The result of the first PSB check is processed in step 133 (for example, by processing the signal for the readout operation). In response to determining from the processing of the first PSB check in step 133 that the two-qubit state is sealed, a two-qubit transform operation is performed on the qubit in step 134. As discussed above, in a parity PSB readout check, the transform operation 134 is a two-qubit gate configured to transform a non-target state with a target parity into a state with a different parity. In an ST PSB readout, the first transform operation is a series of single-qubit rotations. In step 136, after performing the first transform operation 134, a second PSB check is performed on the two-qubit state. The result of the second PSB check is processed in step 137.

[0075] In the parity PSB readout check, in response to the processing of the results of the second PSB check in step 137, it is determined that the two-qubit state is still sealed, and the two-qubit state is verified to be the target state (i.e., step 138). In the ST PSB readout check, if the two-qubit state remains sealed in response to the second PSB check, a second state transformation operation 140 is performed. The second transformation operation 140 is a two-qubit gate that transforms the non-target state into a singlet state, leaving the target state unchanged. In step 142, a third PSB check of the two-qubit state is performed following the second transformation operation 134.

[0076] The result of the third PSB check is processed in step 143. In response to the processing of the result of the third PSB check in step 137, which determines that the two-qubit state is still sealed, the two-qubit state is verified to be the target state (i.e., step 138). In response to any of the PSB checks 133, 137, or 143 indicating that the two-qubit state is not sealed, the two-qubit state is verified to be not equal to the target state (i.e., step 139).

[0077] Figure 1d schematically illustrates the exemplary steps of a two-qubit initialization method 150 of the parity PSB check implementation of Figure 1b (i.e., a readout measurement is performed to determine the parity of the qubit state based on Pauli spin blocking). The target state for deterministic initialization is configured as an even spin-down state |↓↓>, and the two-qubit gate is a zCNOT gate.

[0078] Initialization begins in step 151. In step 152, the two-qubit state is initialized to an arbitrary state by pulsing from a (m+2,n) or (m,n+2) charge state to a (m+1,n+1) charge state (wherein m and n are any even numbers). Step 153 shows the electronic potentials of the individual qubits Q1 and Q2 for the set of |↓↓>, |↓↑>, |↑↓>, and |↑↑> spin states, given that the thermal energy is much greater than the exchange coupling and Zeeman energy difference.

[0079] In steps 154 and 155, a first readout is performed. The readout signal is processed to determine whether the two-qubit state is sealed or not, and the presence of charge indicates the occurrence of tunneling, and therefore an unsealed two-qubit state. In step 154, the two-qubit state is determined to be unsealed and therefore odd parity (|↓↑>, |↑↓>), and the two-qubit state is reset (in step 152). Alternatively, in step 155, the two-qubit state is determined to be sealed and therefore even parity (|↓↓>, |↑↑>), and initialization proceeds to the next stage.

[0080] Step 156 shows the electron potentials of the individual qubits Q1 and Q2 for the even states |↓↓> and |↑↑> that remain after Step 155. In Step 157, the zCNOT gate is executed to convert |↑↑> to |↑↓> but without changing the target state |↓↓>.

[0081] In steps 158 and 159, a second readout is performed. In step 158, the two-qubit state is determined to be unsealed and therefore |↑↓>, and the two-qubit state is reset (in step 152). Alternatively, in step 159, the two-qubit state is determined to be sealed and therefore the target state |↓↓>. In step 160, initialization is completed. Thus, a high-purity |↓↓> state can be achieved by one or more iterations of the steps described above, as long as the zCNOT gate and PSB readout operations are faster than the spin depolarization time.

[0082] Figure 1e schematically illustrates the exemplary steps of the 2-qubit initialization method 180 of the ST PSB check implementation of Figure 1b (i.e., a readout measurement is performed to determine the singlet-triplet state based on Pauli spin blocking). The target state for deterministic initialization is configured as an even spin-down state |↓↓>, and the 2-qubit transform gate is a zCNOT gate.

[0083] Initialization begins in step 181. In step 182, the spin is prepared. The two-qubit state is nondeterministically initialized to an arbitrary state by pulsing from a (m+2,n) or (m,n+2) charge state to a (m+1,n+1) charge state (wherein m and n are any even numbers). This sets the two-qubit state to one of the possible two-qubit ground states, which consist of the |↓↓>, |S>, |T0>, and |↑↑> states, as shown in step 183.

[0084] In steps 184 and 185, a first ST readout check is performed. In step 184, the state is determined to be unsealed and therefore singlet (i.e., |S>), and the 2-qubit state is reset (in step 182). Alternatively, in step 185, the state is determined to be sealed and therefore one of |↓↓>, |↑↑>, or |T0>, and initialization proceeds to the next stage.

[0085] In step 186, the two-qubit state is one of the candidate states |↓↓>, |↑↑>, or |T0>. In step 187, a single-qubit rotation is performed to transform |T0> into |S>. The rotation can be implemented, for example, as an X(π) operation on Q1 and a Y(π) operation on Q2, or a Y(π) operation on Q1 and an X(π) operation on Q2. As a result of the rotation, the state |↓↓> becomes |↑↑>, and the state |↑↑> becomes |↓↓>.

[0086] In steps 188 and 189, a second ST read check is performed. In step 188, the state is determined to be unsealed and therefore |S>, and the two-qubit state is reset (in step 182). Alternatively, in step 189, the state is determined to be sealed and therefore the state |↓↓> or |↑↑>, and initialization proceeds to the next stage.

[0087] Step 190 indicates that the two-qubit state is one of the candidate states |↑↑> or |↓↓>. In Step 191, a zCNOT gate is executed with Q1 as the control qubit and Q2 as the target qubit, converting |↑↑> to |S> but not changing |↓↓>.

[0088] In steps 192 and 193, a third ST readout check is performed. In step 192, the state is determined to be unsealed and therefore |S>, and the 2-qubit state is reset (in step 182). Alternatively, in step 193, the state is determined to be sealed and therefore, in step 194, the target state |↓↓>. Initialization is completed in step 195. The state |↓↓> can be deterministically initialized as long as the 1-qubit gate, 2-qubit gate, and readout are much faster than the spin depolarization rate or PSB decay rate, and as long as the 1-qubit gate, 2-qubit gate, and readout are visible.

[0089] In response to deterministically realizing a target state, methods 150, 180 can be configured to generate any other state. That is, starting from a sealed target state, either |↓↓> or |↑↑>, other two-qubit states can be prepared by applying a single-qubit gate or a two-qubit gate to one or both of the qubits Q1, Q2 (i.e., as an additional step following step 160). For example, starting from the state |↑↑>, applying the X(π / 2) gate to Q1 yields |↓↑>, and applying the X(π / 2) gate to Q2 yields |↑↓>. Alternatively, the two-qubit state |↑↑> can be prepared from a deterministically initialized state |↓↓> by applying the X(π / 2) gate to both qubits. Similarly, any superposition or entangled state can be prepared by applying other forms of 1-qubit gates and / or 2-qubit gates to any of the states |↓↓>, |↑↑>, |↓↑>, and |↑↓> initialized as described herein.

[0090] Method for single-qubit initialization In another embodiment, method 100 is configured to perform a deterministic initialization of a single-qubit state of a selected qubit from a pair of spin qubits. In some embodiments, the target state is a spin-down state |↓>. However, it will be understood that the same process may be applied to deterministically initialize a spin-up state |↑>.

[0091] Referring to Figure 1a, in step 102, the two-qubit state is set to an arbitrary state. In step 104, the single-qubit state of the selected qubit is then verified against the target state. Method 100 repeats the setting step 102 and verification step 104 until a positive verification of the target state is achieved.

[0092] Figure 1f shows the setup step 102 and verification step 104 of method 100 for performing deterministic initialization of a single-qubit state. Initialization is performed over the two-qubit ground states |↓↓>, |↓↑>, |↑↓>, and |↑↑>. Determining that the single-qubit state is the target state involves performing a PSB check and a two-qubit conversion operation on a pair of spin qubits, the PSB check being a parity check (determined, for example, by a readout signal).

[0093] Method 100 sets up a two-qubit state by (in step 112) preparing a single spin state for each qubit of a qubit pair, and (in step 113) forming a two-qubit state that can be set to any state, so that it can be performed for the initialization of the two-qubit state. The two-qubit state is set up nondeterministically in steps 112 and 113.

[0094] In steps 114 and 116, method 100 verifies a single-qubit state to determine whether it is equal to the target state. Verification is performed by a series of operations including PSB check 114 and transformation operation 116. The target state, and therefore the parity of the target state, is predetermined (e.g., by configuration step 101). In response to a single-qubit state having a parity other than the parity of the target state in PSB check 114, the two-qubit state is reset to an arbitrary state via step 113.

[0095] The two-qubit state transformation operation 116 is applied to a pair of spin qubits based on the finding, as a result of the PSB check 114, that the two-qubit states are even states (i.e., one of |↓↓> and |↑↑>). The transformation operation 116 is a two-qubit gate, a single-qubit gate, or a transformation operation configured to transform the single-qubit state of a selected qubit to the opposite state only if the single-qubit state is not equal to the target state of the corresponding single-qubit (for example, if the selected qubits are the second qubit of a pair, |↑> is transformed to the target state |↓>, and as a result, |↑↑> is transformed to |↑↓>). Thus, upon completion of the two-qubit state transformation operation 116, the single-qubit state of the selected qubits is equal to the target state across the pair of two-qubit states (i.e., one of |↓↓> and |↑↓>).

[0096] Figure 1g schematically illustrates the exemplary steps of the single-qubit initialization method 170 for the implementation of Figure 1f. A readout measurement is performed to determine the parity of the two-qubit state based on Pauli spin blocking. The single-qubit target state for the deterministic initialization of the selected individual qubit is configured as a spin-down state |↓>, and the qubit state transformation operation is a two-qubit zCNOT gate that operates on both qubits of the pair. In the example described, the selected qubit is the second qubit (Q2) of the qubit pair (Q1, Q2).

[0097] Initialization begins in step 171. In step 172, the two-qubit state is initialized to an arbitrary state by pulsing from a (m+2,n) or (m,n+2) charge state to a (m+1,n+1) charge state (wherein m and n are any even numbers). Step 173 shows the electronic potentials of the individual qubits Q1 and Q2 for the set of |↓↓>, |↓↑>, |↑↓>, and |↑↑> spin states, given that the thermal energy is much greater than the exchange coupling and Zeeman energy difference.

[0098] In steps 174 and 175, a first readout is performed. The readout signal is processed to determine whether the two-qubit state is sealed or not, and the presence of charge indicates the occurrence of tunneling, and therefore an unsealed two-qubit state. In step 174, the two-qubit state is determined to be unsealed and therefore odd parity (|↓↑>, |↑↓>), and the two-qubit state is reset (in step 172). Alternatively, in step 175, the two-qubit state is determined to be sealed and therefore even parity (|↓↓>, |↑↑>), and initialization proceeds to the next stage.

[0099] Step 176 shows the electron potentials of the individual qubits Q1 and Q2 for the even states |↓↓> and |↑↑> that remain after Step 175. In Step 177, a zCNOT gate is executed to convert |↑↑> to |↑↓> but not to |↓↓>. In doing so, the zCNOT gate converts the state of the second qubit Q2 from an alternate state to the target state (i.e., for Q2, the single qubit state |↑> is converted to |↓>). Thus, the effect of the parity PSB check and the zCNOT conversion gate is to ensure that the single qubit state of the selected qubit (Q2) is the target state (i.e., |↓>), regardless of the two qubit states of the pair of qubits (Q1, Q2). The single qubit initialization procedure is completed in Step 179.

[0100] Quantum processing devices Figures 2a and 2b show top and cross-sectional views, respectively, of at least a portion of a quantum processing device 200 configured to perform deterministic two-qubit initialization methods 100, 150, 170, 180 and verification method 130. In an exemplary configuration, the quantum processing device 200 comprises a plurality of spin qubits and a control arrangement including one or more gate electrodes 212, 216 arranged to control the spin states of the plurality of spin qubits. The control arrangement is configured to deterministically initialize and / or verify the two-qubit states of a pair of spin qubits 220, 222 (Q1, Q2), or to deterministically initialize an arbitrary single-qubit state of one of the pair of spin qubits, 220 (Q1) or 222 (Q2), to a target state by performing the steps of methods 100, 130, 150, 180, 170 in Figures 1a-1g.

[0101] The quantum processing device 200 is configured to arbitrarily select a pair of spin qubits 220, 222 from a plurality of spin qubits for initialization and subsequent quantum computation. In some embodiments, one or more gate electrodes 212, 216 are arranged to set the single-qubit state of each qubit 220, 222 and to construct single-qubit logic gates for at least one pair of the plurality of spin qubits 220, 222. In one exemplary configuration, the quantum processing device 200 is operated in a cryogenic system at a temperature of 4 Kelvin or less. The operating temperature of the quantum processing device 200 is preferably 1 to 4 Kelvin, more preferably 2 to 4 Kelvin, and even more preferably 3 to 4 Kelvin. The plurality of qubits are formed by unpaired spins located beneath gate electrodes that may be defined by lithography. A magnet incorporated into the cryogenic system generates a constant magnetic field to generate Zeeman energy, which defines the spin-up and spin-down states of the single qubits. These physical spin-up and spin-down states are projected into 0 and 1 states in quantum computation.

[0102] The control configuration uses an AC electric or magnetic field to control the single-qubit state of the device 200 in order to construct a single-qubit logic gate. In some embodiments, one or more gate electrodes 212, 216 are arranged to control a pair of spin qubits 220, 222 by generating an exchange coupling between the two spins of each qubit. For example, coupled control of the collective state of two adjacent qubits is achieved by switching on the exchange coupling between the two spins. This may be used in combination with a single-qubit gate to construct a two-qubit logic gate. Single-qubit and two-qubit logic gates are executed with multiple qubits to form the universal logic function force of the quantum processing device 200.

[0103] In some embodiments, the quantum processing device 200 comprises a plurality of quantum dots on which spin qubits 220, 222 are formed. The logic states of the qubits are encoded on the innate spins of electrons (or holes) delocalized within the conduction band of a semiconductor material (e.g., silicon). In one configuration, electrons or holes are injected into the material by the injection of individual dopant atoms (e.g., phosphorus). In some embodiments, the quantum processing device 200 is a metal oxide semiconductor device on which one or more gate electrodes are placed and a voltage is applied to electrically insulate and confine one or more electrons or holes in the semiconductor material to form the corresponding quantum dots (also referred to as "artificial" quantum dots).

[0104] Previous studies have demonstrated the advantages of quantum devices in which spin qubits are formed from artificial quantum dots in semiconductor materials (see Huang[3] and Yang[4]). Key performance metrics such as qubit coherence time, control, and measurement fidelity have been shown to outperform other types of quantum computing systems. In single-qubit operations above 1 Kelvin, qubit coherence time and control fidelity showed relatively small decreases, while qubit initialization and measurement fidelity showed greater degradation.

[0105] Referring to Figure 2b, the exemplary quantum processing device 200 comprises a silicon substrate 202 and a layer of silicon oxide 204, on which gate electrodes 210, 212, 214, and 216 are fabricated by multilayer gate stacking technique. The silicon substrate 202 may be a layer of isotopic purified silicon, natural silicon, or a combination thereof. The gate electrodes 210, 212, 214, and 216 are made of aluminum and insulated from each other by thermally grown aluminum oxide. An on-chip antenna is configured to generate a control signal for single-qubit control. In this example, the on-chip antenna generates a microwave control signal to control the electron spin of the quantum processing device 200. In some other examples, the on-chip antenna generates a radio frequency (RF) control signal to control the nuclear spin of the quantum processing device 200. During control, two qubits are located beneath two plunger gates 212 and 216. The exchange gate 214 located below provides on-demand two-qubit exchange, which forms the basis of two-qubit control, by adjusting the amount of overlap of the wave functions between the two spins. A nearby high-frequency single-electron transistor 220 acts as a charge sensor for measuring the qubit state via spin-charge conversion.

[0106] Conventional quantum processing devices can be configured to perform spin qubit initialization and readout based on energy-dependent tunneling processes, for example, by electron / hole reservoir (Elzerman) readout or by readout based on PSB occurring between two quantum dots (see LAI[5]). However, at temperatures above 1 Kelvin and low magnetic fields, only PSB readout is feasible. This is because PSB readout does not depend on the qubit energy being greater than the thermal energy. Furthermore, inter-dot processes have less coupling with ambient thermal noise compared to processes between quantum dots and reservoirs.

[0107] Referring to Figures 2a and 2b, qubit readout is performed pair by pair by readout operation. During readout, one of the spins is physically attracted to the other via a voltage pulse on one or more gate electrodes 212, 216. If the two spins are in different states (i.e., |↑↓> or ↓↑|>), the spins are energetically allowed to tunnel and form a pair with the other spin. If the two spins are in the same state (i.e., |↓↓> or |↑↑>), tunneling is energetically prohibited and the spins remain sealed. In a single-shot measurement, this provides a parity measurement of the two qubit states 220, 222. Furthermore, if sealed, the two qubit states are not destroyed by the measurement as long as the readout time is within the PSB lifetime.

[0108] Figure 3 shows a schematic energy level diagram 300 of the anticrossing 302 between a double quantum dot charge state with paired spins denoted as (m,n+2) and a charge state with unpaired spins denoted as (m+1,n+1) (wherein m and n are even). Segments 304a and 304b represent the energy of state |↓↓>, segments 306a and 306b represent the energy of state ↓↑>, segments 308a and 308b represent the energy of state |↑↓>, and segments 310a and 310b represent the energy of state |↑↑>. Segments 312a, 312b, 312c, and 312d represent state |S m,n+2 This represents ">". At millikelvin temperature, moving a charge state from (m,n+2) to (m+1,n+1) at different speeds yields four 2-qubit states |↓↓>, |↓↑>, |↑↓>, and |↑↑>, or their superposition states, in different proportions, depending on the spin basis of the physical system. This movement is achieved by ramping voltages on the 212 and 216 gates.

[0109] Conventional techniques can achieve high-fidelity |↓↓> or |↓↑> initialization in some examples of two-qubit systems by optimizing ramp speed, electrostatic confinement, and magnetic field conditions. For example, at millikelvin temperatures, this configuration allows for deterministic initialization of the two-qubit state to at least an even state |↓↓> by tuning to a relaxation hotspot generated by energy level crossing with an excited state and waiting for the spin to fully relax to the lowest energy spin-down state. The waiting time typically varies between 100 microseconds and 100 milliseconds, depending on the spin physics at the hotspot. Once one of the four states is prepared, the other states can be initialized by flipping the qubit via single-qubit control.

[0110] However, when a two-qubit system is operated in a low magnetic field exceeding 1 Kelvin, and the thermal energy is greater than the qubit energy, both spin relaxation and spin excitation processes occur. Because the spins tend to depolarize into random states, conventional initialization methods become ineffective in achieving high initialization fidelity.

[0111] Experimental evaluation The quantum processing device 200 is evaluated for a deterministic two-state initialization method 150 (i.e., full parity PSB readout) that uses a cryogenic measurement environment for manipulating two or more spin qubits and has |↓↓> as the target state. The spin carriers are electrons.

[0112] The quantum processing device 200 is operated in a magnetic field of 4 Kelvin or less and any constant magnetic field (typically less than 1 Tesla). A DC voltage is applied to the gate electrode to control the quantum dots of qubits 220 and 222. Dynamic voltage pulses (typically 1 ns to 1 ms) are also applied to the gate electrode to execute pulses during initialization, control, and readout. A microwave signal is applied to generate single-qubit control in the associated magnetic field.

[0113] The initialization of the two-qubit state is performed via a field-programmable gate array (FPGA) with real-time logic capabilities. Based on the readout results, the FPGA determines whether initialization is complete or should be resumed during the experiment's execution time.

[0114] Single-qubit X / 2 and Y / 2 gates are implemented by resonantly driving the associated qubits around the x and y axes, respectively, for a duration of π / 2. Single-qubit Z / 2 gates are implemented by shifting the phase by π / 2 in microwave timing, which corresponds to a π / 2 rotation in the qubit coordinate system. The CZ (controlled Z gate) is a native two-qubit gate obtained by pulsing the exchange interaction for a duration of π / 2 and correcting for any Stark shift. The zCNOT gate used for initialization has the form X / 2-NCZ-X / 2 or X / 2-CZ-NX / 2 (wherein NCZ and NX / 2 are negative CZ and negative X / 2 gates). It can also be constructed from other forms of exchange gates, such as the decoupled CZ (DCZ) gate.

[0115] Charge sensors for qubit readout take the form of single-electron transistors (SETs). For faster and lower-noise readout, RF-SETs are preferred, especially above 1 Kelvin, where the noise level and spin depolarization rate are greater than at millikelvin temperatures. Typical readout integration times are 50 to 200 microseconds. Other readout methods, such as gate-dispersive readout, are also possible.

[0116] Figure 4 shows a visualization 400 of the tuning procedure for a quantum processing device 200 using an RF-SET as a charge sensor, starting with charge state measurement. The qubit is formed by the unpaired spins of the (m+1,n+1) charge state (where m and n are even). The qubit control point is located at the center of the (m+1,n+1) state (triangle in visualization 400). The readout point is at the interdot charge transition between (m+1,n+1) and (m,n+2) (star in visualization 400). Readout between (m+1,n+1) and (m+2,n) is also possible.

[0117] Figure 5a shows a visualization of the PSB region in the gate voltage plot of the quantum processing device 200. Identifying the PSB region may involve preparing a mixed state having a certain probability of being |↓↓> or |↑↑> or a triplet state, for example, at an ultra-low magnetic field, in order to show the PSB region with anti-crossing.

[0118] Alternatively, one can first prepare a state that has a higher probability of having odd parity or being a singlet, and then prepare a state that has a higher probability of having even parity or being a triplet. (Blocking probability, P) 封鎖 This is averaged from all single-shot measurements for these two initialization types. Finally, the P of the first initialization is... 封鎖 P is the second initialization. 封鎖 It is subtracted from. Figure 5b shows a visualization 550 of the obtained PSB region with a constant background signal.

[0119] In Figures 5a and 5b, an additional latch read area can also be seen in the lower left of the PSB area. Latch reads involve tunneling to the reservoir, but are not used in the initialization method of the embodiments described.

[0120] The readout point can be set to the center of the PSB region. Then, as shown in steps 152-155 of Figure 1d, the first stage of initialization is used to initialize to an even parity state of |↓↓> or |↑↑> with high fidelity. The spin resonances driving the transitions between |↓↓> and |↓↑> and between |↓↓> and |↑↓> are measured with high visibility through the PSB. Figure 6 shows the qubit sealing probability P measured over time as the X / 2 gate duration is calibrated from the respective resonance-driven Rabi oscillations. 封鎖 Graph 600 is shown. The NX / 2 gate is implemented with the same gate duration but opposite phase. Since the probability difference between |↓↓> and |↑↑> is non-zero, exchange oscillations can be observed.

[0121] Figure 7 shows the qubit sealing probability P over time, measured over the X / 2-exchange-on-NX / 2 sequence. 封鎖 Graph 700 is shown. The zCNOT gate is calibrated from projected exchange oscillations for |↓↓> and |↑↑> initialization, which then enables the second stage of initialization (i.e., starting from step 156 in Figure 1d).

[0122] Figure 8 shows Graph 800 of electron spin resonance (ESR) transitions at each stage of the deterministic initialization process, measured at 1 Kelvin and 85 millitesla. The thermal energy is 86.14 microelectron volts at 1 Kelvin, and the Zeeman energy is 9.84 microelectron volts at 85 millitesla. That is, this operation is performed under conditions where the Zeeman energy is only 11.4% of the thermal energy.

[0123] The experiment involves applying initialization at different stages, then turning on the exchange and applying a microwave pulse of approximately π duration, and subsequently reading out the qubits. When the exchange is on, a total of four spin resonances are possible, corresponding to four single-qubit transitions between the four two-qubit states, |↓↓>, |↓↑>, |↑↓>, and |↑↑>, as labeled in graph 800. Each experiment is performed with 100 single-shot measurements. The binary results of blocked or unblocked reads are averaged over 100 shot measurements to provide P 封鎖 .

[0124] The initialized state is shown together with the background P 封鎖 by a subset of the four observed resonances. Due to the complexity in control and readout visibility, only the qualitative effects of initialization are observed.

[0125] Regarding FIG. 8, the top curve 802 corresponds to initialization by a conventional lamp, with hardly any visible ESR resonance, and P 封鎖 is near 0.5. This indicates a nearly equal proportion of the states |↓↓>, |↓↑>, |↑↓>, and |↑↑> in the mixed state, as shown in step 153 of FIG. 1d. The central curve 804 with a high background P 封鎖 indicates that the state is mainly of even parity. The observation of four resonances of comparable height suggests the presence of both even-parity states |↓↓> and |↑↑> with near-equal proportions. This corresponds to the result of the first stage of initialization, step 156 of FIG. 1d. In the bottom curve 806, only two resonances related to |↓↓> are observed. This corresponds to step 159 of FIG. 1D, which leads to the desired result of initialization (i.e., |↓↓> is initialized).

[0126] When only the first stage is involved (i.e., steps 152–155 in Figure 1D), the time cost of each initialization iteration (i.e., performing all steps between resetting to an arbitrary state nondeterministically in step 152 and verifying the state in one or more subsequent steps) is equal to the ramp time for preparing the unpaired spins plus the readout integral time. In this experiment, both were set to 50 microseconds, totaling 100 microseconds. When the second stage is involved (i.e., steps 156–159 in Figure 1D), the time cost also includes the zCNOT gate time (1.27 microseconds in this experiment). Real-time logic in the FPGA consumes 0.2 microseconds per conditional statement for PSB checks.

[0127] Figures 9a and 9b show the average number of iterations N for initialization with only the first stage and initialization with both stages, respectively. 反復 Graphs 900 and 950 are shown. Therefore, in the experiment that includes only the first stage, the average time cost is 50 × 2.01 = 100.5 microseconds. In the experiment that includes both stages, the average number of iterations N 反復 This increases from 2.01 to 2.98. Assuming that the output of the first stage is always |↓↓> so that the algorithm always proceeds to the second stage, the average time cost is (50 + 1.27 + 50) × 2.98 = 301.8 microseconds. Assuming that the output of the first stage is always |↑↑> until the last iteration, the average time cost is 50 × 1.98 + (50 + 1.27 + 50) × 1 = 200.3 microseconds. Therefore, in this experiment, the initialization process takes an average of 200.3 to 301.8 microseconds to complete.

[0128] It will be understood that the time cost depends heavily on the ramp time and readout integral time for preparing the unpaired spins. Changing these two durations not only directly changes the time per iteration, but is also likely to change the proportions of the mixed states |↓↓>, |↓↑>, |↑↓>, and |↑↑> shown in step 153 of Figure 1d, thus increasing the average number of iterations N 反復 It also affects the number of times.

[0129] Those skilled in the art will understand that numerous variations and / or modifications can be made to the embodiments described above without departing from the broad general scope of this disclosure. Therefore, these embodiments should be considered in all respects as illustrative and not limiting.

[0130] References [1]Huang,JY,Su,RY,Lim,WHet al.High-fidelity spin qubit operation and algorithmic initialization above 1 K.Nature 627,772-777(2024).https: / / doi.org / 10.1038 / s41586-024-07160-2 [2]Philips,SGJ,Madzik,MT,Amitonov,SVet al.Universal control of a six-qubit quantum processor in silicon.Nature 609,919-924(2022).https: / / doi.org / 10.1038 / s41586-022-05117-x [3]Huang,W.,Yang,CH,Chan,KWet al.Fidelity benchmarks for two-qubit gates in silicon.Nature 569,532-536(2019).https: / / doi.org / 10.1038 / s41586-019-1197-0 [4] Yang, CH, Leon, RCC, Hwang, JCCet al.Operation of a silicon quantum processor unit cell above one kelvin.Nature 580,350-354(2020).https: / / doi.org / 10.1038 / s41586-020-2171-6 [5]N.S.Lai et la.,Pauli Spin Blockade in a Highly Tunable Silicon Double Quantum Dot,Scientific Reports,volume 1,Article number: 110(2011),https: / / www.nature.com / articles / srep00110

Claims

1. A method for initializing qubits, (i) Setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) Verify the qubit state associated with the pair of spin qubits for the corresponding target state, (iii) In response to determining in step (ii) that the qubit state is not the target state, steps (i) to (ii) are repeated until it is determined that the qubit state is the target state, A method for determining that the qubit state is the target state, comprising performing one or more Pauli spin block (PSB) checks and at least one two-qubit state conversion operation on the pair of spin qubits.

2. The method according to claim 1, wherein the two-qubit state is reset by performing step (i) in response to one of the one or more PSB checks determining that the two-qubit state is not sealed.

3. The method according to claim 2, wherein each of the PSB checks includes performing a readout operation on the pair of spin qubits within the PSB lifetime in order to maintain the two-qubit state in response to the two-qubit state being in a sealed state.

4. The method according to any one of claims 1 to 3, wherein the qubit state associated with the pair of spin qubits is a single qubit state of one of the pair of spin qubits.

5. The method according to any one of claims 1 to 3, wherein the qubit state associated with the pair of spin qubits is the two-qubit state, and the target state is a sealed state.

6. The method according to claim 5, comprising a two-qubit gate configured such that each two-qubit state conversion operation converts the two-qubit state to an uncontained state in response to the two-qubit state being a sealed state and being a state different from the target state.

7. The method according to claim 6, wherein each of the PSB checks is a parity PSB check performed over the two-qubit ground states |↓↓>, |↓↑>, |↑↓>, and |↑↑>.

8. The method according to claim 7, wherein the target state is an even spin parity state which is one of the |↑↑> and |↓↓> states, and the two-qubit gate converts the other of the even states |↑↑> and |↓↓> into an odd parity state which is one of the |↑↓> and |↓↑> states.

9. The method according to claim 8, wherein the target state is |↓↓> and the two-qubit gate is a zero-controlled NOT gate (zCNOT) configured to convert |↑↑> to |↑↓>.

10. The method according to claim 9, wherein if the first PSB check indicates a blockage, the two-qubit state is determined to be an even parity state which is one of |↓↓> and |↑↑>, or if the first PSB check indicates the absence of a blockage, the two-qubit state is determined to be an odd parity state which is one of |↓↑> and |↑↓>.

11. The method according to claim 10, wherein if the second PSB check indicates a blockage, the two-qubit state is determined to be an even parity state |↓↓>, or if the second PSB check indicates the absence of a blockage, the two-qubit state is determined to be an odd parity state |↑↓>.

12. Each of the aforementioned PSB checks is |↓↓>, |S>, |T ０ This is a singlet-triplet (ST) PSB check performed across the two qubit ground states |S> and |T ０ The method according to claim 6, wherein the states are a singlet state and a triplet state, respectively.

13. Determining that the two-qubit state is the target state involves a first PSB check on the pair of spin qubits, |T ０ The method according to claim 12, comprising performing one or more single-qubit rotations on the spin qubit, a second PSB check, a two-qubit gate, and a third PSB check on the spin qubit to convert to |S>.

14. The method according to claim 13, wherein the target state is |↓↓> and the two-qubit gate is a zero-controlled NOT gate (zCNOT) configured to convert |↑↑> to |S>.

15. If the first PSB check indicates a block, the two qubit states are |↓↓>, |↑↑>, and |T ０ The method according to claim 14, wherein the two-qubit state is determined to be |S> if it is determined to be one of the > or if the first PSB check indicates the absence of a blockage.

16. The method according to claim 15, wherein if the second PSB check indicates a blockage, the two-qubit state is determined to be one of |↓↓> and |↑↑>, or if the second PSB check indicates the absence of a blockage, the two-qubit state is determined to be |S>.

17. The method according to claim 16, wherein if the third PSB check indicates a blockage, the two-qubit state is determined to be the target state, or if the third PSB check indicates the absence of a blockage, the two-qubit state is determined to be |S>.

18. The method according to any one of claims 1 to 17, wherein the two-qubit state is set in step (i) by pulsing the two spin qubits from a (m+2, n) or (m, n+2) charge state to a (m+1, n+1) charge state (wherein m and n are any even numbers).

19. The method according to any one of claims 1 to 18, wherein the spin qubit is formed from the electron spin or hole spin of a silicon quantum dot.

20. A quantum processing device, Multiple spin qubits, A control arrangement comprising one or more gate electrodes arranged to control the spin states of the plurality of spin qubits, wherein the control arrangement controls a pair of spin qubits among the plurality of spin qubits, (i) Setting the two-qubit state of the pair of spin qubits to an arbitrary state, (ii) Verify the qubit state associated with the pair of spin qubits for the corresponding target state, (iii) The system is configured to initialize to the target state by repeating steps (i) to (ii) in response to determining in step (ii) that the qubit state is not the target state, until it is determined that the qubit state is the target state. A quantum processing device comprising a control arrangement in which determining that the qubit state is the target state involves performing one or more Pauli spin block (PSB) checks and at least one two-qubit state conversion operation on the pair of spin qubits.

21. The quantum processing device according to claim 20, wherein one or more gate electrodes are arranged to set a single-qubit state for each qubit of the pair of spin qubits and to construct a single-qubit logic gate for the pair of spin qubits.

22. The quantum processing device according to claim 21, wherein one or more gate electrodes are arranged to form the pair of spin qubits by generating an exchange coupling between the two spins of each of the spin qubits.

23. The quantum processing device according to claim 22, further comprising a plurality of quantum dots on which the plurality of spin qubits are formed.

24. The quantum processing device according to claim 23, wherein the one or more gate electrodes are arranged to have a voltage applied to electrically insulate and confine one or more electrons or holes in the silicon layer of the quantum processing device to form the corresponding quantum dots.

25. The quantum processing device according to any one of claims 20 to 24, wherein the control arrangement is configured to perform the qubit initialization method according to any one of claims 1 to 19.

26. A method for verifying a two-qubit state of a pair of spin qubits against a sealed target state, (i) The step of performing a first Pauli spin block (PSB) check, (ii) In response to determining from the first PSB check that the two-qubit state is sealed, the step of performing at least one two-qubit state conversion operation on the pair of qubits, (iii) The step of performing at least one additional PSB check, A method comprising (iv) verifying that the two-qubit state is the target state by determining that the two-qubit state is still sealed in response to performing the at least one additional PSB check.

27. The method according to claim 26, wherein each of the PSB checks includes performing a readout operation on the pair of spin qubits within the PSB lifetime in order to maintain the two-qubit state in response to the two-qubit state being in a sealed state.

28. The method according to claim 27, comprising a two-qubit gate configured to convert the two-qubit state to an unblocked state in response to at least one two-qubit state conversion operation being a blocked state and a state different from the target state.

29. The method according to claim 28, wherein the target state is |↓↓> and the two-qubit gate is a zero-controlled NOT gate (zCNOT).

30. The method according to claim 28 or 29, wherein each of the PSB checks is a parity PSB check performed over the two-qubit ground states |↓↓>, |↓↑>, |↑↓>, and |↑↑>.

31. The method according to claim 28 or 29, wherein each of the PSB checks is a singlet-triplet (ST) PSB check performed across two qubit ground states, including a singlet state and a triplet state.

32. Verification that the two-qubit state is the target state is performed sequentially for the pair of spin qubits, the first PSB check, |T ０ The method according to claim 31, comprising performing a first two-qubit state conversion operation as one or more single-qubit rotations performed on the spin qubit to convert > to |S>, a second PSB check, a second two-qubit state conversion operation as a two-qubit gate, and a third PSB check.

33. A method for initializing qubits, (i) Setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) Verify the qubit state associated with the pair of spin qubits for the corresponding target state, A method comprising: (iii) Repeating steps (i) to (ii) until it is determined that the qubit state is the target state in response to determining in step (ii) that the qubit state is not the target state, wherein the qubit state is the two-qubit state of the pair of spin qubits and the target state is a sealed state, and determining that the qubit state is the target state includes sequentially performing at least a first Pauli spin-block (PSB) check, a two-qubit state conversion operation, and a second PSB check on the pair of spin qubits.

34. A method for initializing qubits, (i) Setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) Verify the qubit state associated with the pair of spin qubits for the corresponding target state, (iii) Repeating steps (i) to (ii) in response to determining that the qubit state is not the target state, until it is determined that the qubit state is the target state, wherein determining that the qubit state is the single qubit state of one of the pair of spin qubits, and determining that the qubit state is the target state, includes sequentially performing PSB checks and two-qubit state conversion operations on the pair of spin qubits.

35. A method for initializing qubits, (i) Setting the two-qubit state of a pair of spin qubits to an arbitrary state, (ii) Verify the qubit state associated with the pair of spin qubits for the corresponding target state, (iii) In response to determining in step (ii) that the qubit state is not the target state, steps (i) to (ii) are repeated until it is determined that the qubit state is the target state, wherein determining that the qubit state is the target state is In response to the fact that the qubit state is the two-qubit state of the pair of spin qubits and the target state is a sealed state, the following steps are performed on the pair of spin qubits: at least a first Pauli spin-blocking (PSB) check, a two-qubit state conversion operation, and a second PSB check; A method comprising sequentially performing at least a PSB check and a two-qubit state conversion operation on the pair of spin qubits in response to the qubit state being a single-qubit state of one of the pair of spin qubits.

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