Automatic test apparatus, test mechanism, method for testing with individual sensing in linked operation mode, and device having wired power connection structure

Abstract

Embodiments of the present invention include an automated test apparatus for testing a device under test. This automated test apparatus comprises a plurality of device power supplies. These device power supplies are configured to operate in a linked operation mode. The automated test apparatus is configured to provide individual sensing measurement results associated with individual device power supplies in a set of device power supplies when the individual device power supplies of the set of device power supplies are linked.

Description

Technical Field

[0001] Embodiments of the present invention include an automatic test apparatus, a test mechanism, and a method for testing with individual sensing in an interlocking operation mode.

[0002] Furthermore, embodiments of the present invention include a device having a wired power connection structure.

[0003] Embodiments of the present invention are related to sensing the differential voltage of hot spots.

Background Art

[0004] Background of the Invention Device testing is a critically important step in modern manufacturing processes to ensure compliance with quality standards and optimize cost efficiency by halting further processing steps for defective devices.

[0005] With the increasing complexity of devices, testing has become a difficult task, especially in terms of obtaining segmented information of device subsections such as individual cores and / or device interfaces.

[0006] Furthermore, it is also an issue to protect test apparatuses such as load boards (e.g., jigs) from test failures of defective devices. As an example, a device may show a significant sudden increase in power consumption, causing a dangerous temperature rise that may damage the test apparatus at specific locations such as interfaces.

[0007] Therefore, another issue is to design each device so that it can not only perform dedicated tasks but also be efficiently testable.

Summary of the Invention

Problems to be Solved by the Invention

[0008] In light of the above challenges, one objective of the embodiment is to provide a device testing concept and overcome some or all of the above problems to find an improved compromise between the complexity of the test, particularly the robustness and safety of the test equipment, and the quality of the test (for example, with respect to test information that provides differentiated insights into the behavior of the device and / or the behavior of the test). [Means for solving the problem]

[0009] This is achieved by the subject matter of the independent claim. Furthermore, other embodiments of the present invention are defined by the subject matter of the dependent claim.

[0010] Summary of the Invention Embodiments of the present invention include an automated test apparatus for testing a device under test. This automated test apparatus comprises a plurality of device power supplies. These device power supplies are configured to operate in a linked operation mode (for example, to supply power to a common power domain (also called a supply voltage domain) in a parallel configuration, for example, to supply substantially equal current to a common power domain when operating in a parallel configuration).

[0011] The automated test apparatus is configured to provide, for example, the user interface and / or a user-defined program run on the automated test apparatus, with individual sensing measurement results associated with each individual device power supply in the set of device power supplies when the individual device power supplies in the set are interconnected (for example, interconnected, interconnected to jointly supply power to a common power domain, etc., configured to operate in interconnected mode).

[0012] Therefore, as an example, a set of device power supplies can be considered an "interlocking unit" (e.g., a group, e.g., a set) of device power supplies in interlocking operation mode. Thus, these device power supplies can jointly power the device under test. For example, each device power supply is associated with its own power port, and in interlocking operation mode, all power ports of the set of device power supplies (e.g., interlocking unit, e.g., a group) are turned on simultaneously (and, for example, each port is coupled to power a single common power domain, supply voltage domain, or single common power domain for the device under test). In this interlocking mode, the set of device power supplies functions as a "large-scale" (e.g., larger than individual power supplies) device power supply.

[0013] However, the individual device power supplies of such a set or interconnected unit may be associated with supplying power to individual sections of the device under test (e.g., functional subsections such as individual cores).

[0014] Furthermore, in linked operation mode, one of the multiple device power supplies may function as a master, receiving a first setpoint (e.g., voltage) and providing a second setpoint (e.g., current) to one or more device power supplies acting as slaves, thereby ensuring balanced current distribution to the device under test across different device power supplies. "Balanced" means that substantially equal current is supplied from each power supply device to each section of the device under test on the force signal lines (for example, the current from pogo A to core A is substantially equal to the current from pogo B to core B, and the current from pogo C to core C).

[0015] The inventors have recognized that in linked operation mode, testing of the device under test can be improved by providing individual sensing measurement results associated with each device power supply in a set of device power supplies.

[0016] In particular, it can provide segmented information about different sections of the device under test. It has been recognized that individual sensing (e.g., per device power supply) allows for efficient and precise monitoring of the power consumption of the device under test.

[0017] Furthermore, information regarding the power supply difference to the device under test between device power supplies can be obtained. In particular, it was recognized that this allows for monitoring of power balance and prevents the occurrence of localized hotspots (e.g., occurring only in specific sections) on the device under test.

[0018] Furthermore, by having individual measurements associated with each device power supply in linked mode, the inventors recognized that, contrary to the idea of ​​grouping device power supplies (for example, making them function as one "larger" device power supply more powerful than the individual power supplies), performing measurements on an individual basis (for example, as if the power supplies were not linked, i.e., implementing a measurement strategy for unlinked device power supplies) allows for power supply to a device under test that has multiple sections that consume power individually (for example, operate independently) and therefore have high power consumption, while at the same time still allowing for monitoring power shifts within the device and detecting only section-specific problems by narrowing the measurement target to individual sections or parts of the device.

[0019] Therefore, temperature hotspots can be prevented with fine spatial resolution. In particular, it is possible to prevent temperature hotspots and damage not only in the device itself but also in the interface between the device and the test equipment. Power interfaces can be monitored based on individual measurements. For example, damage to the load board can be prevented by detecting a faulty section of the device under test (such as a faulty core) or a faulty interface (such as increased resistance of the interface due to failure of multiple pins in the interface), respectively.

[0020] For example, even if the overall power consumption of a device is detected to be within acceptable limits, individual measurements may suggest that dangerous power consumption is occurring in certain sections of the device or at the interface between the load board and the device. For instance, if one device power supply in an interconnected system is supplying very high power while others are supplying much lower power, the total input power of the device under test may appear insignificant, but this could lead to consequences such as melting of the interface at the faulty device section receiving the very high power. This embodiment is capable of detecting such behavior, thereby preventing damage to the device and test equipment.

[0021] According to embodiments of the present invention, each device power supply in a set of device power supplies has at least two sense inputs (e.g., a positive voltage sense input and a negative voltage sense input, e.g., a power supply sense input (e.g., PS) and a ground sense input (e.g., GS), e.g., a power supply sense input and an additional sense input (e.g., ES)). Each device power supply in a set of device power supplies is configured to measure the voltage between its at least two sense inputs. Alternatively, or in addition, each device power supply in a set of device power supplies is configured to measure the voltage at its at least two sense inputs. Furthermore, such an automated test apparatus is configured to provide one or more measured voltages as individual sensing measurement results for each device power supply in a set of device power supplies when the individual device power supplies are linked.

[0022] The inventors have recognized that the power consumption of a device under test can be monitored with fine spatial granularity by measuring the voltage drop (for example, between each sense input, e.g., between PS and GS of a power supply). This is particularly useful in testing devices with multiple sections or cores, and even allows for the detection of spatially limited hotspots.

[0023] Furthermore, the voltage in the sense input is measured as the voltage itself, rather than as a voltage drop between sense inputs of a single power supply (for example, to check whether power supply is balanced within each power supply domain or voltage domain), and is compared with the corresponding voltage measurement values of other power supplies.

[0024] Generally, it is possible to provide individual sensing results, thereby achieving a fine spatial granularity for voltage and power monitoring.

[0025] According to an embodiment of the present invention, an automatic test apparatus is configured to provide individual sensing measurement results (for example, individual measurement results representing the voltage between corresponding sensing inputs of a plurality of interlocked device power supplies, for example, individual measurement results representing the voltage at the sensing inputs of a plurality of interlocked device power supplies) associated with individual power devices of a set of interlocked device power supplies for evaluation by a test program executed on the automatic test apparatus. For example, the test program executed on the automatic test apparatus may be provided by a user of the automatic test apparatus.

[0026] Therefore, the measurement results are provided in a form suitable for further evaluation and processing to realize monitoring of devices with time constraints (for example, high speed, for example, even capable of responding to a very rapid temperature rise) and to implement countermeasures to prevent damage. Furthermore, direct evaluation on the automatic test apparatus enables rapid implementation of countermeasures when a defect such as a rapid temperature rise is detected.

[0027] According to an embodiment of the present invention, an automatic test device is configured to provide individual sensing measurement results (e.g., individual measurement results representing the voltage between corresponding sensing inputs of a plurality of interlocked device power supplies, e.g., individual measurement results representing the voltage at the sensing inputs of a plurality of interlocked device power supplies) associated with individual device power supplies of a set of interlocked device power supplies, in order to detect a deviation (e.g., a difference) between voltage drops detected by different device power supplies of the set of interlocked device power supplies (e.g., to enable detection of a change in voltage in a common supply voltage domain by operating in an interlocked operation mode), and / or to detect a deviation (e.g., a difference) between voltages at corresponding (e.g., corresponding positive voltage sense inputs or corresponding negative voltage sense inputs) sense inputs of a plurality of different device power supplies of the set of interlocked device power supplies (e.g., to enable detection of a change in voltage in a common supply voltage domain by operating in an interlocked operation mode).

[0028] Thereby, very efficient monitoring of device power with good spatial resolution can be realized.

[0029] According to an embodiment of the present invention, an automatic test device is configured to individually determine voltages (e.g., voltages VlocalA, VlocalB, VlocalC, and / or voltages ExtdropA, ExtdropB, ExtdropC) between (e.g., paired) two sense inputs of each of a plurality of device power supplies among a set of interlocked device power supplies.

[0030] Optionally, such automated test equipment may be configured to individually determine voltages in different functional blocks (e.g., cores) of a single device under test coupled between the same power domain pair. For example, such automated test equipment may be configured to individually determine voltages in contact structures of multiple devices under test that establish electrical connections between a common external power domain conductor structure associated with a given power domain (e.g., a power plane on a load board) and one or more internal power domain conductor structures associated with the given power domain.

[0031] For example, such an automated test device is configured to individually determine the voltage to detect whether the voltage between two sense inputs of one device power supply in a set of device power supplies exceeds a threshold (for example, to provide an alarm signal and / or perform protective action (e.g., disabling one or more device power supplies, or reducing the voltage and / or current of one or more device power supplies) in response to detecting that the voltage between two sense inputs of one device power supply in a set of device power supplies exceeds a threshold).

[0032] According to embodiments of the present invention, the automated test apparatus is configured to determine the deviation of two or more voltages (e.g., voltages VlocalA, VlocalB, VlocalC, or voltages ExtdropA, ExtdropB, ExtdropC) between two sense inputs in each of several (e.g., different) device power supplies in a set of interconnected device power supplies. As an example, such an automated test apparatus may be configured to determine the difference between the maximum voltage among several voltages measured between each of the two sense inputs of several interconnected device power supplies and the minimum voltage among several voltages measured between each of the two sense inputs of several interconnected device power supplies.

[0033] For example, such an automated test device may be configured to determine a deviation in order to detect whether the difference between the maximum voltage among multiple voltages measured between each of the two sense inputs of multiple interconnected device power supplies and the minimum voltage among multiple voltages measured between each of the two sense inputs of multiple interconnected device power supplies exceeds a threshold (for example, to provide an alarm signal and / or to perform a protective action (e.g., disabling one or more device power supplies, or reducing the voltage and / or current of one or more device power supplies) in response to the detection that the difference between the maximum voltage among multiple voltages measured between each of the two sense inputs of multiple interconnected device power supplies and the minimum voltage among multiple voltages measured between each of the two sense inputs of multiple interconnected device power supplies exceeds a threshold).

[0034] According to embodiments of the present invention, the automated test apparatus is configured to individually determine the voltage at the sense input of each of several device power supplies in a set of interconnected device power supplies (for example, to detect whether the voltage at the sense input of one device power supply in a set of device power supplies exceeds a threshold) (for example, to provide an alarm signal and / or perform a protective action (for example, disabling one or more device power supplies or reducing the voltage and / or current of one or more device power supplies) in response to the detection that the voltage at the sense input of any device power supply in a set of device power supplies has reached or exceeded a threshold).

[0035] According to an embodiment of the present invention, the automated test apparatus is configured to determine the deviation (e.g., difference) of two or more voltages at the sense input of each of a set of interconnected device power supplies.

[0036] For example, such an automated test device may be configured to determine the difference between the maximum voltage among multiple voltages measured at the corresponding sense inputs of multiple interconnected device power supplies and the minimum voltage among multiple voltages measured at each sense input of the multiple interconnected device power supplies.

[0037] For example, such an automated test apparatus may be configured to determine a deviation in order to detect whether the difference between the maximum voltage among multiple voltages measured at the corresponding sense inputs of multiple interconnected device power supplies and the minimum voltage among multiple voltages measured at each sense input of the multiple interconnected device power supplies reaches or exceeds a threshold.

[0038] For example, such an automated test apparatus is configured to determine a deviation in order to provide an alarm signal and / or perform a protective action (e.g., disabling one or more device power supplies, or reducing the voltage and / or current of one or more device power supplies) if the difference between the maximum voltage and the minimum voltage of multiple voltages measured between two corresponding sense inputs of multiple interconnected device power supplies exceeds a threshold.

[0039] In other words, based on using or utilizing the individual sense inputs of each power supply in a set of power supplies, the voltage drop between the sense inputs of each power supply (e.g., PS and GS) (e.g., compared to an expected (e.g., test-specific) reference value) may be monitored, or such voltage drops measured by different power supplies providing different sections or cores of the device under test may be compared with each other. This makes it possible to determine the power consumption of the device and the power balance of those power supplies without prior knowledge of the test and / or the device's behavior.

[0040] On the other hand, for example, as a redundant measure or alternative, the voltages at the sense inputs of different power supplies can be compared, and thus it can be determined whether the sense inputs coupled to a common power supply or voltage domain provide the same or at least similar values ​​(e.g., indicating a balanced power supply). Similarly, it is possible to compare the sense inputs of different power supplies with each other or evaluate them individually against a reference value.

[0041] Therefore, based on improvements in information extraction from different sense inputs, multiple safety measures can be implemented for test monitoring.

[0042] Accordingly, as an example, direct evaluation (e.g., direct determination) using automated testing equipment (and without external devices that could cause information transmission delays) enables rapid countermeasures and thereby prevents damage.

[0043] In particular, by determining individual voltages (e.g., voltage evaluation), information for evaluating the test, the status and balance of the linked power supplies, and / or for efficiently evaluating the devices can be extracted in a differentiated manner.

[0044] As discussed in the embodiments above, depending on the application, different choices regarding comparison with a reference voltage, a reference voltage drop, or comparison between voltages or voltage drops can be used to identify differences in behavior between the device power supply and a section of the device (e.g., the device core). Therefore, each implementation of the embodiments can be optimized for a specific application and allow for redundant safety measures.

[0045] According to embodiments of the present invention, the automated test apparatus is configured to individually monitor the voltages at different locations of a device under test coupled to a common power domain pair, using different individual sensing measurement results provided by the interconnected device power supplies (for example, using each sense input pair of the interconnected device power supplies (e.g., PS and GS)) to detect, for example, whether the voltage at any one of the different locations of the device under test reaches or exceeds a threshold, and / or, for example, whether the voltage difference between different locations of the device under test is greater than or equal to a predetermined threshold.

[0046] Therefore, while limiting hardware complexity, it becomes possible to monitor, control, or inspect individual sections of the device under test in a linked operation mode. This allows for the detection of locally concentrated thermal surges and the prevention of damage. In particular, the inventors have recognized that test, power consumption, and supply operations can be efficiently monitored by comparing sense inputs that monitor a common power domain.

[0047] According to embodiments of the present invention, each of the interconnected device power supplies has at least three sense inputs. The automated test apparatus is configured to individually monitor voltage drops in multiple contact structures for contacting the device under test, associated with the same power domain, at different locations on the device under test (e.g., different physical locations, e.g., different pins on the device under test), using each pair of sense inputs (e.g., ES and PS of the interconnected device power supplies) (e.g., using different individual sensing measurement results provided by the interconnected device power supplies).

[0048] Furthermore, such automated test equipment may optionally be configured to individually monitor voltage drops, for example, to detect whether the voltage drop in any one contact structure reaches or exceeds a threshold, and / or to detect whether the voltage drops in different contact structures (at different locations on the device under test) show a difference that exceeds a predetermined threshold.

[0049] The inventors have recognized that by providing an additional sense input (e.g., a third sense input, e.g., ES), it is possible to monitor and evaluate the behavior of the test at the contact structure, i.e., interface, between the device under test and the test equipment (e.g., a load board). This allows for the detection of thermal surges at a fine spatial granularity and prevents damage to the contact area (e.g., the contact structure). In particular, it prevents damage to expensive test equipment (load board) caused by faulty devices at the interface. This is especially beneficial in linked operation modes where multiple power supplies operate in conjunction, as this increases the probability of power supply imbalances to the device and increases the risk of overheating or melting of the load board-device-interface due to faulty devices.

[0050] According to embodiments of the present invention, the automated test apparatus is configured to evaluate individual sensing measurement results associated with individual device power supplies of a set of device power supplies (for example, individual measurement results showing the voltage between the positive sense input and negative sense input of each device power supply, for example, individual measurement results of the voltage at each positive sense input and / or each negative sense input) when the individual device power supplies of a set of device power supplies are in conjunction (for example, in real time or near real time) during the execution of a test of the device under test (for example, in real time or near real time).

[0051] For example, such an automated test apparatus may be configured to evaluate individual sensing measurement results in order to detect error conditions (for example, a condition indicating excessive current consumption of a functional block of the device under test, or a condition indicating excessive contact resistance of a power supply connection) during the execution of testing of the device under test (for example, to trigger error handling during the execution of testing of the device under test).

[0052] As described above, direct evaluation in automated testing equipment allows for a rapid response when problematic behavior occurs, such as thermal surges (identified, for example, by an unbalanced power supply).

[0053] According to embodiments of the present invention, the automated test apparatus is configured to provide a power sense signal evaluation function at a per-device power supply granularity for device power supplies operating in linked operation mode (for example, by making available to a test program executed by the automated test apparatus (e.g., a user-defined test program) the individual sensing measurement results associated with each individual device power supply of a set of linked device power supplies).

[0054] The inventors recognized that this inventive approach enables evaluation at a fine particle size, improving the safety and efficiency of the test. In particular, the measurement capabilities of the power supply are efficiently utilized.

[0055] Furthermore, other embodiments of the present invention include an automated test apparatus for testing a device under test according to an embodiment (for example, any of the embodiments described above), and a test mechanism comprising: a load board configured to connect voltage-sensing contact structures (for example, contact needles for contacting the device under test) for contacting the device under test associated with a common power domain (for example, associated with the same positive power supply voltage or associated with the same reference potential) to the sense inputs of different interlocking device power supplies individually (for example, using conductive paths).

[0056] Optionally, the positive output of the interlocking device power supply may be connected to a common first supply voltage conductor on the load board (e.g., a power plane). As another optional feature, for example, alternatively or additionally, the negative output of the interlocking device power supply may be connected to a common second supply voltage conductor on the load board (e.g., a power plane). As yet another optional feature, for example, alternatively or additionally, the sense input of the interlocking device power supply may be connected via a separate conductor (e.g., a separate conductive path on the load board) to a sense contact for contacting the device under test at a different location.

[0057] The inventors have recognized that the features, functionality, and details described for each automated testing device synergistically transfer their respective advantages to the overall testing device (e.g., the testing mechanism), enabling an improved testing mechanism. This includes load boards. In particular, improved granularity in monitoring is beneficial for preventing damage to each load board. Therefore, based on the inventive improvements to each automated testing device, load boards can be protected with little to no additional effort.

[0058] According to embodiments of the present invention, the load board has a plurality of voltage sense contact structures (e.g., contact needles for contacting the device under test) configured to contact the device under test at different locations in order to connect a common power domain of the device under test to each sense input of different interlocking device power supplies.

[0059] Optionally, the voltage sense contact structure may be configured to be current-free when the device under test is supplied by an interlocking device power supply. For example, the voltage sense contact structure does not carry the supply current to power the device under test. Optionally, the test mechanism may be configured so that different interlocking device power supplies detect voltages at different locations within a common power domain of the device under test.

[0060] For example, alternatively or additionally, the load board may have a separate sense line connecting a voltage sense contact structure (e.g., the device-under-test end of the contact portion for contacting the device under test (DUT)) to a connector (e.g., a pogo connector, e.g., a spring-loaded pin connector) for establishing connections with multiple interconnected device power supplies.

[0061] Therefore, the embodiment provides the above-mentioned inventive advantages while enabling good testing flexibility that is not limited to a specific spatial arrangement on the load board.

[0062] Embodiments of the present invention include a method for testing a device under test using an automated test apparatus comprising multiple device power supplies. The method includes operating the multiple device power supplies in a parallel configuration (for example, to supply power to a common power domain, also designated as a supply voltage domain) in a linked operation mode (for example, to supply approximately equal current to a common power domain when operating in a parallel configuration). Furthermore, the method includes providing (for example, to a user interface and / or a user-defined program run on the automated test apparatus) individual sensing measurement results associated with each linked device power supply of the multiple linked device power supplies (for example, individual measurement results showing the voltage between the positive and negative inputs of each device power supply, for example, individual measurement results of the voltage at each positive sense input and / or each negative sense input).

[0063] The method described above is based on the same considerations as the automated testing apparatus described above. Furthermore, this method incorporates all the features and functionalities described for the automated testing apparatus.

[0064] In particular, each inventive method may include features, functions, and details that are identical, similar, or corresponding to each inventive automated testing apparatus.

[0065] According to embodiments of the present invention, this method includes using voltage sense inputs of different interconnected device power supplies (e.g., two or more interconnected device power supplies, or all interconnected device power supplies) to monitor voltages at different locations on the device under test and / or voltages between different pairs of voltage sense contacts on the device under test.

[0066] Embodiments of the present invention include a device (e.g., a semiconductor device, a 3D device, or a semiconductor device having multiple stacked dies) comprising: a first die (e.g., a base die); a second die (e.g., a top die); a power connection structure connecting one or more first external contacts of the device to a supply voltage conductor of the second die (e.g., a power plane or power layer); and a voltage sense connection between the second external contact of the device and the power conductor of the second die. The power connection structure is routed through the first die (e.g., through vias penetrating the first die or through the power conductor of the first die).

[0067] The inventors have recognized that by providing a voltage-sensing connection between the second external contact of the device and the power conductor of the second die, in addition to the wiring through the first die, such a power connection structure (for example, in the form of a via), differentiated measurement information regarding the second die can be obtained. This has been recognized as particularly useful in configurations in which the second die is powered by the power connection structure of the first die. Thus, in contrast to conventional methods, monitoring of the second die becomes possible, and thermal surges and device damage can be prevented in an improved manner, such as by improving reliability and robustness. Furthermore, differentiated information regarding the functionality of the second die can be obtained, which is information that could only be obtained indirectly by other methods. In particular, the embodiment makes it possible to monitor the first die and the second die individually based on the inventive connection structure.

[0068] According to embodiments of the present invention, the power connection structure includes a supply voltage conductor located on or inside a first die. Multiple first external contacts of the device are connected to the supply voltage conductor located on or inside the first die. The supply voltage conductor located on or inside the first die is connected to the supply voltage conductor of a second die (for example, by one or more connection structures, for example, by one or more vias and / or by one or more bumps and / or by one or more bonding wires). The voltage sense connection is positioned to bypass the supply voltage conductor located on or inside the first die (for example, so that no current flows through the voltage sense connection when the second die is powered via a power connection structure; for example, so that the voltage sense connection directly connects the second external contact of the device to the supply voltage conductor of the second die; for example, so that there is no electrical connection between the voltage sense connection and the supply voltage conductor located on or inside the first die within the region of the first die; for example, so that the voltage sense connection is electrically isolated from other conductive structures within the region of the first die; for example, so that the sense connection is connected only indirectly to the power conductor located on or inside the first die via the power conductor of the second die, and not directly to the first die).

[0069] By bypassing the supply voltage conductor located on or inside the first die, the behavior of the second die can be measured separately and independently, allowing for precise and segmented evaluation of the second die despite its coupling with the first die.

[0070] According to an embodiment of the present invention, the voltage sense connection is configured to be in a current-free state (for example, a state in which no current flows) when the second die is powered via the power supply connection structure.

[0071] Therefore, precise voltage measurements become possible to analyze the behavior of the second die.

[0072] According to embodiments of the present invention, the entire extension of the voltage sense connection (for example, the portion from the external contacts of the device (such as pins or pads) to the second die) is isolated (for example, mechanically isolated, e.g., spaced apart) from the current path between one or more first external contacts of the device and the supply voltage conductors of the second die (for example, power planes or power layers).

[0073] This ensures the independence of the second die measurement, improving the efficiency and robustness of device testing. [Brief explanation of the drawing]

[0074] The drawings are not necessarily to scale, and the focus is on illustrating the principle of the invention. The following description will illustrate various embodiments of the invention with reference to the following drawings. [Figure 1] This diagram shows a schematic representation of an automated testing apparatus for testing a device under test according to an embodiment of the present invention. [Figure 2] A schematic diagram of a test mechanism comprising an automatic test device and a load board according to an embodiment of the present invention is shown. [Figure 3] Figure 2 shows schematic diagrams of the test mechanism under different conditions. [Figure 4] Figure 2 shows schematic diagrams of the test mechanism under different conditions. [Figure 5] Figure 2 shows schematic diagrams of the test mechanism under different conditions. [Figure 6] Figure 2 shows schematic diagrams of the test mechanism under different conditions. [Figure 7] A schematic diagram of a device according to an embodiment of the present invention is shown. [Figure 8] A schematic diagram of an embodiment that provides good spatial hotspot resolution is shown. [Figure 9] A schematic block diagram of a method for testing a device under test using an automated test apparatus equipped with multiple device power supplies, according to an embodiment of the present invention, is shown. [Figure 10]A schematic diagram of a test mechanism equipped with a power supply for the interlocking operation mode according to an embodiment of the present invention is shown. [Modes for carrying out the invention]

[0075] Detailed description of the embodiment Identical or equivalent elements, or elements having the same or equivalent function, will be indicated by the same or equivalent reference numerals in the following description, even if they appear in different drawings.

[0076] The following description includes several details to further illustrate embodiments of the present invention. However, those skilled in the art will understand that embodiments of the present invention can be implemented without these specific details. In other examples, well-known structures and devices are shown in block diagram form rather than in detail, so as not to obscure embodiments of the present invention. Furthermore, unless otherwise specified, features of the different embodiments described below can be combined with each other.

[0077] Figure 1 shows a schematic diagram of an automated test apparatus for testing a device under test according to an embodiment of the present invention. The automated test apparatus 100 comprises first and second device power supplies 110 and 120. In the configuration shown in Figure 1, the device power supplies 110 and 120 operate in a linked operation mode and provide a common power output 103 based on individual power signals 1031 and 1032 of the power supplies 110 and 120.

[0078] Furthermore, the automated test apparatus 100 is configured to provide individual sensing measurement results 101, 102 associated with each individual device power supply of the multiple device power supplies when multiple device power supplies (in this example, a set including both device power supplies 110 and 120) are linked together (for example, as indicated by the combined output 103).

[0079] In the following, several optional functions, features, and details will be described in the context of the test mechanism according to the embodiment. This test mechanism comprises an automated test device and a load board according to the embodiment.

[0080] For the sake of brevity, the individual features, functionalities, and details of the automated testing apparatus and load board according to the embodiments of the present invention will be discussed in the context of such testing mechanisms. However, it should be noted that each automated testing apparatus in the following testing mechanisms may include any combination of the features presented for each automated testing apparatus described below, regardless of the usage in each testing mechanism.

[0081] Therefore, although described in the context of a test mechanism, the features, functionality, and details disclosed for the automated test equipment are individually applicable, and it should be noted that they are particularly applicable even when a corresponding load board is not available or when there is no configuration as a test mechanism.

[0082] Figure 2 shows a schematic diagram of a test mechanism comprising an automated test apparatus and a load board according to an embodiment of the present invention. The test mechanism 200 comprises an automated test apparatus 300 comprising a plurality of device power supplies 310, 320, and 330. In the example in Figure 2, the device power supplies are shown as pogo A, pogo B, and pogo C, and, as an example, the coupling means or interface (e.g., using pogo pins) of each are focused on.

[0083] The test mechanism 200 further comprises a load board 400, which optionally has a first layer 410 and a second layer 420. The device power supply is coupled to the second layer 420 of the load board, as indicated by lines 311, 321, and 331, and to the first layer 410 of the load board, as indicated by lines 312, 322, and 332. Layers 410 and 420 may be implemented on the load board as separate conductive layers, for example, to supply power to the device under test (DUT).

[0084] As an optional feature, the load board 400 is configured to individually connect voltage sense contact structures (indicated by, for example, resistor 620) that contact DUTs associated with a common power domain to the sense inputs of different interconnected device power supplies.

[0085] As shown in element 430, layers 410 and 420 may be capacitively coupled, for example, using a capacitor or a capacitor network. Such coupling may be (for example, alternative or partially) parasitic in nature.

[0086] Furthermore, Figure 2 shows the device under test 500 having different sections 510, 520, 530 (here, as an example, in the form of different cores (A, B, C)). As shown as an optional feature, each section 510, 520, 530 may include a first layer 511, 521, 531 and a second layer 512, 522, 532.

[0087] The first layer 410 of the load board 400 and the first layers 511, 521, and 531 of the device 500 may form a common supply voltage domain. Alternatively, the second layer 420 of the load board 400 and the second layers 512, 522, and 532 of the device 500 may form a reference voltage domain or a ground voltage domain.

[0088] Therefore, the device 500 is connected between those domains for power supply. The interface between the load board 400 and the device under test 500 is modeled in Figure 2, for example, as resistors 600 (e.g., modeling the interface portion on the device side), 630 (e.g., modeling the interface portion on the power supply voltage domain side of the load board), 640 (e.g., modeling the interface portion on the reference voltage domain side of the load board), and pads or bumps 700.

[0089] For example, each power supply 310, 320, and 330 has three sense inputs, namely 313, 314, 315 and 323, 324, 325 and 333, 334, 335. For example, each sense input is denoted as PS (e.g., power sense) (313, 323, 333), GS (e.g., ground sense) (314, 324, 334), and ES (e.g., extended sense) (315, 325, 335). Note in particular that each third sense input ES is optional.

[0090] Sense lines 323 and 324, as well as 333 and 334 (and, for example, 313, 314) are optionally in a no-current state (as indicated by the different appearances of each resistor 620 in Figure 2).

[0091] Device 500 may have internal connections between each device section 510, 520, and 530, as modeled by an additional resistor 610.

[0092] As shown in Figure 2 (see connections 312, 322, 332), the device power supplies 310, 320, and 330 are configured to operate in linked operation mode. Each of the device power supplies 310, 320, and 330 supplies power P to a common power domain (for example, layer 410 of the load board 400 shown in Figure 2). This power is supplied to the device under test 500 via the load board-device interface. In Figure 2, this is modeled by resistors and inputs between the device 500 and layer 410. The common power domain may further include the respective first layers 511, 521, and 531 of the device 500. Thus, a power domain is a region where a specific supply voltage exists or is expected to exist, or where a specific supply voltage (for example, different voltages between layer 410 and layers 511, 521, and 531) is desired or provided for testing.

[0093] Furthermore, the automated test apparatus 300 is configured to provide individual sensing measurement results associated with each individual device power supply in the set of device power supplies (for example, inputs 313, 314, 315, 323, 324, 325, 333, 334, 335) when the individual device power supplies of the set of device power supplies are synchronized.

[0094] The configuration shown in Figure 2 illustrates multiple arbitrary measurement configurations.

[0095] Each device power supply 310, 320, 330 has sense inputs PS (313, 323, 333) and GS (314, 324, 334). As an optional feature, each device power supply may be configured to measure the voltage between at least two sense inputs (e.g., the voltage between each PS and GS, e.g., between 313 and 314, or between 323 and 324). Alternatively, each device power supply may be configured to measure the voltage at at least two sense inputs (thus, e.g., a first voltage associated with each PS (e.g., 313) and a second voltage associated with each GS (e.g., 314), e.g., both in comparison to a common reference).

[0096] Therefore, the automated test apparatus may be configured to provide such individual (e.g., power supply-specific) measurement results, or to determine, evaluate, and compare them.

[0097] Therefore, by using the configuration shown in Figure 2, multiple evaluation methods can be performed according to the embodiment. The automated test apparatus may be configured to detect voltage drops in each section of the device under test. For example, sense inputs 323 and 324 are used to measure the voltage on core B520. Such voltage drops are compared to a reference voltage drop (e.g., the expected voltage drop for each test and core) or to a voltage drop in another section of the device under test (e.g., core A510 or core B530).

[0098] Therefore, in the embodiment, it is possible to determine each voltage by considering, for example, the desired balance of power consumption in different sections of the device under test, in addition to predefined thresholds.

[0099] Accordingly, individual voltages can be measured and compared. For example, the voltage of each PS input can be compared to a predefined threshold, or to PS inputs directed to other sections of the device under test. By comparing with measurements from other device sections, the power balance of device power supplies 310, 320, and 330 can be monitored.

[0100] Beyond mere comparison, it is possible to monitor voltage drops or voltage gradients (e.g., voltage deviation or rate of change), for example, showing a sharp increase due to interface melting.

[0101] In the diagram of Figure 2, in simple terms, the embodiment enables monitoring of device sections in terms of voltage from the power domain or a section thereof (e.g., 410) to the reference domain or a section thereof (e.g., 420), and therefore in the direction of power consumption (vertical in the image). Furthermore, it enables monitoring, for example, in terms of voltage, within a domain (horizontal in the image), by comparing the corresponding sense inputs of different device sections (e.g., 510, 520, 530) that are associated with the same domain (e.g., comparing 313, 323, 332).

[0102] In other words, the embodiment enables balancing of power supplies between and within domains ("vertical" and "horizontal" in Figure 2). This improves the robustness and safety of device testing.

[0103] The optional additional third sense inputs ES, 315, 325, and 335 allow for further granularity of monitoring. Using the above inputs, it is possible to monitor contact structures for contacting the device under test at different locations on the device under test, all associated with the same power domain. Here again, as described above, it is possible to monitor voltage drops (e.g., between each PS and ES), compare ESs of different power supplies, and determine the voltage behavior of the ES (e.g., gradient).

[0104] The evaluations of each of the above PS, GS, and ES can be performed in real time, for example, during testing. This allows for rapid correction of imbalances in the power supply.

[0105] Figures 3 to 6 show schematic diagrams of the test mechanism shown in Figure 2 under different conditions. Figures 2 to 6 also show an example of the configuration and operation of an embodiment of the present invention.

[0106] Referring to Figure 2, unlike conventional approaches, embodiments of the present invention can use multiple measurement signals to collect more detailed information based on the device / fixture structure. In other words, Figure 2 may show a schematic diagram of a typical configuration of differential voltage sensing for hotspot detection.

[0107] Figure 2 shows, as an example, a configuration with three tester pogo pins 310, 320, and 330 operating in parallel to supply power to the device under test 500. The master channel (pogo A) may be configured to adjust the power output (signal P) to achieve a programmed output voltage at the device under test. This voltage may be remotely sensed, for example, as the difference between the master's GS (ground sense, e.g., 314) and PS (power sense, e.g., 313). Pogos B and C can be configured, for example, to share current so that pogos A, B, and C are evenly balanced. Thus, the device power supplies 310, 320, and 330 may operate in interlocking operation mode, particularly in balanced interlocking operation mode.

[0108] As described above, in embodiments of the present invention, multiple sense signals (power sense (PS), ground sense (GS), and optionally extended sense (ES)) can be used for individual device cores and their fixture connections (e.g., load board interface). Note that the marked contact area (620) in Figure 2 may indicate a measurement line in which no current flows.

[0109] For example, as shown in the example in Figure 3, ideally power is balanced from power supplies 310, 320, and 330 (see arrows 710, 720, and 730 of the same width, indicating that power supply and consumption are balanced between different device sections). This results in similar voltage drops ExtdropA, ExtdropB, ExtdropC and VlocalA, VlocalB, and VlocalC.

[0110] Therefore, Figure 3 may show an example of a balanced device current. In other words, Figure 3 may show an example of a perfectly balanced core power and current flow (arrows 710, 720, 730) within device 500. Extvdrop (ES-PS) and Vlocal (PS-GS) are identical, or at least nearly identical, for all cores.

[0111] Figure 4 shows a schematic diagram of the configuration described in Figure 2, illustrating a hotspot on core C as an example. For example, if core C (530) exhibits very high current consumption (see the increased width of arrow 730 compared to the balanced state shown in Figure 3), the local voltage at core C (e.g., VlocalC) may decrease, or actually does decrease, as does the extVdrop (labeled Extdrop in Figure 4) near core C. Because there is finite resistance in the interconnections between cores (by bonding wires, metal layers, device substrates, etc.) (see e.g., 610), an increase in current may occur, or actually occurs, in adjacent cores as well.

[0112] For example, as indicated by arrows 810, 820, 830, and 840, additional current (power flow) flows, resulting in an unbalanced power distribution.

[0113] The measured voltage drop may also increase in adjacent cores. The apparatus (e.g., 200, 300) may be configured to measure and compare individual drop measurements, and the low local voltage in core C (and core B) clearly indicates a hotspot in that region. Cores with high resistance between local power supplies may be relatively less affected by hotspots, or are not affected at all.

[0114] Figure 5 shows a schematic diagram of the configuration described in Figure 2, and is shown as an example of increased localized contact resistance (on the supply side).

[0115] For example, as indicated by the X mark 900, a situation may occur where the contact area malfunctions, and therefore the contact resistance increases. Consequently, ExtdropC may increase, as indicated by the increase in the width of the arrow (for example, in comparison with Figure 2).

[0116] Increased resistance at the contact points of a fixture (e.g., load board 400) or degradation of internal core connections in the device can increase extVdrop (also known as extdrop), or actually increase it (see, for example, ExtdropC). This is particularly important in multi-die devices (3D devices, die-to-die bonding, die-to-substrate bonding, etc.). As a secondary effect, internal connections (e.g., modeled as resistor 610) can draw in additional current (see, for example, arrow 850) from closer cores (e.g., core B here), increasing extVdrop at these pogo pins.

[0117] Figure 6 shows a schematic diagram of the configuration described in Figure 2, illustrating, as an example, a state in which the contact resistance (on the GND side) is locally increased.

[0118] An increase in contact resistance on the GND side of the core (see Mark X, 900, etc., explained in the context of Figure 5) can lead to a decrease in the Vlocal of this pogo, and a slight decrease in the adjacent core.

[0119] Referring to Figures 2 to 6, the following measurement procedure can be performed according to the embodiment. • The trigger executes all relevant Vlocal and extVdrop measurements (ADV: per pogo function). • Determine each Vlocal against its limit value • Calculate the difference between the minimum and maximum values ​​of Vlocal. If it is excessive, detect an anomaly and set the test as a failure, interrupting the test to avoid further damage to the device / fixture. • Determine each extVdrop against its limit value The system calculates the difference between the minimum and maximum values ​​of extVdrop. If the difference is excessive, it detects an anomaly, sets the test to fail, and interrupts the test to avoid further damage to the device / fixture.

[0120] According to the embodiment, the real-time monitoring procedure (e.g., asynchronous) includes the following: A common threshold for extVdrop is defined, and if any core extVdrop exceeds this level for a predetermined minimum time, the tester will generate an alarm, optionally disconnecting the device under test to cut off the current and prevent potential damage. Optionally, a surge tracker can be used per pogo configuration to capture Vlocal bumps (and even more optionally, to record Vlocal bumps and / or to respond to Vlocal bumps (e.g., by correcting the test flow and / or using fail-safe procedures)).

[0121] Next, refer to Figure 7. Figure 7 shows a schematic diagram of a device according to an embodiment of the present invention. The device 1000 comprises a first die 1100, a second die 1200, and a power supply connection structure 1110 that connects one or more first external contact portions 1120 of the device to a supply voltage conductor 1210 of the second die. The power supply connection structure 1110 is wired via the first die 1100.

[0122] Device 1000 further includes a voltage sense connection 1130 between the device's second external contact portion 1140 and the power conductor 1210 of the second die 1200.

[0123] As an example, to explain in simple terms, Figure 7 shows one embodiment of a method for detecting stacked dies (e.g., 1100, 1200) within a device (e.g., 1000).

[0124] As shown in Figure 7, the first die 1100 may be a base die (e.g., DUT A), and the second die 1200 may be a top die (e.g., DUT B). Both of these may be part of the device under test 1000 (e.g., "DUT"). In other words, Figure 7 shows a device according to an embodiment, which provides "additional" sense connections (PS and GS) for a 3D / TVS type device for sensing the actual voltage on the "top" die.

[0125] As an optional feature, external contacts, such as 1120 and 1140, may be provided in the form of power pads or power bumps (e.g., PWR pads / bumps).

[0126] As an optional feature, the power connection structure 1110 has through-silicon vias (TSVs) 1112 and a supply voltage conductor 1114. Multiple contact points (in this example, pads or bumps) are connected to or attached to the supply voltage conductor 1114. As shown in Figure 7, the device 1000 may have further TSVs.

[0127] As shown in Figure 7, according to this embodiment, the voltage sense connection 1130 can bypass the supply voltage conductor 1114 located on or inside the first die 1100. In particular, this configuration allows the voltage sense connection (e.g., 1120 to 1140) to be in a current-free state even when the die 1200 is supplied with current through the power connection structures 1114 and 1210, respectively. As shown in Figure 7, power is supplied via the voltage force input 1300.

[0128] Therefore, the current path from the voltage force input 1300 (e.g., voltage force A) through the die 1200 to the ground network (e.g., GND network) and the respective ground outputs (e.g., GND (e.g., GND A)) may be isolated from the voltage sense connection 1130.

[0129] Figure 8 shows a schematic diagram of one embodiment that provides good spatial hotspot resolution. Figure 8 shows a load board 2000 (also called a fixture) comprising each device or device section 2400, and each sense input PS(2100), GS(2200), and ES(2300). Thus, the distribution of each sense line enables fine spatial resolution with respect to hotspot detection and prevention. Therefore, spatial resolution is achieved by the arrangement of “sense” contacts along the device.

[0130] Figure 9 shows a schematic block diagram of a method for testing a device under test using an automated test apparatus comprising multiple device power supplies according to an embodiment of the present invention. Method 3000 includes operating the multiple device power supplies in a linked operation mode 3100 and providing individual sensing measurement results associated with each of the multiple linked device power supplies 3200.

[0131] Figure 10 shows a schematic diagram of a test mechanism equipped with a power supply in an interlocking operation mode according to an embodiment of the present invention. Figure 10 shows a test mechanism 4000 equipped with an automated test device. The automated test device is equipped with a plurality of device power supplies 4100, 4200, and 4300. In the example of Figure 10, the plurality of device power supplies form a set of device power supplies.

[0132] According to the embodiment shown in Figure 2, the automated test apparatus is configured to supply power to the device under test 4600 by providing individual sensing measurement results using inputs PS1, GS1, ES1 corresponding to power supply 4100, inputs PS2, GS2, ES2 corresponding to power supply 4200, and inputs PS3, GS3, ES3 corresponding to power supply 4300, when the individual device power supplies of the set of device power supplies are linked.

[0133] The third sense inputs ES1, ES2, and ES3 are optional. The power coupling between the device power supplies 4100, 4200, and 4300 and the device under test 4600 is modeled in Figure 10, taking into account the resistances 4700 of each force signal line P1, P2, and P3 that supply power to a common power / voltage domain. This domain includes the power conductor portion on the load board 4400 and the power conductor portion on the device under test (DUT). The coupling between the load board and the device under test is indicated by interface 4500.

[0134] As shown in Figure 10, the coupling of sections of the device under test (in this example, the power conductor section) is modeled using an additional resistive connection 4800. Each section or core of the device under test is modeled as I-core A, I-core B, and I-core C.

[0135] Furthermore, based on Figure 10, the linked operation mode needs to be further emphasized. As shown in Figure 10, the voltage reference VForce 4110 is supplied to a first device power supply 4100, which may be a master device power supply named Pogo A / Master, for example. Based on the comparison of VForce and PS1 in the subtractor 4120, a voltage 4130 is set to supply a first current via force line P1. The current 4150 is measured using the measurement unit 4140 and further supplied to device power supplies (slave power supplies named Pogo B / Slave, Pogo C / Slave, etc.). Based on this, each power supply supplies current to the device under test via current sources 4210 and 4310 and through their respective force lines P2 and P3. In this linked operation mode, the master power supply may supply the first current based on a target value (e.g., VForce 4110). This current serves as a reference for multiple slave power supplies, ensuring that they supply substantially equal, or at least similar, currents through each force line (P1, P2, P3) to maintain a balanced power supply operating mode.

[0136] Therefore, in other words, Figure 10 may illustrate balancing the current for each pogo by replicating the master current (e.g., 4150) measured by each slave channel (e.g., using 4210, 4310). The device power supply can function as a current balancer. Alternatively, as an example, the interlocking operation mode can be understood as a current balancing operation mode. In other words, the current balancer may be implemented (or operated) in the device power supply (e.g., a multi-channel device power supply that can be implemented using a single hardware module or a combination of multiple hardware modules).

[0137] Therefore, Figure 10 can be understood as a schematic diagram of the detailed signal model of Figure 2, taking into account, for example, the following features, for a good or optimal device configuration. • The fixture (e.g., load board) provides an "additional" sense contact (e.g., a needle) for each pogo (e.g., each device power supply) for the PS. • The fixture (e.g., load board) provides an "additional" sense contact (e.g., needle) for each pogo (e.g., each device power supply) for the GS. • The fixture (e.g., load board) provides an "additional" sense contact (e.g., a needle) for each pogo (e.g., each device power supply) for ES. The device (for example, shown in Figure 7 and 4600) provides "additional" sense connections (PS and GS) for 3D / TVS type devices to sense the actual voltage on the "TOP" die.

[0138] Alternatives to the embodiment Some embodiments are described in the context of an apparatus, but these embodiments also represent a description of a corresponding method, where a block or device corresponds to a method step or a feature of a method step. Similarly, embodiments described in the context of a method step also represent a description of a corresponding block, item, or feature of a corresponding apparatus. Some or all of the method steps may be performed by (or using) hardware devices such as a microprocessor, a programmable computer, or an electronic circuit. In some embodiments, one or more of the most important method steps may be performed by such devices.

[0139] Depending on the specific implementation requirements, embodiments of the present invention may be implemented in hardware or software. Implementation can be carried out using digital storage media such as floppy disks, DVDs, Blu-rays, CDs, ROMs, PROMs, EPROMs, EEPROMs, and flash memory. These media store electronically readable control signals and, in conjunction with (or capable of conjunction with) a programmable computer system, the respective methods are executed. Thus, the digital storage media are computer-readable.

[0140] Some embodiments of the present invention include a data carrier having an electronically readable control signal. This control signal is capable of cooperating with a programmable computer system, thereby enabling any of the methods described herein.

[0141] Generally, embodiments of the present invention can be implemented as a computer program product comprising program code. This program code operates to perform one of the methods when the computer program product is executed on a computer. The program code may be recorded, for example, on a machine-readable medium.

[0142] Other embodiments include a computer program recorded on a machine-readable medium for performing any of the methods described herein.

[0143] In other words, embodiments of the methods of the present invention are computer programs having program code that, when executed on a computer, performs any of the methods described herein.

[0144] Accordingly, further embodiments of the methods of the present invention are data carriers (or digital storage media, or computer-readable media) recording computer programs for performing any of the methods described herein. Data carriers, digital storage media, or recording media are typically tangible and / or non-transient.

[0145] Therefore, a further embodiment of the method of the present invention is a data stream or signal sequence representing a computer program for performing any of the methods described herein. The data stream or signal sequence may be configured to be transmitted, for example, over a data communication connection over the Internet.

[0146] Yet another embodiment includes, for example, a processing means such as a computer or a programmable logic device, which is configured or adapted to perform any of the methods described herein.

[0147] Yet another embodiment includes a computer on which a computer program for performing any of the methods described herein is installed.

[0148] Further embodiments of the present invention include an apparatus or system configured to transfer a computer program for performing any of the methods described to a receiver (e.g., electronically or optically). The receiver is, for example, a computer, a mobile device, or a storage device. The apparatus or system may include, for example, a file server for transferring the computer program to the receiver.

[0149] In some embodiments, a programmable logic device (e.g., a field-programmable gate array) can be used to perform some or all of the functions of the methods described herein. In some embodiments, the field-programmable gate array can work in conjunction with a microprocessor to perform any of the methods described herein. Generally, these methods are preferably performed by any hardware device.

[0150] The devices described herein may be implemented using hardware devices, computers, or a combination of hardware devices and computers.

[0151] The apparatus described herein, or its components, may be implemented at least partially in hardware and / or software.

[0152] The methods described herein may be performed using hardware devices, computers, or a combination of hardware devices and computers.

[0153] The methods or components of the apparatus described herein may be performed at least in part by hardware and / or software.

[0154] The embodiments described above are merely illustrative of the principles of the present invention. Modifications and variations of the configurations and details described herein will be obvious to those skilled in the art. Accordingly, the intent is limited not by the specific details presented in the description and commentary of the embodiments, but only by the pending claims.

Claims

1. An automated test apparatus for testing a device under test, The aforementioned automatic test apparatus is equipped with multiple device power supplies, The device power supply is configured to operate in linked operation mode, The automated testing apparatus is configured to provide individual sensing measurement results associated with each individual device power supply in a set of device power supplies when the individual device power supplies in the set of device power supplies are synchronized. Automatic testing equipment.

2. Each of the device power supplies in the set of device power supplies has at least two sense inputs. Each of the device power supplies in the set of device power supplies is configured to measure the voltage between at least two of its sense inputs, and / or each of the device power supplies in the set of device power supplies is configured to measure the voltage at at least two of its sense inputs. The automated testing apparatus is configured to provide one or more voltages measured for each device power supply in the set of device power supplies as individual sensing measurement results when the individual device power supplies are linked. The automated testing apparatus according to claim 1.

3. The automated testing apparatus is configured to provide the individual sensing measurement results associated with the individual device power supplies of a set of interconnected device power supplies for evaluation by a test program executed by the automated testing apparatus. The automated testing apparatus according to claim 1 or 2.

4. The automated test apparatus is configured to provide the individual sensing measurement results associated with the individual device power supplies of the set of interconnected device power supplies in order to enable the detection of deviations between voltage drops detected by different device power supplies of the set of interconnected device power supplies, and / or to enable the detection of deviations between voltages at corresponding sense inputs of multiple different device power supplies of the set of interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 3.

5. The automated testing device is configured to individually determine the voltage between two sense inputs of each of the multiple device power supplies in the set of interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 4.

6. The automated testing apparatus is configured to determine the voltage deviation between two or more sense inputs of each of the multiple device power supplies in the set of interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 5.

7. The aforementioned automated testing device is configured to individually determine the voltage at the sense input of each of the multiple device power supplies in the set of interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 6.

8. The automated testing apparatus is configured to determine the voltage deviation of two or more values ​​at the sense input of each of the multiple device power supplies in the set of interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 7.

9. The automated test apparatus is configured to individually monitor the voltage at different locations of the device under test, coupled to a common power domain pair, using different individual sensing measurement results provided by the interconnected device power supplies. An automated testing apparatus according to any one of claims 1 to 8.

10. Each of the aforementioned interconnected device power supplies has at least three sense inputs, The automated test apparatus is configured to individually monitor voltage drops in multiple contact structures for contacting the device under test, each associated with the same power domain at different locations on the device under test, using each pair of interlocking device power sense inputs. An automated testing apparatus according to any one of claims 1 to 9.

11. The automated testing apparatus is configured to evaluate the individual sensing measurement results associated with each individual device power supply in the set of device power supplies when the individual device power supplies in the set of device power supplies are synchronized during the execution of the test of the device under test. An automated testing apparatus according to any one of claims 1 to 11.

12. The aforementioned automated testing apparatus is configured to provide a power sense signal evaluation function at a granularity for each device power supply, for device power supplies operating in linked operation mode. An automated testing apparatus according to any one of claims 1 to 11.

13. An automated testing apparatus for testing a device under test, according to any one of claims 1 to 12, A load board is configured to connect voltage sense contact structures for contacting the device under test associated with a common power domain to the sense inputs of different interconnected device power supplies, Testing facility.

14. The load board has a plurality of voltage sense contact structures configured to contact the predetermined device under test at different locations in order to connect a common power domain of the predetermined device under test to each sense input of the different interconnected device power supplies. The test mechanism according to claim 13.

15. A method for testing a device under test using an automated test apparatus equipped with multiple device power supplies, The method includes operating multiple device power supplies in a parallel configuration in linked operation mode (for example, to supply approximately equal current to a common power domain when operating in a parallel configuration), The method includes providing individual sensing measurement results associated with each individual interconnected device power supply of the plurality of interconnected device power supplies. method.

16. The method includes using the voltage sense inputs of different interconnected device power supplies to monitor the voltage at different locations on the device under test and / or the voltage between different pairs of voltage sense contacts on the device under test. The method according to claim 15.

17. It is a device, The first die, The second die, A power supply connection structure that connects one or more first external contact portions of the device to the supply voltage conductor of the second die, The device comprises a voltage sense connection between a second external contact portion of the device and a power conductor of the second die, The power supply connection structure is wired via the first die. device.

18. The power supply connection structure includes a supply voltage conductor disposed on or inside the first die, The plurality of first external contacts of the device are connected to the supply voltage conductor located on or inside the first die, The supply voltage conductor located on or inside the first die is connected to the supply voltage conductor of the second die, The voltage sense connection is positioned to bypass the supply voltage conductor located on or inside the first die. The device according to claim 17.

19. The voltage sense connection section is configured to be in a current-free state when the second die is powered via the power supply connection structure. The device according to claim 17 or 18.

20. The entire extension of the voltage sense connection is isolated from the current path between the one or more first external contacts of the device and the supply voltage conductor of the second die. The device according to any one of claims 17 to 19.

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