Creating the Ion Energy Distribution Function (IEDF)

Abstract

A system and method for creating an ion energy distribution function of arbitrary shape using a shaping pulse bias. In one embodiment, the system includes the steps of setting the wafer voltage of a wafer by applying a negative jump voltage to an electrode in a processing chamber, generating a series of pulse bursts with different amplitudes by modulating the amplitude of the wafer voltage, and repeating the series of pulse bursts by repeating the amplitude modulation of the wafer voltage to create an ion energy distribution function having multiple energy peaks. In some embodiments, the negative jump voltage may include a single-cycle voltage waveform with a ramp voltage during the ion current phase, the ramp voltage may be positive or negative, and the duration of the ion current phase may be more or less than 50% of the waveform period.

Description

field

[0001] Embodiments of this disclosure generally relate to substrate processing systems and methods, and more particularly to plasma processing systems and methods for substrates. Background

[0002] A typical reactive ion etching (RIE) plasma processing chamber is equipped with a radio frequency (RF) bias generator, which supplies an RF voltage to the "power electrode." The power electrode is a metal base plate embedded in an "electrostatic chuck" (ESC), commonly referred to as the "cathode." Figure 1(a) is a graph of a typical RF voltage supplied to the power electrode in a typical processing chamber. The power electrode is capacitively coupled to the plasma of the processing system via a ceramic layer that is part of the ESC assembly. Due to the nonlinear diode-like properties of the plasma sheath, the applied RF field is rectified, resulting in a DC voltage drop, or "self-bias," between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode and thus determines the etching anisotropy.

[0003] More specifically, ion directionality, shape profile, and selectivity for masks and stop layers are controlled by the ion energy distribution function (IEDF). In RF-biased plasmas, the IEDF typically has two peaks, one at low energy and one at high energy, with ions located between them. The presence of ions between the two peaks of the IEDF reflects the fact that the voltage drop between the cathode and the plasma oscillates at the bias frequency. To obtain a higher self-bias voltage, using a low-frequency RF bias generator, such as 2 MHz, increases the energy difference between these two peaks, which can result in more isotropic etching by ions at the low-energy peak, potentially leading to curvature of the shape walls. Compared to high-energy ions, low-energy ions have lower efficiency in reaching corners at the bottom of the shape (e.g., due to charging effects), but result in less sputtering of the mask material. This is important in high-aspect-ratio etching applications such as apertures in hard masks.

[0004] As feature sizes continue to shrink and aspect ratios increase, the control requirements for feature profiles become more stringent, and having a well-controlled IEDF on the substrate surface during processing becomes increasingly important. Single-peak IEDFs can be used to construct any IEDF, including two-peak IEDFs, where peak height and energy can be controlled independently. This is highly beneficial for high-precision plasma processing. To create a single-peak IEDF, a nearly constant voltage relative to the plasma is required on the substrate surface, i.e., a sheath voltage that determines the ion energy. Assuming a plasma potential with a time constant (usually zero or close to ground potential in the processing plasma), it is necessary to maintain a nearly constant voltage on the substrate relative to ground, i.e., a substrate voltage. This cannot be achieved simply by applying a DC voltage to the power electrodes, because the ion current is constantly charging the substrate surface. As a result, all applied DC voltage drops to the substrate and the ceramic portion of the ESC (i.e., chuck capacitance), rather than the plasma sheath (i.e., sheath capacitance). To overcome this, a special shaped pulse biasing method has been developed. In this method, the applied voltage is divided into chuck capacitance and sheath capacitance (the substrate capacitance is usually much larger than the sheath capacitance, so the voltage drop across the substrate is ignored). This method compensates for the ion current and keeps the sheath voltage and substrate voltage constant for up to 90% of each bias voltage cycle. More precisely, this biasing method can maintain a specific substrate voltage waveform. This waveform can be described as a series of periodic short positive pulses over a negative DC offset (Figure 1(a)). During each pulse, the substrate potential reaches the plasma potential and the sheath temporarily collapses, but for about 90% of each cycle, the sheath voltage is kept constant, equal to the negative voltage jump at the end of each pulse. This determines the average ion energy. Figure 1(a) shows a plot of a special shaped pulse bias voltage waveform developed to generate this specific substrate voltage waveform, which allows the sheath voltage to be kept nearly constant. As shown in Figure 2, the shaping pulse bias waveform consists of (1) a positive jump to remove excess charge accumulated in the chuck capacitance during the compensation phase, and (2) a sheath voltage (VSH Negative jump (V) to set the value of ) OUT ) includes. V OUT The voltage is split between the series-connected chuck capacitor and sheath capacitor, determining the negative jump in the board voltage waveform (however, normally V OUT (larger than) Furthermore, the shaped pulse bias waveform includes a negative ramp voltage to compensate for the ion current and keep the sheath voltage constant during this long “ion current compensation phase.” It should be emphasized that there are other shaped pulse bias waveforms that allow for the maintenance of a specific substrate voltage waveform (characterized by a nearly constant sheath voltage) as shown in Figure 1(b), and thus enable the creation of a single-energy IEDF. For example, if the capacitance of the electrostatic chuck is much larger than the sheath capacitance, the negative ramp voltage phase described in (3) above can be replaced with a constant voltage phase. Several systems and methods proposed below can also be implemented with these other shaped pulse bias waveforms, and this will be specifically noted where applicable.

[0005] Single-peak IEDFs are widely considered a highly desirable IEDF shape, leading to improved selectivity and feature profiling. Some etching applications require different IEDF shapes, such as wider IEDFs. Overview

[0006] This specification provides a system and method for creating an ion energy distribution function of arbitrary shape using a shaped pulse bias.

[0007] In some embodiments, the method includes the steps of: setting the wafer voltage of a wafer by applying a negative jump voltage to electrodes in a processing chamber, wherein the negative jump voltage includes a single-cycle voltage waveform having a ramp voltage during the ion current phase; modulating the amplitude of the wafer voltage to generate a series of groups of pulse bursts having different amplitudes, wherein each group of pulse bursts consists of pulses having the same amplitude; and repeatedly modulating the amplitude of the wafer voltage and repeating the series of groups of pulse bursts to create an ion energy distribution function having one or more energy peaks. In some embodiments of the present principle, the relative number of pulses at a particular amplitude in each burst determines the relative ion fraction at the ion energy corresponding to a particular amplitude, based on the number of pulses generated during each modulation of the wafer voltage at different amplitudes. In some embodiments, the relative number of bursts in a series having a predetermined amplitude determines the relative proportion of ions at a particular energy.

[0008] In some embodiments of this principle, the ramp voltage in the ion current phase of the voltage waveform includes a positive ramp voltage. Alternatively, in some embodiments, the ramp voltage in the ion current phase of the voltage waveform includes a negative ramp voltage. Alternatively, in some embodiments, the ramp voltage in the ion current phase of the voltage waveform does not include a ramp voltage.

[0009] In some embodiments of this principle, the duration of the ion current phase is less than 50% of the waveform period. Alternatively, in some embodiments, the duration of the ion current phase is greater than 50% of the waveform period.

[0010] In some embodiments of this principle, the voltage waveform includes a positive peak voltage. Alternatively, in some embodiments, the voltage waveform includes a negative peak voltage.

[0011] Other and further embodiments of this disclosure are described below. [Brief explanation of the drawing]

[0012] The embodiments of this disclosure, briefly outlined above and described in more detail below, can be understood by referring to the exemplary embodiments of this disclosure shown in the accompanying drawings. However, the accompanying drawings only illustrate typical embodiments of this disclosure and therefore do not limit the scope of this disclosure. This disclosure may also encompass other equally effective embodiments. [Figure 1(a)] This is a plot of specially shaped pulses developed to maintain a constant sheath voltage. [Figure 1(b)] This is a plot of a specific substrate voltage waveform obtained from the biasing method shown in Figure 1(a). The sheath voltage and substrate voltage can be kept constant for up to 90% of each bias voltage cycle. [Figure 1(c)] Figure 1(a) shows a plot of the single-peak IEDF obtained from the bias scheme. [Figure 2] This document describes a substrate processing system to which embodiments based on this principle can be applied. [Figure 3] This shows a plot of voltage pulses used to set the substrate voltage value according to one embodiment of this principle. [Figure 4] Figure 3 shows a graphical representation of the IEDF obtained as a result of the selected voltage pulse according to one embodiment of this principle. [Figure 5] Figure 1 shows a plot of special-shaped pulses modified to overcompensate and undercompensate for the ion current according to an embodiment of this principle. [Figure 6] Figure 5 shows a plot of induced voltage pulses on the wafer resulting from the special-shaped pulse bias. [Figure 7] Figure 6 shows a graphical representation of the resulting IEDF for the voltage pulse according to an embodiment of this principle. [Figure 8] A flowchart illustrating a method for creating an ion energy distribution function of arbitrary shape according to an embodiment of this principle is shown. [Figure 9] A flowchart illustrating a method for creating an ion energy distribution function of arbitrary shape according to another embodiment of this principle is shown. [Figure 10] A flowchart of a method for creating an ion energy distribution function of any shape according to another embodiment of the present principle is shown. [Figure 11] A graph of another voltage waveform according to an alternative embodiment of the present principle is shown. [Figure 12] A graph of another voltage waveform according to an alternative embodiment of the present principle is shown.

[0013] For ease of understanding, the same reference numbers are used for identical elements common to the drawings wherever possible. The drawings are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment can be beneficially incorporated into other embodiments without further description. Detailed description

[0014] In this specification, a system and method for creating an ion energy distribution function of any shape using a shaped pulse bias are provided. The system and method of the present invention facilitate the creation of an ion energy distribution function (IEDF) of any shape by modulating the amplitude of the shaped pulse bias waveform. Embodiments of the method of the present invention can provide any IEDF shape (e.g., an IEDF having a wide profile) by shaping the voltage waveform. In the description herein, the terms "wafer" and "substrate" are used interchangeably.

[0015] Figure 2 shows a high-level schematic diagram of a substrate processing system 200 to which embodiments based on this principle can be applied. The substrate processing system 200 in Figure 2 exemplifies a substrate support assembly 205 and a bias power supply 230. In the embodiment of Figure 2, the substrate support assembly 205 includes a substrate support base 210, a power electrode 213, and a ceramic layer 214 that separates the power electrode 213 from the surface 207 of the substrate support assembly 205. In various embodiments, the system 200 in Figure 2 may include components such as plasma processing chambers, or other processing chambers, available from Applied Materials, Inc. in Santa Clara, California, such as SYM3®, DPS®, ENABLER®, ADVANTEDGE®, AVATAR®, etc.

[0016] In some embodiments, the bias power supply 230 includes a memory for storing a control program and a processor that, according to embodiments of the present principle described herein, executes the control program to control the voltage supplied from the bias power supply 230 to the power electrodes 213, modulates the amplitude of the wafer voltage to generate a predetermined number of pulses, and alternatively or additionally applies a negative jump voltage to the electrodes to set the wafer voltage of the wafer, or applies a ramp voltage to the electrodes to overcompensate or undercompensate for the ion current on the wafer. In an alternative embodiment, the substrate processing system 200 of Figure 2 may include an optional controller 220 which includes a memory for storing a control program and a processor for executing the control program. The controller 220 communicates with the bias power supply 230 to control the voltage supplied from the bias power supply 230 to the power electrodes 213, modulates the amplitude of the wafer voltage to generate a predetermined number of pulses, and alternatively or additionally applies a negative jump voltage to the electrodes to set the wafer voltage of the wafer, or applies a ramp voltage to the electrodes to overcompensate or undercompensate for the ion current on the wafer.

[0017] During operation, the substrate to be processed is placed on the surface of the substrate support base 210. In the system 200 shown in Figure 2, a voltage (shaped pulse bias) from the bias power supply 230 is supplied to the power electrode 213. Due to the nonlinear diode characteristics of the plasma sheath, the applied RF electric field is rectified, generating a DC voltage drop, or "self-bias," between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode. The ion directionality and feature profile are controlled by the ion energy distribution function (IEDF). The bias power supply 230 can supply a special shaped pulse bias to the power electrode 213 according to the embodiments of the present principle described herein. This biasing method allows for the maintenance of a specific substrate voltage waveform, which can be described as a series of short positive pulses over a negative DC offset (Figure 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath temporarily collapses, but for about 90% of each cycle, the sheath voltage remains constant, equaling the negative voltage jump at the end of each pulse, which determines the average ion energy.

[0018] Returning to Figure 1(a), the amplitude of the molding pulse bias signal, and therefore the wafer voltage, is V. OUT This is represented by [formula]. The inventors have determined that in at least some embodiments of this principle, the shape of the IEDF can be controlled by modulating the amplitude and frequency of the shaping pulse bias signal. This method involves applying a shaping pulse bias to the electrodes of the processing chamber and generating a negative voltage jump (V OUT The amplitude of the sheath voltage (V) SHThis involves modulating the pulses in a predetermined manner, where the relative number of pulses at a specific amplitude determines the relative ion fraction at the ion energy corresponding to that amplitude. The number of pulses at each amplitude must be sufficient to describe the transition from one sheath voltage to the next, during which each ESC charge is established. Bursts containing pulse trains with a predetermined amplitude (Figure 3) are repeated many times throughout the duration of the processing step. Active bursts (on-phase) can be interleaved with no-signal periods (off-phase). The duration of each on-phase relative to the total duration of the burst (combined on-phase and off-phase) is determined by the duty cycle, and the total duration (period) of the burst is equal to the reciprocal of the burst frequency. Alternatively, each burst consists of a series of pulses with a predetermined (and identical) amplitude, and an IEDF is defined using burst trains with different amplitudes. The relative number of bursts (in the train) with a predetermined amplitude determines the relative proportion of ions at a particular energy, and the negative jump amplitude (V) of the pulses within these bursts is determined. OUTThe ion energy is determined by the ion energy. A predefined burst sequence is repeated multiple times throughout the recipe process. For example, to create a two-peak IEDF with 25% of the ions in the low-energy peak and 75% in the high-energy peak, the burst sequence must consist of three pulse bursts with negative jump amplitudes corresponding to the high ion energy and one pulse burst with an amplitude corresponding to the low ion energy. Such a sequence can be designated as "HHHL". Similarly, to create an IEDF with three energy peaks of equal height: high (H), medium (M), and low (L), a sequence of three bursts with different amplitudes corresponding to the H, M, and L ion energies is required and can be designated as "HML". A single-peak IEDF is produced by a sequence consisting of one burst (having both on-phase and off-phase) with a predefined negative jump amplitude. This method can be implemented using any shaped pulse bias waveform (not necessarily the waveform shown in Figure 1(a)) that can maintain the specific substrate voltage waveform shown in Figure 1(b) (characterized by a nearly constant sheath voltage), and thus a single-energy IEDF can be created.

[0019] For example, Figure 3 shows a graph of voltage pulses supplied from the power supply to the electrodes of the processing chamber to set the substrate voltage value according to one embodiment of this principle. In the embodiment of Figure 3, a complete jump in the wafer voltage determines the ion energy. On the other hand, the number of pulses corresponding to the voltage jump (e.g., total duration) determines the relative ion fraction (i.e., IEDF) at this energy.

[0020] Figure 4 shows a graphical representation of the IEDF obtained for the selected voltage pulses in Figure 3, according to one embodiment of this principle. As shown in Figure 4, multiple voltage pulses in Figure 3 produce a wider IEDF, which can be advantageous in applications such as hard mask open high aspect ratio etching that require a wider ion energy distribution.

[0021] Based on this principle, by controlling the amplitude and frequency of the voltage pulses supplied from the power supply to the electrodes of the processing chamber, it becomes possible to provide a well-controlled and clearly defined IEDF shape required for specific etching processes and applications.

[0022] In other embodiments of this principle, the method involves applying a shaping pulse bias to the voltage waveform shown in Figure 1(a) to generate a ramp voltage with a larger negative slope (dV / dt) than necessary to maintain a constant substrate voltage during the ion compensation phase, i.e., overcompensating for the ion current. This results in the substrate voltage waveform shown in Figure 6, where the amplitude of the substrate voltage (and thus the sheath voltage and instantaneous ion energy) increases during the ion current compensation phase. This creates a broadening of the ion energy and a non-single-energy IEDF shown in Figure 7, where the IEDF width is controlled by the negative slope of the applied shaping pulse bias waveform. For example, Figure 5 shows a plot of a special shaping pulse of Figure 1(a) modified to overcompensate for the ion current charging the wafer, according to an embodiment of this principle. As shown in Figure 5, the ramp voltage of Figure 1(a) is designed to compensate for the ion current charging the wafer, but the special waveform pulse of Figure 5 according to this principle is modified to overcompensate for the ion current charging the wafer. As shown in Figure 5, the positive jump in Figure 1 is designed to neutralize the wafer surface, but the special waveform pulse in Figure 5 based on this principle no longer neutralizes the wafer surface.

[0023] Figure 6 is a plot of induced voltage pulses on the wafer generated by the special waveform pulses shown in Figure 5. As shown in Figure 6, the voltage jump determines the ion energy, and the energy width is determined by the minimum and maximum values ​​of the wafer voltage jump during the cycle.

[0024] Figure 7 is a graphical representation of the IEDF obtained for the voltage pulse in Figure 6 according to one embodiment of this principle. As shown in Figure 7, the IEDF obtained by applying the overcompensated special-shaped pulse in Figure 5 has a wider double-peak profile, Vmin and V max determines the width of the IEDF, but does not necessarily coincide with the energy peak. Due to the over - compensation according to this principle, a higher control accuracy becomes possible than that achievable by mixing two RF frequencies (for example, 2 MHz and 13.56 MHz).

[0025] In other embodiments based on this principle, the method includes applying a shaped pulse bias of the voltage waveform shown in FIG. 1(a) and generating a ramp voltage having a negative slope smaller than the negative slope (dV / dt) necessary to maintain the substrate voltage constant during the ion compensation phase, that is, a step of under - compensating the ion current. Thereby, the substrate voltage waveform shown in FIG. 6 is obtained, and the magnitude of the substrate voltage (and thus the sheath voltage and the instantaneous ion energy) decreases during the ion current compensation phase. Thereby, the spread of ion energy and the non - single - energy IEDF shown in FIG. 7 are created, and the width of the IEDF is controlled by the negative slope of the applied shaped pulse bias waveform. For example, referring to FIG. 5, FIG. 5 shows a plot of the special shaped pulse of FIG. 1 modified to under - compensate the ion current that charges the wafer according to an embodiment based on this principle. As shown in FIG. 5, the ramp voltage of FIG. 1 is designed to compensate the ion current that charges the wafer, but in the special waveform pulse of FIG. 5 based on this principle, it is changed to under - compensate the ion current that charges the wafer. As shown in FIG. 5, the positive jump of FIG. 1 is designed to neutralize the wafer surface, but the special waveform pulse of FIG. 5 based on this principle no longer neutralizes the wafer surface.

[0026] Referring to FIG. 7, a graph of the IEDF obtained as a result of under - compensation according to an embodiment of this principle is shown. As shown in FIG. 7, the IEDF obtained as a result of applying the special shaped pulse of under - compensation in FIG. 5 has a wider and single - peak profile.

[0027] Figure 8 shows a flowchart of a method for creating a shaped ion energy distribution function according to one embodiment of the present principle. Method 800 can begin in step 802, in which a negative jump voltage is applied to the electrodes and the wafer voltage can be set. Method 800 can then proceed to step 804.

[0028] In step 804, the amplitude of the wafer voltage is modulated, a predetermined number of pulses are generated, and the ion energy distribution function is determined.

[0029] After that, method 800 can be terminated.

[0030] Figure 9 shows a flowchart of a method for creating a shaped ion energy distribution function according to another embodiment of the present principle. Method 900 can begin at 902 by applying a positive jump voltage to the electrodes of the processing chamber to neutralize the wafer surface. Method 900 can then proceed to 904.

[0031] In step 904, a negative jump voltage is applied to the electrodes to set the wafer voltage. After that, method 900 can proceed to step 906.

[0032] In step 906, a ramp voltage is applied to the electrodes to overcompensate for the ion current on the wafer. After that, method 900 can be terminated.

[0033] Figure 10 shows a flowchart of a method for creating a shaped ion energy distribution function according to another embodiment of the present principle. Method 1000 can begin at 1002, in which a positive jump voltage can be applied to the electrodes of the processing chamber to neutralize the wafer surface. Method 1000 can then proceed to 1004.

[0034] In step 1004, a negative jump voltage is applied to the electrodes to set the wafer voltage. After that, method 1000 can proceed to step 1006.

[0035] In step 1006, a ramp voltage is applied to the electrodes to undercompensate for the ion current on the wafer. After that, method 1000 can be terminated.

[0036] Figure 11 shows a plot of voltage waveforms 1100 according to an alternative embodiment of the present principle. Specifically, Figure 11 defines the negative jump voltage generated at the bias electrode, and the negative voltage jump ΔV neg , positive voltage ΔV pos , period T per and negative ramp voltage ΔV ramp The voltage waveform shows a voltage droop >0, i.e., a voltage droop. The voltage waveform in Figure 11 shows the positive peak voltage V relative to ground. peak >0, duration T of the ion current phase which is less than 50% of the waveform period. ion Includes.

[0037] As shown in the embodiment of the voltage waveform in Figure 11, having a positive peak voltage relative to ground makes it possible to maintain a positive chucking voltage between the bias electrode and the substrate. The chucking (clamping) voltage is necessary for thermal management of the substrate, and in some processes such as high-voltage processes, it is usually advantageous to use a positive chucking voltage. On the other hand, by making the duration of the ion current phase less than 50% of the waveform period, the ratio of neutral particles to ionic particles at the bottom of the shape can be increased, which affects the etching rate and shape profile and can be beneficial for processing applications where neutral particles are deficient.

[0038] Figure 12 shows plots of other voltage waveforms according to alternative embodiments of this principle. Figure 12 shows the voltage waveform that defines the negative jump voltage generated at the bias electrode, and the negative voltage jump ΔV neg , positive voltage ΔV pos , period T per , and negative ramp voltage ΔV ramp <0, or has a "voltage droop". The voltage waveform in Figure 12 is V peak <0 Negative peak voltage relative to ground, and duration T of ion current phase exceeding 50% of the waveform period.ion Includes.

[0039] As shown in the embodiment of the voltage waveform in Figure 12, having a negative peak voltage relative to ground makes it possible to maintain a negative chucking voltage between the bias electrode and the substrate. The chucking (clamping) voltage is necessary for thermal management of the substrate, and in some processes such as low-voltage processes, advantages can be obtained by using a negative chucking voltage. Furthermore, by making the duration of the ion current phase 50% or more of the waveform period, the ratio of neutral particles to ionic particles at the bottom of the feature can be reduced, affecting the etching rate and shape profile, which can be beneficial for processing applications that contain a large amount of neutral particles.

[0040] The above applies to embodiments of the present disclosure, but it is possible to create other embodiments and further embodiments of the present disclosure without departing from the basic scope of the present disclosure.

Claims

1. A step of setting the wafer voltage of a wafer by applying a negative jump voltage to the electrodes of a processing chamber, wherein the negative jump voltage includes a single-cycle voltage waveform having a ramp voltage during the ion current phase. A step of modulating the amplitude of a wafer voltage to generate a series of groups of pulse bursts having different amplitudes, wherein each group of pulse bursts consists of pulses having the same amplitude; The process includes repeatedly modulating the amplitude of the wafer voltage, repeating a series of pulse bursts, and creating an ion energy distribution function having one or more energy peaks. A method for determining the relative proportion of ions at a specific energy corresponding to a given amplitude, based on the relative number of bursts with a predetermined amplitude within a column.

2. The method according to claim 1, wherein a positive jump voltage is applied to the electrodes of the processing chamber to neutralize the surface of the wafer.

3. The method according to claim 2, wherein a positive jump voltage is applied to the electrodes of the processing chamber before a negative jump voltage is applied.

4. The method according to claim 1, wherein the desired ion energy distribution function is created to induce a specific bias voltage waveform on the wafer.

5. The method according to claim 1, wherein the wafer voltage is modulated at different points in time to create an ion energy distribution function having multiple energy peaks.

6. The method according to claim 5, wherein the ion fraction of each energy peak is determined by the number of pulses generated during each modulation of the wafer voltage at different time points.

7. A process of neutralizing the wafer surface by applying a positive jump voltage to the electrodes of the processing chamber, The method according to claim 1, further comprising the step of applying a ramp voltage to an electrode to overcompensate or undercompensate for the ion current on a wafer.

8. The method according to claim 7, wherein the step of applying a ramp voltage to an electrode to overcompensate for the ion current on the wafer includes the step of applying a ramp voltage to an electrode that includes a negative slope greater than the slope required to maintain a constant voltage on the wafer.

9. The method according to claim 8, wherein the minimum and maximum voltages of the current induced on the wafer determine the width of the resulting ion energy distribution function.

10. The method according to claim 7, wherein the step of applying a ramp voltage to an electrode to undercompensate for the ion current on the wafer includes the step of applying a ramp voltage to an electrode that includes a negative slope smaller than the slope required to maintain a constant voltage on the wafer.

11. The method according to claim 10, wherein the minimum and maximum voltages of the current induced on the wafer determine the width of the resulting ion energy distribution function.

12. The method according to claim 7, wherein the slope of the ramp voltage is adjusted to create a desired ion energy distribution function and induce a specific bias voltage waveform on the wafer.

13. The method according to claim 1, wherein the period between groups of pulses includes a period during which no voltage pulses are supplied to the electrodes.

14. The method according to claim 1, wherein the ramp voltage during the ion current phase includes a positive ramp voltage.

15. The method according to claim 1, wherein the ramp voltage during the ion current phase includes a negative ramp voltage.

16. The method according to claim 1, wherein the lamp voltage during the ion current stage does not include the lamp voltage.

17. The method according to claim 1, wherein the duration of the ion current phase is less than 50% of the period of the waveform.

18. The method according to claim 1, wherein the duration of the ion current phase is 50% or more of the period of the waveform.

19. The method according to claim 1, wherein the waveform includes a positive peak voltage.

20. The method according to claim 1, wherein the waveform includes a negative peak voltage.

Images