Display device

Abstract

The display device may include a reference current generation circuit and multiple light-emitting circuits. The reference current generation circuit may include a constant current source that generates a reference current. Multiple light-emitting circuits are provided for multiple subpixels and are electrically connected to the reference current generation circuit. Each of the multiple light-emitting circuits can generate a light-emitting current using the reference current to make a light-emitting element emit light, and can adjust the light-emitting time of the light-emitting element using digital data and program signals. The reference current and the light-emitting current may be constant currents.

Description

[Technical Field]

[0001] The examples relate to display devices. [Background technology]

[0002] The display market is growing year by year, and its range of applications is continuously expanding. Along with this expansion of applications, the resolution and characteristics of products are becoming more diverse.

[0003] As product specifications become more diverse, the methods for driving displays are also becoming more complex.

[0004] In the case of driver ICs used to drive display devices, they are designed to fit that specific device. Therefore, the range of applications for the design is limited, and a driver IC that fits each product is required if necessary.

[0005] Conventional display devices employ various methods to ensure uniformity. For example, internal compensation is performed by configuring light-emitting circuits in pixels (or subpixels), or external compensation is performed using specific methods.

[0006] On the other hand, the majority of the circuit configuration for the operation of the light-emitting circuit includes its own capacitors, ensuring constant current characteristics.

[0007] Figure 1 is a circuit diagram illustrating a conventional light-emitting circuit.

[0008] As shown in Figure 1, a conventional light-emitting circuit includes a drive transistor M1, a scan transistor M2, a sensing transistor M3, and a capacitor CSTG.

[0009] When the scan transistor M2 turns on in response to the scan signal SCAN, the data signal VDATA is supplied to the drive transistor M1 via the scan transistor M2. The drive transistor M1 supplies a light-emitting current corresponding to the data signal VDATA to the light-emitting element ED, causing the light-emitting element ED to emit light.

[0010] The capacitor CSTG ensures that the light-emitting current is supplied to the light-emitting element ED as a constant current.

[0011] When the sensing transistor M3 turns on in response to the sensing control signal SEN, the light-emitting current flowing through the driving transistor M1 is detected as the sensing signal VSEN. The characteristics of the light-emitting circuit are calibrated or compensated using the sensing signal VSEN.

[0012] On the other hand, the light-emitting circuit of an active-matrix display device either applies the PWM (pulse amplitude modulation) method itself, or uses a PWM method that utilizes the PAM (pulse amplitude modulation) method to adjust brightness. In such cases, a capacitor is always provided inside every pixel (or subpixel).

[0013] If the light-emitting circuit is designed so that a capacitor is provided inside every pixel, constraints such as area limitations may arise, and additional problems may occur due to the capacitors inside each pixel. [Overview of the project] [Problems that the invention aims to solve]

[0014] The embodiments aim to solve the aforementioned problems and other problems.

[0015] Another objective of the embodiment is to provide a display device having a novel structure.

[0016] Another object of the embodiments is to provide a display device that provides a new driving method.

[0017] Another object of the embodiments is to provide a display device in which a capacitor is not provided in a light-emitting circuit.

[0018] Another object of the embodiments is to provide a display device that does not require a display driving circuit including a converter that converts digital data into analog data.

[0019] The technical problems of the embodiments are not limited to those described in this item, and include those understood from the description of the invention.

Means for Solving the Problems

[0020] According to one aspect of the embodiments to achieve the above or another object, a display device including a plurality of sub-pixels includes a reference current generation circuit including a constant current source that generates a reference current, and a plurality of light-emitting circuits provided in the plurality of sub-pixels and electrically connected to the reference current generation circuit. Each of the plurality of light-emitting circuits generates a light-emitting current using the reference current to cause a light-emitting element to emit light, and adjusts the light-emitting time of the light-emitting element using digital data and a program signal. The reference current and the light-emitting current are constant currents.

[0021] The reference current generation circuit includes a first transistor connected to the constant current source, and each of the plurality of light-emitting circuits may include a first transistor that forms a mirror circuit with the first transistor of the reference current generation circuit.

[0022] The aspect ratio of each of the first transistors of the plurality of light-emitting circuits may be greater than or equal to the aspect ratio of the first transistor of the reference current generation circuit.

[0023] The light-emitting element and the first transistor of each of the plurality of light-emitting circuits may be connected between a first power supply line and a second power supply line, with a first power supply voltage supplied to the first power supply line and a second power supply voltage lower than the first power supply voltage supplied to the second power supply line.

[0024] The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits may be NMOS transistors commonly connected to the second power supply line.

[0025] The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits may be PMOS transistors commonly connected to the first power supply line.

[0026] The reference current generation circuit may be connected to the first transistor and may include a switch for turning the reference current on and off.

[0027] Each of the plurality of light-emitting circuits may be connected to the first transistor and may include a switch for turning the light-emitting current on or off.

[0028] The second ON interval of the light-emitting current may be included within the first ON interval of the reference current.

[0029] Each of the plurality of light-emitting circuits may further include a digital storage that generates control signals for switching each of the switches of the plurality of light-emitting circuits using the digital data.

[0030] The switch in the reference current generation circuit includes at least one transistor from among the second transistor and the third transistor, and each of the switches in the plurality of light-emitting circuits may include at least one transistor from among the second transistor and the third transistor.

[0031] The second transistor in the reference current generation circuit and the second transistor in the plurality of light-emitting circuits are NMOS transistors, and the third transistor in the reference current generation circuit and the third transistor in each of the plurality of light-emitting circuits may be PMOS transistors.

[0032] The constant current source of the reference current generation circuit may include a fourth transistor connected to one or more transistors of the reference current generation circuit.

[0033] The display device may further include a voltage generating circuit connected to the reference current generating circuit and providing a reference voltage for adjusting the reference current.

[0034] The voltage generation circuit includes a plurality of first transistors connected to each other between a third power supply line and a fourth power supply line, each of the plurality of first transistors being connected to a diode, and one of the plurality of first transistors can form a current mirror circuit with the fourth transistor of the reference current generation circuit.

[0035] The voltage generation circuit may further include a second transistor that is connected to other transistors among the plurality of first transistors and whose gate is commonly connected to at least one of the transistors of the reference current generation circuit.

[0036] The present invention further includes a current control transistor connected between one of the plurality of first transistors and the third power supply line, the gate of which is commonly connected to the second transistor of the voltage generation circuit and at least one of the transistors of the reference current generation circuit, wherein the current control transistor may have a different conductivity type from the at least one of the transistors of the reference current generation circuit.

[0037] The display device may further include a selection switch that selects one of the reference voltage and an external voltage and outputs the selected voltage to the reference current generation circuit. [Effects of the Invention]

[0038] The effects of the display device according to the embodiment are as follows:

[0039] According to at least one of the embodiments, a reference current generated by a reference current generation circuit is copied to generate a reference current for illuminating each of the light-emitting elements of multiple subpixels. By adjusting the illumination time of the light-emitting elements using digital data and program signals, the capacitors that were conventionally required for each subpixel become unnecessary, and the size of the light-emitting circuit is reduced, resulting in a larger illumination area and increased brightness. Converters for converting digital data to analog voltages are also unnecessary, thus simplifying the circuit structure.

[0040] In at least one of the embodiments, the aspect ratio of the transistors in the light-emitting circuit constituting the current mirror circuit is designed to be larger than the aspect ratio of the transistors in the reference current generation circuit. Therefore, by designing the aspect ratio of the transistors in the reference current generation circuit to be smaller, a relatively small reference current is generated, reducing the burden on reference current generation, decreasing the size of the reference current generation circuit, and saving power consumption. In addition, since the light-emitting current of each of the multiple light-emitting circuits is large, the contrast ratio is improved, and high brightness can be achieved.

[0041] According to at least one of the embodiments, a plurality of subpixels are connected between a first power supply line and a second power supply line. Each of the plurality of subpixels may include at least one light-emitting element and a light-emitting circuit connected to the light-emitting element. The first power supply line or the second power supply line may be connected in common to a reference current generation circuit and the plurality of light-emitting circuits. In such a case, the transistors of the reference current generation circuit that constitute the current mirror circuit and each transistor of the plurality of light-emitting circuits can use the second power supply voltage supplied to the second power supply line in common. Therefore, since the transistors of the reference current generation circuit and each transistor of the plurality of light-emitting circuits are simultaneously affected by the IR drop associated with the second power supply voltage, they are not affected by changes in the light-emitting current of each of the plurality of subpixels, thus preventing image quality defects.

[0042] According to at least one of the embodiments, a reference current generation circuit can generate different reference currents based on different reference voltages selected by a selection switch. By adjusting the reference currents generated by the reference current generation circuit in various ways, it is possible to accurately and easily obtain emission currents with the required intensity for each of multiple subpixels. This allows for precise and accurate control of the contrast ratio and brightness, thereby improving image quality.

[0043] According to at least one embodiment, the gate of one transistor in the voltage generation circuit is connected to the gate of the second transistor in the reference current generation circuit, allowing them to be turned on / off simultaneously by the same control signal. For example, during a non-emitting section, i.e., an off section, one transistor in the voltage generation circuit and the second transistor in the reference current generation circuit can be turned off. This reduces power consumption because no constant current flows through the voltage generation circuit and no reference current flows through the reference current generation circuit.

[0044] According to at least one of the embodiments, a current control transistor is provided between the transistor of the voltage generation circuit and the transistor of the reference current generation circuit that constitute the current mirror circuit, and the current control transistor can have a different conductivity type than the second transistor of the reference current generation circuit. When the current control transistor turns on during the off-interval, a constant current does not flow through the voltage generation circuit and a reference current does not flow through the reference current generation circuit, thereby reducing power consumption.

[0045] The additional scope of applicability of the examples will become apparent from the detailed description below. However, since various changes and modifications within the concept and scope of the examples will be clearly understood by those skilled in the art, the detailed description and specific examples, such as preferred examples, should be understood as merely illustrative. [Brief explanation of the drawing]

[0046] [Figure 1] Figure 1 is a circuit diagram illustrating a conventional light-emitting circuit. [Figure 2] Figure 2 is a block diagram illustrating a display device according to the first embodiment. [Figure 3] Figure 3 is a block diagram illustrating a display device according to the second embodiment. [Figure 4] Figure 4 illustrates a timing diagram according to an embodiment. [Figure 5] Figure 5 is a block diagram illustrating a display device according to the third embodiment. [Figure 6] Figure 6 is a block diagram illustrating a display device according to the fourth embodiment. [Figure 7] Figure 7 is a block diagram illustrating a display device according to the fifth embodiment. [Figure 8] Figure 8 is a block diagram illustrating a display device according to the sixth embodiment. [Figure 9] Figure 9 is a block diagram illustrating a display device according to the seventh embodiment. [Figure 10]Figure 10 is a block diagram illustrating a display device according to the eighth embodiment. [Figure 11] Figure 11 is a block diagram illustrating a display device according to the ninth embodiment. [Figure 12] Figure 12 is a block diagram illustrating a display device according to the 10th embodiment. [Figure 13] Figure 13 is a block diagram illustrating a display device according to the 11th embodiment. [Figure 14] Figure 14 is a block diagram illustrating a display device according to the twelfth embodiment. [Figure 15] Figure 15 is a block diagram illustrating a display device according to the 13th embodiment. [Figure 16] Figure 16 is a block diagram illustrating a display device according to the 14th embodiment. [Figure 17] Figure 17 illustrates a timing diagram according to an embodiment. [Modes for carrying out the invention]

[0047] The size, shape, and numerical values ​​of the components shown in the drawings do not necessarily match those of the actual components. Furthermore, even if the same component is shown with different sizes, shapes, and numerical values ​​in different drawings, this is merely one example on the drawing, and the same component can have the same size, shape, and numerical values ​​in different drawings.

[0048] The embodiments disclosed herein will be described in detail below with reference to the attached drawings, but identical or similar components will be given the same reference numeral regardless of the drawing reference numerals, and redundant descriptions will be omitted. The suffixes “module” and “part” used for components in the following description are given or used interchangeably to facilitate the writing of the specification and do not have any mutually distinguishing meaning or role in themselves. The attached drawings are provided to facilitate the understanding of the embodiments disclosed herein and do not limit the technical ideas disclosed herein. Furthermore, when elements such as layers, regions, or substrates are referred to as being “on” other components, this includes those that are directly on other elements or where other intermediate elements may exist between them.

[0049] In the following, "~module," "~part," and "~device" can be composed of "~circuit" or "integrated circuit." "~module," "~part," and "~device" can be used interchangeably with "~circuit" and "integrated circuit."

[0050] In the following description, the light-emitting element is described as being provided separately from the light-emitting circuit, but the light-emitting element may be included in the light-emitting circuit.

[0051] Figure 2 is a block diagram illustrating a display device according to the first embodiment.

[0052] Referring to Figure 2, the display device according to the first embodiment may include a reference current generation circuit 110, a plurality of light-emitting circuits 130-1 to 130-N, a plurality of light-emitting elements 120-1 to 120-N, and so on.

[0053] The display device according to the first embodiment may include a display panel. The display panel may include a plurality of pixels. The display panel may include a plurality of subpixels SP-1 to SP-N.

[0054] The drawing shows multiple subpixels SP-1 to SP-N arranged in a single row along the horizontal direction, but the multiple subpixels SP-1 to SP-N may also be arranged in a single row along the vertical direction, or they may be arranged in a matrix.

[0055] Multiple subpixels SP-1 to SP-N may include multiple red subpixels, multiple green subpixels, and multiple blue subpixels. A unit pixel is formed by adjacent red, green, and blue subpixels. In the drawing, SP-1 may be a red subpixel, SP-2 a green subpixel, and SP-3 a blue subpixel, but this is not limited to them.

[0056] Red subpixels can emit red light, green subpixels can emit green light, and blue subpixels can emit blue light. Furthermore, multiple subpixels SP-1 to SP-N may also contain multiple transparent subpixels that emit transparent light.

[0057] Each of the multiple subpixels SP-1 to SP-N may contain at least one or more light-emitting elements 120-1 to 120-N. The light-emitting elements 120-1 to 120-N may include organic light-emitting elements, semiconductor light-emitting elements, micro-LEDs (hereinafter referred to as μ-LEDs), and the like.

[0058] For example, a red subpixel may contain at least one red light-emitting element for emitting red light. For example, a green subpixel may contain at least one green light-emitting element for emitting green light. For example, a blue subpixel may contain at least one blue light-emitting element for emitting blue light.

[0059] Multiple light-emitting circuits 130-1 to 130-N may be included in multiple subpixels SP-1 to SP-N. Multiple light-emitting circuits 130-1 to 130-N can drive multiple light-emitting elements 120-1 to 120-N of the multiple subpixels SP-1 to SP-N to emit multiple colored light. For this purpose, in the multiple subpixels SP-1 to SP-N, multiple light-emitting circuits 130-1 to 130-N are electrically connected to multiple light-emitting elements 120-1 to 120-N.

[0060] Multiple light-emitting circuits 130-1 to 130-N can generate multiple light-emitting currents IEM1 to IEMN to supply to multiple light-emitting elements 120-1 to 120-N. These light-emitting currents IEM1 to IEMN can be called drive currents.

[0061] For example, in the first subpixel SP-1, the first light-emitting circuit 130-1 is electrically connected to the first light-emitting element 120-1 and can be driven to emit first color light by supplying a first light-emitting current IEM1 to the first light-emitting element 120-1. For example, in the second subpixel SP-2, the second light-emitting circuit 130-2 is electrically connected to at least one second light-emitting element 120-2 and can be driven to emit second color light by supplying a second light-emitting current IEM2 to the second light-emitting element 120-2. In the third subpixel SP-3, the third light-emitting circuit 130-3 is electrically connected to the third light-emitting element 120-3 and can be driven to emit third color light by supplying a third light-emitting current IEM3 to the third light-emitting element 120-3. For example, the first color light may be red light, the second color light may be green light, and the third color light may be blue light, but this is not a limitation.

[0062] In the embodiment, the light-emitting circuits 130-1 to 130-N may be embodied as an integrated circuit (hereinafter referred to as IC), a chip, or a package, or they may be directly formed on a panel using semiconductor processes. Multiple light-emitting circuits 130-1 to 130-N may be embodied as individual ICs or as a single integrated IC.

[0063] In the embodiment, in each subpixel SP-1 to SP-N, the light-emitting elements 120-1 to 120-N may be included in the light-emitting circuits 130-1 to 130-N. That is, the light-emitting circuits 130-1 to 130-N may include the light-emitting elements 120-1 to 120-N and be embodied as an IC, chip, or package.

[0064] In each subpixel SP-1 to SP-N, the light-emitting elements 120-1 to 120-N and the light-emitting circuits 130-1 to 130-N are electrically connected between the first power line 141 and the second power line 142. For example, one side of the light-emitting elements 120-1 to 120-N is electrically connected to the first power line 141, the other side of the light-emitting elements 120-1 to 120-N is connected to one side of the light-emitting circuits 130-1 to 130-N, and the other side of the light-emitting circuits 130-1 to 130-N is electrically connected to the second power line 142.

[0065] A first power supply voltage EVDD is supplied to the first power supply line 141, and a second power supply voltage EVSS is supplied to the second power supply line 142. The first power supply voltage EVDD is a high potential voltage and is greater than the second power supply voltage EVSS, which is a low potential voltage. The second power supply voltage EVSS may be, for example, grounded or 0V, but is not limited to these.

[0066] On the other hand, the reference current generation circuit 110 can generate a reference current. The reference current generation circuit 110 is electrically connected to multiple subpixels SP-1 to SP-N.

[0067] The reference current can be used to generate multiple light-emitting currents IEM1 to IEMN that flow through multiple subpixels SP-1 to SP-N. That is, multiple light-emitting currents IEM1 to IEMN that flow through multiple subpixels SP-1 to SP-N are generated using the reference current. In the embodiment, a current mirror method is used to generate light-emitting currents IEM1 to IEMN corresponding to the reference current in each of the multiple subpixels SP-1 to SP-N. For this purpose, a current mirror circuit may be configured by the transistor of the reference current generation circuit 110 and the transistors of each of the multiple light-emitting circuits 130-1 to 130-N. The transistor of the reference current generation circuit 110 is connected to a diode. The transistor of the reference current generation circuit 110 and the transistors of each of the multiple light-emitting circuits 130-1 to 130-N may be connected to a common gate.

[0068] The reference current and the light-emitting currents IEM1 to IEMN may be constant currents. A constant current means that a constant current flows even if the voltage across its terminals changes.

[0069] The light-emitting currents IEM1~IEMN may correspond to the reference current. The multiple light-emitting currents IEM1~IEMN flowing through multiple subpixels SP-1~SP-N may be the same as or greater than the reference current. That is, multiple light-emitting circuits 130-1~130-N can generate light-emitting currents IEM1~IEMN that are the same as or greater than the reference current according to a predetermined ratio, i.e., the copy ratio.

[0070] The copy ratio may be determined by designing the aspect ratios of each transistor in the multiple light-emitting circuits 130-1 to 130-N to be different from the aspect ratio of the transistor in the reference current generation circuit 110.

[0071] For example, if the aspect ratio of the transistors in the light-emitting circuits 130-1 to 130-N is the same as the aspect ratio of the transistors in the reference current generation circuit 110, the copy ratio is set to 1, and the light-emitting currents IEM1 to IEMN generated by the multiple light-emitting circuits 130-1 to 130-N will be the same as the reference current. For example, if the aspect ratio of the transistors in the light-emitting circuits 130-1 to 130-N is greater than the aspect ratio of the transistors in the reference current generation circuit 110, the copy ratio will be greater than 1, and therefore the light-emitting currents IEM1 to IEMN generated by the light-emitting circuits 130-1 to 130-N will be greater than the reference current.

[0072] Therefore, by freely designing the aspect ratio of each transistor in the multiple light-emitting circuits 130-1 to 130-N, the light-emitting currents IEM1 to IEMN required for the subpixel SP-1 can be obtained accurately and easily.

[0073] According to the embodiment, the aspect ratio of the transistors in the light-emitting circuits 130-1 to 130-N is designed to be larger than the aspect ratio of the transistors in the reference current generation circuit 110. Therefore, by designing the transistors in the reference current generation circuit 110 to have a smaller aspect ratio, a relatively small reference current is generated, reducing the burden on reference current generation, decreasing the size of the reference current generation circuit 110, and saving power consumption. In addition, since the multiple light-emitting currents IEM1 to IEMN of the multiple light-emitting circuits 130-1 to 130-N have large values, the contrast ratio is improved, and high brightness can be achieved.

[0074] On the other hand, the reference current generation circuit 110 is electrically connected between the third power supply line 143 and the second power supply line 142. The third power supply voltage PVDD is supplied to the third power supply line 143. The third power supply voltage PVDD may be different from the first power supply voltage EVDD as a high potential voltage. For example, the third power supply voltage PVDD may be smaller than the first power supply voltage EVDD, but is not limited to this.

[0075] The second power supply line 142 may be connected in common to the reference current generation circuit 110 and the multiple light-emitting circuits 130-1 to 130-N. In this case, the transistors of the reference current generation circuit 110 and the multiple transistors of the multiple light-emitting circuits 130-1 to 130-N that constitute the current mirror circuit can use the second power supply voltage EVSS supplied to the second power supply line 142 in common. Therefore, since the transistors of the reference current generation circuit 110 and the multiple transistors of the multiple light-emitting circuits 130-1 to 130-N are simultaneously affected by the IR drop associated with the second power supply voltage EVSS, they are not affected by the changes in the respective light-emitting currents IEM1 to IEMN of the multiple subpixels SP-1 to SP-N, thus preventing image quality defects.

[0076] On the other hand, while the second power supply line 142 is commonly connected to the reference current generation circuit 110 and the multiple light-emitting circuits 130-1 to 130-N, the third power supply line 143 is connected only to the reference current generation circuit 110 and does not need to be electrically connected to the multiple light-emitting circuits 130-1 to 130-N. As a result, the reference current is not affected by the IR drop associated with the second power supply voltage EVSS supplied to the second power supply line 142, so an accurate and constant reference current can be obtained.

[0077] On the other hand, multiple light-emitting circuits 130-1 to 130-N each use digital data and program signals to adjust the ON interval (or light-emitting interval) of the light-emitting elements 120-1 to 120-N, thereby enabling gradation expression for the image. For example, the digital data can include signals related to the ON / OFF state of the light-emitting elements 120-1 to 120-N. For example, the digital data can include "1" as the ON state of the light-emitting elements 120-1 to 120-N and "0" as the OFF state of the light-emitting elements 120-1 to 120-N, but is not limited to this.

[0078] When the light-emitting elements 120-1 to 120-N are turned on, they emit light, and when they are turned off, they stop emitting light. For example, the program signal can include grayscale information as a control signal for writing input data.

[0079] The light-emitting elements 120-1 to 120-N are turned on according to digital data, and the ON interval of the light-emitting elements 120-1 to 120-N is adjusted according to the program signal, thereby displaying an image with a desired gradation. For example, the longer the ON interval, the higher the gradation of the displayed image. By having the light-emitting elements 120-1 to 120-N emit light for the same subpixel SP-1 in different ON intervals per frame, an image with different gradations per frame is displayed.

[0080] In the drawing, the G node may be one node between the gate of the transistor of the reference current generation circuit 110 that constitutes the current mirror circuit and the gates of each of the transistors of the multiple light-emitting circuits 130-1 to 130-N.

[0081] A reference current generated by the reference current generation circuit 110 generates a predetermined voltage at the G node via the transistor of the reference current generation circuit 110. This predetermined voltage generates multiple light-emitting currents IEM1 to IEMN in the transistors of the multiple light-emitting elements 120-1 to 120-N. In this case, as described above, by designing the aspect ratios of the transistors of the light-emitting elements 120-1 to 120-N to be the same as or different from the aspect ratios of the transistors of the reference current generation circuit 110, the same or different light-emitting currents IEM1 to IEMN are generated in each of the transistors of the multiple light-emitting elements 120-1 to 120-N based on the voltage on the G node.

[0082] On the other hand, in the embodiment, multiple subpixels SP-1 to SP-N may be driven simultaneously. That is, multiple subpixels SP-1 to SP-N are driven simultaneously within one frame, and the ON intervals of each light-emitting element 120-1 to 120-N of the multiple subpixels SP-1 to SP-N are adjusted so that images with different gradations are displayed on each subpixel SP-1 to SP-N.

[0083] On the other hand, although not shown, the display device according to the first embodiment may include a voltage generation circuit. The voltage generation circuit is connected to a reference current generation circuit 110 and can output a reference voltage for generating a reference current. The reference current generation circuit 110 can generate a reference current based on the reference voltage provided by the voltage generation circuit 150.

[0084] On the other hand, a display panel may include a display area containing multiple pixels (or multiple subpixels SP-1 to SP-N) and a non-display area excluding the display area.

[0085] The voltage generation circuit 150 and the reference current generation circuit 110 may be provided on the display panel. The voltage generation circuit 150 and the reference current generation circuit 110 may be implemented as a single IC or as separate ICs.

[0086] The voltage generation circuit 150 and the reference current generation circuit 110 may be located in a region between adjacent subpixels within the display area. For example, the voltage generation circuit 150 and the reference current generation circuit 110 may be located within the display area.

[0087] The voltage generation circuit 150 and the reference current generation circuit 110 may be provided in one area of ​​the non-display region.

[0088] Figure 3 is a block diagram illustrating a display device according to the second embodiment. The drawing shows one subpixel SP-1 from among the multiple subpixels SP-1 to SP-N shown in Figure 2, but the other subpixels SP-2 to SP-N may have the same or similar circuit structure as the said subpixel SP-1.

[0089] Referring to Figure 3, the display device according to the second embodiment may include a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1. The light-emitting circuit 130-1 and the light-emitting elements 120-1 may be included in the subpixel SP-1. Conversely, the light-emitting circuit 130-1 may not be included in the subpixel SP-1.

[0090] The reference current generation circuit 110 is electrically connected to the subpixel SP-1. The reference current generation circuit 110 is also electrically connected to the light-emitting circuit 130-1, so that a light-emitting current IEM1 is generated in the light-emitting circuit 130-1. That is, a light-emitting current IEM1 is generated in the subpixel SP-1 based on the reference current IREF generated by the reference current generation circuit 110, and the light-emitting element 120-1 can emit light due to the generated light-emitting current IEM1.

[0091] The reference current generation circuit 110 may include a constant current source 111, a first transistor T1, switches S1 and S2, etc.

[0092] The constant current source 111 may be a source that generates a constant current. In this embodiment, the constant current can be used as a reference current IREF to generate a light-emitting current IEM1 in the light-emitting circuit 130-1.

[0093] The first transistor T1 is electrically connected to the constant current source 111. The first transistor T1 is connected to a diode; that is, the gate and drain of the first transistor T1 may be connected in common. The reference current IREF generated by the constant current source 111 can flow through the first transistor T1.

[0094] Switches S1 and S2 are connected to the first transistor T1 and can control the on / off state of the reference current IREF. Turning the reference current IREF on means that the reference current IREF flows through the first transistor T1, and turning the reference current IREF off means that the reference current IREF does not flow through the first transistor T1.

[0095] The switch may include a first switch S1 and a second switch S2. The first switch S1 is connected between the first transistor T1 and the second power supply line 142, and the second switch S2 is connected between the constant current source 111 and the first transistor T1.

[0096] The first switch S1 and the second switch S2 can be simultaneously turned on and off by the first control signals D1 and D2. When the first switch S1 and the second switch S2 are open by the first control signals D1 and D2, the reference current IREF does not flow through the first transistor T1, which can be interpreted as the reference current IREF being off. When the first switch S1 and the second switch S2 are closed by the first control signals D1 and D2, the reference current IREF flows through the first transistor T1, which can be interpreted as the reference current IREF being on. The time interval during which the reference current IREF flows through the first transistor T1 can be defined as the on interval. The time interval during which the reference current IREF does not flow through the first transistor T1 can be defined as the off interval.

[0097] For example, the circuit may be divided into on-periods and off-periods according to its cycle. The period may be, for example, one frame, but is not limited to this. During the on-period, the first switch S1 and the second switch S2 are closed, so the reference current IREF can flow through the first transistor T1. During the off-period, the first switch S1 and the second switch S2 are open, so the reference current IREF does not flow through the first transistor T1.

[0098] On the other hand, the subpixel SP-1 may include a light-emitting circuit 130-1 and a light-emitting element 120-1. The light-emitting element 120-1 does not have to be included in the subpixel SP-1.

[0099] The light-emitting circuit 130-1 can drive the light-emitting element 120-1 to cause the light-emitting element 120-1 to emit light. To this end, the light-emitting circuit 130-1 generates a light-emitting current IEM1, and the light-emitting element 120-1 can emit light due to the generated light-emitting current IEM1.

[0100] The light-emitting circuit 130-1 may include a first transistor T11, switches SW11 and SW12, a digital storage 135-1, and the like.

[0101] The first transistor T11 of the light-emitting circuit 130-1 is connected to the light-emitting element 120-1. The light-emitting element 120-1 and the light-emitting circuit 130-1 are connected between the first power line 141 and the second power line 142. For example, the anode electrode of the light-emitting element 120-1 is electrically connected to the first power line 141, the cathode electrode of the light-emitting element 120-1 is electrically connected to the drain of the first transistor T11, and the source of the first transistor T11 is electrically connected to the second power line 142.

[0102] The first transistor T11 can generate an emission current IEM1. The emission current IEM1 is generated based on a reference current IREF generated by the reference current generation circuit 110. The first transistor T11 can generate an emission current IEM1 corresponding to the reference current IREF generated by the reference current generation circuit 110. The first transistor T11 can generate an emission current IEM1 that is a copy of the reference current IREF. When the first transistor T11 generates an emission current IEM1, the emission current IEM1 can cause the light-emitting element 120-1 to emit light.

[0103] A current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1. In the current mirror circuit, a light-emitting current IEM1 is generated in the first transistor T11 of the light-emitting circuit 130-1 in accordance with the reference current IREF flowing through the first transistor T1 of the reference current generation circuit 110. At this time, the light-emitting current IEM1 may be the same as or greater than the reference current IREF.

[0104] In the embodiment, the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be MOS transistors. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be MOS transistors of the same conductivity type. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be NMOS transistors, but are not limited to this.

[0105] The first transistor T1 of the reference current generation circuit 110 is connected to a diode, and the gate of the first transistor T1 of the reference current generation circuit 110 and the gate of the first transistor T11 of the light-emitting circuit 130-1 may be commonly connected to the G node. In addition, the source of the first transistor T1 of the reference current generation circuit 110 and the source of the first transistor T11 of the light-emitting circuit 130-1 may be commonly connected to the second power supply line 142.

[0106] In this case, the reference current IREF flowing through the reference current generation circuit 110 can be represented by equation 1, and the light-emitting current IEM1 flowing through the light-emitting circuit 130-1 can be represented by equation 2.

[0107]

number

[0108]

number

[0109] Based on Equation 1, the voltage VG of the G node is calculated. That is, the first transistor T1 of the reference current generation circuit 110 may be a conversion element that converts the reference current IREF into the voltage of the G node.

[0110] The first transistor T11 of the light emission circuit 130-1 may be a conversion element that converts the voltage of the G node into the light emission current IEM1.

[0111] From Equation 1 and Equation 2, in the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light emission circuit 130-1, the process constants μ and Cox and the aspect ratio W D / L D 、W E / L E If they are the same, the reference current IREF and the light emission current IEM1 can be the same. In such a case, the reference current IREF is directly copied and generated as the light emission current IEM1 in the light emission circuit 130-1.

[0112] On the contrary, although the process constants μ and Cox are the same in the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light emission circuit 130-1, if the aspect ratios W D / L D 、W E / L E are different, the reference current IREF and the light emission current IEM1 will be different. For example, if the aspect ratio W E / L E of the first transistor T11 of the light emission circuit 130-1 is larger than the aspect ratio W D / L D of the first transistor T1 of the reference current generation circuit 110, the light emission current IEM1 can be larger than the reference current IREF. For the sake of convenience, the aspect ratio W D / L D of the first transistor T1 of the reference current generation circuit 110 is named the first aspect ratio, and the aspect ratio W E / L E of the first transistor T11 of the light emission circuit 130-1 can be named the second aspect ratio.

[0113] Therefore, the first aspect ratio W D / L D By being designed to be small, a small reference current IREF is generated in the reference current generation circuit 110. This reduces the burden on reference current generation, decreases the size of the reference current generation circuit 110, and saves power consumption.

[0114] Also, the second aspect ratio W E / L E By designing it to be large, a large light-emitting current IEM1 is generated in the light-emitting circuit 130-1. As a result, the light-emitting element 120-1 emits light due to the large light-emitting current IEM1, improving the contrast ratio and enabling high brightness.

[0115] On the other hand, the switches SW11 and SW12 of the light-emitting circuit 130-1 are connected to the first transistor T11 to control the on / off state of the light-emitting current IEM1. The switches may include a first switch SW11 and a second switch SW12. The first switch SW11 is connected between the first transistor T11 and the second power supply line 142, and the second switch SW12 is connected between the light-emitting element 120-1 and the first transistor T11.

[0116] The first switch SW11 and the second switch SW12 can be simultaneously turned on and off by the second control signals C11 and C12. When the first switch SW11 and the second switch SW12 are open by the second control signals C11 and C12, the light-emitting current IEM1 does not flow to the first transistor T11, which can be interpreted as the light-emitting current IEM1 being off. When the first switch SW11 and the second switch SW12 are closed by the second control signals C11 and C12, the light-emitting current IEM1 flows to the first transistor T11, which can be interpreted as the light-emitting current IEM1 being on. The time interval during which the light-emitting current IEM1 flows to the first transistor T11 can be defined as the on interval. The time interval during which the light-emitting current IEM1 does not flow to the first transistor T11 can be defined as the off interval.

[0117] For example, the period may be divided into on-periods and off-periods. The period may be, for example, one frame, but is not limited to this. During the on-period, the first switch SW11 and the second switch SW12 are closed, so the light-emitting current IEM1 can flow through the first transistor T11. During the off-period, the first switch SW11 and the second switch SW12 are open, so the light-emitting current IEM1 does not flow through the first transistor T11.

[0118] For the sake of clarity, the ON period in which the reference current IREF flows through the first transistor T1 of the reference current generation circuit 110 may be named the first ON period SS1, and the ON period in which the light-emitting current IEM1 flows through the first transistor T11 of the light-emitting circuit 130-1 may be named the second ON period SS2.

[0119] As shown in Figure 4, when switches S1 and S2 of the reference current generation circuit 110 are closed in response to the first control signals D1 and D2, the reference current IREF can flow through the first transistor T1 of the reference current generation circuit 110 during the first ON period SS1. When switches SW11 and SW12 of the light-emitting circuit 130-1 are closed in response to the second control signals C11 and C12, the light-emitting current IEM1 can flow through the first transistor T11 of the light-emitting circuit 130-1 during the second ON period SS2.

[0120] The second on-section SS2 may be contained within the first on-section SS1. The width of the second on-section SS2 may be greater than the width of the first on-section SS1. The rising time of the first on-section SS1 may be faster than the rising time of the second on-section SS2, and the falling time of the first on-section SS1 may be slower than the falling time of the second on-section SS2.

[0121] On the other hand, the digital storage 135-1 may be included in the light-emitting circuit 130-1, but is not limited to this.

[0122] The digital storage 135-1 can generate second control signals C11 and C12 for switching the switches SW11 and SW12 of the light-emitting circuit 130-1 using the digital data DM-1 and the program signal.

[0123] Switches SW11 and SW12 are turned on or off in response to the second control signals C11 and C12. When switches SW11 and SW12 are closed during the second on-interval SS2 in response to the second control signals C11 and C12, a light-emitting current IEM1 is generated in the first transistor T11, and the light-emitting element 120-1 can emit light due to the generated light-emitting current IEM1.

[0124] Since switches SW11 and SW12 remain closed during the second ON period SS2, the light-emitting element 120-1 can emit light during the second ON period SS2.

[0125] The second ON section SS2 may, but is not limited to, be determined by a program signal. The program signal may include grayscale information for determining the second ON section SS2. This generates second control signals C11 and C12 having the second ON section SS2 based on the digital data DM-1 and the program signal. For example, the larger the grayscale, the larger the second ON section SS2 can be. Therefore, by changing the width of the second ON section SS2, an image with the desired grayscale can be displayed.

[0126] On the other hand, first control signals D1 and D2 for maintaining the switches S1 and S2 of the reference current generation circuit 110 in a closed state during the first ON section SS1 may be provided from an external source, such as a host, data processing device, processor, or controller.

[0127] According to the embodiment, a constant current, the light-emitting current IEM1, is generated in the first transistor T11 of the light-emitting circuit 130-1 in response to the reference current IREF generated in the reference current generation circuit 110. At this time, the second ON section SS2 is determined or adjusted based on the digital data DM-1 and the program signal, and the light-emitting element 120-1 emits light during the second ON section SS2, thereby displaying images with different gradations. For example, the larger the second ON section SS2, the higher the gradation of the displayed image.

[0128] Figure 5 is a block diagram illustrating a display device according to the third embodiment.

[0129] The third embodiment is similar to the second embodiment (Figure 3), except that the first transistor T1 of the reference current generation circuit 110 and the first transistor T111 of the light-emitting circuit 130-1 are PMOS transistors. In the third embodiment, components having the same function as those in the second embodiment (Figure 3) are given the same reference numerals, and their detailed descriptions are omitted. The explanations omitted in the third embodiment can be easily understood from the explanation of the second embodiment (Figure 3).

[0130] Referring to Figure 5, the display device according to the third embodiment may include a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1. The light-emitting circuit 130-1 and the light-emitting elements 120-1 may be included in the subpixel SP-1. Conversely, the light-emitting circuit 130-1 may not be included in the subpixel SP-1.

[0131] The reference current generation circuit 110 may include a constant current source 111, a first transistor T1, switches S1 and S2, etc.

[0132] The light-emitting circuit 130-1 may include a first transistor T11, switches SW11 and SW12, a digital storage 135-1, and the like.

[0133] Unlike the second embodiment (Figure 3), in the third embodiment, the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be PMOS transistors.

[0134] In the reference current generation circuit 110, one side of the second switch S2 is connected to the first power supply line 141, and the other side of the second switch S2 is connected to the source of the first transistor T1. The drain of the first transistor T1 is connected to one side of the first switch S1, the other side of the first switch S1 is connected to one side of the constant current source 111, and the other side of the constant current source 111 is connected to the fourth power supply line 144. The fourth power supply voltage PVSS is supplied to the fourth power supply line 144. The fourth power supply voltage PVSS may be grounded or 0V.

[0135] In the light-emitting circuit 130-1, one side of the second switch SW12 is connected to the first power supply line 141, and the other side of the second switch SW12 is connected to the source of the first transistor T11. The drain of the first transistor T11 is connected to one side of the first switch SW11, the other side of the first switch SW11 is connected to one side of the constant current source 111, and the other side of the constant current source 111 is connected to the second power supply line 142.

[0136] On the other hand, a current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1.

[0137] For this purpose, the first transistor T1 of the reference current generation circuit 110 is connected to a diode, and the gate of the first transistor T1 of the reference current generation circuit 110 and the gate of the first transistor T11 of the light-emitting circuit 130-1 are connected to a G node. In addition, the first power supply line 141 may be commonly connected to the source of the first transistor T1 of the reference current generation circuit 110 and the source of the first transistor T11 of the light-emitting circuit 130-1.

[0138] In this case, the voltage at the G node is obtained by the reference current IREF flowing through the first transistor T1 of the reference current generation circuit 110, and the light-emitting current IEM1 is generated by the first transistor T11 of the light-emitting circuit 130-1 based on the voltage at the G node. That is, due to the configuration of the current mirror circuit, the reference current IREF of the reference current generation circuit 110 is copied and generated as the light-emitting current IEM1 in the light-emitting circuit 130-1. At this time, the copy ratio is the aspect ratio of the first transistor T11 of the light-emitting circuit 130-1, i.e., the second aspect ratio W. E / L E This is the aspect ratio of the first transistor T1 of the reference current generation circuit 110, i.e., the first aspect ratio W. D / L D It can be defined as the value obtained by dividing by . Second aspect ratio W E / L E The first aspect ratio W D / L D By designing it to be the same as or larger than the reference current IREF, the light-emitting current IEM1 can be the same as or larger than the reference current IREF.

[0139] A constant current IREF is generated as a constant current in the constant current source 111 of the reference current generation circuit 110. In this case, a light-emitting current IEM1 is generated in the first transistor T11 of the light-emitting circuit 130-1, corresponding to the reference current IREF flowing through the first transistor T1 of the reference current generation circuit 110. The generated light-emitting current IEM1 allows the light-emitting element 120-1 to emit light. At this time, the light-emitting element 120-1 can emit light while the switches SW11 and SW12 are closed in response to the second control signals C11 and C12 provided from the digital storage 135-1, i.e., during the second ON section SS2. Therefore, an image of the desired grayscale is displayed by the light-emitting element 120-1 that emits light during the second ON section SS2.

[0140] Figure 6 is a block diagram illustrating a display device according to the fourth embodiment.

[0141] The fourth embodiment is identical to the second embodiment (Figure 3) except for the voltage generation circuit 150. In the fourth embodiment, components having the same function as those in the second embodiment (Figure 3) are given the same reference numerals, and their detailed descriptions are omitted. The descriptions omitted in the fourth embodiment can be easily understood from the description of the second embodiment (Figure 3). The fourth embodiment can also be applied to the third embodiment.

[0142] Referring to Figure 6, the display device according to the fourth embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1. The light-emitting circuit 130-1 and the light-emitting elements 120-1 may be included in the subpixel SP-1. Conversely, the light-emitting circuit 130-1 may not be included in the subpixel SP-1.

[0143] The reference current generation circuit 110, the light-emitting circuit 130-1, and the light-emitting element 120-1 have already been described, so a detailed explanation of them will be omitted.

[0144] The voltage generation circuit 150 is connected to the reference current generation circuit 110 and can provide a reference voltage VREF for adjusting or determining the reference current IREF. That is, the reference current IREF generated by the reference current generation circuit 110 may be determined by the reference voltage VREF provided by the voltage generation circuit 150. For example, the larger the reference voltage VREF, the larger the reference current IREF can be.

[0145] The voltage generation circuit 150 can output a reference voltage VREF to the X node. The reference current generation circuit 110 generates a reference current IREF based on the voltage at the X node, i.e., the reference voltage VREF output from the voltage generation circuit 150.

[0146] For convenience, the X node may be named the 1st node and the G node may be named the 2nd node, or vice versa.

[0147] According to the fourth embodiment, the voltage generation circuit 150 provides a reference voltage VREF for adjusting or determining the reference current IREF of the reference current generation circuit 110, thereby facilitating the adjustment of the reference current IREF of the reference current generation circuit 110.

[0148] On the other hand, the voltage generation circuit 150 can also be applied to the third embodiment (Figure 5) in the same way.

[0149] Figure 7 is a block diagram illustrating a display device according to the fifth embodiment.

[0150] The fifth embodiment is identical to the second embodiment (Figure 3), except for a plurality of subpixels SP-1 to SP-N, each including light-emitting elements 120-1 to 120-N and light-emitting circuits 130-1 to 130-N. In the fifth embodiment, components having the same function as those in the second embodiment (Figure 3) are assigned the same reference numerals, and their detailed descriptions are omitted. The descriptions omitted in the fifth embodiment can be easily understood from the description of the second embodiment (Figure 3).

[0151] Referring to Figure 7, the display device according to the fifth embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a plurality of light-emitting circuits 130-1 to 130-N, a plurality of light-emitting elements 120-1 to 120-N, and so on.

[0152] A reference current generation circuit 110 and a plurality of subpixels SP-1 to SP-N may be provided on the display panel. The plurality of subpixels SP-1 to SP-N are connected between the first power line 141 and the second power line 142.

[0153] Multiple subpixels SP-1 to SP-N may include multiple light-emitting circuits 130-1 to 130-N, multiple light-emitting elements 120-1 to 120-N, etc. One side of the multiple light-emitting elements 120-1 to 120-N is electrically connected to a first power line 141, the other side of the multiple light-emitting elements 120-1 to 120-N is electrically connected to one side of the multiple light-emitting circuits 130-1 to 130-N, and the other side of the multiple light-emitting circuits 130-1 to 130-N is electrically connected to a second power line 142.

[0154] Multiple light-emitting circuits 130-1 to 130-N may include first transistors T11 to TN1, switches SW11 to SWN1, SW12 to SWN2, digital storage 135-1 to 135-N, etc.

[0155] The switch may include a first switch SW11~SWN1 and / or a second switch SWN2. For example, the first switch SW11~SWN1 is connected between the source of the first transistor T11~TN1 and the second power line 142, and the second switch SWN2 is connected between the drain of the first transistor T11~TN1 and a plurality of light-emitting elements 120-1~120-N.

[0156] On the other hand, the reference current generation circuit 110 is electrically connected to multiple subpixels SP-1 to SP-N.

[0157] The reference current generation circuit 110 may include a constant current source 111, a first transistor T1, switches S1 and S2, etc.

[0158] The switch may include a first switch S1 and / or a second switch S2. For example, the first switch S1 may be connected between the source of the first transistor T1 and the second power supply line 142, and the second switch S2 may be connected between the drain of the first transistor T1 and the constant current source 111.

[0159] A current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N. The first transistor T1 of the reference current generation circuit 110 and the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N may be NMOS transistors.

[0160] The first transistor T1 of the reference current generation circuit 110 is connected to a diode. The gate of the first transistor T1 of the reference current generation circuit 110 and the gates of the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N may be connected in common to the G node. The second power supply line 142 may be connected in common to the reference current generation circuit 110 and the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N.

[0161] In such cases, the reference current IREF generated by the reference current generation circuit 110 is copied, and multiple light-emitting currents IEM1 to IEMN are generated in multiple light-emitting circuits 130-1 to 130-N of multiple subpixels SP-1 to SP-N. At this time, the multiple light-emitting currents IEM1 to IEMN may be the same or different depending on the copy ratio. If the copy ratio is 1, all of the multiple light-emitting currents IEM1 to IEMN are the same and can also be the same as the reference current IREF. If the copy ratio is different, the multiple light-emitting currents IEM1 to IEMN will be different. If the copy ratio is greater than 1, the multiple light-emitting currents IEM1 to IEMN can be greater than the reference current IREF.

[0162] Therefore, the aspect ratio W of the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N E / L E The aspect ratio W of the first transistor T1 of the reference current generation circuit 110 D / L DBy designing them to be identical or different, multiple identical or different light-emitting currents IEM1 to IEMN are generated in multiple light-emitting circuits 130-1 to 130-N. The multiple light-emitting currents IEM1 to IEMN may be constant currents.

[0163] According to the fifth embodiment, by using the reference current IREF generated by a single reference current generation circuit 110, multiple light-emitting currents IEM1 to IEMN are simultaneously generated to emit light from multiple light-emitting elements 120-1 to 120-N of multiple subpixels SP-1 to SP-N. This results in a very simple circuit structure, making it easy and highly efficient to drive multiple subpixels SP-1 to SP-N.

[0164] According to the fifth embodiment, by adjusting the multiple copy ratios of the multiple light-emitting circuits 130-1 to 130-N, multiple identical or different light-emitting currents IEM1 to IEMN are generated in each of the multiple light-emitting circuits 130-1 to 130-N of the multiple subpixels SP-1 to SP-N, thereby improving image quality through optimal gradation expression and optimal brightness realization.

[0165] Figure 8 is a block diagram illustrating a display device according to the sixth embodiment.

[0166] The sixth embodiment is identical to the fourth embodiment (Figure 6), except that it is equipped with one switch S1 for the reference current generation circuit 110 and one switch SW11 for the light-emitting circuit 130-1. In the sixth embodiment, the same reference numerals are used for components having the same function as in the fourth embodiment (Figure 6), and their detailed descriptions are omitted. The descriptions omitted in the sixth embodiment can be easily understood from the description of the fourth embodiment (Figure 6). The sixth embodiment can also be applied to the fifth embodiment.

[0167] Referring to Figure 8, the display device according to the sixth embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1.

[0168] In the sixth embodiment, the second switch S2 of the reference current generation circuit 110 and the second switch SW12 of the light-emitting circuit 130-1, as provided in the fourth embodiment (Figure 6), may be omitted.

[0169] A current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be NMOS transistors.

[0170] In the reference current generation circuit 110, the constant current source 111 may include a PMOS transistor. In such a case, the third power supply line 143 may be connected in common to both the voltage generation circuit 150 and the reference current generation circuit 110.

[0171] In the reference current generation circuit 110, the drain of the first transistor T1 may be directly connected to the constant current source 111. In the reference current generation circuit 110, the source of the first transistor T1 is electrically connected to one side of the first switch S1, and the other side of the first switch S1 is connected to the second power supply line 142.

[0172] In the light-emitting circuit 130-1, the drain of the first transistor T11 may be directly connected to the light-emitting element 120-1. In the light-emitting circuit 130-1, the source of the first transistor T11 is connected to one side of the first switch SW11, and the other side of the first switch SW11 is connected to the second power supply line 142.

[0173] As shown in Figure 4, the first switch S1 of the reference current generation circuit 110 is closed during the first ON section SS1, so the first switch SW11 of the light-emitting circuit 130-1 can be closed during the second ON section SS2. As a result, the light-emitting element 120-1 emits light for at least the second ON section SS2, and an image having gradations corresponding to the second ON section SS2 is displayed.

[0174] Figure 9 is a block diagram illustrating a display device according to the seventh embodiment.

[0175] The seventh embodiment is identical to the fourth embodiment (Figure 6), except that it is equipped with one switch S2 in the reference current generation circuit 110 and one switch SW12 in the light-emitting circuit 130-1. In the seventh embodiment, the same reference numerals are used for components having the same function as in the fourth embodiment (Figure 6), and their detailed descriptions are omitted. The descriptions omitted in the seventh embodiment can be easily understood from the description of the fourth embodiment (Figure 6). The seventh embodiment can also be applied to the fifth embodiment.

[0176] Referring to Figure 9, the display device according to the seventh embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1.

[0177] In the fourth embodiment (Figure 6), the first switch S1 of the reference current generation circuit 110 and the first switch SW11 of the light-emitting circuit 130-1 may be omitted.

[0178] A current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be NMOS transistors.

[0179] In the reference current generation circuit 110, one side of the second switch S2 is electrically connected to the constant current source 111, the other side of the second switch S2 is electrically connected to the drain of the first transistor T1, and the source of the first transistor T1 may be directly connected to the second power supply line 142.

[0180] In the light-emitting circuit 130-1, one side of the second switch SW12 is electrically connected to the light-emitting element 120-1, the other side of the second switch SW12 is electrically connected to the drain of the first transistor T11, and the source of the first transistor T11 may be directly connected to the second power supply line 142.

[0181] As shown in Figure 4, the second switch S2 of the reference current generation circuit 110 is closed during the first ON section SS1, so the second switch SW12 of the light-emitting circuit 130-1 can be closed during the second ON section SS2. As a result, the light-emitting element 120-1 emits light for at least the second ON section SS2, and an image having gradations corresponding to the second ON section SS2 is displayed.

[0182] Figure 10 is a block diagram illustrating a display device according to the eighth embodiment.

[0183] The eighth embodiment is similar to the fourth embodiment (Figure 6), except that the first transistor T1 of the reference current generation circuit 110 and the first transistor T111 of the light-emitting circuit 130-1 are PMOS transistors. In the eighth embodiment, components having the same function as those in the fourth embodiment (Figure 6) are given the same reference numerals, and their detailed descriptions are omitted. The descriptions omitted in the eighth embodiment can be easily understood from the description of the fourth embodiment (Figure 6). The eighth embodiment can be similarly applied to the fifth embodiment (Figure 7), the sixth embodiment (Figure 8), and the seventh embodiment (Figure 9).

[0184] Referring to Figure 10, the display device according to the eighth embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1.

[0185] The reference current generation circuit 110 and the light-emitting circuit 130-1 may each be equipped with two switches S1, S2, SW11, and SW12, but they may also be equipped with only one switch.

[0186] A current mirror circuit may be formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be PMOS transistors. In this case, the first power supply line 141 may be commonly connected to one side of the reference current generation circuit 110 and one side of the light-emitting circuit 130-1. The other side of the reference current generation circuit 110 is electrically connected to the fourth power supply line 144, and the other side of the light-emitting circuit 130-1 is electrically connected to the second power supply line 142.

[0187] In the reference current generation circuit 110, the constant current source 111 may include an NMOS transistor. In such a case, the fourth power supply line 144 may be connected in common to the voltage generation circuit 150 and the reference current generation circuit 110.

[0188] In the reference current generation circuit 110, one side of the second switch S2 is electrically connected to the first power supply line 141, and the other side of the second switch S2 is electrically connected to the source of the first transistor T1. The drain of the first transistor T1 is electrically connected to one side of the first switch S1, the other side of the first switch S1 is electrically connected to one side of the constant current source 111, and the other side of the constant current source 111 is electrically connected to the fourth power supply line 144.

[0189] Figure 11 is a block diagram illustrating a display device according to the ninth embodiment.

[0190] The ninth embodiment is similar to the fourth embodiment (Figure 6), except for the selection switch 161. In the ninth embodiment, components having the same function as those in the fourth embodiment (Figure 6) are given the same reference numerals, and their detailed descriptions are omitted. The descriptions omitted in the ninth embodiment can be easily understood from the description of the fourth embodiment (Figure 6). The ninth embodiment can be similarly applied to the fifth embodiment (Figure 7), the sixth embodiment (Figure 8), and the seventh embodiment (Figure 9).

[0191] Referring to Figure 11, the display device according to the ninth embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, at least one or more light-emitting elements 120-1, a selection switch 161, and the like.

[0192] The voltage generation circuit 150, the reference current generation circuit 110, the light-emitting circuit 130-1, and the light-emitting element 120-1 have already been described, so a detailed explanation of them will be omitted.

[0193] In the reference current generation circuit 110, the constant current source 111 may include a PMOS transistor. In such a case, the third power supply line 143 may be connected in common to both the voltage generation circuit 150 and the reference current generation circuit 110.

[0194] The selection switch 161 can select one of the reference voltage VREF and the external voltage VON, and output the selected voltage to the reference current generation circuit 110.

[0195] The selection switch 161 may consist of an analog multiplexer. The analog multiplexer may consist of at least one NMOS transistor and at least one PMOS transistor.

[0196] As shown in Figure 11, the reference voltage VREF is provided by the voltage generation circuit 150. The external voltage VON may be provided by a host, data processing device, processor, controller, etc.

[0197] Although the drawing illustrates that one external voltage VON is provided, multiple external voltages that are different from each other may be provided, and one of the multiple external voltages, not just the reference voltage VREF, may be selected by the selection switch 161.

[0198] The selector switch 161 is connected between the voltage generation circuit 150 and the reference current generation circuit 110. For example, the first input side of the selector switch 161 is electrically connected to the output side of the voltage generation circuit 150, and the second input side of the selector switch 161 is electrically connected to the output side of an external device such as a host. The output side of the selector switch 161 is electrically connected to the constant current source 111 of the reference current generation circuit 110 via an X node.

[0199] According to the ninth embodiment, the reference current generation circuit 110 can generate different reference currents IREF based on different reference voltages VREF selected by the selection switch 161. By adjusting the reference currents IREF generated by the reference current generation circuit 110 in various ways, the light emission current IEM1 having the required intensity for the subpixel SP-1 can be obtained accurately and easily. This allows for precise and accurate control of the contrast ratio and brightness, thereby improving image quality.

[0200] Figure 12 is a block diagram illustrating a display device according to the 10th embodiment.

[0201] The 10th embodiment is similar to the 9th embodiment (Figure 11), except that the first transistor T1 of the reference current generation circuit 110 and the first transistor T111 of the light-emitting circuit 130-1 are PMOS transistors. Furthermore, the 10th embodiment is identical to the 8th embodiment (Figure 10), except for the selection switch 162. In the 10th embodiment, components having the same function as those in the 8th embodiment (Figure 10) and the 9th embodiment (Figure 11) are given the same reference numerals, and their detailed descriptions are omitted. The explanations omitted in the 10th embodiment can be easily understood from the explanations of the 8th embodiment (Figure 10) and the 9th embodiment (Figure 11).

[0202] Referring to Figure 12, the display device according to the 10th embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, at least one or more light-emitting elements 120-1, a selection switch 162, and the like.

[0203] The voltage generation circuit 150, the reference current generation circuit 110, the light-emitting circuit 130-1, and the light-emitting element 120-1 have already been described, so a detailed explanation of them will be omitted.

[0204] In the reference current generation circuit 110, the constant current source 111 may include an NMOS transistor. In such a case, the fourth power supply line 144 may be connected in common to the voltage generation circuit 150 and the reference current generation circuit 110.

[0205] The selection switch 162 can select one of the reference voltage VREF and the external voltage VON, and output the selected voltage to the reference current generation circuit 110.

[0206] As shown in Figure 12, the reference voltage VREF is provided by the voltage generation circuit 150. The external voltage VON may be provided by a host, data processing device, processor, controller, etc.

[0207] Although the drawing illustrates that one external voltage VON is provided, multiple external voltages that are different from each other may be provided, and one of the multiple external voltages, not just the reference voltage VREF, may be selected by the selection switch 162.

[0208] The selector switch 162 is connected between the voltage generation circuit 150 and the reference current generation circuit 110. For example, the first input side of the selector switch 162 is electrically connected to the output side of the voltage generation circuit 150, and the second input side of the selector switch 162 is electrically connected to the output side of an external device such as a host. The output side of the selector switch 162 is electrically connected to the constant current source 111 of the reference current generation circuit 110 via an X node.

[0209] According to the tenth embodiment, the reference current generation circuit 110 can generate different reference currents IREF based on different reference voltages VREF selected by the selection switch 162. By adjusting the reference currents IREF generated by the reference current generation circuit 110 in various ways, the light emission current IEM1 having the required intensity for the subpixel SP-1 can be obtained accurately and easily. This allows for precise and accurate control of the contrast ratio and brightness, thereby improving image quality.

[0210] Figure 13 is a block diagram illustrating a display device according to the 11th embodiment.

[0211] The 11th embodiment is similar to the 4th embodiment (Figure 6) in that it embodies the voltage generation circuit 150, the reference current generation circuit 110, and the light-emitting circuit 130-1, respectively. In the 11th embodiment, the same reference numerals are used for components having the same function as in the 4th embodiment (Figure 6), and their detailed descriptions are omitted. The explanations omitted in the 11th embodiment can be easily understood from the explanation of the 4th embodiment (Figure 6).

[0212] Referring to Figure 13, the display device according to the 11th embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1.

[0213] The voltage generation circuit 150 may include a plurality of first transistors 151-153 connected in series with each other between the third power supply line 143 and the fourth power supply line 144. Although three first transistors 151-153 are shown in the drawing, four or more may be provided.

[0214] The first transistors 151-153 may be PMOS transistors or NMOS transistors.

[0215] Each of the first transistors 151 to 153 is connected to a diode. A predetermined voltage corresponding to a threshold voltage may be applied to the first transistors 151 to 153 connected to the diodes. As a result, a constant current can flow through the voltage generation circuit 150 corresponding to a voltage obtained by adding a predetermined voltage for each of the first transistors 151 to 153.

[0216] On the other hand, one of the multiple first transistors 151 to 153, transistor 151, can form a current mirror circuit with the fourth transistor T4 of the reference current generation circuit 110. That is, the gate of one of the multiple first transistors 151 to 153, transistor 151, and the gate of the fourth transistor T4 of the reference current generation circuit 110 may be commonly connected to the X node. One of the multiple first transistors 151 to 153, transistor 151, can output a reference voltage VREF to the X node using a constant current. The fourth transistor T4 of the reference current generation circuit 110 can generate a reference current IREF based on the reference voltage VREF.

[0217] The constant current flowing through the voltage generation circuit 150 and the reference current IREF flowing through the reference current generation circuit 110 can be expressed by formulas similar to Equation 1 and Equation 2, respectively. As a result, the reference current IREF will be the same as or different from the constant current flowing through the voltage generation circuit 150.

[0218] The more first transistors 151-153 in the voltage generation circuit 150 there are, the greater the reference voltage VREF becomes, and the larger the reference current IREF generated by the reference current generation circuit 110 can become. Therefore, when the target reference current IREF to be obtained by the reference current generation circuit 110 is determined, the number of first transistors 151-153 in the voltage generation circuit 150 and the threshold voltage are determined so that the target reference current IREF is generated.

[0219] On the other hand, the reference current generation circuit 110 may include a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4 connected in series between the third power supply line 143 and the second power supply line 142. For example, the first transistor T1 and the second transistor T2 may be NMOS transistors, and the third transistor T3 and the fourth transistor T4 may be PMOS transistors, but the circuit is not limited to these.

[0220] The first transistor T1 is connected between the second transistor T2 and the third transistor T3, and can form a current mirror circuit with the first transistor T1 of the light-emitting circuit 130-1. The first transistor T1 may be an NMOS transistor or a PMOS transistor.

[0221] The second transistor T2 may be included in the first switch S1 shown in Figures 3, 5-8, 10, and 11. The second transistor T2 is connected between the first transistor T1 and the second power supply line 142. As shown in Figure 4, the second transistor T2 turns on during the first ON interval SS1 of the reference current IREF so that the reference current IREF can flow to the first transistor T1.

[0222] The third transistor T3 may be included in the second switch shown in Figures 3, 5-7, and 9-11. The third transistor T3 is connected between the first transistor T1 and the fourth transistor T4. The fourth transistor T4 turns on during the first ON interval SS1 of the reference current IREF, allowing the reference current IREF to flow to the first transistor T1.

[0223] The second transistor T2 and the third transistor T3 may be transistors of different conductivity types. That is, the second transistor T2 may be an NMOS transistor and the third transistor may be a PMOS transistor, but this is not a limitation.

[0224] The second transistor T2 and the third transistor T3 can be turned on or off simultaneously by the first control signals D1 and D2, but are not limited to this. For example, the second transistor T2 can be turned on by a high-level first control signal D1, and the third transistor T3 can be turned on by a low-level first control signal D2. For example, the second transistor T2 and the third transistor T3 can be turned on simultaneously during the ON period and turned off simultaneously during the OFF period.

[0225] The fourth transistor T4 may be included in the constant current source 111 shown in Figures 3 and 5 to 12.

[0226] The fourth transistor T4 is connected between the third power supply line 143 and the third transistor T3. The fourth transistor T4 can form a current mirror circuit with one of the multiple first transistors T1 of the voltage generation circuit 150, transistor 151. In this case, the constant current generated in the voltage generation circuit 150 is copied to generate a reference current IREF in the reference current generation circuit 110. That is, the reference voltage VREF converted by the constant current of the voltage generation circuit 150 is output to the G node, and the reference current IREF is generated in the reference current generation circuit 110 based on the reference voltage VREF.

[0227] Meanwhile, the light-emitting element 120-1 and the light-emitting circuit 130-1 are connected between the first power line 141 and the second power line 142.

[0228] The light-emitting circuit 130-1 may include a first transistor T11, a second transistor T12, and a third transistor T13 connected in series with each other between the light-emitting element 120-1 and the second power supply line 142.

[0229] The first transistor T11 is connected between the second transistor T12 and the third transistor T13, and can form a current mirror circuit with the first transistor T1 of the reference current generation circuit 110. The first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 may be NMOS transistors or PMOS transistors.

[0230] The second transistor T12 may be included in the first switch SW11 shown in Figures 3, 5-8, 10, and 11. The second transistor T12 is connected between the first transistor T11 and the second power line 142. As shown in Figure 4, the second transistor T12 turns on during the second ON interval SS2 of the light-emitting current IEM1, supplying the light-emitting current IEM1 to the light-emitting element 120-1 to cause the light-emitting element 120-1 to emit light.

[0231] The third transistor T13 may be included in the second switch SW12 shown in Figures 3, 5-7 and 9-11. The third transistor T13 is connected between the first transistor T11 and the fourth transistor T4. The fourth transistor T4 is turned on during the first ON interval SS1 of the light-emitting current, supplying light-emitting current to the light-emitting element 120-1 to cause it to emit light.

[0232] The second transistor T12 and the third transistor T13 may be transistors of different conductivity types. For example, the second transistor T12 may be an NMOS transistor and the third transistor T13 may be a PMOS transistor, but this is not a limitation.

[0233] The second transistor T12 and the third transistor T13 can be turned on or off simultaneously by the second control signals C11 and C12, but are not limited to this. For example, the second transistor T12 can be turned on by a high-level second control signal C11, and the third transistor T13 can be turned on by a low-level second control signal C12. For example, the second transistor T12 and the third transistor T13 can be turned on simultaneously during the ON period and turned off simultaneously during the OFF period.

[0234] For the sake of clarity, the current mirror circuit formed by the first transistor 151 of the voltage generation circuit 150 and the fourth transistor T4 of the reference current generation circuit 110 can be named the first current mirror circuit. The current mirror circuit formed by the first transistor T1 of the reference current generation circuit 110 and the first transistor T11 of the light-emitting circuit 130-1 can be named the second current mirror circuit.

[0235] Figure 14 is a block diagram illustrating a display device according to the twelfth embodiment.

[0236] The twelfth embodiment is identical to the eleventh embodiment (Figure 13) except for the second transistor 154 and the current control transistor 170 of the voltage generation circuit 150. In the twelfth embodiment, the same reference numerals are used for components having the same function as in the eleventh embodiment (Figure 13), and their detailed descriptions are omitted. The explanations omitted in the twelfth embodiment can be easily understood from the explanation of the eleventh embodiment (Figure 13).

[0237] Referring to Figure 14, the display device according to the 12th embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, at least one or more light-emitting elements 120-1, a current control transistor 170, and the like.

[0238] The reference current generation circuit 110, the light-emitting circuit 130-1, and at least one or more light-emitting elements 120-1 have already been described, so a detailed explanation of them will be omitted.

[0239] The voltage generation circuit 150 may include a plurality of first transistors 151-153 and a second transistor 154 between the third power supply line 143 and the fourth power supply line 144.

[0240] Multiple first transistors 151-153 are each connected to a diode.

[0241] One of the multiple first transistors 151 to 153, transistor 151, can form a current mirror circuit with the fourth transistor T4 of the reference current generation circuit 110.

[0242] The second transistor 154 is connected between the last transistor 153 of the multiple first transistors 151-153 and the fourth power supply line 144, but is not limited to this configuration.

[0243] The gate of the second transistor 154 of the voltage generation circuit 150 is electrically connected to the gate of the second transistor T2 of the reference current generation circuit 110. The second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110 may be transistors of the same conductivity type. For example, the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110 may be NMOS transistors.

[0244] Therefore, the first control signal D1 can simultaneously turn on / off the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110. For example, a high-level first control signal D1 can simultaneously turn on the second transistor 154 and the second transistor T2. For example, a low-level first control signal D1 can simultaneously turn on the second transistor 154 and the second transistor T2.

[0245] For example, the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110 can be turned on during the first on-interval SS1 of one cycle, for example, one frame, and turned off during other intervals, i.e., off-intervals. When the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110 are turned off, no constant current flows through the voltage generation circuit 150, and no reference current IREF flows through the reference current generation circuit 110. Therefore, by preventing the constant current and reference current IREF from flowing during the off-intervals on a periodic basis, power consumption is reduced.

[0246] On the other hand, the current control transistor 170 is connected between one of the multiple first transistors 151 to 153, transistor 151, and the third power supply line 143. The gate of the current control transistor 170 may be commonly connected to the gate of the second transistor 154 of the voltage generation circuit 150 and the gate of the second transistor T2 of the reference current generation circuit 110.

[0247] The current control transistor 170 may have a different conductivity type than the second transistor T2 of the reference current generation circuit 110. For example, the second transistor T2 of the reference current generation circuit 110 may be an NMOS transistor, while the current control transistor 170 is a PMOS transistor.

[0248] In such a case, when the second transistor T2 of the reference current generation circuit 110 is turned on, the current control transistor 170 can be turned off. For example, a high-level first control signal D1 turns on the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110, but the current control transistor 170 can be turned off.

[0249] When the second transistor T2 of the reference current generation circuit 110 is turned off, the current control transistor 170 can be turned on. For example, a low-level first control signal D1 turns off the second transistor 154 of the voltage generation circuit 150 and the second transistor T2 of the reference current generation circuit 110, but the current control transistor 170 can be turned on.

[0250] For example, when the second transistor T2 of the reference current generation circuit 110 turns off during one cycle's off-interval, the current control transistor 170 turns on, and the third power supply voltage PVDD supplied to the third power supply line 143 is output to the X node. In such a case, since the gate and source of one transistor 151 of the voltage generation circuit 150 and the fourth transistor T4 of the reference current generation circuit 110, which constitute the current mirror circuit, have the same voltage, no constant current flows through the voltage generation circuit 150, and no reference current IREF flows through the reference current generation circuit 110. Therefore, by preventing the flow of constant current and reference current IREF during the off-interval for each cycle, power consumption is reduced.

[0251] Figure 15 is a block diagram illustrating a display device according to the 13th embodiment.

[0252] The 13th embodiment is identical to the 12th embodiment (Figure 14), except for a plurality of subpixels SP-1 to SP-N, each including a light-emitting element 120-1 and a light-emitting circuit 130-1. In the 13th embodiment, components having the same function as those in the 12th embodiment (Figure 14) are assigned the same reference numerals, and their detailed descriptions are omitted. The descriptions omitted in the 13th embodiment can be easily understood from the description of the 12th embodiment (Figure 14).

[0253] Referring to Figure 15, the display device according to the 13th embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a plurality of light-emitting circuits 130-1 to 130-N, a plurality of light-emitting elements 120-1 to 120-N, a current control transistor 170, and the like.

[0254] The voltage generation circuit 150, the reference current generation circuit 110, and the current control transistor 170 have already been described, so a detailed explanation of them will be omitted.

[0255] A reference current generation circuit 110 and a plurality of subpixels SP-1 to SP-N may be provided on the display panel. The plurality of subpixels SP-1 to SP-N are connected between the first power line 141 and the second power line 142.

[0256] In such cases, multiple subpixels SP-1 to SP-N may include multiple light-emitting circuits 130-1 to 130-N, multiple light-emitting elements 120-1 to 120-N, etc. One side of the multiple light-emitting elements 120-1 to 120-N is electrically connected to a first power line 141, the other side of the multiple light-emitting elements 120-1 to 120-N is electrically connected to one side of the light-emitting circuits 130-1 to 130-N, and the other side of the light-emitting circuits 130-1 to 130-N is electrically connected to a second power line 142.

[0257] Multiple light-emitting circuits 130-1 to 130-N may include multiple first transistors T11 to TN1, multiple second transistors T12 to TN2, multiple third transistors T13 to TN3, multiple digital storage devices 135-1 to 135-N, etc. In light-emitting circuits 130-1 to 130-N, one of the second transistors T12 to TN2 and the third transistors T13 to TN3 may be omitted.

[0258] On the other hand, the reference current generation circuit 110 is electrically connected to multiple subpixels SP-1 to SP-N. The reference current generation circuit 110 is electrically connected to multiple light-emitting circuits 130-1 to 130-N of the multiple subpixels SP-1 to SP-N. The reference current generation circuit 110 can copy the reference current IREF to generate light-emitting currents IEM1 to IEMN in each of the multiple light-emitting circuits 130-1 to 130-N.

[0259] The reference current generation circuit 110 may include first transistors T1 to fourth transistors T4. The first transistor T1 of the reference current generation circuit 110 can form a current mirror circuit with multiple first transistors T11 to TN1 of multiple light-emitting circuits 130-1 to 130-N. For example, the first transistor T1 of the reference current generation circuit 110 and the multiple first transistors T11 to TN1 of multiple light-emitting circuits 130-1 to 130-N may be NMOS transistors or PMOS transistors.

[0260] Multiple first transistors T11 to TN1 of multiple light-emitting circuits 130-1 to 130-N can each generate multiple light-emitting currents IEM1 to IEMN corresponding to the reference current IREF flowing through the first transistor T1 of the reference current generation circuit 110. If the multiple copy ratios of the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N are the same, the multiple light-emitting currents IEM1 to IEMN flowing through the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N can be the same. If the multiple copy ratios of the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N are 1, the multiple light-emitting currents IEM1 to IEMN flowing through the multiple first transistors T11 to TN1 of the multiple light-emitting circuits 130-1 to 130-N can be the same as the reference current IREF flowing through the first transistor T1 of the reference current generation circuit 110.

[0261] According to the 13th embodiment, by using the reference current IREF generated by a single reference current generation circuit 110, multiple light-emitting currents IEM1 to IEMN are simultaneously generated to emit light from multiple light-emitting elements 120-1 to 120-N of multiple subpixels SP-1 to SP-N. This results in a very simple circuit structure and makes driving multiple subpixels SP-1 to SP-N easy and highly efficient.

[0262] According to the 13th embodiment, by adjusting the copy ratio, desired light emission currents IEM1 to IEMN are generated in each of the multiple light emission circuits 130-1 to 130-N of multiple subpixels SP-1 to SP-N, thereby improving image quality through optimal gradation expression and optimal brightness realization.

[0263] Figure 16 is a block diagram illustrating a display device according to the 14th embodiment.

[0264] The 14th embodiment is similar to the 13th embodiment (Figure 15) as an embodiment of the digital storage 135-1. In the 14th embodiment, the same reference numerals are assigned to components having the same function as in the 13th embodiment (Figure 15), and their detailed descriptions are omitted. The explanations omitted in the 14th embodiment can be easily understood from the explanation of the 13th embodiment (Figure 15).

[0265] Referring to Figure 16, the display device according to the 14th embodiment may include a voltage generation circuit 150, a reference current generation circuit 110, a light-emitting circuit 130-1, at least one or more light-emitting elements 120-1, a current control transistor 170, and the like.

[0266] The voltage generation circuit 150, the reference current generation circuit 110, the light-emitting circuit 130-1, and the current control transistor 170 have already been described, so a detailed explanation of them will be omitted.

[0267] The light-emitting circuit 130-1 may include a first transistor T11, a second transistor T12, and a third transistor T13 connected in series with each other, and a digital storage 135-1. The first transistor T11 of the light-emitting circuit 130-1 can form a current mirror circuit with the first transistor T1 of the reference current generation circuit 110. In the light-emitting circuit 130-1, one of the second transistor T12 and the third transistor T13 may be omitted.

[0268] The digital storage 135-1 can include a latch circuit. As shown in FIG. 16, the latch circuit can include an inverter element, a pair of NMOS transistors, a pair of PMOS transistors, a pair of switches, and the like.

[0269] The digital data DM-1 and the program signal PS1 are input into the digital storage 135-1, that is, the latch circuit. The program signal PS1 may be a control signal for writing input data into the latch circuit. The pair of switches can be turned on / off by the program signal PS1.

[0270] The digital storage 135-1 generates second control signals C11 and C12 having a second on interval SS2 based on the on / off information of the digital data DM-1 and the gradation information of the program signal PS1, and can output the generated second control signals C11 and C12 to the second transistor T12 and the third transistor T13. Therefore, as shown in FIG. 17, in response to the second control signals C11 and C12, the second transistor T12 and the third transistor T13 are turned on, and the light emitting element 120-1 can emit light by the light emitting current IEM1 supplied during the second on interval SS2.

[0271] On the other hand, in response to the first control signals D1 and D2, the second transistor T2 and the third transistor T3 of the reference current generation circuit 110 are turned on, and the reference current IREF can flow through the reference current generation circuit 110 during the first on interval SS1. The second on interval SS2 may be included within the first on interval SS1.

[0272] [[ID=1५]] The first on interval SS1 and the second on interval SS2 can be respectively referred to as a first light emitting interval and a second light emitting interval.

[0273] The above detailed description should not be construed restrictively in all respects and should be considered exemplary. The scope of the embodiments should be determined by a reasonable analysis of the appended claims, and all changes within the equivalent scope of the embodiments are included in the scope of the embodiments.

Claims

1. In a display device containing multiple subpixels, A reference current generation circuit including a constant current source that generates a reference current, The plurality of subpixels are provided with a plurality of light-emitting circuits that are electrically connected to the reference current generation circuit, Each of the aforementioned multiple light-emitting circuits is: To make the light-emitting element emit light, the reference current is used to generate a light-emitting current. The light emission time of the light-emitting element is adjusted using digital data and program signals. A display device in which the reference current and the light-emitting current are constant currents.

2. The aforementioned reference current generation circuit is Includes a first transistor connected to the constant current source, Each of the aforementioned multiple light-emitting circuits is: The display device according to claim 1, further comprising the first transistor of the reference current generation circuit and the first transistor constituting a mirror circuit.

3. The display device according to claim 2, wherein the aspect ratio of each of the first transistors in the plurality of light-emitting circuits is greater than or equal to the aspect ratio of the first transistor in the reference current generation circuit.

4. The light-emitting element and the first transistor of each of the plurality of light-emitting circuits are connected between the first power supply line and the second power supply line. The first power supply voltage is supplied to the first power supply line. The display device according to claim 2, wherein a second power supply voltage lower than the first power supply voltage is supplied to the second power supply line.

5. The display device according to claim 4, wherein the first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits are NMOS transistors commonly connected to the second power supply line.

6. The display device according to claim 4, wherein the first transistor of the reference current generation circuit and each of the first transistors of the plurality of light-emitting circuits are PMOS transistors commonly connected to the first power supply line.

7. The display device according to claim 2, wherein the reference current generation circuit is connected to the first transistor and includes a switch for turning the reference current on and off.

8. Each of the aforementioned multiple light-emitting circuits is: The display device according to claim 7, comprising a switch connected to the first transistor for turning the light-emitting current on and off.

9. The display device according to claim 8, wherein the second ON interval of the light-emitting current is included within the first ON interval of the reference current.

10. Each of the aforementioned multiple light-emitting circuits is: The display device according to claim 8, further comprising a digital storage that generates control signals for switching each of the switches of the plurality of light-emitting circuits using the digital data.

11. The switch in the reference current generation circuit includes at least one transistor, which is either a second transistor or a third transistor. The display device according to claim 8, wherein each of the switches in the plurality of light-emitting circuits includes at least one transistor that is a second transistor or a third transistor.

12. The second transistor of the reference current generation circuit and the second transistor of the plurality of light-emitting circuits are NMOS transistors. The display device according to claim 11, wherein the third transistor of the reference current generation circuit and each of the third transistors of the plurality of light-emitting circuits are PMOS transistors.

13. The display device according to claim 11, wherein the constant current source of the reference current generation circuit includes a fourth transistor connected to one or more transistors of the reference current generation circuit.

14. The display device according to claim 13, further comprising a voltage generation circuit connected to the reference current generation circuit and providing a reference voltage for adjusting the reference current.

15. The voltage generation circuit includes a plurality of first transistors connected to each other between the third power supply line and the fourth power supply line. Each of the aforementioned plurality of first transistors is connected to a diode, The display device according to claim 14, wherein one of the plurality of first transistors constitutes a current mirror circuit with the fourth transistor of the reference current generation circuit.

16. The voltage generation circuit is The display device according to claim 14, further comprising a second transistor connected to other transistors among the plurality of first transistors, the gate of which is commonly connected to at least one of the transistors of the reference current generation circuit.

17. The present invention further includes a current control transistor connected between one of the plurality of first transistors and the third power supply line, the gate of which is commonly connected to the second transistor of the voltage generation circuit and at least one of the transistors of the reference current generation circuit, The display device according to claim 16, wherein the current control transistor has a conductivity type different from that of at least one transistor in the reference current generation circuit.

18. The display device according to claim 11, further comprising a selection switch that selects one of the reference voltage and an external voltage and outputs the selected voltage to the reference current generation circuit.

Images