Improving seam performance using hydroxylation for gap filling

Abstract

A method for filling features on a semiconductor substrate may include a process of filling features on a semiconductor substrate by repeatedly performing a first step. The first step may include providing a silicon-containing precursor. The first step may include contacting the substrate with the silicon-containing precursor to form a silicon-containing material within features defined on the substrate. The first step may include purging a semiconductor processing chamber. The first step may include providing a precursor containing oxygen and hydrogen. The first step may include contacting the substrate with the precursor containing oxygen and hydrogen to form a silicon- and oxygen-containing material within features defined on the substrate.

Description

Technical Field

[0001] Cross-reference to Related Applications

[0001] The present application claims the benefit and priority of U.S. Non-Provisional Application No. 18 / 455,508, entitled "SEAM PERFORMANCE IMPROVEMENT USING HYDROXYLATION FOR GAPFILL", filed on August 24, 2023, the entire contents of which are hereby incorporated by reference into this specification for all purposes.

[0002]

[0002] The present technology relates to a semiconductor processing method. More specifically, the present technology relates to a method for forming a material on a semiconductor structure.

Background Art

[0003]

[0003] Integrated circuits are enabled by processes that create complex patterned layers of material on the surface of a substrate. Forming patterned material on a substrate requires controlled methods for forming and removing material. As device miniaturization progresses and device complexity continues to increase, the manufacturing of structures has become increasingly complex. Developing structures may require more processes to achieve complex patterning and material integration. Furthermore, complex patterning and material integration at intersections between materials including similar materials may require more processes to prevent possible deformation or undesired formation.

[0004]

[0004] Accordingly, there is a need for improved systems and methods that can be used to manufacture high-quality devices and structures. These and other needs are addressed by the present technology.

Summary of the Invention

[0005]

[0005] In some embodiments, a method for filling features on a semiconductor substrate may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber, the process of repeatedly performing a first step which includes providing a silicon-containing precursor, contacting the substrate with the silicon-containing precursor to form a silicon-containing material in features defined on the substrate, purging the semiconductor processing chamber, providing an oxygen-hydrogen-containing precursor, and contacting the substrate with the oxygen-hydrogen-containing precursor to form a silicon- and oxygen-containing material in features defined on the substrate.

[0006]

[0006] In some embodiments, the feature filling process may further include repeating a second step before repeating the first step, both of which are performed at approximately a first pressure level, and the second step includes providing a silicon-containing precursor, contacting the substrate with the silicon-containing precursor to form a silicon-containing material within a feature defined on the substrate, purging a semiconductor processing chamber, providing an oxygen-containing precursor, and contacting the substrate with the oxygen-containing precursor to form a silicon- and oxygen-containing material within a feature defined on the substrate. In some embodiments, providing an oxygen- and hydrogen-containing precursor allows for closing gaps within the feature by bonding a first side of the silicon- and oxygen-containing material within the feature to a second side of the silicon- and oxygen-containing material within the feature. In some embodiments, forming a silicon-containing material within a feature may involve forming an atomic layer of silicon on the exposed surface of the feature. In some embodiments, forming a material containing silicon and oxygen within a feature may involve providing oxygen to the atomic layer of silicon.

[0007]

[0007] In some embodiments, a method for filling features on a semiconductor substrate may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber, the process of repeatedly performing a first step which includes providing a silicon-containing precursor, contacting the substrate with the silicon-containing precursor to form a silicon-containing material in features defined on the substrate, purging the semiconductor processing chamber, providing an oxygen-containing precursor, contacting the substrate with the oxygen-containing precursor to form a silicon- and oxygen-containing material in features defined on the substrate, providing an oxygen- and hydrogen-containing precursor, and contacting the silicon- and oxygen-containing material with the oxygen- and hydrogen-containing precursor.

[0008]

[0008] In some embodiments, the feature filling process may further include repeating a second step before repeating the first step, the second step of which may include providing a silicon-containing precursor, contacting the substrate with the silicon-containing precursor to form a silicon-containing material within a feature defined on the substrate, purging a semiconductor processing chamber, providing an oxygen-containing precursor, and contacting the substrate with the oxygen-containing precursor to form a silicon- and oxygen-containing material within a feature defined on the substrate. In some embodiments, contacting the silicon- and oxygen-containing precursor with the oxygen- and hydrogen-containing precursor can close gaps within the feature by bonding a first side of the silicon- and oxygen-containing material within the feature to a second side of the silicon- and oxygen-containing material within the feature.

[0009]

[0009] In some embodiments, a method for filling features on a semiconductor substrate may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber, the process of which includes repeatedly performing a first step which includes providing a silicon-containing precursor, contacting the substrate with the silicon-containing precursor to form a silicon-containing material in features defined on the substrate, purging the semiconductor processing chamber, providing an oxygen-hydrogen-containing precursor, and contacting the substrate with the oxygen-hydrogen-containing precursor to form a silicon-oxygen-containing material in features defined on the substrate. The feature-filling process may further include repeating a second step at a second pressure level after repeating the first step, the second step which includes providing an oxygen-hydrogen-containing precursor, and contacting a silicon-oxygen-containing material with the oxygen-hydrogen-containing precursor.

[0010]

[0010] In some embodiments, before providing the oxygen-hydrogen-containing precursor, the second step may further include providing the silicon-containing precursor, contacting the silicon-oxygen-containing material with the silicon-containing precursor to form the silicon-containing material within the feature, and purging the semiconductor processing chamber. In some embodiments, contacting the silicon-oxygen-containing precursor with the oxygen-hydrogen-containing precursor can close the gap within the feature by bonding the first side of the silicon-oxygen-containing material within the feature with the second side of the silicon-oxygen-containing material within the feature. In some embodiments, the first pressure level may be about 2 Torr or higher. In some embodiments, the second pressure level may be around atmospheric pressure.

[0011]

[0011] In any embodiment, any or all of the following features may be implemented in any combination, without limitation. In some embodiments, the oxygen-hydrogen-containing precursor may include plasma. In some embodiments, the oxygen-hydrogen-containing precursor may include gas. In some embodiments, the oxygen-containing precursor may include plasma. In some embodiments, the oxygen-containing precursor may include gas. In some embodiments, the process may be carried out at a temperature of about 400°C or higher. In some embodiments, the features may be characterized by an aspect ratio of about 10:1 or higher. In some embodiments, the oxygen-hydrogen-containing precursor may include O2 and H2. In some embodiments, the oxygen-hydrogen-containing precursor may include H2O2. In some embodiments, the oxygen-hydrogen-containing precursor may include H2O.

[0012]

[0012] The nature and advantages of the disclosed technology can be further understood by referring to the remainder of this specification and the drawings. [Brief explanation of the drawing]

[0013] [Figure 1]

[0013] A schematic cross-sectional view of an exemplary plasma system according to several embodiments of the present technology is shown. [Figure 2A]

[0014] The following shows an exemplary schematic cross-sectional structure in which a material layer has been generated according to several embodiments of this technology. [Figure 2B] The following shows an exemplary schematic cross-sectional structure in which a material layer has been generated according to several embodiments of this technology. [Figure 2C] The following shows an exemplary schematic cross-sectional structure in which a material layer has been generated according to several embodiments of this technology. [Figure 2D] The following shows an exemplary schematic cross-sectional structure in which a material layer has been generated according to several embodiments of this technology. [Figure 3A]

[0015] The following shows an exemplary schematic cross-sectional structure in which a material layer has been generated according to several embodiments of this technology. [Figure 3B]1 illustrates an exemplary schematic cross-sectional structure in which a material layer is formed according to some embodiments of the present technology. [Figure 4]

[0016] shows an exemplary schematic cross-sectional view including a material layer according to some embodiments of the present technology. [Figure 5]

[0017] shows an exemplary schematic cross-sectional view including a material layer according to some embodiments of the present technology. [Figure 6]

[0018] shows an exemplary schematic cross-sectional view including a material layer according to some embodiments of the present technology. [Figure 7]

[0019] illustrates steps in a semiconductor processing method according to some embodiments of the present technology. [Figure 8]

[0020] illustrates steps in a semiconductor processing method according to some embodiments of the present technology. [Figure 9]

[0021] illustrates steps in a semiconductor processing method according to some embodiments of the present technology. DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0014]

[0022] Some of the drawings are provided as schematic diagrams. It is to be understood that the drawings are for illustrative purposes only, and should not be construed as drawn to scale unless explicitly stated to be so. Furthermore, as schematic diagrams, the drawings are provided to facilitate understanding, and may not include all aspects or information compared to realistic depictions, and may include content exaggerated for illustrative purposes.

[0015]

[0023] In the accompanying drawings, similar components and / or features may have the same reference numerals. Furthermore, various components of the same type may be distinguished after the reference numeral by a letter that differentiates between similar components. Where only the first reference numeral is used in the present specification, the description is applicable to any similar component having the same first reference numeral regardless of the letter.

[0016]

[0024] Silicon materials can be used in the manufacture of semiconductor devices of many structures and processes. In the gap filling process, some treatments utilize plasma-enhanced deposition under processing conditions to increase the directionality of deposition, thereby allowing the deposition material to better fill features on a substrate. However, in some deposition processes, the deposition material in certain types of features may be characterized by a seam when the deposition material comes into contact with other deposition materials. For example, when indicating that the depth-to-width ratio of a feature is extremely large (the feature is deep, but the size of the opening of the feature is relatively small in width), the deposition material from the sides of the feature may contact each other and form a seam.

[0017]

[0025] As feature sizes continue to shrink, deposition can become challenging for narrow features that can be further characterized by higher aspect ratios. For example, when material is deposited into a high aspect ratio feature, a seam may form between the deposition material on a first side of the feature and the deposition material on a second side of the feature. Seams may also be referred to as gaps or voids. The seam indicates that when the deposition materials on the sides of the feature come into contact, the deposition materials on the sides do not bond. Since seams may be at the atomic level, these seams may not be visible to tools. Nevertheless, etchants used on deposition materials (e.g., buffered oxide etchant on silicon oxide deposition materials) can demonstrate and / or prove that a seam exists between the deposition materials on the sides of the feature.

[0018]

[0026] The present technology can overcome these limitations by performing atomic layer deposition of materials that can limit or prevent sidewall coverage during deposition, enabling the implementation of an improved filling process. In addition, a hydroxylation process may be performed to bond the sides of the deposited material within the feature to reduce and / or eliminate seams. Bonding the sides of the deposited material within the feature to eliminate the seam may also be referred to as gap filling the seam. Gap filling the seam may also be referred to as reverse filling or large-area gap filling.

[0019]

[0027] The remaining disclosure routinely reveals specific deposition processes utilizing the disclosed technology and describes one type of semiconductor processing chamber, but it will be readily apparent that the processes described can be carried out in any number of semiconductor processing chambers. In addition, the technology may be applicable to any number of semiconductor processes beyond the exemplary processes described below. Therefore, the technology should not be considered to be limited to use in only these specific deposition processes or chambers. Before describing a semiconductor processing method using the technology, this disclosure will describe one possible chamber that may be used to carry out the process according to embodiments of the technology.

[0020]

[0028] Figure 1 shows a cross-sectional view of an exemplary processing chamber 100 according to several embodiments of the present technology. This figure may illustrate a system incorporating one or more aspects of the present technology and / or specifically configured to perform one or more steps according to embodiments of the present technology. Additional details of the chamber 100 or the methods to be carried out may be further described below. The chamber 100 may be used for forming film layers, etching material layers, other material layers, or combinations thereof, but it should be understood that the deposition and etching methods may be similarly carried out in any chamber in which the deposition and etching processes may be performed. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 connected to the chamber body 102 and surrounding the substrate support 104 in the processing space 120. The substrate 103 may be provided to the processing space 120 through an opening 126 that may conventionally have been sealed for processing, using a slit valve or door. The substrate 103 may be placed on the surface 105 of the substrate support during processing. In some embodiments, the substrate support 104 may be rotatable along a vertical axis in which the shaft 144 of the substrate support 104 may be located, or it may be stationary. Alternatively, the substrate support 104 may be lifted to rotate as needed during the deposition process.

[0021]

[0029] The gas distributor 112 may define openings 118 for distributing the processing precursor into the processing space 120. The gas distributor 112 may be connected to a first power source 142, such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power supply that can be connected to the processing chamber. In some embodiments, the first power source 142 may be an RF power supply.

[0022]

[0030] The gas distributor 112 may be a conductive or non-conductive gas distributor. Furthermore, the gas distributor 112 may be formed from conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive, while the faceplate of the gas distributor 112 is non-conductive. The gas distributor 112 may be powered by a first power source 142, as shown in Figure 1, or, in some embodiments, the gas distributor 112 may be connected to ground.

[0023]

[0031] The first electrode 122 may be connected to the substrate support 104. The first electrode 122 may be embedded within the substrate support 104 and may be connected to the surface of the substrate support 104. The first electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other dispersed configuration of conductive elements. The first electrode 122 may be a tuning electrode and may be connected to a tuning circuit 136 by a conduit 146, such as a cable having a selected resistance of, for example, 50 ohms, located within the shaft 144 of the substrate support 104. The tuning circuit 136 may have an electronic sensor 138 and an electronic controller 140, which may be a variable capacitor. The electronic sensor 138 may be a voltage sensor or a current sensor and may be connected to the electronic controller 140 for further control over plasma conditions in the processing space 120.

[0024]

[0032] A second electrode 124, which may be a bias electrode and / or an electrostatic chuck electrode, may be connected to the substrate support 104. The second electrode may be connected to a second power source 150 via a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power. The substrate support 104 may also include one or more heating elements configured to heat the substrate to a processing temperature which may be between approximately 25°C and approximately 800°C or higher.

[0025]

[0033] The lid assembly 106 and substrate support 104 in Figure 1 can be used with any processing chamber for plasma or heat treatment. During operation, the processing chamber 100 may provide real-time control of plasma conditions in the processing space 120 via a system controller 101, which may be included, for example, in a processor 107. The substrate 103 can be placed on the substrate support 104, and a processing gas can be flowed through the lid assembly 106 using an inlet 114 according to any desired flow plan. The gas can exit the processing chamber 100 via an outlet 152. Power can be connected to a gas distributor 112 to form a plasma in the processing space 120. In some embodiments, the substrate may be exposed to an electrical bias using a second electrode 124.

[0026]

[0034] When current is applied to the plasma in the processing space 120, a potential difference can be established between the plasma and the first electrode 122. Next, the flow characteristics of the ground path, represented by the tuning circuit 136, can be adjusted using the electronic controller 140. Setpoints can be given to the tuning circuit 136 to provide independent control of the deposition rate and the uniformity of the plasma density from the center to the edges. In embodiments where both electronic controllers are variable capacitors, the electronic sensors can adjust the variable capacitors separately to maximize the deposition rate and minimize thickness non-uniformity.

[0027]

[0035] The tuning circuit 136 may have a variable impedance that can be adjusted using an electronic controller 140. If the electronic controller 140 is a variable capacitor, the capacitance range of each variable capacitor may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma and may have a minimum value within the capacitance range of each variable capacitor. Therefore, when the capacitance of the electronic controller 140 is at its minimum or maximum value, the impedance of the tuning circuit 136 may be high, and as a result, the plasma shape will have the minimum coverage in the air or laterally over the substrate support. As the capacitance of the electronic controller 140 approaches the value that minimizes the impedance of the tuning circuit 136, the air coverage of the plasma will be maximized, effectively covering the entire working area of ​​the substrate support 104. If the capacitance of the electronic controller 140 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber wall, and the air coverage of the substrate support may decrease.

[0028]

[0036] An electronic sensor 138 may be used to tune the tuning circuit 136 in a closed loop. Depending on the type of sensor used, a setpoint for current or voltage may be attached to each sensor, and the sensor may be provided with control software that determines the adjustment to the electronic controller 140 and minimizes deviation from the setpoint. As a result, the plasma shape can be selected and dynamically controlled during processing. The foregoing description is based on an electronic controller 140 which may be a variable capacitor, but it should be understood that a tuning circuit 136 with adjustable impedance can be provided using any electronic component having adjustable characteristics.

[0029]

[0037] The processing chamber 100 may be used for a processing method that may include bottom-up deposition of material for semiconductor structures in some embodiments of the present technology. The chamber described should not be considered limiting, and it should be understood that any chamber that can be configured to perform the operations described may be used similarly.

[0030]

[0038] The processing chamber 100 may be used for processing methods that may include forming, etching, or transforming materials for semiconductor structures in some embodiments of the Art. The chamber described should not be considered limiting, and it should be understood that any chamber that can be configured to perform the operations described may be used similarly. Figures 2A–2D schematically illustrate exemplary steps in a processing method according to some embodiments of the Art. The method may be performed in various processing chambers, including the processing chamber 100 described above, and on one or more mainframes or tools. The processing method may include many optional steps, some of which may or may not be particularly relevant to some embodiments of the method relating to the Art. For example, many steps are described to provide a broader range of structure formation, but may not be technically significant or may be performed by alternative methods that are easily understood. Only partial schematic diagrams are shown in the figures, and it should be understood that the substrate 200 or substrate 205 may include any number of additional materials and features having diverse properties and characteristics as shown in the figures.

[0031]

[0039] The substrate 205 may contain any number of materials used in semiconductor processing. The substrate material may be a dielectric material including silicon, germanium, silicon oxide, or silicon nitride, a metallic material, or any number of combinations thereof. One or more substrate features may be formed within the substrate 205. The substrate 205 may contain one or more materials 210 in which one or more features may be formed internally. Features may be characterized by any shape or configuration according to the art. In some embodiments, features may be or include trench structures 208 or openings formed within the substrate. In some embodiments, features may be characterized by any aspect ratio or height-to-width ratio of the structure, but in some embodiments, the material may be characterized by a larger aspect ratio, at which seam-free or void-free deposition using prior art or methodologies is not possible. For example, in some embodiments, the aspect ratio of any layer of the exemplary structure may be about 10:1 or greater, about 11:1 or greater, about 12:1 or greater, about 13:1 or greater, about 14:1 or greater, about 15:1 or greater, about 16:1 or greater, or greater than these. In addition, features may be characterized by reduced widths such as about 2.0 microns or less, about 1.9 microns or less, about 1.8 microns or less, about 1.7 microns or less, about 1.6 microns or less, about 1.5 microns or less, about 1.4 microns or less, about 1.3 microns or less, about 1.2 microns or less, about 1.1 microns or less, about 1.0 microns or less, about 0.9 microns or less, about 0.8 microns or less, about 0.7 microns or less, about 0.6 microns or less, about 0.5 microns or less, about 0.4 microns or less, about 0.3 microns or less, about 0.2 microns or less, about 0.1 microns or less, or less, including any fraction of any of the numbers listed.Therefore, features can be characterized by heights such as approximately 20.0 microns or less, approximately 19.0 microns or less, approximately 18.0 microns or less, approximately 17.0 microns or less, approximately 16.0 microns or less, approximately 15.0 microns or less, approximately 14.0 microns or less, approximately 13.0 microns or less, approximately 12.0 microns or less, approximately 11.0 microns or less, approximately 10.0 microns or less, approximately 9.0 microns or less, approximately 8.0 microns or less, approximately 7.0 microns or less, approximately 6.0 microns or less, approximately 5.0 microns or less, approximately 4.0 microns or less, approximately 3.0 microns or less, approximately 2.0 microns or less, approximately 1.0 micron or less, approximately 0.8 microns or less, or less, including any fraction of any of the listed values. This combination of high aspect ratio and minimum width can interfere with many conventional deposition processes for bonding the deposited material on one side of a feature to the deposited material on the other side of the feature.

[0032]

[0040] The methods described herein may include additional steps before commencing the process for filling the gaps between seams. For example, additional processing steps may include the formation of structures on the semiconductor substrate 205, which may include both the formation and removal of materials. For example, transistor structures, memory structures, or any other structures may be formed. The pre-processing steps may be carried out in a chamber in the method for filling the gaps between seams described herein, or the processing may be carried out in one or more other processing chambers before the substrate is supplied to the semiconductor processing chamber or to a chamber in which the method for filling the gaps between seams described herein may be carried out. In any case, the method for filling the gaps between seams may optionally include supplying the semiconductor substrate 205 to a processing area of ​​a semiconductor processing chamber such as the processing chamber 100 or other chambers that may contain the above components. The substrate 205 may be deposited on a substrate support, which may be a pedestal such as the substrate support 104, and may be located within the processing area (e.g., processing space) of the semiconductor processing chamber.

[0033]

[0041] Embodiments of the present disclosure may form silicon-containing materials and / or materials containing silicon and oxygen through atomic layer deposition. The materials may be formed by alternately supplying precursors so that the materials are formed intermittently. To deposit materials containing silicon and oxygen, the precursors may contain silicon and oxygen. A silicon-containing precursor may be called a silicon-containing precursor. A silicon-containing precursor may be called an oxygen-containing precursor. In some embodiments, materials containing silicon and oxygen may be formed through atomic layer deposition. To incorporate oxygen, the precursors may further contain oxygen. For example, oxygen-containing precursors may be supplied intermittently during formation. Alternatively, a silicon-containing precursor may further contain oxygen. For example, a silicon-containing precursor may be a silicon-containing precursor.

[0034]

[0042] Embodiments of the present disclosure may fill gaps in seams formed between sides of a silicon- and oxygen-containing material along the sides of a feature. In some embodiments, seam gap filling may be carried out through atomic layer deposition. Seam gap filling may be carried out by alternately supplying precursors so that the material is formed intermittently. One precursor contains silicon and may be called a silicon-containing precursor. Another precursor contains oxygen and hydrogen and may be called an oxygen- and hydrogen-containing precursor. In some embodiments, seam gap filling may be carried out through annealing or a process similar to annealing. The oxygen- and hydrogen-containing precursor may be introduced into a semiconductor chamber while the semiconductor substrate 205 is being annealed in the processing chamber 100 or in another processing chamber.

[0035]

[0043] In embodiments, the silicon-containing precursor may be any silicon-containing precursor useful for semiconductor processing such as atomic layer deposition processes. Exemplary silicon-containing precursors may be, or may include, silanes, disilanes, or other aminosilanes, or other organicsilanes including cyclohexasilane, silicon tetrafluoride, silicon tetrachloride, dichlorosilane, tetraethyl orthosilicate (TEOS), tetramethyldisiloxane (TMDSO), hexamethyldisiloxane (HMDSO), hexamethyldisilazane (HMDSN), and silicon tetrakiss (ethylmethylamide) (TEMASi), alkylaminosilanes, trisilylamines, alkylaminodisilanes, alkylsilanes, alkyloxysilanes, alkylsilanols, and alkyloxysilanols, as well as any other silicon-containing precursors that can be used to form silicon-containing materials, or may include these. In some embodiments, the silicon-containing precursor may contain halogens such as chlorine, bromine, iodine, or any other halogen. The additional silicon-containing precursor may be any of the following materials, or may include them. In the above materials, each X may be independently selected from chlorine, bromine, iodine, hydrogen, OR, NR2, NCO, NCS, or CN, and R may be alkyl.

[0036]

[0044] The oxygen-containing precursor can be any oxygen-containing material useful for semiconductor processing such as atomic layer deposition. For example, the oxygen-containing precursor may be molecular oxygen (O2), ozone (O3), N2O, and / or other similar materials. In embodiments, the oxygen-containing precursor may be diluted with another precursor, such as an inert precursor, to maintain the oxygen content in the formed material. The oxygen-containing precursor may be about 50% or less, based on the oxygen-containing precursor and the inert precursor.

[0037]

[0045] The oxygen-hydrogen-containing precursor can be any oxygen-hydrogen-containing material useful for semiconductor processing such as atomic layer deposition processes. For example, the oxygen-hydrogen-containing precursor may be water or vapor (H2O), hydrogen peroxide (H2O2), or a combination of molecular hydrogen (H2) and molecular oxygen (O2). In embodiments, the oxygen-containing precursor may be diluted with another precursor, such as an inert precursor, to maintain the oxygen content in the formed material. The oxygen-hydrogen-containing precursor may be about 50% or less, based on the oxygen-hydrogen-containing precursor and the inert precursor. For example, argon gas or other similar gas may be included as a carrier gas together with the hydrogen-containing precursor.

[0038]

[0046] In some embodiments, an oxygen-containing precursor may refer to a hydrogen-free precursor. In some embodiments, an oxygen-containing precursor may be called a precursor that contains oxygen but does not contain hydrogen.

[0039]

[0047] The methods herein for filling gaps in seams may include providing a first precursor to a semiconductor processing chamber, such as a processing area in a semiconductor processing chamber. Optionally, a plasma of the first precursor may be generated. It is also conceivable that, after the generation of the plasma of the first precursor, the plasma of the first precursor may be provided to the semiconductor processing chamber. In some embodiments, the first precursor is a silicon-containing precursor. Referring to Figure 2A, the first precursor may have at least one reactive group that can form bonds with groups attached to the surface of a substrate 205 or one or more materials 210 within the processing area. The molecules 215 of the first precursor may react with surface groups to form bonds that bind the molecules of the first precursor to the surface of the substrate 205 or one or more materials 210. The reaction between the molecules 215 of the first precursor and the groups on the surface of the substrate 205 or one or more materials 210 may continue until almost all or all of the surface groups are bonded to the reactive groups on the molecules 215 of the first precursor. As shown in Figure 2B, a first portion of the silicon-containing material 220 may be formed. The formation of a silicon and oxygen-containing material 220 can prevent further reactions between the molecules 215 of the first precursor in the ejecta of the first precursor and the substrate 205 or one or more materials 210.

[0040]

[0048] The first precursor may remain within the processing area for a period of time during which the silicon-containing material 220 is formed almost or completely. To form the silicon-containing material according to embodiments of the art, the precursor may be supplied in alternating pulses to grow the material. In some embodiments, the pulse time of the first precursor may be about 0.5 seconds or more, about 1 second or more, about 2 seconds or more, about 3 seconds or more, about 4 seconds or more, about 5 seconds or more, about 10 seconds or more, about 20 seconds or more, about 40 seconds or more, about 60 seconds or more, about 80 seconds or more, about 100 seconds or more, or longer.

[0041]

[0049] The method described herein may also include a step of purging or removing the first precursor from the processing area after the formation of the silicon-containing material 220. The method described herein may include stopping the flow of the first precursor before purging the first precursor from the semiconductor processing chamber. The first precursor may be removed from the processing area by pumping for a time range of about 10 seconds to about 100 seconds. Additional exemplary time ranges may include about 20 seconds to about 50 seconds and 25 seconds to about 45 seconds, among other exemplary time ranges. However, in some embodiments, longer purging times may cause the reactive portion to begin to be removed, reducing uniform formation. Therefore, in some embodiments, purging may be performed for about 60 seconds or less, about 50 seconds or less, about 40 seconds or less, about 30 seconds or less, or less. In some embodiments, a purge gas may be introduced into the processing area to assist in the removal of ejecta. Exemplary purge gases include helium and nitrogen, among other purge gases.

[0042]

[0050] After the first precursor is removed, a second precursor may be supplied to the semiconductor processing chamber shown in Figure 2C. Optionally, a plasma of the second precursor may be generated. It is also conceivable that, after the plasma of the second precursor has been generated, the plasma of the second precursor may be supplied to the semiconductor processing chamber. The second precursor may have at least one reactive group that can form a bond with unreacted reactive groups of the first precursor that formed the silicon-containing material 220. In some embodiments, the second precursor is an oxygen-hydrogen-containing precursor. A molecule 225 of the second precursor may react with the unreacted reactive groups of the first precursor to form a bond of the molecule 225 of the second precursor to the molecule 215 of the first precursor. The reaction between the molecule 225 of the second precursor and the molecule 215 of the first precursor may continue until most or all of the unreacted reactive groups on the molecule 215 of the first precursor react with the molecule 225 of the second precursor. As shown in Figure 2D, contact between the second precursor and the silicon-containing material 220 can form a silicon- and oxygen-containing material 230, such as SiO. The formation of the silicon- and oxygen-containing material 230 can prevent further reactions between the molecules 225 of the second precursor in the ejecta of the second precursor and the silicon- and oxygen-containing material 220.

[0043]

[0051] Similar to the first precursor, the second precursor may remain within the processing area for a period of time during which a silicon-oxygen-containing material 230 is formed almost completely. To form a silicon-oxygen-containing material according to embodiments of the art, the precursor may be supplied in alternating pulses to grow the material. In some embodiments, the pulse time of the second precursor may be about 0.5 seconds or more, about 1 second or more, about 2 seconds or more, about 3 seconds or more, about 4 seconds or more, about 5 seconds or more, about 10 seconds or more, about 20 seconds or more, about 40 seconds or more, about 60 seconds or more, about 80 seconds or more, about 100 seconds or more, or longer.

[0044]

[0052] In some embodiments, the first precursor may be pulsed for a longer period than the second precursor. By increasing the residence time of the first precursor, improved adhesion can be produced across the substrate 205 or one or more materials 210. The second precursor becomes more reactive with the ligand of the first precursor, and therefore, the pulsed time of the second precursor may be reduced, potentially improving throughput. For example, in some embodiments, the second precursor may be pulsed for about 90% or less of the pulsed time of the first precursor. The second precursor may also be pulsed for about 80% or less of the pulsed time of the first precursor, about 70% or less of the pulsed time of the first precursor, about 60% or less of the pulsed time of the first precursor, about 50% or less of the pulsed time of the first precursor, about 40% or less of the pulsed time of the first precursor, about 30% or less of the pulsed time of the first precursor, or less.

[0045]

[0053] The method described herein may also include a step of purging or removing second precursor ejecta from the processing area after the formation of the silicon-containing material 230. The method described herein may also include stopping the flow of the second precursor before purging the second precursor. The second precursor may be removed by pumping from the processing area for a time range of about 10 seconds to about 100 seconds. Additional exemplary time ranges may include about 20 seconds to about 50 seconds and 25 seconds to about 45 seconds, among other exemplary time ranges. In some embodiments, a purge gas may be introduced into the processing area to assist in the removal of ejecta. Exemplary purge gases include helium and nitrogen, among other purge gases.

[0046]

[0054] In embodiments, after one or more cycles of forming the silicon-oxygen-containing material 230, it may be determined whether a target thickness of the deposited material on the substrate 205 or one or more materials 210 has been achieved. If the target thickness of the deposited material has not been achieved, another cycle may be performed to provide the first and second precursors. If the target thickness of the deposited material has not been achieved, the other cycle to provide the first and second precursors may not be initiated. An exemplary number of cycles for forming the silicon-oxygen-containing material 230 may include one cycle, or it may include two, five, ten, twenty-five, fifty, one hundred, one thousand, two thousand, three thousand, four thousand, five thousand, six thousand, seven thousand, eight thousand, nine thousand, one thousand, or more cycles. Further exemplary cycle count ranges may include 50–2000 cycles, 50–1000 cycles, and 100–750 cycles, 1000–2000 cycles, 2000–3000 cycles, 3000–4000 cycles, 4000–5000 cycles, 5000–6000 cycles, 6000–7000 cycles, 7000–8000 cycles, 8000–9000 cycles, 9000–10000 cycles, and / or any combination of these ranges. For example, some embodiments may use cycles between 6000 and 8000 for a 1 μm wide gap structure. Exemplary target thickness ranges for which further cycles forming the silicon-oxygen-containing material 230 are limited to about 1.0 micron or less. Further illustrative thickness ranges may include values ​​of approximately 1.0 micron or less, approximately 0.9 micron or less, approximately 0.8 micron or less, approximately 0.7 micron or less, approximately 0.6 micron or less, approximately 0.5 micron or less, approximately 0.4 micron or less, approximately 0.3 micron or less, approximately 0.2 micron or less, approximately 0.1 micron or less, or less, and may include any fraction of any of the values ​​listed.

[0047]

[0055] Figures 3A and 3B schematically illustrate how seams can be formed between processing methods according to several embodiments of the present technology. Sections 302 and 304 schematically illustrate how seams 350 are formed by silicon-oxygen-containing material 330 (e.g., silicon-oxygen-containing material 230 in Figure 2) deposited on one or more materials 310 (e.g., one or more materials 210 in Figure 2). In Figure 3A, a space 340 may be seen between the two sides of the silicon-oxygen-containing material 330 deposited within the feature. The silicon-oxygen-containing material 330 may be substantially uniform across the surface of one or more materials 310.

[0048]

[0056] In Figure 3B, as more silicon-oxygen-containing material 330 is deposited, a seam 350 may form so that the two sides of the silicon-oxygen-containing material 330 do not bond together. The seam 350 may be formed as layers of silicon-oxygen-containing material 330 stack up from the sides of the feature. As mentioned above, the seam 350 may be at the atomic and / or molecular level and therefore may be inconspicuous. However, if an etchant (e.g., a buffer oxide etchant that etches the silicon-oxygen-containing material 330) is applied to the silicon-oxygen-containing material 330 along the seam 350, the seam 350 may become noticeable because material is etched away from the silicon-oxygen-containing material 330 around the seam 350.

[0049]

[0057] Figure 4 shows an exemplary diagram of a seam at the atomic and / or molecular level. When a silicon-oxygen-containing material 430 (e.g., silicon-oxygen-containing material 230 in Figure 2) is deposited on one or more materials (e.g., one or more materials 210 in Figure 2), a seam 450 is formed between the two sides of the silicon-oxygen-containing material 430. The silicon-oxygen lattice 432 represents the atomic diagram of the silicon-oxygen material 430. Similarly, the seam 452 represents the seam 450 formed between the two sides of the silicon-oxygen lattice 432. The seam 452 can be of any size, such as on the order of approximately one or two atoms and / or interatomic bonds, or on the order of nanometers or microns. Substantially, the seam 450 is formed because the two sides of the silicon-oxygen material 430 are not bonded to each other.

[0050]

[0058] Figure 5 shows an exemplary diagram of the seam at the atomic and / or molecular level when the second precursor described above, shown in Figure 2C, is supplied to the semiconductor processing chamber. When the second precursor (e.g., an oxygen-hydrogen-containing precursor) is supplied to the semiconductor processing chamber, the second precursor may come into contact with and / or react with the oxygen-containing lattice 532 (e.g., the silicon-oxygen-containing lattice 432 in Figure 4). By coming into contact with and / or reacting with the silicon-oxygen-containing lattice 532, oxygen atoms in the silicon-oxygen-containing lattice 532 along the seam 554 may take up hydrogen atoms. In this way, the side of the silicon-oxygen-containing lattice 532 transitions from a stable, non-reactive state to a reactive state when the silicon-oxygen-containing lattice 532 takes up hydrogen atoms. More specifically, oxygen atoms in the silicon-oxygen-containing lattice 532 typically take up hydrogen atoms and become reactive. This taking up of hydrogen atoms can be called surface activation and / or hydroxylation. Surface activation and / or hydroxylation can initiate a gap-filling process for the seam 550 between materials 530 containing silicon and oxygen.

[0051]

[0059] Figure 6 shows an exemplary diagram of the seam at the atomic and / or molecular level when the seam is gap-filled. While the second precursor is being supplied to the semiconductor processing chamber or after it has been supplied, the seam 650 (e.g., seam 450 in Figure 4) between the silicon-oxygen-containing material 630 (e.g., silicon-oxygen-containing material 430 in Figure 4) can be gap-filled. Surface activation and / or hydroxylation of the two sides of the silicon-oxygen-containing material 630 can make it possible for the two sides to bond so that no seam or gap exists. Surface activation and / or hydroxylation of the two sides uses some of the energy from the temperature of the silicon-oxygen-containing material 630, the processing chamber, and / or the oxygen-hydrogen-containing precursor. The bonding of the two sides of the silicon-oxygen-containing material 630 can be called bridged silicon atoms and oxygen atoms of the two sides of the silicon-oxygen-containing material 630. When the two sides bond, by-products of oxygen and hydrogen (e.g., H2O) are often produced. This by-product can escape through the seam.

[0052]

[0060] Figure 7 shows an exemplary flowchart 700 of a method for filling features on a semiconductor substrate as described herein. This method may be carried out by a controller that generates signals for controlling the processing chamber and other elements, as described above in Figures 2 to 6. This method may be carried out by a controller having a processor that executes instructions for carrying out these steps.

[0053]

[0061] The method may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber. This process may include repeating the first step described herein. For example, the first step may be repeated over a fixed number of cycles, as described herein. Furthermore, parts of the first step may be repeated over a variety of cycle numbers, such that a part of the first step may be repeated over a first number of cycles, while a second part of the first step may be repeated over a second number of cycles. In some embodiments, the features may be characterized by an aspect ratio of about 10:1 or greater, as described herein.

[0054]

[0062] The first step may include providing a silicon-containing precursor (702) to a semiconductor processing chamber (e.g., processing chamber 100 in Figure 1), as described at least in relation to Figures 2A to 2D. The silicon-containing precursor may be the first precursor described herein.

[0055]

[0063] The first step may include contacting the substrate (704) with a silicon-containing precursor in order to form a silicon-containing material within a feature defined on the substrate (704) described herein. Forming the silicon-containing material within a feature may include forming a silicon atomic layer on the exposed surface of the feature. The exposed surface of the feature may include two or more sides of the feature, for example, sides opposite each other.

[0056]

[0064] The first step may include purging the semiconductor processing chamber (706) as described herein. Purging the semiconductor processing chamber of the silicon-containing precursor allows for the use of other precursors during the process of filling features on the semiconductor substrate.

[0057]

[0065] The first step may include providing an oxygen-hydrogen precursor as described herein (708). By providing an oxygen-hydrogen precursor, as described at least in relation to Figures 3A to 3B, the gap in the feature can be closed by bonding the first side of the silicon-oxygen material in the feature to the second side of the silicon-oxygen material in the feature. In some embodiments, the oxygen-hydrogen precursor may include O2 and H2. In some embodiments, the oxygen-hydrogen precursor may include H2O2. In some embodiments, the oxygen-hydrogen precursor may include H2O. In some embodiments, the oxygen-hydrogen precursor may include plasma, mainly plasma, or consist solely of plasma. In some embodiments, the oxygen-hydrogen precursor may include gas, mainly gas, or consist solely of gas.

[0058]

[0066] The first step may include contacting the substrate with an oxygen-hydrogen-containing precursor (710) to form a material containing silicon and oxygen within features defined on the substrate, as described herein. Forming a material containing silicon and oxygen within features may include providing oxygen to the silicon atomic layer.

[0059]

[0067] As described above, plasma emitters of a first precursor, a second precursor, and / or an oxygen-containing precursor may be generated. In embodiments, only plasma emitters of oxygen- and hydrogen-containing precursors and / or oxygen-containing precursors may be generated, but silicon-containing precursors may be plasma-free. Generating plasma emitters of one or more precursors may increase the directionality of the emitters and may promote the deposition of seam-free, void-free materials. Once the plasma is generated, one or more inert precursors, such as argon, helium, or nitrogen, may be provided with the precursors to assist in the generation of plasma emitters and to distribute the precursors. The plasma of the inert precursors may be a capacitively coupled plasma (CCP) plasma, a plasma formed by a remote plasma source (RPS), or a microwave plasma.

[0060]

[0068] After forming the silicon-oxygen-containing material 230, the method described herein may include performing a post-processing step. The post-processing step may include providing an inert precursor to a semiconductor processing chamber, generating a plasma ejecta of the inert precursor, and contacting the silicon-oxygen-containing material 230 with the plasma ejecta of the inert precursor. The inert precursor is or may include any inert precursor such as argon, helium, or nitrogen. As with the optional plasmas of the first, second, and / or third precursors, the plasma of the inert precursor may be a capacitively coupled plasma (CCP) plasma, a plasma formed in a remote plasma source (RPS), or a microwave plasma. The plasma ejecta of the inert precursor can regenerate reactive species on the surface of the exposed material, thereby enabling the occurrence of continuous growth. The plasma ejecta of the inert precursor can increase the density of the material by releasing hydrogen gas.

[0061]

[0069] The formation rate of the silicon-oxygen-containing material 230 may depend on the temperature of the substrate 205, the temperature of the processing chamber, and / or the temperature of the precursor flowing into the processing area. Exemplary temperatures of the substrate, processing chamber, and / or precursor during the process described herein are approximately 50°C or higher, approximately 75°C or higher, approximately 100°C or higher, approximately 125°C or higher, approximately 150°C or higher, approximately 175°C or higher, approximately 200°C or higher, approximately 250°C or higher, approximately 300°C or higher, approximately 350°C or higher, approximately 400°C or higher, approximately 425°C or higher, approximately 450°C or higher, approximately 475°C or higher, approximately 500°C or higher, approximately 525°C or higher, and approximately 5 Temperatures may be 50°C or higher, approximately 575°C or higher, approximately 600°C or higher, approximately 625°C or higher, approximately 650°C or higher, approximately 675°C or higher, approximately 700°C or higher, approximately 725°C, approximately 750°C or higher, approximately 775°C or higher, approximately 800°C or higher, approximately 825°C or higher, approximately 850°C or higher, approximately 875°C or higher, approximately 900°C or higher, approximately 925°C or higher, approximately 950°C or higher, approximately 975°C or higher, approximately 1000°C or higher, or higher. In some embodiments, exemplary temperatures may be in the range of 400°C to 1000°C. In some embodiments, exemplary temperatures may be in the range of 400°C to 700°C. In some embodiments, exemplary temperatures may be in the range of 600°C to 1000°C. In some embodiments, maintaining a high substrate temperature (e.g., above approximately 400°C) may make more nucleation sites available along the substrate 205, which may improve formation and reduce void formation by improving coverage at each site.

[0062]

[0070] The formation rate of the silicon-oxygen-containing material 230 may also depend on the pressure in the processing chamber. Exemplary pressures in the processing area can be in the range of about 1 Torr to about 100 Torr. In some embodiments, the pressure in the processing area can be in the range of 2 to 10 Torr. In embodiments, the pressure may be about 10 Torr or less, for example, about 9 Torr or less, about 8 Torr or less, about 7 Torr or less, about 6 Torr or less, about 5 Torr or less, about 4 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, or even lower. In some embodiments, part of the process in the processing chamber may be carried out at approximately atmospheric pressure, as described herein.

[0063]

[0071] Increasing the density of the material in this technology may result in an increase in the wet etching rate ratio (WERR). WERR can be defined as the relative etching rate of a silicon-oxygen-containing material in a particular etchant (e.g., diluted HF), expressed, for example, Å / min. This is compared to the etching rate of a thermally grown silicon oxide material formed on the same substrate. A WERR of 1.0 means that the material has the same etching rate as the thermal oxide material, while a WERR of less than 1 means that the silicon-oxygen-containing material is etched at a slower rate than the thermal oxide. In embodiments, the WERR of a silicon-oxygen-containing material may be characterized by a WERR of about 1 or less, for example, about 0.9 or less, about 0.8 or less, about 0.7 or less, about 0.6 or less, about 0.5 or less, about 0.4 or less, about 0.3 or less, about 0.2 or less, about 0.1 or less, or below this.

[0064]

[0072] In relation to Figure 8, and Figures 2A-2D and 3A-3B, the methods described herein for gap-filling seams may, in some embodiments, include providing a third precursor to a semiconductor processing chamber, such as a processing area of ​​a semiconductor processing chamber. In some embodiments, the third precursor is an oxygen-containing precursor, as described above. Providing a third precursor to a semiconductor processing chamber may be used to form a material containing silicon and oxygen within a feature (e.g., silicon and oxygen-containing material 220 in Figure 2). Providing a second precursor to a semiconductor processing chamber may be used to gap-fill seams (also called closing gaps within a feature) and to form a material containing silicon and oxygen within a feature. In some embodiments, all descriptions herein relating to the use of a second precursor are also applicable to a third precursor. For example, the description herein relating to providing a second precursor to a semiconductor processing chamber also relates to providing a third precursor to a semiconductor processing chamber.

[0065]

[0073] In some embodiments, a third precursor plasma may be generated. It is also conceivable that, after the generation of the third precursor plasma, the third precursor plasma may be supplied to a semiconductor processing chamber.

[0066]

[0074] In some embodiments, a third precursor is provided to the semiconductor processing chamber before the second precursor. For example, after the first precursor has been removed, the third precursor may be provided to the semiconductor processing chamber in substantially the same manner as shown in relation to Figure 2C where the second precursor is provided. Then, after the third precursor has been removed, the second precursor may be provided to the semiconductor processing chamber as shown in relation to Figure 2C. In this way, an additional precursor (a third precursor) may be provided between the first and second precursors, such that the method for gap filling includes providing three precursors.

[0067]

[0075] In relation to embodiments described herein using a third precursor, the third precursor may have at least one reactive group capable of forming a bond with unreacted reactive groups of the first precursor that formed the silicon-containing material 220. The molecules of the third precursor may react with the unreacted reactive groups of the first precursor to form a bond of the molecules of the third precursor to the molecules of the first precursor 215. The reaction between the molecules of the third precursor and the molecules of the first precursor 215 may continue until most or all of the unreacted reactive groups on the molecules of the first precursor 215 react with the molecules of the third precursor. As shown in Figure 2D, contact between the third precursor and the silicon-containing material 220 may form a silicon-oxygen-containing material 230, such as SiO. The formation of the silicon-oxygen-containing material 230 may prevent further reaction between the molecules of the third precursor 225 in the ejecta of the third precursor and the silicon-oxygen-containing material 220.

[0068]

[0076] In some embodiments, a third precursor may be provided to the semiconductor processing chamber after a second precursor has been provided to the semiconductor processing chamber. For example, after the second precursor has been provided to the semiconductor processing chamber, or after the second precursor has been removed, a third precursor may be provided to the semiconductor processing chamber as described above in relation to the second precursor and shown in Figure 2C. The third precursor may have at least one reactive group that can form a bond with unreacted reactive groups of the first precursor that formed the silicon-containing material 220. Molecules of the third precursor may react with unreacted reactive groups of the first precursor to form a bond of the third precursor molecules to molecules 215 of the first precursor. The reaction between molecules of the third precursor and molecules 215 of the first precursor may continue until most or all of the unreacted reactive groups on molecules 215 of the first precursor react with molecules of the third precursor. As shown in Figure 2D, contact between the third precursor and the silicon-containing material 220 may form a silicon- and oxygen-containing material 230, such as SiO. The formation of the silicon-oxygen-containing material 230 can prevent further reactions between the molecules of the third precursor 225 in the effluent of the third precursor and the silicon-oxygen-containing material 220.

[0069]

[0077] Similar to the first and second precursors, the third precursor may remain within the processing area for a period of time during which the silicon-oxygen-containing material 230 is formed almost completely. To form the silicon-oxygen-containing material according to embodiments of the art, the precursors may be supplied in alternating pulses to grow the material. In some embodiments, the pulse time of the second precursor may be about 0.5 seconds or more, about 1 second or more, about 2 seconds or more, about 3 seconds or more, about 4 seconds or more, about 5 seconds or more, about 10 seconds or more, about 20 seconds or more, about 40 seconds or more, about 60 seconds or more, about 80 seconds or more, about 100 seconds or more, or longer.

[0070]

[0078] In some embodiments, the first precursor may be pulsed for a longer period than the third precursor. By increasing the residence time of the first precursor, improved adhesion can be produced across the substrate 205 or one or more materials 210. The third precursor becomes more reactive with the ligand of the first precursor, and therefore, the pulsed time of the third precursor may be reduced, potentially improving throughput. For example, in some embodiments, the third precursor may be pulsed for about 90% or less of the pulsed time of the first precursor. The third precursor may also be pulsed for about 80% or less of the pulsed time of the first precursor, about 70% or less of the pulsed time of the first precursor, about 60% or less of the pulsed time of the first precursor, about 50% or less of the pulsed time of the first precursor, about 40% or less of the pulsed time of the first precursor, about 30% or less of the pulsed time of the first precursor, or less.

[0071]

[0079] In some embodiments, the second precursor may be pulsed for a longer period than the third precursor. For example, in some embodiments, the third precursor may be pulsed for about 90% or less of the time the second precursor is pulsed. The third precursor may also be pulsed for about 80% or less of the time the second precursor is pulsed, about 70% or less of the time the second precursor is pulsed, about 60% or less of the time the second precursor is pulsed, about 50% or less of the time the second precursor is pulsed, about 40% or less of the time the second precursor is pulsed, about 30% or less of the time the second precursor is pulsed, or less.

[0072]

[0080] In some embodiments, the third precursor may be pulsed for a longer period than the second precursor. For example, in some embodiments, the second precursor may be pulsed for about 90% or less of the time the third precursor is pulsed. The second precursor may also be pulsed for about 80% or less of the time the third precursor is pulsed, about 70% or less of the time the third precursor is pulsed, about 60% or less of the time the third precursor is pulsed, about 50% or less of the time the third precursor is pulsed, about 40% or less of the time the third precursor is pulsed, about 30% or less of the time the third precursor is pulsed, or less.

[0073]

[0081] The method described herein may also include a step of purging or removing a third precursor from the processing area after the formation of the silicon- and oxygen-containing material 230. The method described herein may include stopping the flow of the third precursor before purging it from the semiconductor processing chamber. The third precursor may be removed by pumping it out of the processing area for a time range of about 10 seconds to about 100 seconds. Additional exemplary time ranges may include about 20 seconds to about 50 seconds and 25 seconds to about 45 seconds, among other exemplary time ranges. However, in some embodiments, longer purging times may cause the reactive portion to begin to be removed, reducing uniform formation. Therefore, in some embodiments, purging may be performed for about 60 seconds or less, about 50 seconds or less, about 40 seconds or less, about 30 seconds or less, or less. In some embodiments, a purge gas may be introduced into the processing area to assist in the removal of effluent. Exemplary purge gases include helium and nitrogen, among other purge gases.

[0074]

[0082] In embodiments, following one or more cycles forming the silicon-oxygen-containing material 230, a determination may be made as to whether a target thickness of the deposited material on the substrate 205 or one or more materials 210 has been achieved. If the target thickness of the deposited material has not been achieved, another cycle may be performed to provide a first precursor, a third precursor, and a second precursor. If the target thickness of the deposited material has been achieved, the other cycle to provide the first precursor, the third precursor, and the second precursor may not be initiated. An exemplary number of cycles for forming the silicon-oxygen-containing material 230 may include one cycle, or two, five, ten, twenty-five, fifty, one hundred, one thousand, one hundred thousand, or more cycles. Further exemplary ranges of cycle numbers may include, among other exemplary ranges, 50 to 2000 cycles, 50 to 1000 cycles, and 100 to 750 cycles. An exemplary range of target thicknesses for halting further cycles of forming the silicon- and oxygen-containing material 230 includes approximately 1.0 micron or less. Further exemplary thickness ranges may include approximately 1.0 micron or less, approximately 0.9 micron or less, approximately 0.8 micron or less, approximately 0.7 micron or less, approximately 0.6 micron or less, approximately 0.5 micron or less, approximately 0.4 micron or less, approximately 0.3 micron or less, approximately 0.2 micron or less, approximately 0.1 micron or less, or values ​​below these, and may include any fraction of any of the values ​​listed.

[0075]

[0083] Figure 8 shows an exemplary flowchart 800 of a method for filling features on a semiconductor substrate as described herein. This method may be carried out by a controller that generates signals for controlling the processing chamber and other elements, as described above in Figures 2 to 6. This method may be carried out by a controller having a processor that executes instructions for carrying out these steps.

[0076]

[0084] The method may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber. This process may include repeating the second step described herein. For example, the second step may be repeated over a fixed number of cycles, as described herein. Furthermore, parts of the second step may be repeated over a first number of cycles, while a second part of the second step may be repeated over a second number of cycles, and so on, with parts of the second step being repeated over a second number of cycles.

[0077]

[0085] The second step may include providing a silicon-containing precursor to a semiconductor processing chamber (e.g., processing chamber 100 in Figure 1) (802), as described at least in relation to Figures 2A to 2D. The silicon-containing precursor may be the first precursor described herein.

[0078]

[0086] The second step may include contacting the substrate with a silicon-containing precursor (804) to form a silicon-containing material within a feature defined on the substrate, as described herein. Forming the silicon-containing material within a feature may include forming a silicon atomic layer on the exposed surface of the feature. The exposed surface of the feature may include two or more sides of the feature, for example, sides opposite each other.

[0079]

[0087] A second step may include purging the semiconductor processing chamber (806) as described herein. Purging the semiconductor processing chamber of the silicon-containing precursor allows for the use of other precursors during the process of filling features on the semiconductor substrate.

[0080]

[0088] The second step may include providing an oxygen-containing precursor (808), as described herein. Providing an oxygen-containing precursor, as described at least in relation to Figures 3A to 3B, allows for the closing of gaps within a feature by bonding a first side of the silicon-oxygen-containing material within the feature to a second side of the silicon-oxygen-containing material within the feature. In some embodiments, the oxygen-containing precursor may contain plasma, mainly plasma, or consist solely of plasma. In some embodiments, the oxygen-containing precursor may contain gas, mainly gas, or consist solely of gas.

[0081]

[0089] The second step may include contacting the substrate with an oxygen-hydrogen-containing precursor (810) to form a material containing silicon and oxygen within features defined on the substrate, as described herein. Forming a material containing silicon and oxygen within features may include providing oxygen to the silicon atomic layer. In some embodiments, features may be characterized by an aspect ratio of about 10:1 or greater, as described herein.

[0082]

[0090] The second step may include providing an oxygen-hydrogen precursor as described herein (812). In some embodiments, the oxygen-hydrogen precursor may include O2 and H2. In some embodiments, the oxygen-hydrogen precursor may include H2O2. In some embodiments, the oxygen-hydrogen precursor may include H2O. In some embodiments, the oxygen-hydrogen precursor may include plasma, mainly plasma, or consist solely of plasma. In some embodiments, the oxygen-hydrogen precursor may include gas, mainly gas, or consist solely of gas.

[0083]

[0091] In some embodiments, the process can be carried out at a temperature of about 400°C or higher, as described herein. During the processes described herein, exemplary temperatures of the substrate, processing chamber, and / or precursor may be about 400°C or higher, about 425°C or higher, about 450°C or higher, about 475°C or higher, about 500°C or higher, about 525°C or higher, about 550°C or higher, about 575°C or higher, about 600°C or higher, about 625°C or higher, about 650°C or higher, about 675°C or higher, about 700°C or higher, about 725°C or higher, about 750°C or higher, about 775°C or higher, about 800°C or higher, about 825°C or higher, about 850°C or higher, about 875°C or higher, about 900°C or higher, about 925°C or higher, about 950°C or higher, about 975°C or higher, about 1000°C or higher, or higher. In some embodiments, the exemplary temperature may be in the range of 400°C to 1000°C. In some embodiments, the exemplary temperature may be in the range of 400°C to 700°C. In some embodiments, the exemplary temperature may be in the range of 600°C to 1000°C.

[0084]

[0092] In some embodiments, the process may be carried out at a pressure level of about 2 Torr or higher, as described herein. In some embodiments, the pressure in the processing area may be in the range of 2 to 10 Torr. In embodiments, the pressure may be about 10 Torr or less, for example, about 9 Torr or less, about 8 Torr or less, about 7 Torr or less, about 6 Torr or less, about 5 Torr or less, about 4 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, or lower.

[0085]

[0093] A second step may include contacting the substrate with an oxygen-hydrogen precursor (814), as described herein. Contacting the silicon-oxygen precursor with the oxygen-hydrogen precursor closes the gap by bonding the first side of the silicon-oxygen material in the feature to the second side of the silicon-oxygen material in the feature.

[0086]

[0094] With respect to Figure 9 and Figures 2A-2D and 3A-3B, in some embodiments, the method described herein for gap filling of seams may include a third and a fourth step. The third step may be performed before the fourth step. The third step may provide a first precursor and a third precursor (e.g., an oxygen-containing precursor), but not a second precursor (e.g., a precursor containing oxygen and hydrogen). For example, after the first precursor has been removed, the third precursor may be provided to the semiconductor processing chamber in substantially the same manner as described in relation to Figure 2C where the second precursor is provided. However, in the third step, the second precursor is not provided to the semiconductor processing chamber, as described in relation to Figure 2C.

[0087]

[0095] In some embodiments, a third precursor plasma may be generated. It is also conceivable that, after the generation of the third precursor plasma, the third precursor plasma may be supplied to the semiconductor processing chamber. In some embodiments, a second precursor plasma may be generated. It is also conceivable that, after the generation of the second precursor plasma, the second precursor plasma may be supplied to the semiconductor processing chamber.

[0088]

[0096] The third precursor may have at least one reactive group that can form a bond with the unreacted reactive groups of the first precursor that formed the silicon-containing material 220. The molecules of the third precursor may react with the unreacted reactive groups of the first precursor to form a bond of the molecules of the third precursor to the molecules of the first precursor 215. The reaction between the molecules of the third precursor and the molecules of the first precursor 215 may continue until most or all of the unreacted reactive groups on the molecules of the first precursor 215 react with the molecules of the third precursor. As shown in Figure 2D, contact between the third precursor and the silicon-containing material 220 may form a silicon-oxygen-containing material 230, such as SiO. The formation of the silicon-oxygen-containing material 230 may prevent further reaction between the molecules of the third precursor 225 in the effluent of the third precursor and the silicon-oxygen-containing material 220.

[0089]

[0097] Similar to the first and second precursors, the third precursor may remain within the processing area for a period of time during which the silicon-oxygen-containing material 230 is formed almost completely. To form the silicon-oxygen-containing material according to embodiments of the art, the precursors may be supplied in alternating pulses to grow the material. In some embodiments, the pulse time of the second precursor may be about 0.5 seconds or more, about 1 second or more, about 2 seconds or more, about 3 seconds or more, about 4 seconds or more, about 5 seconds or more, about 10 seconds or more, about 20 seconds or more, about 40 seconds or more, about 60 seconds or more, about 80 seconds or more, about 100 seconds or more, or longer.

[0090]

[0098] In some embodiments, the first precursor may be pulsed for a longer period than the third precursor. By increasing the residence time of the first precursor, improved adhesion can be produced across the substrate 205 or one or more materials 210. The third precursor becomes more reactive with the ligand of the first precursor, and therefore, the pulsed time of the third precursor may be reduced, potentially improving throughput. For example, in some embodiments, the third precursor may be pulsed for about 90% or less of the pulsed time of the first precursor. The third precursor may also be pulsed for about 80% or less of the pulsed time of the first precursor, about 70% or less of the pulsed time of the first precursor, about 60% or less of the pulsed time of the first precursor, about 50% or less of the pulsed time of the first precursor, about 40% or less of the pulsed time of the first precursor, about 30% or less of the pulsed time of the first precursor, or less.

[0091]

[0099] The method described herein may also include a step of purging or removing a third precursor from the processing area after the formation of the silicon- and oxygen-containing material 230. The method described herein may include stopping the flow of the third precursor before purging it from the semiconductor processing chamber. The third precursor may be removed by pumping it out of the processing area for a time range of about 10 seconds to about 100 seconds. Additional exemplary time ranges may include about 20 seconds to about 50 seconds and 25 seconds to about 45 seconds, among other exemplary time ranges. However, in some embodiments, longer purging times may cause the reactive portion to begin to be removed, reducing uniform formation. Therefore, in some embodiments, purging may be performed for about 60 seconds or less, about 50 seconds or less, about 40 seconds or less, about 30 seconds or less, or less. In some embodiments, a purge gas may be introduced into the processing area to assist in the removal of effluent. Exemplary purge gases include helium and nitrogen, among other purge gases.

[0092]

[0100] In relation to Figures 7 and 8, the method described with respect to flowchart 700 and the method described with respect to flowchart 800 include the third step described herein. In some embodiments, the third step described herein may be performed before the first step described in relation to Figure 7. For example, the third step may be repeated before the first step is repeated. In some embodiments, the ratio of the total number of cycles for the first and third steps may be distributed such that the first step occurs for about 90% of the total number of cycles, for about 80% of the total number of cycles, for about 70% of the total number of cycles, for about 60% of the total number of cycles, for about 50% of the total number of cycles, for about 40% of the total number of cycles, for about 30% of the total number of cycles, for about 20% of the total number of cycles, or for about 10% or less of the total number of cycles.

[0093]

[0101] In some embodiments, the third step described herein may be performed before the second step described in relation to Figure 8. For example, the third step may be repeated before the second step is repeated. In some embodiments, the proportion of the total number of cycles for the second and third steps may be distributed such that the second step occurs for about 90% of the total number of cycles, for about 80% of the total number of cycles, for about 70% of the total number of cycles, for about 60% of the total number of cycles, for about 50% of the total number of cycles, for about 40% of the total number of cycles, for about 30% of the total number of cycles, for about 20% of the total number of cycles, or for about 10% or less of the total number of cycles.

[0094]

[0102] The fourth step may provide a second precursor (for example, a precursor containing oxygen and hydrogen). For example, the second precursor may be provided to the semiconductor processing chamber in substantially the same manner as described in relation to Figure 2C. However, in the fourth step, the first precursor may not be provided to the semiconductor processing chamber as described in relation to Figure 2C.

[0095]

[0103] In some embodiments, in a fourth step, the first precursor may be provided to a semiconductor processing chamber, as described in relation to Figure 2C. If the fourth step provides the first precursor, the fourth step may also include, for example, relating to Figure 2A, contacting a substrate and / or a material containing silicon and oxygen with the first precursor as described herein. Similarly, the first precursor may be purged as described herein, for example, relating to Figure 2B.

[0096]

[0104] In some embodiments, the method described herein for filling gaps in a seam may include a first number of cycles in a third step and a second number of cycles in a subsequent fourth step. For example, the third step may operate to provide a first precursor to a semiconductor processing chamber and then provide a third precursor to the semiconductor processing chamber over a first number of cycles. The fourth step may then operate to provide a first precursor to the semiconductor processing chamber and then provide a second precursor to the semiconductor processing chamber over a second number of cycles. In another embodiment, the third step may operate to provide a first precursor to a semiconductor processing chamber and then supply a third precursor to the semiconductor processing chamber over a first number of cycles. The fourth step may then operate to provide a first precursor to the semiconductor processing chamber, then a third precursor to the semiconductor processing chamber, and then a second precursor to the semiconductor processing chamber over a second number of cycles.

[0097]

[0105] Furthermore, the third process can be repeated over various cycle counts, such that the third process can be repeated over a first cycle count, while the second part of the third process can be repeated over a second cycle count. Furthermore, the fourth process can be repeated over various cycle counts, such that the fourth process can be repeated over a first cycle count, while the second part of the fourth process can be repeated over a second cycle count.

[0098]

[0106] The number of cycles for the fourth process and the number of cycles for the third process can be determined by the fourth process. In some embodiments, the ratio of the total number of cycles for the third and fourth processes may be such that the third process occurs for approximately 99% of the total cycles, the third process occurs for approximately 98% of the total cycles, the third process occurs for approximately 97% of the total cycles, the third process occurs for approximately 96% of the total cycles, the third process occurs for approximately 95% of the total cycles, the third process occurs for approximately 90% of the total cycles, and the third process occurs for approximately 80% of the total cycles. The third process may be allocated to occur during approximately 70% of the total cycles, approximately 60% of the total cycles, approximately 50% of the total cycles, approximately 40% of the total cycles, approximately 30% of the total cycles, approximately 20% of the total cycles, or approximately 10% or less of the total cycles.

[0099]

[0107] In some embodiments, following one or more cycles of forming a silicon- and oxygen-containing material 230, it may be determined whether a target thickness of the deposited material on the substrate 205 or one or more materials 210 has been achieved. If the target thickness of the deposited material has not been achieved, another cycle of the third step, providing the first and third precursors, may be performed. If the target thickness of the deposited material has been achieved, the other cycle of the third step, providing the first and third precursors, may not be initiated. Alternatively, if the target thickness of the deposited material has not been achieved, another cycle of the fourth step, providing the first and second precursors, may be performed. If the target thickness of the deposited material has been achieved, the other cycle of the fourth step, providing the first and second precursors, may not be initiated. Furthermore, if the gaps are not filled, another cycle of the fourth step may be initiated. An exemplary number of cycles for forming the silicon- and oxygen-containing material 230 may include 1 cycle, or may include 2, 5, 10, 25, 50, 100, 1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000 cycles, or more. Further exemplary cycle count ranges may include 50–2000 cycles, 50–1000 cycles, and 100–750 cycles, 1000–2000 cycles, 2000–3000 cycles, 3000–4000 cycles, 4000–5000 cycles, 5000–6000 cycles, 6000–7000 cycles, 7000–8000 cycles, 8000–9000 cycles, 9000–10000 cycles, and / or any combination of these ranges. For example, some embodiments may use cycles between 6000 and 8000 for a 1 μm wide gap structure. Exemplary target thickness ranges for which further cycles forming the silicon-oxygen-containing material 230 are limited to about 1.0 micron or less.Further illustrative thickness ranges may include values ​​of approximately 1.0 micron or less, approximately 0.9 micron or less, approximately 0.8 micron or less, approximately 0.7 micron or less, approximately 0.6 micron or less, approximately 0.5 micron or less, approximately 0.4 micron or less, approximately 0.3 micron or less, approximately 0.2 micron or less, approximately 0.1 micron or less, or less, and may include any fraction of any of the values ​​listed.

[0100]

[0108] Figure 9 shows an exemplary flowchart 900 of a method for filling features on a semiconductor substrate as described herein. This method may be carried out by a controller that generates signals for controlling the processing chamber and other elements, as described above in Figures 2 to 6. This method may be carried out by a controller having a processor that executes instructions for carrying out these steps.

[0101]

[0109] The method may include a process of filling features on a semiconductor substrate in a semiconductor processing chamber. This process may include repeating a third step (901) as described herein. For example, the third step may be repeated over a fixed number of cycles as described herein. Furthermore, parts of the third step may be repeated over various number of cycles, such that a part of the third step may be repeated over a first number of cycles, while a second part of the third step may be repeated over a second number of cycles. In some embodiments, the features may be characterized by an aspect ratio of about 10:1 or greater, as described herein.

[0102]

[0110] In some embodiments, the third step may be performed at a first pressure level. In some embodiments, the first pressure level may be about 2 Torr or higher, as described herein. In some embodiments, the pressure in the processing area may be in the range of 2 to 10 Torr. In embodiments, the pressure may be about 10 Torr or less, for example, about 9 Torr or less, about 8 Torr or less, about 7 Torr or less, about 6 Torr or less, about 5 Torr or less, about 4 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, or lower.

[0103]

[0111] In some embodiments, the third step may be carried out at a first temperature. In some embodiments, the first temperature may be about 400°C or higher, as described herein. In some embodiments, the third step may be carried out at a temperature of about 400°C or higher, as described herein. During the processes described herein, exemplary temperatures of the substrate, processing chamber, and / or precursor may be about 400°C or higher, about 425°C or higher, about 450°C or higher, about 475°C or higher, about 500°C or higher, about 525°C or higher, about 550°C or higher, about 575°C or higher, about 600°C or higher, about 625°C or higher, about 650°C or higher, about 675°C or higher, about 700°C or higher, about 725°C or higher, about 750°C or higher, about 775°C or higher, about 800°C or higher, about 825°C or higher, about 850°C or higher, about 875°C or higher, about 900°C or higher, about 925°C or higher, about 950°C or higher, about 975°C or higher, about 1000°C or higher, or higher. In some embodiments, the exemplary temperature may be in the range of 400°C to 1000°C. In some embodiments, the exemplary temperature may be in the range of 400°C to 700°C. In some embodiments, the exemplary temperature may be in the range of 600°C to 1000°C.

[0104]

[0112] A third step may include providing a silicon-containing precursor to a semiconductor processing chamber (e.g., processing chamber 100 in Figure 1) (902), as described at least in relation to Figures 2A to 2D. The silicon-containing precursor may be the first precursor described herein.

[0105]

[0113] A third step may include contacting the substrate with a silicon-containing precursor (904) to form a silicon-containing material within a feature defined on the substrate, as described herein. Forming a silicon-containing material within a feature may include forming a silicon atomic layer on the exposed surface of the feature. The exposed surface of the feature may include two or more sides of the feature, for example, sides opposite each other.

[0106]

[0114] A third step may include purging the semiconductor processing chamber (906) as described herein. Purging the semiconductor processing chamber of the silicon-containing precursor allows for the use of other precursors during the process of filling features on the semiconductor substrate.

[0107]

[0115] A third step may include providing an oxygen-containing precursor (908), as described herein. Providing an oxygen-containing precursor, as described at least in relation to Figures 3A to 3B, allows for the closing of gaps within a feature by bonding a first side of the silicon-oxygen-containing material within the feature to a second side of the silicon-oxygen-containing material within the feature. In some embodiments, the oxygen-containing precursor may contain plasma, mainly plasma, or consist solely of plasma. In some embodiments, the oxygen-containing precursor may contain gas, mainly gas, or consist solely of gas.

[0108]

[0116] A third step may include contacting the substrate with an oxygen-hydrogen-containing precursor (910) to form a material containing silicon and oxygen within features defined on the substrate, as described herein. Forming a material containing silicon and oxygen within features may include providing oxygen to the silicon atomic layer.

[0109]

[0117] The process may also include repeating the fourth step (913), as described herein. For example, the fourth step may be repeated over a fixed number of cycles, as described herein. Furthermore, the portion of the fourth step may be repeated over a variety of cycle numbers, such that a portion of the fourth step may be repeated over a first number of cycles, while a second portion of the third step may be repeated over a second number of cycles. In some embodiments, features may be characterized by an aspect ratio of about 10:1 or greater, as described herein.

[0110]

[0118] In some embodiments, the fourth step may be performed at a second pressure level. In some embodiments, the second pressure level may be somewhere between near-atmospheric pressure and atmospheric pressure. For example, the pressure may be in the range of about 1 to 10 Torr.

[0111]

[0119] In some embodiments, the fourth step may be carried out at a second temperature. In some embodiments, the second temperature may be about 400°C or higher, as described herein. In some embodiments, the first and second temperatures may be different. In some embodiments, the fourth step may be carried out at a temperature of about 400°C or higher, as described herein. During the processes described herein, exemplary temperatures of the substrate, processing chamber, and / or precursor may be about 400°C or higher, about 425°C or higher, about 450°C or higher, about 475°C or higher, about 500°C or higher, about 525°C or higher, about 550°C or higher, about 575°C or higher, about 600°C or higher, about 625°C or higher, about 650°C or higher, about 675°C or higher, about 700°C or higher, about 725°C or higher, about 750°C or higher, about 775°C or higher, about 800°C or higher, about 825°C or higher, about 850°C or higher, about 875°C or higher, about 900°C or higher, about 925°C or higher, about 950°C or higher, about 975°C or higher, about 1000°C or higher, or higher. In some embodiments, the exemplary temperature may be in the range of 400°C to 1000°C. In some embodiments, the exemplary temperature may be in the range of 400°C to 700°C. In some embodiments, the exemplary temperature may be in the range of 600°C to 1000°C.

[0112]

[0120] A fourth step may include providing an oxygen-hydrogen precursor as described herein (914). In some embodiments, the oxygen-hydrogen precursor may include O2 and H2. In some embodiments, the oxygen-hydrogen precursor may include H2O2. In some embodiments, the oxygen-hydrogen precursor may include H2O. In some embodiments, the oxygen-hydrogen precursor may include plasma, mainly plasma, or consist solely of plasma. In some embodiments, the oxygen-hydrogen precursor may include gas, mainly gas, or consist solely of gas.

[0113]

[0121] A fourth step may include contacting the substrate with an oxygen-hydrogen precursor (916), as described herein. Contacting the silicon-oxygen precursor with the oxygen-hydrogen precursor closes the gap by bonding the first side of the silicon-oxygen material in the feature to the second side of the silicon-oxygen material in the feature.

[0114]

[0122] As described herein, in some embodiments, the fourth step may also include providing a silicon-containing precursor to a semiconductor processing chamber. As described herein, in some embodiments, the fourth step may include contacting a substrate and / or a material containing silicon and oxygen to the silicon-containing precursor. As described herein, in some embodiments, the fourth step may include purging the semiconductor processing chamber described herein.

[0115]

[0123] The first, second, third, and fourth steps, as described in relation to Figures 7-9, can also be used in any combination to fill the gaps in the seams.

[0116]

[0124] The above description includes many details for illustrative purposes in order to provide an understanding of the various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments can be carried out without some of these details, or with additional details.

[0117]

[0125] While several embodiments have been disclosed, those skilled in the art will understand that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, many well-known processes and elements have not been described in order to avoid unnecessarily obscuring the Art. Therefore, the descriptions in the prior specification should not be considered to limit the scope of the Art.

[0118]

[0126] Where a range of values ​​is provided, unless explicitly stated otherwise in the context, each intervening value between the upper and lower limits of that range is specifically disclosed down to the smallest unit of the lower limit. Any narrow range between the stated values ​​or unstated intervening values ​​within the stated range and other stated or intervening values ​​within the stated range is included. The upper and lower limits of such narrower ranges may be individually included in or excluded from that range. Each range in which one, neither, or both of the limits are included is also included in the Art, provided that there are limits specifically excluded within the stated range. If one or both of the limits are included in the stated range, the range excluding one or both of the included limits is also included.

[0119]

[0127] As used herein and in the appended claims, the singular forms “a,” “an,” and “the” include multiple references unless otherwise specified in the context. Therefore, for example, “a precursor” refers to multiple such precursors, and “the material” refers to one or more materials and equivalents well known to those skilled in the art, and the same applies to the other forms.

[0120]

[0128] Furthermore, the terms “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including,” as used herein and in the claims, are intended to identify the presence of the described features, integers, components, or processes, but not to exclude the presence or addition of one or more other features, integers, components, processes, operations, or groups.

Claims

1. A method for filling features on a semiconductor substrate, wherein the method is A process of filling the features on the semiconductor substrate in a semiconductor processing chamber, the process comprising repeating a first step, the first step being: To provide a silicon-containing precursor, To form a silicon-containing material within the defined feature on the substrate, the substrate is brought into contact with the silicon-containing precursor. Purging the aforementioned semiconductor processing chamber, To provide a precursor containing oxygen and hydrogen, and To form a material containing silicon and oxygen within the features defined on the substrate, the substrate is brought into contact with a precursor containing oxygen and hydrogen. Methods that include...

2. The method according to claim 1, wherein providing the precursor containing oxygen and hydrogen closes the gap within the feature by bonding the first side of the silicon and oxygen-containing material within the feature to the second side of the silicon and oxygen-containing material within the feature.

3. Forming the silicon-containing material within the feature includes forming an atomic layer of silicon on the exposed surface of the feature. The method according to claim 1, wherein forming a material containing the silicon and oxygen within the feature includes providing oxygen to the atomic layer of silicon.

4. The process for filling the features further includes repeating a second step before repeating the first step, wherein both the first and second steps are performed at approximately a first pressure level, and the second step is To provide the silicon-containing precursor, To form a silicon-containing material within the defined feature on the substrate, the substrate is brought into contact with the silicon-containing precursor. Purging the aforementioned semiconductor processing chamber, To provide an oxygen-containing precursor, and To form a material containing silicon and oxygen within the features defined on the substrate, the substrate is brought into contact with the oxygen-containing precursor. The method according to claim 1, including the method described in claim 1.

5. The method according to claim 4, wherein the level of the first pressure is approximately 2 Torr or higher.

6. The method according to claim 1, wherein the feature is characterized by an aspect ratio of approximately 10:1 or greater.

7. The precursor containing oxygen and hydrogen is O ２ and H ２ The method according to claim 1, including the method described in claim 1.

8. The precursor containing oxygen and hydrogen is H ２ O ２ The method according to claim 1, including the method described in claim 1.

9. The precursor containing oxygen and hydrogen is H ２ The method according to claim 1, comprising O.

10. A method for filling features on a semiconductor substrate, wherein the method is A process of filling the features on the semiconductor substrate in a semiconductor processing chamber, the process comprising repeating a first step, the first step being: To provide a silicon-containing precursor, To form a silicon-containing material within the defined feature on the substrate, the substrate is brought into contact with the silicon-containing precursor. Purging the aforementioned semiconductor processing chamber, To provide an oxygen-containing precursor, To form a material containing silicon and oxygen within the features defined on the substrate, the substrate is brought into contact with the oxygen-containing precursor. To provide a precursor containing oxygen and hydrogen, and The material containing silicon and oxygen is brought into contact with a precursor containing oxygen and hydrogen. Methods that include...

11. The method according to claim 10, wherein contacting the silicon and oxygen-containing material with the oxygen and hydrogen-containing precursor closes the gap within the feature by bonding the first side of the silicon and oxygen-containing material within the feature to the second side of the silicon and oxygen-containing material within the feature.

12. The process for filling the features further includes repeating a second step before repeating the first step, the second step being: To provide the silicon-containing precursor, To form a silicon-containing material within the defined feature on the substrate, the substrate is brought into contact with the silicon-containing precursor. Purging the aforementioned semiconductor processing chamber, To provide the oxygen-containing precursor, and To form a material containing silicon and oxygen within the features defined on the substrate, the substrate is brought into contact with the oxygen-containing precursor. The method according to claim 10, including the method described in claim 10.

13. The method according to claim 10, wherein the process is carried out at a temperature of approximately 400°C or higher.

14. The method according to claim 10, wherein the precursor containing oxygen and hydrogen includes plasma.

15. The method according to claim 10, wherein the precursor containing oxygen and hydrogen includes a gas.

16. A method for filling features on a semiconductor substrate, wherein the method is A process of filling the features on the semiconductor substrate in a semiconductor processing chamber, the process comprising repeating a first step at a first pressure level, the first step being: To provide a silicon-containing precursor, To form a silicon-containing material within the defined feature on the substrate, the substrate is brought into contact with the silicon-containing precursor. Purging the aforementioned semiconductor processing chamber, To provide an oxygen-containing precursor, and The process involves contacting the substrate with the oxygen-containing precursor in order to form a material containing silicon and oxygen within the features defined on the substrate. The process for filling the features further includes repeating the first step, and then repeating the second step at a second pressure level, wherein the second step is To provide a precursor containing oxygen and hydrogen, and The material containing silicon and oxygen is brought into contact with a precursor containing oxygen and hydrogen. A method that includes this.

17. The method according to claim 16, wherein the level of the first pressure is approximately 2 Torr.

18. The method according to claim 17, wherein the level of the second pressure is approximately atmospheric pressure.

19. The second step, before providing the precursor containing oxygen and hydrogen, To provide the silicon-containing precursor, To form a silicon-containing material within the feature, the silicon-containing material is brought into contact with the silicon-containing precursor, and Purging the aforementioned semiconductor processing chamber The method according to claim 16, further comprising:

20. The method according to claim 16, wherein contacting the silicon and oxygen-containing material with the oxygen and hydrogen-containing precursor closes the gap within the feature by bonding the first side of the silicon and oxygen-containing material within the feature to the second side of the silicon and oxygen-containing material within the feature.

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