Parallel processing unit for single-threaded programs

JP2026530118APending Publication Date: 2026-09-03TAIZHOU ASKPOWER ELECTRONICS CO LTD
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Patent Information

Application Number
JP2026539831
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-16
Filing Date
2024-07-22
Publication Date
2026-09-03

AI Technical Summary

Benefits of technology

【0015】 以上説明したように、本願は以下の少なくとも1つの有益な技術的効果を含む。 1.予めシングルスレッドプログラムのソースコードを実行可能なコードにコンパイルし、且つ実行可能なコードをマークし、並列実行可能な複数のコードセグメントを取得し、複数のコードセグメントは記憶モジュールに記憶され、演算モジュールは並列処理の方式で複数のコードセグメントを実行し、シングルスレッドプログラムの並列処理を実現し、シングルスレッドプログラムの演算速度を向上させ、プログラムの演算時間を短縮することに有利である。 2.標識によって現在のコードセグメントが演算を完了するか否かを判断し、さらに後続のコードセグメントの演算を制御する。 3.複数のコードセグメントを並列実行する過程において、N個のコードセグメントの並列処理を完了した後、次の組のN個のコードセグメントの並列処理を実行する。 4.各演算モジュールは異なるコードセグメントを実行するのに必要な時間に差が存在する可能性があり、いずれかの演算モジュールがアイドルである場合、該アイドルの演算モジュールは後続のコードセグメントを直ちに実行し、プログラムの演算時間を短縮する。

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Abstract

This system provides a parallel processing unit for single-threaded programs, comprising a memory module (1), a recognition module (2), a control module (3), and an arithmetic module (4). The memory module (1) is used to store code segments, the recognition module (2) is used to recognize multiple code segments based on markers that mark code segments, and the multiple code segments are used for parallel execution, N arithmetic modules (4) are provided, and the control module (3) is used to control all arithmetic modules (4) to execute code segments in a parallel processing manner. The system compiles the source code of a single-threaded program into executable code in advance, marks the executable code, obtains multiple code segments that can be executed in parallel, stores the multiple code segments in the memory module (1), and the arithmetic module (4) executes the multiple code segments in a parallel processing manner, thereby realizing parallel processing of a single-threaded program, which is advantageous for improving the computation speed of a single-threaded program and shortening the computation time of the program.
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Description

Technical Field

[0001] The present application relates to the field of processors, and in particular to a parallel processing apparatus for single-threaded programs.

Background Art

[0002] Single-threaded programs are characterized by stable system operation and extremely high scalability.

[0003] However, during the arithmetic execution of a single-threaded program, the program paths passed through are arranged in a continuous order, and subsequent processing cannot be executed unless the preceding processing is completed.

[0004] As a result, the arithmetic time of single-threaded processing becomes long.

Summary of Invention

Problem to be Solved by Invention

[0005] In order to reduce the arithmetic time of a program, the present application provides a parallel processing apparatus for a single-threaded program.

Means for Solving the Problem

[0006] The parallel processing apparatus for a single-threaded program provided by the present application adopts the following technical solutions.

[0007] A parallel processing apparatus for a single-threaded program, comprising a storage module, a recognition module, a control module and an arithmetic module, the storage module is configured to store code segments, the recognition module is configured to recognize a plurality of code segments based on markers that mark the code segments, and the plurality of code segments are configured to be executed in parallel, N arithmetic modules are provided, The control module is used to control all arithmetic modules so that they execute multiple code segments in a parallel processing manner.

[0008] By employing the above technical solution, the source code of a single-threaded program is compiled into executable code in advance, the executable code is marked, multiple code segments that can be executed in parallel are obtained, the multiple code segments are stored in a memory module, and the arithmetic module executes the multiple code segments in a parallel processing manner, thereby realizing parallel processing of the single-threaded program, which is advantageous in improving the computation speed of the single-threaded program and reducing the computation time of the program.

[0009] Preferably, the control module is used to control all arithmetic modules so that they execute multiple code segments in a parallel processing manner. It is used to output an indicator when the arithmetic module has finished executing the code segment. This includes the fact that if a control module detects the presence of N indicators, it is used to control all arithmetic modules to execute the next set of N code segments in a parallel processing manner.

[0010] By employing the above technical solution, it is possible to determine whether the current code segment has completed its calculation using an indicator, further control the calculation of subsequent code segments, and, after the parallel processing of N code segments is completed, execute the parallel processing of the next set of N code segments.

[0011] Preferably, the control module is used to control all arithmetic modules so that they execute multiple code segments in a parallel processing manner. The control module is used to determine the state of all arithmetic modules. A control module is used to control idle arithmetic modules to execute a specific code segment, and this includes the fact that the specific code segment is one of the executable code segments among all code segments waiting to be executed.

[0012] By employing the above technical solution, there may be differences in the time required for each arithmetic module to execute different code segments. If any of the arithmetic modules is idle, that idle arithmetic module will immediately execute the subsequent code segment, thereby reducing the program's computation time.

[0013] Preferably, the control module is used to determine whether a code segment is executable based on the execution conditions of the code segment.

[0014] By employing the above technical solution, it is possible to control idle arithmetic modules to execute specific code segments. [Effects of the Invention]

[0015] As explained above, this application includes at least one beneficial technical effect. 1. The source code of a single-threaded program is compiled into executable code in advance, and the executable code is marked. Multiple code segments that can be executed in parallel are obtained, and these multiple code segments are stored in a memory module. The arithmetic module then executes these multiple code segments in a parallel processing manner, thereby realizing parallel processing of the single-threaded program, which is advantageous in improving the computation speed of the single-threaded program and shortening the computation time of the program. 2. The indicator determines whether the current code segment has completed its calculation, and further controls the calculation of subsequent code segments. 3. In the process of executing multiple code segments in parallel, after completing the parallel processing of N code segments, the next set of N code segments is executed in parallel. 4. There may be a difference in the time required for each arithmetic module to execute different code segments. If any arithmetic module is idle, the idle arithmetic module immediately executes the subsequent code segment, thereby reducing the computation time of the program. [BRIEF DESCRIPTION OF THE DRAWINGS]

[0016] [Figure 1] FIG. 1 is a structural block diagram of a parallel processing apparatus for a single-threaded program. [MODES FOR CARRYING OUT THE INVENTION]

[0017] Hereinafter, the present application will be described in further detail with reference to FIG. 1. Example 1

[0018] An embodiment of the present application discloses a parallel processing method for a single-threaded program, comprising the following steps: A parallel processing apparatus for a single-threaded program, comprising a storage module 1, a recognition module 2, a control module 3 and an arithmetic module 4. The storage module 1 is configured to store code segments obtained by the above method. The recognition module 2 is configured to recognize a plurality of code segments based on markers that mark the code segments. N pieces of the arithmetic module 4 are provided. The control module 3 is configured to control all the arithmetic modules 4 to execute a plurality of code segments in a parallel processing manner.

[0019] Specifically, the statement that the control module 3 is configured to control all the arithmetic modules 4 to execute N code segments in a parallel processing manner means that: when the arithmetic module 4 completes execution of a code segment, it is configured to output an indicator. When the control module 3 detects that there are N markers, it includes being used to control all arithmetic modules 4 to execute the next set of N code segments in a parallel processing manner.

[0020] Example 2 Regarding the difference between this example and Example 1, the control module 3 is used to control all arithmetic modules 4 to execute multiple code segments in a parallel processing manner, the control module 3 is used to control all arithmetic modules 4 to execute N code segments in a parallel processing manner, the control module 3 is used to determine the states of all arithmetic modules 4, the control module 3 is used to control the idle arithmetic module 4 to execute a specific code segment, and the specific code segment is any executable code segment among all to-be-executed code segments.

[0021] Specifically, the arithmetic module 4 is used to output a marker when completing execution of the code segment, the control module 3 determines the state of the arithmetic module 4 based on the marker, the control module 3 is used to determine whether the code segment can be executed based on the execution condition of the code segment, and the execution condition of the code segment includes dependency, causality, data relationship and the like with the currently executing code segment. Example 3

[0022] Regarding the difference between this example and Example 1, the control module 3 is used to control all arithmetic modules 4 to execute multiple code segments in a parallel processing manner, the control module 3 is used to control all arithmetic modules 4 to execute N code segments in a parallel processing manner, It is configured to output an indicator when the arithmetic module 4 completes execution of a code segment, The control module 3 is configured to determine the status of all arithmetic modules 4, When the control module 3 detects M indicators, it is configured to control the idle arithmetic modules 4 to execute specific code segments, where 1≤M<N, and the specific code segment is any executable code segment among all to-be-executed code segments, When the control module 3 detects that there are N indicators, it is configured to control all the arithmetic modules 4 to execute the next set of N specific code segments in a parallel processing manner.

[0023] The control module 3 is configured to determine whether a code segment is executable based on the execution condition of the code segment, and the execution condition of the code segment includes dependency, causal relationship, data relationship, etc. with the currently executing code segment.

[0024] Implementation principle of the parallel processing apparatus for single-threaded programs according to embodiments of the present application: the source code of a single-threaded program is compiled into executable code in advance, the executable code is marked to obtain a plurality of code segments capable of being executed in parallel, the plurality of code segments are stored in the storage module 1, and the arithmetic modules 4 execute the plurality of code segments in a parallel processing manner, so as to implement parallel processing of the single-threaded program, which is advantageous for increasing the operation speed of the single-threaded program and shortening the operation time of the program.

[0025] All of the above are preferred embodiments of the present application, and do not limit the protection scope of the present application based thereon. Therefore, all equivalent changes made based on the structure, shape and principle of the present application shall fall within the protection scope of the present application. Description of Reference Numerals

[0026] 1. Memory module, 2. Recognition module, 3. Control module, 4. Arithmetic module.

Claims

1. A parallel processing unit for a single-threaded program, comprising a memory module (1), a recognition module (2), a control module (3), and an arithmetic module (4), The memory module (1) is used to store code segments. The recognition module (2) is used to recognize multiple code segments based on markers that mark code segments, and the multiple code segments are used for parallel execution. N arithmetic modules (4) are provided. A parallel processing unit for a single-threaded program, characterized in that a control module (3) is used to control all arithmetic modules (4) to execute multiple code segments in a parallel processing manner.

2. The control module (3) is used to control all arithmetic modules (4) so ​​that they execute multiple code segments in a parallel processing manner. The arithmetic module (4) is used to output an indicator when it has finished executing the code segment. A parallel processing device for a single-threaded program according to claim 1, characterized in that when a control module (3) detects that there are N indicators, it is used to control all arithmetic modules (4) to execute the next set of N code segments in a parallel processing manner.

3. The control module (3) is used to control all arithmetic modules (4) so ​​that they execute multiple code segments in a parallel processing manner. The control module (3) is used to determine the state of all the arithmetic modules (4). A parallel processing unit for a single-threaded program according to claim 1, characterized in that a control module (3) is used to control an idle arithmetic module (4) to execute a specific code segment, wherein the specific code segment is one of the executable code segments among all code segments waiting to be executed.

4. The parallel processing unit for a single-threaded program according to claim 3, characterized in that the control module (3) is used to determine whether or not a code segment is executable based on the execution conditions of the code segment.