A method for etching silicon and oxygen-containing features at low temperatures.

Abstract

An exemplary semiconductor processing method may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing area in a semiconductor processing chamber. A substrate may be housed within the processing area. A silicon-containing material layer may be placed on the substrate. The method may include forming plasma emitters of the fluorine-containing precursor and the hydrogen-containing precursor. The method may include contacting the substrate with the plasma emitters of the fluorine-containing precursor and the hydrogen-containing precursor. By contacting the substrate, features in the silicon-containing material layer may be etched. The temperature of the substrate support pedestal may be maintained at approximately -20°C or below during the semiconductor processing method.

Description

[Technical Field]

[0001] Cross-Reference to Related Applications

[0001] This application claims the benefit and priority of U.S. Patent Application No. 18 / 236,042, filed August 21, 2023, entitled "METHODS OF ETCHING SILICON-AND-OXYGEN-CONTAINING FEATURES AT LOW TEMPERATURES", which is incorporated herein by reference in its entirety.

[0002]

[0002] The present technology relates to semiconductor processes and apparatuses. More specifically, the present technology relates to etching processes for materials containing silicon and oxygen. [Background Art]

[0003]

[0003] Integrated circuits are enabled by processes that generate complex patterned layers of materials on the surface of a substrate. Generating patterned material on a substrate requires controlled methods for removing exposed material. Chemical etching is used for a variety of purposes, including transferring a photoresist pattern to an underlying layer, thinning a layer, or reducing the lateral dimensions of features already present on a surface. It is often desirable to have an etching process that etches one material faster than another, for example to facilitate a pattern transfer process. Such etching processes are said to be selective to the first material. As a result of the diversity of materials, circuits, and processes, etching processes with selectivity for various materials have been developed.

[0004]

[0004] Based on the materials used in the process, the etching process may be called wet or dry. Wet HF etching preferentially removes silicon oxide over other dielectrics and materials. However, wet processes have difficulty penetrating some constrained trenches and can deform the remaining material. Dry etching is performed in a localized plasma formed within the substrate processing area, but can penetrate more constrained trenches and can better minimize deformation of the fragile remaining structure. However, the electric arc generated when the localized plasma discharges can damage the substrate.

[0005]

[0005] Therefore, there is a need for improved systems and methods that can be used to manufacture high-quality devices and structures. These and other needs are addressed by this technology. [Overview of the project]

[0006]

[0006] An exemplary semiconductor processing method may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. A silicon-containing material layer may be placed on the substrate. The method may include forming plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor. The method may include bringing the substrate into contact with the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor. By contacting the substrate, features in the silicon-containing material layer may be etched. The temperature of the substrate support pedestal may be maintained at about -20°C or below during the semiconductor processing method.

[0007]

[0007] In some embodiments, the fluorine-containing precursor is nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), hexafluorobutadiene (C4F6), or fluoromethane (CH3F), or may contain the same. The hydrogen-containing precursor is diatomic hydrogen (H2), or may contain the same. The silicon-containing material is silicon oxide, or may contain the same. The plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor can form a hydrogen fluoride (HF)-containing plasma. The plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor can be formed with a plasma output of about 750 W or more. The method may include applying bias power while the substrate is in contact with the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor. The bias power may be about 1,500 W or more. Features in the oxygen-containing material layer can be characterized by a critical dimension of about 30 nm or less. Features in the oxygen-containing material layer can be characterized by an aspect ratio of about 5:1 or more. The temperature of the substrate support pedestal may be approximately -60°C or lower. By bringing it into contact with the pedestal, features within the oxygen-containing material layer can be etched at an etching rate of approximately 100 nm / min or higher.

[0008]

[0008] Several embodiments of the present technology may encompass semiconductor processing methods. The method may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. A layer of silicon- and oxygen-containing material may be placed on the substrate. The method may include forming plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor. The method may include bringing the substrate into contact with the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor. By contacting the substrate, features within the layer of silicon- and oxygen-containing material may be etched. Features within the layer of silicon- and oxygen-containing material may be characterized by critical dimensions of about 30 nm or less.

[0009]

[0009] In some embodiments, plasma emissions of fluorine-containing precursors and hydrogen-containing precursors can form a hydrogen fluoride (HF)-containing plasma. Layers of silicon and oxygen-containing materials may be layers within the DRAM structure. The temperature of the substrate support pedestal may be between about -100°C and about -20°C. The operating pressure of the semiconductor processing chamber may be less than or equal to about 2 Torr.

[0010]

[0010] Several embodiments of the present technology may encompass a semiconductor processing method. The method may include providing an etchant precursor to a processing area in a semiconductor processing chamber. A substrate may be housed within the processing area. A silicon-containing material layer may be placed on the substrate. The method may include forming a plasma emission of the etchant precursor. The plasma emission is or may include a hydrogen fluoride (HF)-containing plasma. The method may include contacting the substrate with the hydrogen fluoride (HF)-containing plasma. By contacting the substrate, features in the silicon-containing material layer may be etched. The temperature of the substrate support pedestal may be maintained at about -40°C or below during the semiconductor processing method.

[0011]

[0011] In some embodiments, the etchant precursor is one or more of nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), hexafluorobutadiene (C4F6), and fluoromethane (CH3F), or may include them. The method may include applying a bias power while bringing a substrate into contact with the plasma emission of the etchant precursor. The bias power may be about 1,250 W or more.

[0012]

[0012] Such technologies may offer many advantages over conventional systems and techniques. For example, the process may increase the desired properties of the profile of one or more features etched into the oxygen-containing material. In addition, the process may prevent a decrease in etching rate, curvature of the etched features, bending of the etched features, twisting of the etched features, and / or clogging of the etched features. The above and other embodiments, along with many of their advantages and features, will be described in more detail in the following description and accompanying drawings.

[0013]

[0013] The nature and advantages of the disclosed technology can be further understood by referring to the remainder of this specification and the drawings. [Brief explanation of the drawing]

[0014] [Figure 1]

[0014] An exemplary processing system according to several embodiments of the present technology is shown in the top view. [Figure 2]

[0015] A schematic cross-sectional view of an exemplary processing chamber according to several embodiments of this technology is shown. [Figure 3]

[0016] The following shows selected steps in an etching method according to several embodiments of this technology. [Figure 4A]

[0017] The following shows a cross-sectional view of a substrate material on which a selected process is being performed, according to several embodiments of this technology. [Figure 4B] The following shows a cross-sectional view of a substrate material on which a selected process is being performed, according to several embodiments of this technology. [Figure 4C] The following shows a cross-sectional view of a substrate material on which a selected process is being performed, according to several embodiments of this technology. [Modes for carrying out the invention]

[0015]

[0018] Some of the drawings are included as schematic diagrams. Please understand that the drawings are for illustrative purposes only and should not be considered to scale unless specifically stated otherwise. In addition, the diagrams are provided as schematic diagrams to aid understanding and may not include all aspects or information compared to actual depictions, and may include material that is unnecessary or exaggerated for illustrative purposes.

[0016]

[0019] In the attached diagrams, similar components and / or features may have the same reference numeral. Furthermore, various components of the same type can be distinguished according to their reference numerals by letters that distinguish between similar components. Where only a first reference numeral is used in this specification, its description is applicable to any similar component having the same first reference numeral, regardless of the letters.

[0017]

[0020] As structures evolve, the aspect ratios of features and other structures can sometimes increase dramatically. For example, during DRAM processing, features may be etched through one or more materials, such as oxygen-containing materials. Once a feature is formed, the opening may extend through the entire thickness of the oxygen-containing material before accessing the substrate. As the aspect ratios of features and other structures increase, the resulting features or openings may be characterized by reduced critical dimensions. These critical dimensions are desirable to be uniform across the features or openings.

[0018]

[0021] Conventional techniques typically involve etching features into oxygen-containing materials at room temperature. However, as aspect ratios continue to increase, the etching process may not provide sufficient profile control for the resulting features. For example, critical dimensions may not be maintained during etching as the aspect ratio increases. In addition, uneven etching can lead to warping and / or tapering of features. In some extreme cases, etching may not penetrate the entire desired thickness of the oxygen-containing material, resulting in bridging defects. In these cases, as the orientation of the etchant species decreases, the etchant species may begin to etch outwards. External etching can result in warping, bending, twisting, or other non-uniformities of the etching.

[0019]

[0022] This technology overcomes these problems by performing the etching process at low temperatures using a combination of precursors, such as a fluorine-containing precursor and a carbon-containing precursor, thereby increasing the uniformity of the etched features. For example, hydrogen-rich chemicals may be used to reduce feature tapering. As the temperature decreases, more fluorine-containing material reaches the etching tip, allowing etching to continue via oxygen-containing material.

[0020]

[0023] In the remaining disclosure, a specific etching process using the disclosed technology is conventionally specified, but it will be readily appreciated that the system and method are equally applicable to deposition processes and cleaning processes that may occur within the described chamber. Therefore, the present technology should not be considered limited to use only in etching processes or chambers. Further, while an exemplary chamber is described to provide a foundation for the present technology, it should be understood that the present technology is actually applicable to any semiconductor processing chamber that can enable the single-chamber process described. Similarly, while specific etching processes are described, it should be understood that these processes may be equally applicable to other processes in which etching can be performed. Accordingly, the given embodiments should not be considered as limiting the scope of the described technology.

[0021]

[0024] Fig. 1 illustrates a top plan view of one embodiment of a processing system 10 having deposition, etching, baking, and / or curing chambers, according to an embodiment. The tool or processing system 10 depicted in Fig. 1 may include a plurality of processing chambers 24a-d, a transfer chamber 20, a service chamber 26, an integrated metrology chamber 28, and a pair of load lock chambers 16a-b. The processing system may include any number of structures or components, as well as any number or combination of processing chambers.

[0022]

[0025] For transferring substrates between chambers, the transfer chamber 20 may include a robotic transfer mechanism 22. The transfer mechanism 22 may have a pair of substrate transfer blades 22a each attached to the distal end of an extendable arm 22b. The blades 22a may be used to carry individual substrates to and from a processing chamber. In operation, one of the substrate transfer blades, such as blade 22a of transfer mechanism 22, retrieves a substrate W from one of the load lock chambers, such as chambers 16a to 16b, and may carry the substrate W to a first stage of processing (for example, a processing step described later in one of chambers 24a to 24d). The chambers may be included to perform individual or combined operations of the described technology. For example, one or more chambers may be configured to perform a deposition process or an etching process, while one or more other chambers may be configured to perform the described pre-treatment process and / or one or more post-treatment processes. The present technology encompasses any number of configurations, and any number of additional manufacturing processes commonly performed in semiconductor processing may also be performed.

[0023]

[0026] When a chamber is in use, the robot can wait until processing is complete, then use one blade 22a to remove the processed substrate from the chamber and use a second blade to insert a new substrate. Once processing of a substrate is completed, the substrate may be moved to a second stage of processing. For each transfer, the transfer mechanism 22 generally carries a substrate with one blade to perform substrate exchange, while the other blade may be empty. The transfer mechanism 22 may wait at each chamber until the exchange is completed.

[0024]

[0027] Once processing in the processing chamber is complete, the transfer mechanism 22 may move the substrate W from the final processing chamber and transport it to a cassette in the load lock chambers 16a-b. The substrate may then move from the load lock chambers 16a-b into the factory interface 12. The factory interface 12 may generally operate to transfer substrates between the pod loaders 14a-d and the load lock chambers 16a-b, which are in a clean environment at atmospheric pressure. The clean environment in the factory interface 12 may generally be provided through an air filtration process, such as a HEPA filter. The factory interface 12 may also include a substrate orienter / aligner, which may be used to properly position the substrates prior to processing. At least one substrate robot, such as robots 18a-b, may be positioned within the factory interface 12 to transfer substrates between various positions and locations within the factory interface 12 and to other locations communicating with them. Robots 18a and 18b may be configured to move along the track system within the factory interface 12 from the first end to the second end of the factory interface 12.

[0025]

[0028] The processing system 10 may further include an integrated measurement chamber 28 to obtain control signals that can provide adaptive control to any processing performed within the processing chamber. The integrated measurement chamber 28 may include any of a variety of measurement devices for measuring various film properties such as thickness, roughness, and composition, and the measurement devices may further be capable of characterizing grid parameters such as critical dimensions, sidewall angles, and feature heights in an automated manner under vacuum.

[0026]

[0029] Each of the processing chambers 24a to d may be configured to perform one or more process steps in the manufacturing of a semiconductor structure, and any number of processing chambers and combinations of processing chambers may be used on the multi-chamber processing system 10. For example, each processing chamber may be configured to perform any number of deposition processes, including periodic layer deposition, atomic layer deposition, chemical vapor deposition, and physical vapor deposition, as well as a number of substrate processing processes, including other processes such as etching, pre-cleaning, pre-treatment, post-treatment, annealing, plasma treatment, degassing, orientation, and other substrate processes. Some specific processes that may be performed in any chamber or combination of chambers may include metal deposition, surface cleaning and treatment, thermal annealing such as rapid heat treatment, and plasma treatment. As will be readily apparent to those skilled in the art, any other processes may be similarly performed in any particular chamber incorporated into the multi-chamber processing system 10, including any of the processes described below.

[0027]

[0030] Figure 2 shows a schematic cross-sectional view of an exemplary processing chamber 100 suitable for patterning a material layer placed on a substrate 302 within the processing chamber 100. While the exemplary processing chamber 100 is suitable for performing a patterning process, it should be understood that embodiments of the art may be performed in any number of chambers, and the substrate support according to the art may be contained within an etching chamber, a deposition chamber, a processing chamber, or any other processing chamber. The plasma processing chamber 100 may include a chamber body 105 that defines a chamber space 101 in which the substrate can be processed. The chamber body 105 may have side walls 112 and a bottom 118, which are connected to ground 126. The side walls 112 have liners 115 to protect the side walls 112, which may extend the time between maintenance cycles of the plasma processing chamber 100. The dimensions of the chamber body 105 and related components of the plasma processing chamber 100 are not limiting and may generally be larger in proportion to the size of the substrate 302 processed therein. Examples of substrate sizes include, in particular, those for displays or solar cell substrates with diameters of 200 mm, 250 mm, 300 mm, and 450 mm.

[0028]

[0031] The chamber body 105 may surround the chamber space 101, supporting the chamber lid assembly 110. The chamber body 105 may be manufactured from aluminum or other suitable material. A substrate access port 113 may be formed through the side wall 112 of the chamber body 105, which facilitates the transfer of substrates 302 into and out of the plasma processing chamber 100. The access port 113 may be connected to the transfer chamber and / or other chambers of the substrate processing system, as described above. A pumping port 145 may be formed through the side wall 112 of the chamber body 105 and connected to the chamber space 101. A pumping device may be connected to the chamber space 101 through the pumping port 145 to exhaust the processing space and control the pressure. The pumping device may include one or more pumps and throttle valves.

[0029]

[0032] The gas panel 160 may be connected to the chamber body 105 by a gas line 167 to supply the process gas into the chamber space 101. The gas panel 160 may include one or more process gas sources 161, 162, 163, 164, and may further include inert gases, non-reactive gases, and reactive gases that can be used for any number of processes. Examples of process gases that may be provided by the gas panel 160 include, but are not limited to, methane, sulfur hexafluoride, silicon chloride, carbon tetrafluoride, hydrogen bromide, hydrocarbon-containing gases, argon gas, chlorine, nitrogen, helium, and oxygen gas, as well as hydrocarbon-containing gases, and any number of additional materials. In addition, the processing gas may include gases containing nitrogen, chlorine, fluorine, oxygen, and hydrogen, such as H2, NH3, H2O, H2O2, O2, O3, NF3, HF, F2, CH4, CF4, CHF3, C2F6, C2F4, C3F6, C4F6, C4F8, BrF3, ClF3, SF6, CH3F, CH2F2, BCl3, PF3, PH3, COS, and SO2, among any number of additional precursors.

[0030]

[0033] Valve 166 controls the flow of processing gas from gas panel 160 sources 161, 162, 163, and 164 and can be managed by controller 165. The flow of gas supplied from gas panel 160 to chamber body 105 may include a combination of gases from one or more sources. Lid assembly 110 may include nozzles 114. Nozzles 114 may be one or more ports for introducing processing gas from gas panel 160 sources 161, 162, 164, and 163 into the chamber space 101. After the processing gas is introduced into the plasma processing chamber 100, the gas may be activated to form a plasma. Antennas 148, such as one or more inductor coils, may be provided adjacent to the plasma processing chamber 100. Antenna power supply 142 can power antennas 148 via matching circuit 141 and inductively couple energy (e.g., RF energy) to the processing gas to maintain the plasma formed from the processing gas within the chamber space 101 of the plasma processing chamber 100. In place of or in addition to the antenna power supply 142, processing electrodes located below and / or above the substrate 302 can be used to capacitively couple RF power to the processing gas and maintain plasma within the chamber space 101. The operation of the power supply 142 may be controlled by a controller (e.g., controller 165) that also controls the operation of other components within the plasma processing chamber 100.

[0031]

[0034] A substrate support pedestal 135 is positioned within the chamber space 101 to support the substrate 302 during the process. The substrate support pedestal 135 may include an electrostatic chuck ("ESC") 122 for holding the substrate 302 during the process. The electrostatic chuck 122 can hold the substrate 302 to the substrate support pedestal 135 using electrostatic attraction. The ESC 122 may be powered by an RF power supply 125 integrated with a matching circuit 124. The ESC 122 may include an electrode 121 embedded in a dielectric. The electrode 121 is connected to the RF power supply 125 and may provide a bias that attracts plasma ions formed by the processing gas in the chamber space 101 to the ESC 122 and the substrate 302 fixed on the pedestal. The RF power supply 125 may be switched on and off repeatedly or pulsed during the process of the substrate 302. The ESC122 may have an insulating section 128 to prevent the sidewalls of the ESC122 from being attracted to the plasma, in order to extend the maintenance life of the ESC122. In addition, the substrate support pedestal 135 may have a cathode dryer 136 to protect the sidewalls of the substrate support pedestal 135 from the plasma gas and to extend the maintenance interval of the plasma processing chamber 100.

[0032]

[0035] Electrode 121 may be connected to a power supply 150. The power supply 150 may provide electrode 121 with a chucking voltage of approximately 500 volts to approximately 15,000 volts. The power supply 150 may also include a system controller for controlling the operation of electrode 121 by directing a DC current to electrode 121 for chucking and dechucking substrate 302. For example, similar to an RF power supply 125, power supply 150 may provide a bias to attract plasma ions formed by the processing gas in the chamber space 101 to the ESC 122 and substrate 302 mounted on the pedestal. Power supply 150 may be repeatedly switched on and off or pulsed during the processing of substrate 302. In embodiments, power supply 150 may provide RF power, DC current or voltage, or a combination thereof, for chucking and / or biasing. In additional embodiments, multiple power supplies may be configured to provide RF power and DC current or voltage for chucking and / or biasing. The ESC122 may include a heater located within a pedestal and connected to a power supply to heat the substrate. Meanwhile, the cooling base 129 supporting the ESC122 may include conduits for circulating a heat transfer fluid to maintain the temperature of the ESC122 and the substrate 302 placed on top of it. The ESC122 may be configured to operate within the temperature range required by the thermal balance of the device being manufactured on the substrate 302. For example, the ESC122 may be configured to maintain the substrate 302 at a temperature of approximately -150°C to approximately 500°C, depending on the process being performed.

[0033]

[0036] A cooling base 129 may be provided to assist in temperature control of the substrate 302. To mitigate processing drift and time, the temperature of the substrate 302 may be kept substantially constant by the cooling base 129 while the substrate 302 is in the cleaning chamber. In some embodiments, the temperature of the substrate 302 may be maintained at a temperature between approximately -150°C and approximately 500°C throughout the subsequent cleaning process, although any temperature may be available. A covering 130 may be positioned on the ESC 122 and along the outer periphery of the substrate support pedestal 135. The covering 130 may be configured to shield the upper surface of the substrate support pedestal 135 from the plasma environment inside the plasma processing chamber 100 while containing etching gases in desired portions of the exposed upper surface of the substrate 302. As previously stated, lift pins may be selectively moved through the substrate support pedestal 135 to lift the substrate 302 above the substrate support pedestal 135 to facilitate access to the substrate 302 by a transfer robot or other suitable transfer mechanism.

[0034]

[0037] The controller 165 may be used to adjust the gas flow from the gas panel 160 to the plasma processing chamber 100 and other process parameters, and to control the process sequence. When executed by the CPU, the software routines transform the CPU into a purpose-specific computer (such as a controller) capable of controlling the plasma processing chamber 100, and as a result, the process is carried out according to this disclosure. The software routines may also be stored and / or executed by a second controller associated with the plasma processing chamber 100.

[0035]

[0038] The chamber described above may be used to perform exemplary methods, including etching methods. Figure 3 shows exemplary operation of Method 300 according to an embodiment of the Art. Prior to the first operation of the Method, the substrate may be treated in one or more ways prior to being placed in the processing area of ​​the chamber in which Method 300 may be performed. For example, an oxygen-containing material such as silicon oxide may be formed on the substrate, and then one or more patterns may be formed through a mask material covering the oxygen-containing material. The mask material may, but is not limited to, any number of mask materials. In embodiments, the mask material may include a plurality of materials for forming a mask stack. For example, the plurality of materials forming the mask stack may include one or more silicon-containing materials, carbon-containing materials, and / or any other materials that can be used as mask materials. For example, the mask material may include a silicon- and nitrogen-containing material that can be formed on the oxygen-containing material. Furthermore, the mask material may include a carbon-containing material such as amorphous carbon that can be formed on the oxygen-containing material. One or more patterns may be formed through each layer of the mask material. Some or all of these steps can be performed in a chamber or system tool, as described above, or in various chambers on the same system tool (which may include the chamber in which the steps of Method 300 are performed).

[0036]

[0039] Method 300 may include a number of optional steps. These steps may or may not be particularly relevant to some embodiments of the method according to the present art. For example, many of the steps are described to provide a broader range of structural configurations but are not essential to the present art, or may be carried out by alternative methods, as will be further described below. Method 300 describes the steps schematically shown in Figures 4A to 4C, the examples of which will be described in conjunction with the steps of Method 300. Figures 4A to 4C are only partial schematics, and it should be understood that the substrate may include any number of structural parts having the configurations shown in the figures, as well as alternative structural configurations from which the steps of the present art can still be beneficial.

[0037]

[0040] Method 300 may or may not include optional steps for developing the semiconductor structure prior to a specific manufacturing process. Method 300 may be performed on any number of semiconductor structures, and it should be understood that Figure 4A shows one exemplary memory structure on which a contact cleaning or etching process may be performed. As shown in Figure 4A, the processed semiconductor structure 400 may include a substrate 405, the substrate 405 having an oxygen-containing material 410, such as a silicon-and-oxygen-containing material (e.g., silicon oxide), which may cover the substrate 405. In embodiments, the oxygen-containing material 410, such as a layer of the silicon-and-oxygen-containing material, may be a layer within the DRAM structure. A mask material 415 may cover the oxygen-containing material 410 and be patterned to form one or more openings 420 extending through the mask material 415. As previously stated, the mask material 415 may be multiple layers, such as multiple different materials (e.g., a silicon-and-nitrogen-containing material, and a carbon-containing material such as amorphous carbon). One or more openings 420 may be defined by sidewalls which may be composed of mask material 415. The structures of interest are not intended to be limiting, and it should be understood that a variety of other semiconductor structures are similarly encompassed. Other exemplary structures may include two-dimensional and three-dimensional structures common in semiconductor manufacturing, in which oxygen-containing material is removed relative to one or more other materials. In addition, while high aspect ratio structures can benefit from this technique, it may be equally applicable to lower aspect ratios and any other structures.

[0038]

[0041] As shown in the figure, multiple materials are present and may be exposed to the etchant material. Method 300 can be performed to etch or remove a portion of the oxygen-containing material 410 exposed in the opening 420 while minimizing the etching of other materials, such as the mask material 415 above. By utilizing the processing conditions (e.g., temperature) and precursors according to embodiments of the present technique, the etching rate of the oxygen-containing material 410 relative to the mask material 415 can be increased. In addition, profile control of the features etched into the oxygen-containing material 410 may be more uniform compared to conventional techniques.

[0039]

[0042] Method 300 may include, in step 305, providing a precursor such as an etchant precursor within a processing area. The processing area may contain a substrate 405 such as a processed semiconductor structure 400, which may have one or more layers of materials such as an oxygen-containing material 410 and a mask material 415 disposed on the substrate 405. The oxygen-containing material 410 may be exposed within openings or holes 420 in the mask material 415. The etchant precursor may include a fluorine-containing precursor and a hydrogen-containing precursor. In embodiments, one or more inert gases or carrier gases may be provided with the etchant precursor. For example, the precursor may contain any number of carrier gases, which may include argon (Ar), helium (He), nitrogen, or other rare, inert, or useful precursors. The carrier gas may be used to dilute the precursor, which may further reduce the etching rate and allow sufficient diffusion into the entire opening. Plasma emissions may be formed in step 310, for example, within the processing area of ​​a semiconductor processing chamber. The plasma emitters may include any of the plasma emitters among the precursors described above. Steps 305 and 310 may be performed in various orders and, in some embodiments, may be performed almost simultaneously. In addition, in different embodiments, the plasma may be formed first from either the precursor or one or more inert gases before the addition of the etchant precursor.

[0040]

[0043] Method 300 may include applying bias power in an optional step 315. The bias power may increase the directionality of the plasma emitters formed in step 310. As shown in Figure 4B, the semiconductor structure 400 and the substrate 405 may be brought into contact with plasma emitters 425 of an etchant precursor in step 320, thereby etching or removing the oxygen-containing material 410 to form features 430 within the oxygen-containing material 410. The plasma emitters 425 may come into contact with the semiconductor structure 400 and all exposed surfaces, including surfaces to be etched (e.g., oxygen-containing material 410) and surfaces to be maintained (e.g., mask material 415). Due to the precursor and processing conditions associated with etching feature 430, the prior art often suffers from problems such as slower etching rates as the aspect ratio increases, corrosion of the sidewalls, etching stoppage or clogging at the bottom of feature 430, and / or warping and other profiling issues (e.g., bending and / or twisting) resulting from etching imbalances between the oxygen material and the mask material. However, by providing a precursor and operating under the processing conditions described in this embodiment, the common problems in the prior art can be reduced and / or avoided.

[0041]

[0044] The precursors used in the etching process may include fluorine-containing precursors and hydrogen-containing precursors, as well as one or more inert gases or carrier gases. An exemplary fluorine-containing precursor may be nitrogen trifluoride (NF3) or carbon tetrafluoride (CF4), which may be supplied to the processing area. Other fluorine sources may be used together with or instead of NF3 or CF4. For example, the fluorine-containing precursor may be NF3, CF4, diatomic fluorine (F2), hydrogen fluoride (HF), hexafluorobutadiene (C4F6), fluoroform (CHF3), fluoromethane (CH3F), difluoromethane (CH2F2), methyl fluoride (CH3F), or additional fluorine-containing materials, which may be used together. An exemplary hydrogen-containing precursor may be diatomic hydrogen (H2), which may be supplied to the processing area. Other hydrogen sources may be used together with or instead of H2. For example, the hydrogen-containing precursor may include one or more materials containing HF, CHF3, CH2F2, CH3F, water or steam (H2O), hydrogen peroxide (H2O2), or additional hydrogen-containing materials.

[0042]

[0045] In embodiments, fluorine-containing precursors and hydrogen-containing precursors can form HF-containing plasma. Therefore, contacting the substrate 405 with plasma emitters may include contacting the substrate 405 with HF-containing plasma. Plasma emitters formed from precursors may be formed locally within a processing area or within a remote plasma system. For example, plasma emitters may be generated by a remote plasma source (RPS), capacitively coupled plasma (CCP), or inductively coupled plasma (ICP) with or without one or more carrier gases such as Ar, He, diatomic nitrogen (N2), H2, or mixtures thereof. Plasma emitters may be low-level plasma to limit the amount of collision and the resulting sputtering, clogging of the opening 420, and / or bending / warping of the feature 430. In embodiments, the plasma output may be approximately 750W or more, approximately 800W or more, approximately 850W or more, approximately 900W or more, approximately 950W or more, approximately 1,000W or more, or more, but the plasma output may also be within the range between any two of these stated values, or within any smaller range that falls within either of the stated ranges. In embodiments, the plasma output may be approximately 1,250W or less, approximately 1,200W or less, approximately 1,150W or less, approximately 1,100W or less, approximately 1,050W or less, approximately 1,000W or less, or less, but the plasma output may also be within the range between any two of these stated values, or within any smaller range that falls within either of the stated ranges. By utilizing low levels of plasma output, plasma emissions can be well controlled to be supplied through the openings 420 in the mask material 415, while limiting sputtering of the mask material 415 and other exposed surfaces.

[0043]

[0046] In addition, bias power may be applied to the substrate 405. The bias power may provide a directed flow of plasma emitters 425 toward the substrate 405. Thus, the plasma emitters 425 can be guided into the opening 420, which may facilitate the plasma emitters traveling through the etched oxygen-containing material 410 and reaching the substrate 405. In embodiments, the bias power may be about 1,250 W or more, about 1,500 W or more, about 1,750 W or more, about 1,800 W or more, about 1,900 W or more, about 2,000 W or more, or more, but the bias power may also be within a range between any two of these stated values, or within any smaller range that falls within either of the stated ranges. The bias power may be approximately 3,000W or less, approximately 2,750W or less, approximately 2,500W or less, approximately 2,250W or less, approximately 2,000W or less, or lower, but the bias power may also be within the range between any two of these listed values, or within any smaller range that falls within any of the listed ranges. Applying bias power can result in a narrow ion angle distribution, which can provide better profile control of etching (e.g., no bending and / or twisting) and perpendicularity. A narrow ion incidence angle distribution can reduce sidewall attack, increase etching rate, and make the etching tip closer to right angle. However, at higher bias powers, such as those exceeding 3,000W, selectivity may decrease due to increased impact on the mask material 415 and the resulting sputtering. Furthermore, higher bias powers may result in bending / warping of feature 430.

[0044]

[0047] As shown in Figure 4C, the resulting feature 430 may extend through each layer of the oxygen-containing material 410. The aspect ratio and depth of the etched feature 430 may depend on the thickness of the oxygen-containing material 410, but the feature 430 may be characterized by an aspect ratio, or height-to-width ratio, measured from the top surface of the substrate 405 to the top surface of the oxygen-containing material 410, of about 2:1 or greater. In embodiments, the feature 430 may be characterized by an aspect ratio of about 3:1 or greater, about 4:1 or greater, about 5:1 or greater, about 10:1 or greater, about 15:1 or greater, about 20:1 or greater, about 25:1 or greater, about 40:1 or greater, about 50:1 or greater, or greater than these, but the aspect ratio may also fall within a range between any two of these listed values, or within any smaller range that falls within either of the listed ranges. In addition, the depth of the feature 430, measured from the top surface of the substrate 405 to the top surface of the oxygen-containing material 410, may be approximately 20 nm or more, approximately 30 nm or more, approximately 40 nm or more, approximately 50 nm or more, approximately 75 nm or more, approximately 100 nm or more, approximately 200 nm or more, approximately 300 nm or more, approximately 400 nm or more, approximately 500 nm or more, approximately 750 nm or more, approximately 1,000 nm or more, or greater, but the depth may also fall within the range between any two of these stated values, or within any smaller range that falls within either of the stated ranges. The critical dimensions or width of feature 430 may be approximately 50 nm or less, approximately 45 nm or less, approximately 40 nm or less, approximately 35 nm or less, approximately 30 nm or less, approximately 28 nm or less, approximately 26 nm or less, approximately 24 nm or less, approximately 22 nm or less, approximately 20 nm or less, approximately 19 nm or less, approximately 18 nm or less, approximately 17 nm or less, approximately 16 nm or less, approximately 15 nm or less, approximately 14 nm or less, approximately 13 nm or less, approximately 12 nm or less, approximately 11 nm or less, approximately 10 nm or less, or less, but the critical dimensions or width may also fall within the range between any two of these listed values, or within any smaller range that falls within either of the listed ranges.

[0045]

[0048] As mentioned above, more hydrogen can increase the etching rate of the oxygen-containing material 410. At low temperatures, H2O (a by-product from the removal of oxygen-containing material 410) can condense on the substrate 405 and help catalyze and accelerate the etching of the oxygen-containing material 410. For example, by contact, features within a layer of the oxygen-containing material 410 can be etched at etching rates of approximately 400 A / min or more, approximately 450 A / min or more, approximately 500 A / min or more, approximately 550 A / min or more, approximately 600 A / min or more, approximately 650 A / min or more, approximately 700 A / min or more, approximately 750 A / min or more, approximately 800 A / min or more, approximately 900 A / min or more, approximately 1,000 A / min or more, or higher, although the etching rate can also be within a range between any two of these stated values, or within any smaller range that falls within either of the stated ranges.

[0046]

[0049] An increase in the etching rate of the oxygen-containing material 410 may result in increased etching selectivity between the oxygen-containing material 410 and the mask material 415. In the embodiment, contact can selectively etch the oxygen-containing material 410 against the mask material 415 with a selectivity of approximately 5:1 or more, approximately 6:1 or more, approximately 7:1 or more, approximately 8:1 or more, approximately 9:1 or more, approximately 10:1 or more, approximately 15:1 or more, approximately 20:1 or more, approximately 25:1 or more, approximately 30:1 or more, or higher, although the etching selectivity may also fall within a range between any two of these stated values, or within any smaller range that falls within either of the stated ranges.

[0047]

[0050] Process conditions may also affect the steps performed in Method 300. While each step of Method 300 can be performed at a constant temperature in some embodiments, the temperature may be adjusted between different steps in some embodiments. For example, the operating temperature of the semiconductor processing chamber during Method 300 may include the substrate, substrate support pedestal, or chamber temperature, which may be maintained at a temperature of about 0°C or lower. In some embodiments, the temperature may be about -20°C or lower, about -40°C or lower, about -50°C or lower, about -60°C or lower, about -70°C or lower, about -80°C or lower, about -90°C or lower, about -100°C or lower, about -110°C or lower, about -120°C or lower, or lower, but the temperature may also be within a range between any two of these stated values, or within any smaller range that falls within any of the stated ranges. For example, the operating temperature of the semiconductor processing chamber may be between about -100°C and about -20°C, or between any other values ​​mentioned above. However, at very low temperatures, feature 430 may begin to warp. Therefore, in some embodiments, the operating temperature of the semiconductor processing chamber can be maintained between approximately -100°C and approximately -20°C.

[0048]

[0051] The pressure inside the processing chamber can be controlled during method 300. For example, while forming a plasma emitter and performing an etching process, the operating pressure of the semiconductor processing chamber can be approximately 2 mTorr or less, approximately 1 mTorr or less, approximately 750 mTorr or less, approximately 500 mTorr or less, approximately 250 mTorr or less, approximately 125 mTorr or less, approximately 100 mTorr or less, approximately 75 mTorr or less, approximately 50 mTorr or less, approximately 45 mTorr or less, approximately 40 mTorr or less, approximately 35 mTorr or less, approximately 30 mTorr or less, approximately 25 mTorr or less, approximately 20 mTorr or less, approximately The pressure may be maintained at or below 18 mTorr, approximately 16 mTorr, approximately 14 mTorr, approximately 12 mTorr, approximately 10 mTorr, approximately 9 mTorr, approximately 8 mTorr, approximately 7 mTorr, approximately 6 mTorr, approximately 5 mTorr, approximately 4 mTorr, approximately 3 mTorr, or below, although the pressure may also be within the range between any two of these listed values, or within any smaller range that falls within any of the listed ranges. The pressure in the processing chamber may affect the ability of flow into the opening 420. For example, as the pressure increases, it may become more difficult for plasma emitters to penetrate the opening 420 and reach the etching tip of the feature 430.

[0049]

[0052] The above description includes many details for illustrative purposes in order to provide an understanding of the various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments can be carried out without some of these details, or with additional details.

[0050]

[0053] While several embodiments have been disclosed, those skilled in the art will understand that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, many well-known processes and elements have not been described in order to avoid unnecessarily obscuring the Art. Therefore, the descriptions in the prior specification should not be considered to limit the scope of the Art. In addition, while methods or processes may be described sequentially or stepwise, it should be understood that steps may be performed simultaneously or in an order different from that listed.

[0051]

[0054] Where a range of values ​​is provided, unless explicitly stated otherwise in the context, each intervening value between the upper and lower limits of that range is specifically disclosed down to the smallest unit of the lower limit. Any narrow range between the stated values ​​or unstated intervening values ​​within the stated range and other stated or intervening values ​​within the stated range is included. The upper and lower limits of such narrower ranges may be individually included in or excluded from that range. Each range in which one, neither, or both of the limits are included is also included in the Art, provided that there are limits specifically excluded within the stated range. If one or both of the limits are included in the stated range, the range excluding one or both of the included limits is also included.

[0052]

[0055] As used herein and in the appended claims, the singular forms “a,” “an,” and “the” include multiple references unless otherwise specified in the context. Therefore, for example, “a precursor” refers to multiple such precursors, and “the layer” refers to one or more layers and equivalents well known to those skilled in the art, and the same applies to other forms.

[0053]

[0056] Furthermore, the terms “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including,” as used herein and in the claims, are intended to identify the presence of the described features, integers, components, or processes, but not to exclude the presence or addition of one or more other features, integers, components, processes, operations, or groups.

Claims

1. A semiconductor processing method, To provide a fluorine-containing precursor and a hydrogen-containing precursor in the processing region of a semiconductor processing chamber, wherein the substrate is housed within the processing region and the silicon-containing material layer is arranged on the substrate, Forming plasma ejecta of the fluorine-containing precursor and the hydrogen-containing precursor, and The method involves bringing the substrate into contact with the plasma emitters of the fluorine-containing precursor and the hydrogen-containing precursor, wherein the features in the silicon-containing material layer are etched by the contact, and the temperature of the substrate support pedestal is maintained at approximately -20°C or below during the semiconductor processing method. A semiconductor processing method, including the following.

2. The fluorine-containing precursor is nitrogen trifluoride (NF ３ ), carbon tetrafluoride (CF ４ ), hexafluorobutadiene (C ４ F ６ ), or fluoromethane (CH ３ The semiconductor processing method according to claim 1, including F).

3. The hydrogen-containing precursor is diatomic hydrogen (H ２ The semiconductor processing method according to claim 1, including ).

4. The semiconductor processing method according to claim 1, wherein the silicon-containing material contains silicon oxide.

5. The semiconductor processing method according to claim 1, wherein the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor form a hydrogen fluoride (HF)-containing plasma.

6. The semiconductor processing method according to claim 1, wherein the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor are formed with a plasma output of approximately 750 W or more.

7. Applying bias power while the substrate is in contact with the plasma emitted material of the fluorine-containing precursor and the hydrogen-containing precursor. The semiconductor processing method according to claim 1, further comprising:

8. The semiconductor processing method according to claim 7, wherein the bias power is approximately 1,500 W or more.

9. The semiconductor processing method according to claim 1, wherein the features in the oxygen-containing material layer are characterized by a critical dimension of about 30 nm or less.

10. The semiconductor processing method according to claim 1, wherein the features in the oxygen-containing material layer are characterized by an aspect ratio of about 5:1 or greater.

11. The semiconductor processing method according to claim 1, wherein the substrate support pedestal is at approximately -60°C or lower.

12. The semiconductor processing method according to claim 1, wherein by making contact, the features in the oxygen-containing material layer are etched at an etching rate of approximately 100 nm / min or more.

13. A semiconductor processing method, To provide a fluorine-containing precursor and a hydrogen-containing precursor in the processing region of a semiconductor processing chamber, wherein the substrate is housed within the processing region, and a layer of a material containing silicon and oxygen is arranged on the substrate, Forming plasma ejecta of the fluorine-containing precursor and the hydrogen-containing precursor, and The method involves contacting the substrate with the plasma emitters of the fluorine-containing precursor and the hydrogen-containing precursor, wherein, by contact, features in the layer of the silicon-oxygen-containing material are etched, and the features in the layer of the silicon-oxygen-containing material are characterized by a critical dimension of approximately 30 nm or less. A semiconductor processing method, including the following.

14. The semiconductor processing method according to claim 13, wherein the plasma emissions of the fluorine-containing precursor and the hydrogen-containing precursor form a hydrogen fluoride (HF)-containing plasma.

15. The semiconductor processing method according to claim 13, wherein the layer of the material containing silicon and oxygen is a layer within a DRAM structure.

16. The semiconductor processing method according to claim 13, wherein the temperature of the substrate support pedestal is approximately -100°C to approximately -20°C.

17. The semiconductor processing method according to claim 13, wherein the operating pressure of the semiconductor processing chamber is approximately 2 Torr or less.

18. A semiconductor processing method, To provide an etchant precursor to a processing region of a semiconductor processing chamber, wherein the substrate is housed within the processing region and the silicon-containing material layer is arranged on the substrate, The process involves forming a plasma emission of the etchant precursor, wherein the plasma emission includes a hydrogen fluoride (HF)-containing plasma, and The method involves bringing the substrate into contact with the hydrogen fluoride (HF)-containing plasma, wherein the features in the silicon-containing material layer are etched by the contact, and the temperature of the substrate support pedestal is maintained at approximately -40°C or below during the semiconductor processing method. A semiconductor processing method, including the following.

19. The etchant precursor is nitrogen trifluoride (NF ３ ), carbon tetrafluoride (CF ４ ), hexafluorobutadiene (C ４ F ６ ), and fluoromethane (CH ３ F), the semiconductor processing method according to claim 18, comprising one or more of the above.

20. Applying bias power while the substrate is in contact with the plasma emitted material of the etchant precursor, wherein the bias power is approximately 1,250 W or more. The semiconductor processing method according to claim 18, further comprising:

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