Substrates, half-bridges, full-bridges, commutation cells, assemblies, and multi-component structures

Abstract

A planar substrate is provided, comprising an electrically insulating ceramic material having a thermal conductivity exceeding 100 W / m·K at a temperature of 25°C.

Description

[Technical Field]

[0001] The present invention relates to a planar substrate, a half-bridge, a full-bridge, a commutation cell, an assembly, and a multi-component structure comprising the substrate. [Background technology]

[0002] Improved substrates are needed for a variety of electronic applications, particularly for power electronics. These improvements may relate to efficiency, power density, reliability, size, or the material costs required for manufacturing.

[0003] In the prior art, substrates are described, for example, in US 2010 / 026098 A1, US 8683682 B2, WO 2019 / 149778 A1, WO 2021 / 047815 A1, WO 2020 / 12028 A1 or EP 3605604 A1. US 2015 / 0257273 A1 describes a multilayer wiring board having a resin substrate. DE 4138214 A1 describes a method for an externally metallized portion. DE 102021129411 A1 describes an arrangement having a substrate. DE 102020203918 A1 shows a power module.

[0004] Conventional substrates do not meet the required or desired requirements. [Overview of the project]

[0005] Some of the above problems can be at least partially mitigated by the substrate described in claim 1. Preferred embodiments of the present invention are described in the dependent claims.

[0006] According to the first embodiment, a planar substrate having an electrically insulating ceramic material is provided. The electrically insulating ceramic material has a thermal conductivity of more than 100 W / m·K at a temperature of 25°C.

[0007] A planar substrate is, in particular, a substrate that is formed flat in accordance with common technical knowledge. Therefore, it can have a lateral extent that is significantly larger than its thickness, for example. For example, the lateral extent can be at least 10 times the thickness.

[0008] In power electronics, it is necessary to dissipate heat from components on or within a substrate. This is particularly important in high-power-density applications such as LED technology, laser diode technology, or so-called submounts in the optical field. The higher the power density, the more heat loss needs to be dissipated. The high thermal conductivity of the substrate of the present invention allows for more efficient dissipation of the resulting heat loss than in substrates with lower thermal conductivity. This enables tighter packing or higher density arrangement of electrical and electronic components within and on the substrate. Therefore, smaller configurations can be achieved. Furthermore, better heat dissipation allows for lower operating temperatures. Therefore, component lifespan can be improved, among other things. In addition, smaller structures can reduce material usage.

[0009] When miniaturizing a substrate, secondary effects can also be utilized. Miniaturization of the substrate, made possible by high thermal conductivity, can consequently shorten the conduction path. This can further lead to a reduction in overall waste heat, because, assuming the resistivity of the conductive materials is the same, the total resistance and, consequently, the heat generated overall can be reduced. The same applies to capacitance and inductance, which enhances the miniaturization effect made possible by high thermal conductivity.

[0010] According to the present invention, in principle, any electrically insulating ceramic material that satisfies the above-mentioned thermal conductivity requirements is suitable. However, as long as electrical insulation is ensured, the highest possible thermal conductivity is preferable. Higher thermal conductivity allows for even better heat dissipation.

[0011] Particularly preferable is the use of a ceramic material having a thermal conductivity of at least 150 W / m·K at 25°C. This allows for even better heat dissipation.

[0012] A particularly preferred material for ceramic materials is aluminum nitride. Therefore, the ceramic material is preferably an aluminum nitride-based ceramic material. The substrate can be referred to as an aluminum nitride-based substrate. Aluminum nitride-based ceramic materials have a thermal conductivity of more than 170 W / m·K at 25°C.

[0013] Aluminum nitride-based ceramic materials can specifically refer to ceramic materials having aluminum nitride (abbreviated as AlN) as the main component. For example, aluminum nitride-based ceramic materials can consist of at least 90% aluminum nitride. Preferably, at least 95% aluminum nitride. More preferably, at least 98% aluminum nitride. They can also consist entirely of aluminum nitride.

[0014] Aluminum nitride-based ceramic materials may have, for example, a thermal conductivity of up to 180 W / m·K. They may have a tensile strength of at least 350 MPa, for example 450-500 MPa. They may have an elastic modulus (Young's modulus) of at least 300 GPa, for example 300-350 GPa. They may have a coefficient of thermal expansion of 4-6 ppm / K, for example 4.5-5.5 ppm / K. They may have a dielectric constant of 7-10, for example 8.5-8.9. 11 ~10 15 It may have a resistivity of Ωcm. It may have a dielectric breakdown strength exceeding 30kV / mm. The loss factor (tanδ) is 2.2 × 10⁻¹⁰. -4 It may be less than 2.0 × 10 -4 It may be less than 1.8 × 10⁻⁶. Dielectric breakdown strength is, for example, 1.8 × 10⁻⁶. -4 It could be any of the above.

[0015] The substrate proposed here may be, for example, a multilayer substrate. This is especially true for aluminum nitride-based substrates.

[0016] The aluminum nitride substrate formed accordingly can be provided as HTCC (high-temperature cofired ceramics).

[0017] In a further embodiment, the upper surface of the substrate is provided with connection points for electrical or electronic components. These components may be active or passive electrical or electronic components. In particular, the substrate is suitable or designed to serve as a carrier for capacitors, silicon carbide semiconductors, NTC temperature sensors, Hall current sensors, or other electronic components.

[0018] In further embodiments, the substrate may have a metallized portion on its upper surface. In particular, the metallized portion may be a structured metal layer on the upper surface of the substrate. For example, the metallized portion can be implemented as a structured copper-containing layer. The metallized portion may comprise a surface coating containing nickel, palladium, and / or gold. The structuring can be used to electrically connect components on the upper surface, for example, using the connection points described above.

[0019] In a further embodiment, vias are optionally or additionally arranged within the substrate, guided through the substrate in the thickness direction. These can also form contacts at connection points. By using vias, the thickness direction of the substrate can be utilized for current conduction (Stromfuehrung). This allows for miniaturization compared to purely surface-based electrical connections of components. This is because current conduction in three dimensions becomes possible. In this way, it is possible to keep the conduction path short, which can lead to the advantages mentioned above. Vias can have a diameter of 50 to 200 μm.

[0020] The via can be designed as a power via. For example, it can be designed as a hollow cylinder whose inner surface is coated with a conductive material. In particular, it may be a metallization having a copper-containing layer. The metallization may further comprise a surface coating comprising nickel, palladium, and / or gold. Alternatively or additionally, the via or power via can be designed as a via completely filled with a filling material. In particular, the filling material may be a conductive material. With respect to this conductive material, the same applies as set forth below for internal electrodes and / or other metal structures in the substrate. Such vias completely filled with a conductive material may particularly be arranged in an array or form an array. Such a via array can provide the advantage of better area utilization.

[0021] According to a further embodiment, at least one internal electrode can be formed in the substrate. The internal electrode and the external metallization can be designed to extend parallel to each other. In both conductors (here the internal electrode or the external metallization), direct currents in opposite directions can flow. This parallel arrangement (parallele Fuehrung) can reduce conduction-induced electromagnetic induction (leitungsgebundenen elektromagnetischen Induktion). In particular, a lower inductance can be achieved if the cross-sectional shape of the internal electrodes is the same in other respects, compared to a case where the internal electrodes are routed adjacent to one another. Alternatively, one of the internal electrodes can also be routed as a conductor or metallization on the outer surface of the substrate.

[0022] Alternatively or additionally, two internal electrodes, namely a first internal electrode and a second internal electrode, can also be formed in the substrate. These can be arranged correspondingly in parallel and can be configured such that direct currents in opposite directions are applied thereto, which provides the same advantages as those described above. In other respects, what has been stated regarding two internal electrodes, or what has been stated regarding one internal electrode and one external metallization portion, can be applied to the other respectively. In general terms, two conductors are formed in the substrate in a manner corresponding to each other.

[0023] Preferably, the two conductors are of planar configuration and their surfaces face each other. Here, the planar configuration can in particular be parallel to the planar configuration of the entire substrate. In particular, the internal electrodes can be formed as layers in a multilayer device. Furthermore, the two conductors are preferably arranged as close to each other as possible. Here, the distance between the conductors can in particular be less than 150 μm, preferably less than 100 μm. This applies particularly to two internal electrodes. The spacing is preferably at least 20 μm. The thickness of the internal electrodes can be 5 to 20 μm.

[0024] Through the measures described above, improved decoupling can be achieved, enabling faster switching.

[0025] In a further embodiment, the first and second internal electrodes may be surrounded by a common shielding cage. The shielding cage may also be called a Faraday cage. The shielding of the signal lines achieved thereby can reduce the coupling of EMI (electromagnetic interference) radiated from other components. Thus, faster switching can be achieved, among other things. Furthermore, other complex measures for filtering can be additionally avoided. As mentioned above, the thermal properties allow for denser packing or denser arrangement of the electronic components. Along with the parallel arrangement of the internal electrodes, the shielding cage can reduce the electromagnetic interactions between components that would normally increase with a denser arrangement.

[0026] According to this embodiment, shielding cages can also be provided for individual internal electrodes arranged inside the substrate. While this offers some advantages, the degree of these advantages is smaller because parallel arrangement is eliminated.

[0027] The shielding cage may have a top and bottom surface designed as a planar metal structure. The planar metal structure may be oriented parallel to the planar direction of the substrate. The sides of the shielding cage may be formed by so-called shielding cage through-contacts. These shielding cage through-contacts may be structurally configured similarly to vias. For example, they may form side bars or side columns of the shielding cage.

[0028] This structure enables efficient shielding and improved switching speed.

[0029] In a further embodiment, the internal electrode is formed from a conductive material that can withstand the sintering temperature when the electrode starting material and the ceramic starting material are sintered together. In other words, the material of the internal electrode can be selected to withstand the sintering step during the manufacturing of the substrate.

[0030] Similarly, all metal structures embedded in a substrate can satisfy this requirement.

[0031] In particular, the internal electrodes and / or all other metallic structures within the substrate may consist of tungsten, molybdenum, tantalum, or niobium. Alternatively, they may be made of alloys containing these materials, or alloys made from these materials, as long as they can withstand the sintering conditions during manufacturing. For aluminum nitride-based HTCC ceramics in particular, the above materials are preferred because they can withstand the sintering conditions of HTCC.

[0032] The proportion of the metal structure within the substrate may be less than 25 volume%, preferably 10 volume% or less, or 5 volume% or less. When the proportion of the metal structure is 10 volume% or less, only slight stress is generated within the substrate.

[0033] In further embodiments, a cooler may be placed on the underside of the substrate. The cooler may be a metal or ceramic structure. The cooler may have a surface-enhancing shape such as fins or lamellae. The cooler can increase the effective surface area of ​​the substrate.

[0034] Such a cooler has the advantage of efficiently dissipating heat distributed by the good thermal conductivity of the substrate into the surroundings. Therefore, a synergistic effect occurs with the substrate. Due to this heat conduction, the generated heat is rapidly and widely dispersed within the substrate. The cooler can absorb heat over a large surface area. Therefore, the need for the cooler itself to distribute heat from the substrate to the surface can be reduced.

[0035] In a further embodiment, the substrate includes an EMI shield. This embodiment is particularly preferred to be combined with an embodiment in which the substrate has a cooling element on the underside. In this case, the EMI shield is preferably embedded between the cooling element and the internal electrodes.

[0036] The EMI shield can particularly contribute to electromagnetic decoupling between the internal electrodes and the cooling body. In this way, the switching speed can be improved. In particular, a switching speed exceeding 30 V / ns can be achieved by the combination of internal electrodes arranged parallel to each other and a shielding cage.

[0037] According to a further embodiment, the substrate has an area of at least 100 mm 2 and a thickness of less than 3 mm. For example, the substrate can have an area of at least 150 mm 2 For example, the substrate can have an area of at least 500 mm 2 For example, the substrate can have an area of at least 1500 mm 2 For example, the area can be 1900 mm 2 or more. The area may also be relatively small. For example, a small substrate can be 500 mm 2 or less, for example 250 mm 2 or less, for example 200 mm 2 or less. The thickness can be any one of 3.0 mm or less, 1.5 mm or less, and 1.2 mm or less. The thickness can be, for example, 0.25 mm or more, particularly preferably 0.3 mm or more. Accordingly, the thickness can be in a range of 0.3 mm to 1.0 mm. When the substrate is a multilayer substrate, the substrate can be formed from ceramic layers having a thickness of 30 μm to 150 μm.

[0038] According to a further preferred embodiment, the cavities can be formed on the upper surface of the substrate. Each cavity is designed to accommodate one or more electrical or electronic components. The cavities preferably include connection points for the electrical or electronic components. The cavity, or particularly the depth of the cavity, can be configured such that the surface of the component is flush with the surface of the substrate on which the cavity is formed. This can facilitate mounting of a capacitor circuit board or a second substrate onto the substrate surface. The depth of the cavity is 30 to 500 μm.

[0039] Within the cavity, the thickness of the substrate is reduced. Therefore, for example, electrical connections via vias with shorter conduction paths may become possible. In this way, the advantage of shorter conduction paths, as described above, can be obtained. When a cooler is attached to the bottom surface, the cavity can further shorten the thermal columnar path toward the cooler.

[0040] Furthermore, the use of cavities allows for the utilization of a three-dimensional structure for arranging electrical or electronic components, thereby enabling a denser spatial arrangement of components.

[0041] In a further embodiment, the embedded temperature measuring unit is embedded below the connection point in the substrate. For example, the embedded temperature measuring unit may be a metal meander.

[0042] The embedded temperature measurement unit enables temperature detection near the connection point or near the attached component.

[0043] Metal meanders are preferably manufactured from tungsten. Metal meanders have the special advantage of having a very short response time to temperature changes. Therefore, emergency shutdown of individual components can be performed quickly, reducing the risk of damage to other components and thus extending the lifespan of the entire substrate or assembly containing the substrate.

[0044] Metal meanders, like other metal internal structures, can be integrated into the layer structure of a multilayer substrate.

[0045] A substrate with good thermal conductivity allows for a more dense arrangement of components, potentially creating empty space within the substrate's volume or on its surface. This empty space allows for the integration of further components, such as embedded temperature measurement units. Therefore, the substrate according to the present invention makes it easier to realize embedded temperature measurement units.

[0046] In further embodiments, cooling channels may be embedded within the substrate. Multiple cooling channels may be embedded within the substrate. The cooling channels can be operated using a cooling fluid, which may include, for example, ethylene glycol and / or water. The cooling channels may be embedded within the substrate as tubular flow paths. In this case, the cooling channels can, in principle, have any suitable path within the substrate. The path within the substrate may be, for example, W-shaped, U-shaped, or meander-shaped. The cross-section of the conductor can be any shape, particularly circular, elliptical, rectangular, or triangular. A circular cross-section has the advantage of allowing for resistance-free flow.

[0047] When combined with a substrate with good thermal conductivity, similar advantages to those described for coolers can be obtained. Because the substrate itself can efficiently distribute heat in the planar direction, it is not necessary to provide a cooling system over as wide an area as is required for substrates with lower thermal conductivity in order to achieve a similar or satisfactory cooling effect. This makes it easier to construct substrates with cooling channels.

[0048] In a further embodiment, the substrate 1 has busbars for DC+ and DC-. These can be integrated into the substrate. By using busbars, the volume of the substrate can be utilized for signal or power conduction. The miniaturization made possible by the substrate according to the present invention makes signal or power conduction using busbars suitable because it eliminates the need to separately arrange conductors. Otherwise, this would require additional volume. Furthermore, the substrate surface, which is densely mounted using the substrate according to the present invention, has less need to accommodate separate electrical contacts.

[0049] The substrate of the present invention is particularly suitable for half-bridge or full-bridge configurations. The substrate can also be used in the configuration of commutation cells or commutation cells (Kommutierungszelle). Thus, a commutation cell, half-bridge, or full-bridge based on or having a substrate is provided.

[0050] In further embodiments, an assembly is provided, which includes a substrate in the configuration described above. Furthermore, electrical and / or electronic components are arranged on the substrate. These may be active or passive components. In particular, when they are arranged within the substrate, they may be arranged within a cavity. A temperature measuring unit may be arranged preferably in close proximity to other components. In particular, in the case of a cavity, such an external temperature measuring unit may be arranged within the cavity together with other components. The appropriately arranged temperature measuring units enable individualized temperature measurement.

[0051] These are preferably used in combination with the embedded temperature measuring unit described above. In particular, if the embedded temperature measuring unit is a metal meander, its short response time and, however, lower absolute measurement accuracy can be complementarily compensated for by an external temperature measuring unit having higher measurement accuracy. For particularly accurate temperature measurement, an NTC temperature sensor is especially preferred as the external temperature detector.

[0052] According to at least one embodiment, a multi-component structure (Mehrkomponentenaufbau) is described, which preferably has two substrates. The first substrate may have all of the above characteristics. It can be used in particular in an assembly consisting of a substrate and further components, as shown in the figure. In that case, the first substrate is used as the lower substrate. The second substrate of the present invention is positioned above or above the first substrate and is in thermal conductive contact with the first substrate.

[0053] In particular, when a cooling element is placed on the lower substrate, heat conduction can occur in a waterfall-like or multi-channel manner from the first substrate. This heat is then released from the cooling element.

[0054] Similarly, good thermal distribution has so far only been achievable by placing a thermally conductive metal distribution layer on the surface of the substrate.

[0055] In one embodiment, particularly suitable for multi-component structures (Mehrkomponentenaufbauten), but not limited thereto, a substrate may have one or more auxiliary vias. These can be designed, for example, as cylindrical openings within the substrate. These auxiliary vias can be used, or formed and configured, to allow sealing material to be introduced onto or around electronic components via the auxiliary vias after the substrate has been placed above the electronic components. Such sealing material can be used for electrical insulation, mechanical stabilization, contact protection, dustproof sealing, and / or moistureproof sealing of electronic components and / or contacts located beneath the substrate having the auxiliary vias. For example, such components can be placed on a substrate within a multi-component structure. A second substrate placed on top of it may have auxiliary vias.

[0056] The embodiments of the present invention, or measurements or simulations related to embodiments, will be described below with reference to the drawings. All drawings herein are purely schematic, and no absolute dimensions or proportions can be derived from them. The present invention is not limited to the illustrated designs. [Brief explanation of the drawing]

[0057] [Figure 1] Figure 1 shows a cross-section of the first embodiment of the substrate. [Figure 2] Figure 2 shows a cross-section of the second embodiment of the substrate. [Figure 3] Figure 3 is a plan perspective view of the substrate according to the second embodiment. [Figure 4]Figure 4 shows a third embodiment of the substrate. [Figure 5] Figure 5 shows a fourth embodiment of the substrate. [Figure 6] Figure 6 shows a first embodiment of the assembly. [Figure 7] Figure 7 shows a second embodiment of the assembly. [Figure 8] Figure 8 shows a fifth embodiment of the substrate. [Figure 9] Figure 9 is a schematic diagram illustrating an integrated busbar. [Figure 10] Figure 10 shows the layered structure of the busbar in Figure 9. [Figure 11] Figure 11 shows a three-phase commutation cell. [Figure 12] Figure 12 shows a fourth embodiment of the assembly. [Figure 13] Figure 13 shows a fifth embodiment of the assembly. [Figure 14] Figure 14 shows a sixth embodiment of an assembly having a control board. [Figure 15] Figure 15 shows an embodiment of a multi-component structure. [Figure 16] Figure 16 shows a full bridge. [Figure 17] Figure 17 shows the heat distribution within the AlN substrate. [Figure 18] Figure 18 shows the heat distribution within the glass-ceramic substrate of the comparative example. [Figure 19] Figure 19 shows the current distribution at an internal location. [Figure 20] Figure 20 shows the current distribution in the inner layer. [Figure 21] Figure 21 shows the temperature distribution within the substrate. [Figure 22] Figure 22 shows the statistical warpage behavior of an aluminum nitride-based multilayer substrate. [Figure 23] Figure 23 shows the first cross-sectional microscope image of the substrate. [Figure 24] Figure 24 shows a second cross-sectional microscope image of the substrate. [Figure 25] Figure 25 shows a comparative measurement of the current-voltage behavior of a metal oxide field-effect transistor. [Figure 26] Figure 26 shows a comparative measurement of the temperature-power behavior of a metal oxide field-effect transistor. [Figure 27] Figure 27 shows a part of one embodiment of the substrate. [Figure 28] Figure 28 shows a part of an embodiment of a commutation cell. [Figure 29] Figure 31 is a schematic cross-sectional view showing an embodiment of a power via. [Figure 30] Figure 30 shows an embodiment of a circuit board. [Figure 31] Figure 31 is a schematic cross-sectional view showing an embodiment of a via array. [Figure 32] Figure 32 is a schematic cross-sectional view showing one embodiment of a via array and power vias. [Modes for carrying out the invention]

[0058] Figure 1 shows an aluminum nitride substrate 1. This includes a substrate body 2 having an upper surface 21 and a lower surface 22.

[0059] The substrate has a thickness of 0.3 to 3.0 mm, for example, 0.3 to 1.0 mm. The thickness can be, for example, 300 μm, 850 μm, or 1000 μm. The planar dimensions can be 4 inches or 8 inches. For example, it can be 54 mm × 41 mm. Alternatively, the area can be 56 mm × 42 mm. Alternatively, the area can be 40 mm × 26.5 mm. Alternatively, the area can be 85 mm × 85 mm. Smaller substrates can be, for example, 150 mm. 2 ~200mm 2 It may also have an area of ​​.

[0060] The ceramic material of the aluminum nitride substrate 1 is aluminum nitride. Substrate 1 is formed as a multilayer substrate by an HTCC sintering process. In addition to the green film-based manufacturing method, 3D printing technology can be used to manufacture the substrate. By using 3D printing technology, both ceramic structures and, in some cases, metallic structures can be realized within the substrate.

[0061] The substrate 1 of the embodiment has a thermal conductivity of 170-180 W / m·K at 25°C. Its bending stress (Biegespannung) is 450-500 MPa. Its Young's modulus is 320 GPa. Its coefficient of thermal expansion is 4.7 ppm / K. Its dielectric constant is approximately 8.7. Its resistivity is 10 at 280°C. 13 The coefficient of dielectric strength is Ωcm. The dielectric breakdown strength exceeds 30kV / mm. The loss factor tanδ is 2.0 × 10⁻⁶. -4 That is the case.

[0062] In particular, the thermal expansion coefficient of aluminum nitride is close to that of silicon carbide, gallium nitride, or silicon. This reduces the thermomechanical forces between the substrate and the components or parts (Komponenten) placed on the substrate.

[0063] As an alternative substrate, a substrate with a thermal conductivity exceeding 100 W / m·K, such as a substrate with a thermal conductivity of 100-180 W / m·K, can also be used.

[0064] The substrate according to the present invention can be used in a wide variety of power electronics applications, for example, in submounts in LED / laser diode technology and in the optical field, and can dissipate the heat loss generated. Several hundred amperes / mm² 2 This allows for the generation of a current density of up to 400 watts / cm². 2 A heat flux density of up to 1000 A / mm can be generated. With the substrate according to the present invention, for example, a maximum of 1000 A / mm can be achieved. 2Alternatively, a current density higher than that can be achieved without thermal damage to the substrate or any components inside or on it. In particular, at such current densities, the substrate according to the present invention, in combination with other means, can maintain an operating temperature of less than 200°C.

[0065] Figures 2 and 3 show a substrate 1 that can possess all the characteristics of the substrate in Figure 1 (first embodiment). Figure 2 is a cross-sectional view. Figure 3 is a perspective view of the substrate 1.

[0066] The substrate 1 in Figures 2 and 3 has a metallized portion 3 on the substrate body 2. The metallized portion 3 is a copper layer and optionally has a nickel-palladium-gold coating on its surface. Alternatively, a nickel-gold coating may be used. The total thickness of the coating is 100 μm.

[0067] As shown in Figure 3, the metallized portion 3 may be structured and formed as a surface conductor path suitable for connecting electrical or electronic components.

[0068] Figure 4 shows a further substrate 1, which can also have the characteristics of the substrate described above. Specifically, it has a substrate body 2. A high-side switch, a low-side switch, and a connection are realized on or inside this substrate. The phase AC voltage is tapped at the switch node.

[0069] The illustrated approach allows for the creation of smaller substrates than conventional techniques that use substrates with lower thermal conductivity. This enables the achievement of higher power output density and an extended temperature range up to 200°C by leveraging new geometric design freedoms. As described in more detail below, the conductive layers in the illustrated substrate can be realized by a multilayer structure. Therefore, the loop inductance of the formed commutation circuits or control lines can be significantly reduced in both conduction and signal paths. Furthermore, area can be saved by routing the conductors within the ceramic substrate.

[0070] Figure 5 shows a further embodiment of the substrate 1. The substrate 1 basically has the structure shown in Figure 2 or Figure 3. Figure 5 shows a cross-sectional view of the substrate 1, in which the internal components of the substrate are shown exposed. This exposed display is solely for the purpose of improving the visibility of the components embedded in the substrate. The portions of the components that extend within the physical part of the substrate body 2 are shown in gray (or with dashed lines) relative to the exposed portions.

[0071] A metallized portion 3 is formed on the surface of the substrate 1. The first internal electrode 4 and the second internal electrode 5 extend into the substrate 1. Both are embedded in the substrate 1 as a metal layer. The first internal electrode 4 may be a gate contact in particular. The internal electrode 5 may be a signal line, such as a Kelvin source contact. The widths of the internal electrodes 4 and 5 may be 0.05 mm to 50 mm. Both internal electrodes are arranged in parallel. Furthermore, they are configured in a planar manner. The distance between the two electrodes is, for example, 90 μm. A common shielding cage 6 is formed around both conductors. This consists of a cage upper surface 61 and a cage lower surface 62, as well as a shielding cage through-contact 63. The cage upper surface 61 and the cage lower surface 62 are formed in a planar manner. The shielding cage through-contact is formed perpendicular to the planar direction, along the sides of the cage upper surface 61 and the cage lower surface 62. The sides of the shielding cage are formed in this manner.

[0072] Furthermore, the substrate 1 includes an EMI shield 7 embedded in the substrate body 2.

[0073] Here, the structures embedded in the substrate body 2 are all made of tungsten, molybdenum, niobium, or tantalum.

[0074] The selected structure can reduce electromagnetic interaction, thereby increasing the switching speed. In particular, parallel-arranged current lines can have a reduced electromagnetic footprint, especially when current flows through them in the opposite direction. This is further reduced by the shielding cage 6. Shielding against larger metal structures on the underside, such as a cooler, can be achieved by the EMI shield 7.

[0075] The structure shown here can enable high-speed switching of up to 30 V / ns, or even beyond 30 V / ns. Furthermore, it does not require additional electrical, electronic, or structural filtering. For comparison, conventionally known designs can only achieve a switching speed of 5 V / ns.

[0076] Figure 6 shows an embodiment of assembly 100. Assembly 100 has a substrate 1 which can have the characteristics described above. Component 10, which may be an electrical or electronic component, is electrically connected by a metallized portion 3. In particular, component 10 can be directly connected to a part of the metallized portion 3 via the bottom surface. Component 10 is connected to an electrically isolated portion of the metallized portion 3 via bonding wires 14b. Furthermore, it has been shown that the component generates a certain thermal output during operation. This can be dissipated through the substrate 1 according to the present invention in the width direction and the bottom direction. Here, a bottom metallized portion 3' is located on the bottom surface. This can be implemented in any way. As long as it does not have an electrical function, it can be formed as a planar metallized portion. A cooler 8 is located on the bottom surface of the substrate 1. This has a surface area expansion structure, such as fins or lamellae. These are used for thermal radiation. Due to the high thermal conductivity of the aluminum nitride substrate 1, the heat generated by the electronic component 10 can be efficiently distributed and directed to the cooler.

[0077] Figure 7 shows a further embodiment of assembly 100. In particular, assembly 100 has an aluminum nitride-based ceramic substrate 1, which can have the characteristics described above. Power electrodes 12 are arranged within the substrate body 2. These are connected in parallel (Parallelschaltung) to enable high power conduction. Vias 13 are also arranged within the substrate. In this embodiment, cavities 9 are further formed within the substrate. Connection points for electronic components 10 and capacitors 11 are formed within the cavities 9. The cavities shorten the conduction paths in the thickness direction. Furthermore, they can shorten the thermal columnar paths to the bottom surface of the substrate where a cooler can be placed.

[0078] Component 10 can be directly connected to the surface metallized portion 3 formed within the cavity. Other parts can be connected to other parts of the metallized portion via wiring 14a. The wiring 14a shown here has the advantage of having a higher current capacity and a flatter geometric profile compared to ordinary bonding wires. This can be achieved by flat, thick wire bonding.

[0079] A capacitor 11 is located within the cavity 9. It is connected by solder via an exposed internal electrode structure 12i. Partially, it is connected to the surface metallized portion 3 via a corresponding via 13'. For the corresponding structure, it is particularly preferable that the capacitor 11 can continuously handle a high ripple voltage at high currents up to 10 A / μF. In particular, a CeraLink brand capacitor from TDK Electronics AG can be used.

[0080] The electronic component 10 shown in the center is connected to another smaller electronic component 10 located in a shallower cavity.

[0081] The depth of the cavity can be designed so that the top surface of the electronic component 10 is at the same height as the substrate surface.

[0082] All conductive structures shown herein and mounted within the substrate body 2 can be formed from tungsten in particular. All metallized portions 3 on the surface can be configured as described above.

[0083] Figure 8 shows a further substrate 1, which has the same properties as the substrate in Figure 1. Furthermore, a metal meander 15 is integrated into the substrate. It is shown here exposed for better visibility; however, in reality, it is embedded in the substrate and covered with a ceramic material. The metal meander is preferably located below the connection points of electronic components, and therefore, particularly preferably, below the cavity. The metal meander has a fast response time to temperature changes.

[0084] Figures 9 and 10 show diagrams of busbars. In particular, as seen in the unfolded view of Figure 10, the positive voltage conductive vias 13a and negative voltage conductive vias 13b are guided through the substrate 1 in the thickness direction. Each via 13a and 13b alternately makes electrical contact with the metal layer in the alternating layers. Specifically, the positive voltage conductive via 13a is electrically connected to the positive voltage conductive busbar layer 12a. Accordingly, the negative voltage conductive via 13b is electrically connected to the negative voltage conductive busbar layer 12b. Each of these layers contains a ceramic layer and a metallized portion. Layers 12a and 12b are stacked alternately. Instead of the power electrodes shown in Figure 7, such busbars or busbar electrodes can be integrated into the substrate in a similar manner.

[0085] Figure 11 shows a three-phase commutation cell (dreiphasige Kommutierungszelle) as an example of assembly 100 or a multi-component structure. To facilitate understanding and clearly illustrate the structure, some components have been omitted. Therefore, each part of the commutation cell (left, center, and right) has the following components. A common substrate 1, which is an aluminum nitride substrate having a substrate body 2, contains several electronic components, which are described in more detail below. Furthermore, a circuit board 1' is positioned above substrate 1, or on a higher part of the substrate, and above partially embedded components. These circuit boards 1' are also aluminum nitride substrates according to the present invention and possess corresponding basic characteristics. In the left portion of the three-phase commutation cell, the circuit board and the capacitor 11 positioned on the circuit board are omitted. In the center portion, only the capacitor 11 is not shown. The right portion fully shows all components. For the complete structure, it is necessary to consider the omitted parts.

[0086] Each of the three-phase commutation cell sections has an external connection 17. Each of the three-phase commutation cell sections has one Hall current sensor 10b.

[0087] Circuit board 1' has negative voltage conducting vias 13a and positive voltage conducting vias 13b. These can be implemented as so-called power vias. They are used for current conduction perpendicular to the thickness direction of circuit board 1', thereby enabling short current conduction paths. The following descriptions with respect to Figures 28 and 29 can be applied to power vias. Alternatively, the following descriptions can be applied with respect to Figures 30 to 32.

[0088] Furthermore, the circuit board 1' may have one or more auxiliary vias 13''. As shown in Figure 11, here two such auxiliary vias 13'' are formed within the circuit board 1'. The auxiliary vias 13'' do not transmit voltage. The auxiliary vias 13'' may be formed and configured to introduce a vergussmaterial through the auxiliary vias 13'' after the circuit board 1' has been assembled over substrate 1 and the electronic components placed on substrate 1. Such a vergussmaterial can be used for electrical insulation, mechanical stabilization, contact protection, dustproof sealing, and / or moistureproof sealing of the electronic components and / or contacts located between substrate 1 and the circuit board 1'.

[0089] The capacitor 11 is positioned on corresponding negative wires 17a and positive wires 17b. In this case, the capacitor 11 is designed as a capacitor consisting of separable capacitor substructures. Therefore, the capacitance of the capacitor can be adjusted to suit a specific application.

[0090] The cavities 9 are realized within the substrate. Silicon carbide semiconductors 10a, acting as electronic components, are embedded within these cavities. The NTC temperature sensor 16 is positioned adjacent to one of the silicon carbide semiconductors 10a. By positioning the temperature sensor 16 very close to the silicon carbide semiconductors 10a, accurate temperature measurement can be achieved. By mounting multiple such temperature sensors at different points on the substrate, particularly near electronic components, spatially resolved and accurate temperature measurement can be achieved. This is facilitated by the fact that current substrate designs can be particularly space-saving. Therefore, temperature sensors can be placed next to components without unnecessarily increasing the size of the substrate.

[0091] Particularly preferably, in addition to the NTC temperature sensor, the aforementioned metal meander is also used for temperature measurement.

[0092] The commutation cell according to the illustrated invention has advantages over known structures. For example, conventionally used commutation circuits are difficult to miniaturize due to structural and regulatory constraints (Randbedingungen) of the semiconductors (modules) and capacitors, which increasingly generates unfavorable overvoltages (up to 25% UDC) at higher switching frequencies, and these overvoltages then have to be compensated again by an additional filtering burden. At the same switching speed, the overvoltage is proportional to the commutation inductance or commutation inductance. Conventionally known modules had a commutation inductance of 5nH to 30nH per transistor branch. The commutation cell according to the illustrated invention can have a commutation inductance of less than 5nH per transistor branch. For the entire module with parallel-connected transistor branches, this corresponds to a value of less than 1nH.

[0093] Figure 12 shows another embodiment of the busbar. Busbar electrodes 12 are arranged within the substrate body 2. Electrical contact is made via vias 13. Capacitors 11 are arranged above, which may correspond to the capacitors mentioned above.

[0094] A modified version of the structure shown in Figure 12 is shown in Figure 13. Here, an additional capacitor 11' is placed between the conductors to compensate for the lateral current between the phases.

[0095] Figure 14 shows a multi-component structure. The configuration of assembly 100 corresponds to that described in Figure 7. The controller board 18 is placed on top of assembly 100. By matching the height of the cavity to the components, the distance between the controller board 18 and the substrate 1 can be reduced.

[0096] Figure 15 shows a further multi-component structure. This includes an assembly 100 consisting of a lower substrate 1 among the multiple substrates 1 shown and a component 10 placed in a cavity within the substrate 1. The depth of the cavity is selected so that the surface of the component 10 and the surface of the lower substrate are flush with each other. A further substrate 1 is placed on the upper surface of the lower substrate 1. Both substrates are thermally bonded. Since both substrates are aluminum nitride-based and have high thermal conductivity, heat is not only dispersed within the lower substrate of the two substrates 1, but the upper substrate can also contribute to the planar distribution of heat, thereby creating a waterfall-like heat distribution structure. The planar arrangement of the component and the substrate surface promotes heat dissipation. Therefore, the substrate according to the second invention can replace a metallic heat distribution layer.

[0097] Furthermore, the electrical connection of component 10 can be achieved via the upper of the two circuit boards, eliminating the need for additional wiring.

[0098] Figure 16 shows a full bridge. This is based on the assembly shown in Figure 11, although the components may differ slightly from each other. The substrate 1 used here has a cooling channel 19 embedded inside. In particular, the cooling channel inlet 19a and cooling channel outlet 19b are shown. In this way, the substrate can be cooled with a cooling fluid consisting of a mixture of ethylene glycol and water. The internal path of the cooling channel is arbitrary. In particular, this internal path may extend in a W-shape within the substrate. The good thermal conductivity of the substrate is advantageous for a simple shape of the cooling channel.

[0099] Figure 17 shows the temperature distribution within the aluminum nitride substrate.

[0100] Figure 18 shows the temperature distribution in a glass-ceramic comparison substrate simulated under the same initial conditions.

[0101] A comparison of temperature distributions clearly shows that using an aluminum nitride substrate allows for far more efficient dissipation of heat input from the components.

[0102] Figures 19, 20, and 21 show the current distribution, voltage distribution, and resulting temperature distribution for the aluminum nitride substrate according to the present invention, respectively. High current density is simulated in a small cross-sectional area of ​​the substrate. A total power of 240W is simulated using a current of 500A. The resistance is 0.5Ω. Furthermore, at the point of maximum current density, only a temperature rise of 7K is observed.

[0103] Figure 22 shows a statistical evaluation of the warpage of an aluminum nitride substrate according to the present invention. The substrate length is 55.88 ± 0.09 mm and the width is 42.13 ± 0.06 mm. The metallized layer applied here is 0.11 ± 0.06 mm, corresponding to the metallized portion 3, as shown in Figure 3. As can be seen from the graph, the average warpage is only 125 μm. This can be achieved by pressure-assisted repeated sintering or flat firing.

[0104] Figures 23 and 24 show cross-sectional views of the substrate of the present invention using microscopic images. An aluminum nitride-based ceramic substrate with a thickness of 900 μm and surrounded by Cu terminations on its upper and lower surfaces is visible. The upper Cu termination may correspond to the metallized portion 3 in Figures 2 and 3. Tungsten vias / via towers and internal layers or internal electrodes are visible within the ceramic. The vias and internal electrodes can correspond to the structure described above.

[0105] Figures 25 and 26 show comparative measurements of a commercially available transistor (Infineon CoolMOS P7). The current-voltage behavior (Figure 25) and temperature-power behavior (Figure 26) are compared under a gate voltage of 6V.

[0106] In Figure 25, the line labeled "Mosfet" (solid line; rectangular data points) shows the behavior of a transistor without any substrate. The curve labeled "Mosfet@AlN" (dotted line; diamond-shaped data points) shows the current-voltage behavior of a transistor on a substrate according to the present invention without a thermal reservoir coupling. The curve labeled "Mosfet@Alu Cooler" (dashed line; circular data points) shows the current-voltage behavior of a corresponding transistor directly placed on an aluminum metal thermal reservoir. The line labeled "Mosfet@AlN@Alu" (dotted line; triangular data points) shows a corresponding transistor placed on a substrate according to the present invention, the substrate itself being placed on an aluminum metal thermal reservoir.

[0107] For the same test structure, Figure 26 shows the temperature behavior as a function of applied power, with each notation corresponding to that in Figure 25.

[0108] As can be seen from Figures 25 and 26, the substrate alone can already provide a significant performance improvement. Due to the good thermal connection with the AlN substrate, the Mosfet@AlN configuration can transfer twice the power of a single chip. A comparison of the Mosfet@AlN@Alu curve and the Mosfet@Alu cooler curve shows that the total thermal resistance is hardly affected by the aluminum nitride substrate. The thermal resistance of the aluminum nitride substrate can be determined from the difference between the Mosfet@AlN@Alu curve and the Mosfet@Alu cooler curve. The thermal resistance between the AlN substrate and the thermal reservoir was 1.1 ± 0.5 K / W.

[0109] Figure 27 shows a portion of the substrate 1 having internal electrodes 4 and 5 to further clarify the concept of antiparallel routing for minimizing power inductance. Internal electrodes 4 and 5 are configured as conductors embedded in the substrate 1. Each conductor connects two external terminals 17 to each other. Thus, internal electrode 4, formed as a conductor, connects two diagonally opposite connections 17, and accordingly, internal electrode 5, formed as a conductor, connects the remaining two diagonally opposite external connections 1.

[0110] As illustrated, both conductors are embedded in the substrate. Alternatively, although not illustrated, one conductor may be routed on the outer surface, particularly the surface, while only the other conductor is embedded. In either case, this arrangement has the advantage of achieving smaller inductance than when the conductors are routed adjacent to each other on the same plane, assuming otherwise the same cross-sectional shape.

[0111] Figure 28 shows a portion of a commutation cell similar to that shown in Figure 11. In particular, the circuit board 1' on substrate 1 is shown in detail. What is stated with respect to Figure 11 is applicable here to the extent that it is applicable. Unlike Figure 11, external connections are not implemented, or at least not shown. The number of vias also differs from the arrangement of circuit board 1' in Figure 11. As described above, here the negative voltage conducting via 13a and positive voltage conducting via 13b are configured as power vias. As an example of such vias, as shown in Figure 29, the power vias are established by a continuous metallized portion connecting the conductor structure on the upper surface of circuit board 1' to the conductor structure on the lower surface of circuit board 1'. The surface of the hollow cylinder formed by the via penetration may be covered with copper as a metallized portion, for example. The conductor cross-sectional area can be adjusted by the number and diameter of the vias, as well as the thickness of the metallized layer. In particular, the number of vias shown can also be used to transmit high power from one side to the other of the circuit board, which is one embodiment of the substrate. Cu vias can be easily introduced by process technology by electrolytically discharging copper into cylindrical openings present in the substrate material. Copper has excellent conductivity. The copper layer may be further provided with surface coatings of nickel, palladium, and / or gold.

[0112] Figure 30 shows a circuit board 1' that can be used as a replacement for the circuit board 1' in Figures 11 and 28. Unless otherwise specified, the statements relating to Figures 11 and 28 apply to the circuit board 1' shown herein. The circuit board 1' in Figure 30 largely corresponds to the configuration shown in Figure 28. A tungsten via 13w is formed here instead of the positive voltage conduction via 13b in Figure 28. Negative voltage conduction via 13a can also be replaced with a tungsten via 13w (not shown) as an alternative or additional replacement for the positive voltage conduction via 13b, or in addition to it.

[0113] The tungsten vias 13w are designed here as an array, which is shown in detail, particularly in the cross-sections of Figures 31 and 32. In Figure 31, the tungsten vias are shown independently of the other vias. Figure 32 shows a simplified cross-sectional view through the illustration in Figure 30. As can be seen from Figures 31 and 32, the array of tungsten vias 13w connects the metallized sections 3. The metallized sections 3 described above in Figures 2 and 3 may be applied.

[0114] The inventors have found that in certain designs, it may be advantageous to construct through-contacts penetrating the circuit board 1' using an array of W vias rather than Cu vias. These arrays can also be considered power vias and can replace the power vias described above. They essentially have the same function as the power vias or Cu vias described above and can serve equivalent purposes.

[0115] Tungsten vias 13w offer the advantage of better area utilization. Due to thermomechanical and process technology characteristics, it may be advantageous to set the distance between adjacent vias to 1.5 to 2 times the via diameter in Cu power vias. This may be related, for example, to the different thermal expansion coefficients of the substrate material and copper. Therefore, for Cu vias, for example, the relative area utilization rate of the circuit board can be approximately 1% to 2%.

[0116] In arrays with tungsten vias 13w, thermomechanical constraints are fewer or nonexistent because tungsten and AlN have mutually favorable coefficients of thermal expansion. Furthermore, with tungsten vias 13w, the vias can be completely filled and are not formed as cylindrical hollow vias. Like other tungsten elements, tungsten vias 13w can be constructed, debindered, and sintered directly with the AlN material of the substrate in common steps. In this case, an area utilization rate of 9% to 20% can be achieved. Thus, an area utilization rate approximately an order of magnitude higher or about 10 times higher can be achieved compared to the case of Cu vias. This significant increase can even be compensated for by exceeding the superior electrical conductivity of copper, which has an electrical conductivity approximately three times higher than tungsten.

[0117] In particular, if more than one or a very small number of vias are required, for example, fewer than five or fewer than three vias, it may be advantageous to use tungsten via 13w.

[0118] Essentially, an array consisting of 13W tungsten vias can be used in combination with copper vias. This allows for easy creation of optimized combinations in manufacturing (considering cost and effort) depending on the spatial conditions and power requirements of the application. [Explanation of Symbols]

[0119] 1. Substrat 1' Circuit board (Platine) 2. Main board (Substratkoerper) 3 Metallisierung 4 1st internal electrode (erste Innenelektrode) 5 Second internal electrode (zweite Innenelektrode) 6. Shielding Cage (Abschirmkaefig) 7. EMI Shield (EMI-Schild) 8. Cooling element (Kuehlkoerper) 9 Cavity (Kavitaet) 10 Electrical Components 10a Silicon carbide semiconductor 10b Hall current sensor (Hall-Stromsensor) 11. Capacitor (Kondensator) 11' Capacitor (Kondensator) 12 Power electrodes (Leistungselektroden) 12' Busbar internal electrodes (Busbarinnenelektroden) 12a Positive voltage conducting busbar layer 12b Negative voltage conducting busbar layer 12i Exposed internal electrode structure (freiliegende Innenelektrodenstrukturen) 13 Via 13' Via 13” Hilfsvia 13a Positive conduction via 13b Positive conduction via (negative Spannung fuehrendes Via) 13W Tungsten Beer (Wolfram-Via) 14a Electrical connection (elektrische Verbindung) 14b Bonding wire 15 Metallic Meander 16 NTC Temperature Sensor (NTC-Temperature Sensor) 17. External Connections 17a Negative external connection 17b Positive external connection 18. Control Board 19 Cooling path (Kuehlleitung) 19a Entrance (Einlass) 19b Exit (Auslass) 21 Upper surface (Oberseite) 22 Underside 61 Cage top (Kaefigoberseite) 62 Cage bottom (Kaefigunterseite) 63. Shielding cage-penetrating contacts 100 assemblies

Claims

1. A planar substrate containing an electrically insulating ceramic material having a thermal conductivity exceeding 100 W / m·K at a temperature of 25°C.

2. The thermal conductivity of the substrate is at least 150 W / m·K at 25°C. The substrate according to claim 1.

3. The aforementioned ceramic material is an aluminum nitride-based ceramic material. The substrate according to claim 1 or 2.

4. Connection points for electrical or electronic components are provided on the upper surface of the substrate. A substrate according to any one of claims 1 to 3.

5. The substrate has a metallized portion on its upper surface and / or vias penetrating the substrate in the thickness direction. A substrate according to any one of claims 1 to 4.

6. The via is implemented as a hollow cylindrical copper via. The substrate according to claim 5.

7. The vias are formed as filled tungsten vias and are arranged in an array. The substrate according to claim 5.

8. The aforementioned substrate is a multilayer substrate. A substrate according to any one of claims 1 to 7.

9. The substrate comprises a first internal electrode and a second internal electrode extending parallel to each other within the substrate, and the first internal electrode and the second internal electrode are configured such that DC currents with opposite directions flow through the internal electrodes. A substrate according to any one of claims 1 to 8.

10. The first internal electrode and the second internal electrode are surrounded by a common shielding cage. The substrate according to claim 9.

11. The upper and lower surfaces of the shielding cage are formed from a metal planar structure oriented parallel to the planar direction, and the sides of the shielding cage are formed from through contacts of the shielding cage. The substrate according to claim 9 or 10.

12. The first internal electrode and the second internal electrode are made of an electrically conductive material that can withstand the sintering temperature during co-sintering of the starting material of these electrodes with the starting material of the ceramic material. The substrate according to any one of claims 9 to 11.

13. The first internal electrode and the second internal electrode are made of a material selected from tungsten, molybdenum, tantalum, or niobium, or are made from an alloy containing these materials or an alloy composed of these materials. The substrate according to claim 12.

14. The substrate is equipped with a cooling element on its lower surface. A substrate according to any one of claims 1 to 13.

15. Between the cooling body and the first internal electrode and / or the second internal electrode, an EMI shield is embedded in the substrate. A substrate according to claim 14, having the features described in any one of claims 9 to 13.

16. The substrate is at least 500 mm ２ It has an area and a thickness of 3 mm or less. A substrate according to any one of claims 1 to 15.

17. At least a portion of the connection points are formed as cavities on the upper surface of the substrate, and each cavity is configured to house one or more electrical or electronic components. The substrate according to claim 4.

18. A temperature measuring unit is embedded in the substrate below the aforementioned connection point. A substrate according to any one of claims 4 to 17.

19. The aforementioned embedded temperature measuring unit is a metal meander. The substrate according to claim 18.

20. A cooling passage is embedded within the aforementioned substrate. A substrate according to any one of claims 1 to 19.

21. The DC+ and DC- busbars are integrated within the aforementioned circuit board. A substrate according to any one of claims 1 to 20.

22. Having a first internal electrode surrounded by a shielding cage, A substrate according to any one of claims 1 to 21.

23. EMI shielding, A substrate according to any one of claims 1 to 22.

24. The device comprises a first internal electrode and a second conductor, the second conductor being formed as a second internal electrode or as a metallized portion on its outer surface, and the first internal electrode and the second conductor are arranged parallel to each other so as to reduce power inductance when a DC current is applied. A substrate according to any one of claims 1 to 23.

25. A multilayer aluminum nitride substrate having a thermal conductivity exceeding 100 W / m·K at 25°C, wherein cavities are formed on the upper surface of the substrate, and each cavity is configured to house one or more electrical or electronic components. A connection point for an electrical or electronic component is formed in the lower part of the cavity. At least some of the aforementioned connection points are electrically in contact via vias that penetrate the substrate in the thickness direction. The first internal electrode and the second internal electrode are embedded and extend parallel to each other within the substrate, the first internal electrode and the second internal electrode are configured to carry DC currents in opposite directions, and the first internal electrode and the second internal electrode are surrounded by a common shielding cage. The first internal electrode and the second internal electrode are made of an electrically conductive material that can withstand the sintering temperature during co-sintering of these starting materials with the ceramic material starting material. A cooling body is placed on the lower surface of the substrate, and an EMI shield is embedded in the substrate between the cooling body and the internal electrodes. The DC+ and DC- busbars are integrated within the aforementioned circuit board. substrate.

26. The proportion of the metal structure in the substrate is less than 25 volume%, preferably 10 volume% or less. A substrate according to any one of claims 1 to 25.

27. One or more auxiliary vias are formed within the substrate, and the auxiliary vias are configured to apply a sealing material to electronic components and / or contacts located beneath the substrate via the auxiliary vias. A substrate according to any one of claims 1 to 26.

28. A half-bridge or full-bridge comprising the substrate according to any one of claims 1 to 27.

29. A commutation cell comprising a substrate according to any one of claims 1 to 27.

30. An assembly comprising a substrate according to any one of claims 1 to 27 and an electrical and / or electronic, active or passive component, wherein an external temperature measuring unit is disposed directly around the electrical or electronic component.

31. The external temperature measurement unit is an NTC temperature sensor. The assembly according to claim 30.

32. A multi-component structure comprising a first substrate according to any one of claims 1 to 27 or an assembly according to claim 30 or 31, and a second substrate according to any one of claims 1 to 27, wherein the second substrate is positioned above the first substrate or the assembly.

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