Chip structure and display panel

Abstract

This application discloses a chip structure and a display panel belonging to the field of display technology. The chip structure includes a first substrate, a light-emitting unit, and a color conversion unit. The light-shielding layer in the color conversion unit may include a main body and an extended portion distributed around the main body. Light rays emitted from each sub-light-emitting functional layer in the light-emitting unit are emitted toward the second semiconductor layer, and after the light rays undergo an optical waveguide phenomenon inside the second semiconductor layer, the light rays emitted from the edge of the second semiconductor layer can be absorbed by the extended portion of the light-shielding layer, thereby reducing the probability of light leakage occurring in the chip structure, and thus improving the display effect of a display panel integrating such a chip structure.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a chip structure and a display panel.

Background Art

[0002] With the development of the display technology field, light-emitting diode (English: mini Light-Emitting Diode, abbreviation: LED) display panels have advantages such as pure chromaticity, wide dynamic range, high brightness, high resolution, low operating voltage, low power consumption, long service life, impact resistance, large viewing angle, stable and reliable operation, etc., so LED display panels have become the most advantageous next-generation display medium and are widely applied.

Summary of the Invention

[0003] Embodiments of the present application provide a chip structure and a display panel. The problem of poor display effect of LED display panels in the prior art can be solved, and the technical solutions are as follows.

[0004] In one aspect, a chip structure is provided, the chip structure includes a first substrate, a light-emitting unit, and a color conversion unit, the color conversion unit is located on the light exit side of the light-emitting unit, and the color conversion unit includes a light-shielding layer, a confinement dam layer, a first packaging layer, an optical functional layer, and a second packaging layer, The light-shielding layer is located on one side of the first substrate, the light-shielding layer includes a main body portion and an extending portion disposed surrounding the main body portion, and the main body portion has a plurality of light passing holes, The limiting dam layer is located on the side away from the first substrate of the light-shielding layer, and the limiting dam layer has a plurality of opening regions that correspond one-to-one with the plurality of light-passing holes, the orthographic projection of the opening regions onto the first substrate overlaps with the orthographic projection of the corresponding light-passing holes onto the first substrate, the orthographic projection of the main body onto the first substrate overlaps with the orthographic projection of the limiting dam layer onto the first substrate, and the extended portion protrudes beyond the outer contour of the limiting dam layer in a direction parallel to the first substrate. The first package layer is located between the light-shielding layer and the limiting dam layer, and the first package layer covers the main body and covers at least a portion of the extended portion. The optical functional layer is located within the aperture region, and at least a portion of the optical functional layer is used to convert the color of light rays entering the optical functional layer. The second package layer is located on the side away from the first substrate of the limited dam layer, and the second package layer has a first contact area that contacts the first package layer, and the first contact area is installed surrounding the limited dam layer.

[0005] As one option, the shape of the first contact area is ring-shaped, and the width range of the ring shape is 0.5 microns to 60 microns. The shape enclosed by the outer contour of the first substrate is rectangular, and the length and width of the rectangular shape are both 500 microns or less.

[0006] As one option, the distance between the outer contour of the light-shielding layer and the outer contour of the first substrate in a direction parallel to the first substrate is 20 microns or less.

[0007] As one option, the outer contour of the first substrate is aligned with the outer contour of the light-shielding layer.

[0008] As one option, First SubwayIt has a first side and a second side arranged opposite to each other, and in a direction parallel to the first substrate, the light-shielding layer A part of the outer contour adjacent to the first side and, The first side The distance between is the first distance, and the light-shielding layer The other part of the outer contour adjacent to the second side and, Second side The distance between the first and second distances is the second distance, and the sum of the first and second distances is 5 microns or more.

[0009] As one option, the outer contour of at least one of the first package layer and the second package layer is aligned with the outer contour of the first substrate.

[0010] One option is that there is a distance between the outer contour of at least one of the first package layer and the second package layer and the outer contour of the first substrate.

[0011] As one option, the first substrate outer surface This is a fracture surface, and the fracture surface includes a first fracture portion, a second fracture portion, and a laser-cut portion located between the first fracture portion and the second fracture portion. The first fractured portion and the second fractured portion show traces of fracture caused by applying stress, while the laser-cut portion shows traces of ablation caused by laser cutting.

[0012] As one option, the color conversion unit further includes a filter layer located between the first substrate and the optical functional layer, the filter layer includes a plurality of filter units corresponding one-to-one to the plurality of light-passing holes, and the orthographic projection of the filter units onto the first substrate coincides with the orthographic projection of the corresponding light-passing holes onto the first substrate.

[0013] As one option, the orthographic projections of the optical functional layer and the limiting dam layer onto the first substrate are both located within the orthographic projection of the first package layer onto the first substrate. The filter unit is located on the side of the first package layer away from the first substrate, and a portion of the first package layer is located within the light-passing holes. Alternatively, the filter unit is located on the side of the first package layer facing the first substrate, and at least a portion of the filter layer is located within the light-passing holes.

[0014] As one option, the first package layer has a plurality of auxiliary openings that correspond one-to-one with the plurality of light-passing holes, and the orthographic projection of the auxiliary openings onto the first substrate overlaps with the orthographic projection of the corresponding light-passing holes onto the first substrate. At least a portion of the filter unit is located within the auxiliary opening, and both opposing surfaces of the filter unit are in contact with the first substrate and the optical functional layer, respectively.

[0015] As one option, the orthographic projection of the auxiliary opening onto the first substrate lies within the orthographic projection of the light-passing hole onto the first substrate, and a portion of the first package layer extends into the light-passing hole and covers the inner wall of the light-passing hole, such that the filter unit is positioned at a distance from the light-shielding layer.

[0016] As one option, the light-shielding layer has at least one ring-shaped through groove, and the orthogonal projection of the plurality of light-passing holes onto the first substrate is located within the region enclosed by the orthogonal projection of the ring-shaped through groove onto the first substrate. A portion of the first package layer is located within the ring-shaped through groove.

[0017] As one option, the orthogonal projection of the ring-shaped through groove onto the first substrate lies within the orthogonal projection of the limiting dam layer onto the first substrate.

[0018] As one of the options, the second packaging layer covers the surfaces of the defining dam layer and the optical functional layer facing away from the first substrate, and also covers the outer side surface of the defining dam layer, and the light-emitting unit is located on the side of the second packaging layer facing away from the first substrate, The orthographic projections of the defining dam layer and the optical functional layer onto the first substrate are both located within the orthographic projection of the second packaging layer onto the first substrate.

[0019] As one of the options, the materials of the first packaging layer and the second packaging layer are both inorganic materials.

[0020] As one of the options, the chip structure further comprises a connection layer located on the side of the second packaging layer facing away from the first substrate, the light-emitting unit is located on the side of the connection layer facing away from the first substrate, and the light-emitting unit is fixed to the side of the second packaging layer facing away from the first substrate via the connection layer.

[0021] As one of the options, the light-emitting unit comprises a plurality of sub-light-emitting functional layers in one-to-one correspondence with the plurality of opening regions, and the orthographic projection of each sub-light-emitting functional layer onto the first substrate overlaps with the orthographic projection of the corresponding opening region onto the first substrate.

[0022] As one of the options, the plurality of sub-light-emitting functional layers include a first sub-light-emitting functional layer, a second sub-light-emitting functional layer, and a third sub-light-emitting functional layer, the plurality of sub-light-emitting functional layers emit a first light beam in an operating state, and the first light beam includes at least one of blue light and ultraviolet light, The plurality of opening regions include a first opening region, a second opening region, and a third opening region, the first opening region is disposed corresponding to the first sub-light-emitting functional layer, the second opening region is disposed corresponding to the second sub-light-emitting functional layer, and the third opening region is disposed corresponding to the third sub-light-emitting functional layer, The optical functional layer includes a first color conversion unit for converting first light into red light, a second color conversion unit for converting the first light into green light, and a third color conversion unit for converting or maintaining the first light into blue light, the first color conversion unit is located in the first opening region, the second color conversion unit is located in the second opening region, and the third color conversion unit is located in the third opening region.

[0023] As one of the alternatives, each sub light-emitting functional layer in the plurality of sub light-emitting functional layers includes a first electrode, a first semiconductor layer and a light-emitting layer which are stacked and arranged in a direction perpendicular to and facing the first substrate, The Light-emitting unit further includes a second semiconductor layer and a common electrode layer, the second semiconductor layer is located on the light exit side of the plurality of sub light-emitting functional layers, The second semiconductor layer includes connection portions and auxiliary portions arranged in a direction parallel to the first substrate, the connection portions are arranged in connection with the sub light-emitting functional layers, the auxiliary portions connect the connection portions to each other, the connection portions and the auxiliary portions are of an integral structure, and the common electrode layer is arranged in connection with the auxiliary portions.

[0024] As one of the alternatives, the material of the first semiconductor layer includes P-type doped gallium nitride, and the light-emitting layer is a multiple quantum well layer, The second semiconductor layer includes a first sublayer and a second sublayer which are stacked and arranged in a direction perpendicular to and facing the first substrate, the first sublayer is located between the second sublayer and the light-emitting layer, the material of the first sublayer is N-type doped gallium nitride, and the second sublayer is a gallium nitride buffer layer.

[0025] As one of the alternatives, each of the sub light-emitting functional layers further includes a current expansion layer located between the first electrode and the first semiconductor layer.

[0026] In another aspect, a display panel is provided, the display panel includes a driving backplane and a plurality of chip structures arranged in an array on one side of the driving backplane, and the chip structures are the chip structures described above.

[0027] The beneficial effects of the technical proposal provided in the embodiments of this application include at least the following:

[0028] The chip structure includes a first substrate, a light-emitting unit, and a color conversion unit. The light-shielding layer in the color conversion unit may include a main body and an extended portion distributed around the main body. Light rays emitted from each sub-light-emitting functional layer in the light-emitting unit are emitted toward the second semiconductor layer, and after the light rays undergo an optical waveguide phenomenon inside the second semiconductor layer, the light rays emitted from the edge of the second semiconductor layer can be absorbed by the extended portion of the light-shielding layer, thereby reducing the probability of light leakage occurring in the chip structure, and thus improving the display effect of a display panel integrating such a chip structure. Furthermore, a first package layer is installed between the light-shielding layer and the limiting dam layer, and the first package layer covers the main body of the light-shielding layer and the main body of the light-shielding layer Limited Dam Layer Since the orthographic projection onto the first substrate can overlap, after water oxygen from the external environment penetrates the light-shielding layer, the water oxygen that has entered the interior of the light-shielding layer can be blocked by the first packaging layer, thereby preventing these water oxygen molecules from entering the light-shielding layer. Limited Dam Layer This prevents water from penetrating the light-shielding layer, ensures that water and oxygen that penetrate the light-shielding layer do not corrode the optical functional layer, and further improves the reliability of the optical functional layer and enhances the stability of the chip structure. [Brief explanation of the drawing]

[0029] To more clearly explain the technical concept in the embodiments of this application, the drawings necessary for describing the embodiments will be briefly described below. However, the drawings in the following description are only a few embodiments of this application, and it will be clear to those skilled in the art that other drawings can be obtained based on these drawings without any creative work.

[0030] [Figure 1] This is a plan view of the chip structure provided in the embodiment of the present application. [Figure 2]Figure 1 is a schematic diagram of the film layer structure at A-A' in the chip structure shown. [Figure 3] This diagram illustrates the effect of the optical wave guiding phenomenon occurring inside the second semiconductor layer provided in the embodiment of the present application. [Figure 4] Figure 1 is a schematic diagram of the other film layer structure at A-A' of the chip structure shown. [Figure 5] This is a schematic diagram of the film layer structure of another chip structure provided in this application. [Figure 6] This is a schematic diagram of the film layer structure of another chip structure provided in this application. [Figure 7] This is a schematic diagram of the structure of the first large plate provided in the embodiment of the present application. [Figure 8] This is a schematic diagram of the structure of the first initial wafer provided in the embodiment of the present application. [Figure 9] This is a schematic diagram of the structure of the second initial wafer provided in the embodiment of the present application. [Figure 10] This is a schematic diagram of the structure of the second large plate provided in the embodiment of the present application. [Figure 11] This is a schematic diagram of the structure of the base wafer provided in the embodiment of the present application. [Figure 12] Figure 11 is a partially enlarged view of section B of the base wafer shown. [Figure 13] Figure 12 shows another magnified view of section B of the base wafer. [Figure 14] This is a plan view of another chip structure provided in the embodiments of the present application. [Figure 15] This is a schematic diagram of the outer surface of the first substrate provided in the embodiment of the present application. [Figure 16] This is a plan view of another chip structure provided in the embodiments of the present application. [Figure 17] Figure 16 is a schematic diagram of the film layer structure at C-C' in the chip structure shown. [Figure 18] Figure 16 is a schematic diagram of the film layer structure at D-D' in the chip structure shown. [Figure 19] This is a schematic diagram of the film layer structure of a chip structure provided in other embodiments of the present application. [Figure 20] This is a schematic diagram of a film layer structure of another chip structure provided in other embodiments of the present application. [Figure 21] This is a schematic diagram of a film layer structure of another chip structure provided in other embodiments of the present application. [Figure 22] This is a plan view of a chip structure provided in another embodiment of the present application. [Figure 23] Figure 22 is a schematic diagram of the film layer structure at E-E' of the chip structure shown. [Figure 24] Figure 22 is a schematic diagram of the other film layer structure at E-E' of the chip structure shown. [Figure 25] Figure 22 is a schematic diagram of another film layer structure at E-E' of the chip structure shown. [Figure 26] This is a plan view of a light-emitting unit located on a connecting layer provided in an embodiment of the present invention. [Figure 27] Figure 26 is a schematic diagram of the film layer structure at F-F' of the light-emitting unit shown. [Figure 28] This is a plan view of a light-emitting unit located on another connecting layer provided in an embodiment of the present application. [Figure 29] Figure 28 is a schematic diagram of the film layer structure at G-G' in the light-emitting unit shown. [Modes for carrying out the invention]

[0031] To further clarify the purpose, technical proposal, and advantages of this application, embodiments of this application will be described in more detail below, accompanied by drawings.

[0032] Referring to Figures 1 and 2, Figure 1 is a plan view of a chip structure provided in an embodiment of the present application, and Figure 2 is a schematic diagram of the film layer structure at A-A' of the chip structure shown in Figure 1. The chip structure 000 may include a first substrate 100, a light-emitting unit 200, and a color conversion unit 300. The color conversion unit 300 in the chip structure 000 may be located on the light-emitting side of the light-emitting unit 200. In an implementable embodiment, the color conversion unit 300 in the chip structure 000 may be located on one side of the first substrate 100, and the light-emitting unit 200 in the chip structure 000 may be located on the side of the color conversion unit 300 away from the first substrate 100. In this case, the light rays emitted from the light-emitting unit 200 may be emitted toward the color conversion unit 300 and further emitted after passing through the color conversion unit 300 and the first substrate 100.

[0033] The color conversion unit 300 in the chip structure 000 may include a light-shielding layer 301, a limiting dam layer 302, an optical function layer 303, and a second package layer 305.

[0034] The light-shielding layer 301 in the color conversion unit 300 can be located on one side of the first substrate 100. The light-shielding layer 301 can have a plurality of light-passing holes K1.

[0035] The limiting dam layer 302 in the color conversion unit 300 can be located on the side of the light-shielding layer 301 away from the first substrate 100. The limiting dam layer 302 can have a plurality of aperture regions K2 that correspond one-to-one with a plurality of light-passing holes K1. Here, the orthographic projection of each aperture region K2 onto the first substrate 100 can overlap with the orthographic projection of the corresponding light-passing hole K1 onto the first substrate 100.

[0036] The optical functional layer 303 in the color conversion unit 300 can be located inside the aperture region K2 of the limiting dam layer 302, and at least a portion of the optical functional layer 303 is used to convert the color of light rays entering the optical functional layer 303. Here, light rays emitted from the light-emitting unit 200 in the chip structure 000 are emitted toward the optical functional layer 303, and after the optical functional layer 303 converts the color of these light rays, they can be emitted by passing through the through hole K1 of the light-shielding layer 301.

[0037] The second packaging layer 305 in the color conversion unit 300 can be located on the side of the limiting dam layer 302 away from the first substrate 100. The second packaging layer 305 can package the limiting dam layer 302 and the optical functional layer 303, thereby preventing water oxygen in the external environment from eroding the optical functional layer 303 after it has passed through the limiting dam layer 302, ensuring that the optical functional layer 303 can stably convert the color of light rays, and thus increasing the reliability of the optical functional layer 303.

[0038] In the embodiment of the present application, the light-emitting unit 200 in the chip structure 000 may include a plurality of sub-light-emitting functional layers 200a. The plurality of sub-light-emitting functional layers 200a in the light-emitting unit 200 may include a limiting dam layer. 302 Multiple aperture regions K2 can be represented one-to-one. Here, the light-emitting side of each sub-emitting functional layer 200a can be directed toward the corresponding aperture region K2, and the orthographic projection of each sub-emitting functional layer 200a onto the first substrate 100 can overlap with the orthographic projection of the corresponding aperture region K2 onto the first substrate 100. In one possible case, the orthographic projection of each sub-emitting functional layer 200a onto the first substrate 100 can be located within the orthographic projection of the corresponding aperture region K2 onto the first substrate 100.

[0039] In this case, the light rays emitted from the sub-light-emitting functional layer 200a in the light-emitting unit 200 can all be directed toward the optical functional layer 303 inside the corresponding aperture region K2 in the limiting dam layer 302. Furthermore, since each sub-light-emitting functional layer 200a in the light-emitting unit 200 can emit light rays of the same color, and the types of optical functional layers 303 filled inside the different aperture regions K2 are different, the light rays emitted from the sub-light-emitting functional layer 200a can pass through the different aperture regions K2 and then be converted into light rays of other different colors by the different types of optical functional layers 303.

[0040] Furthermore, the light-emitting unit 200 may further include a second semiconductor layer 200b located on the light-emitting side of a plurality of sub-light-emitting functional layers 200a. Since the light-emitting side of each sub-light-emitting functional layer 200a in the light-emitting unit 200 is all facing the first substrate, each sub-light-emitting functional layer 200a in the light-emitting unit 200 is distributed on the side of the same second semiconductor layer 200b away from the first substrate 100, that is, the second semiconductor layer 200 b This is closer to the first substrate 100 than to the sub-emissive functional layer 200a. Thus, during the process of the sub-emissive functional layer 200a emitting light, the light rays emitted from the sub-emissive functional layer 200a first pass through the second semiconductor layer 200b, and then are emitted toward the color conversion unit 300.

[0041] However, some light rays emitted toward the interior of the second semiconductor layer 200b are prone to generating optical waveguide phenomena within the second semiconductor layer 200b. For example, referring to Figure 3, which is an effect diagram of the generation of optical waveguide phenomena within the second semiconductor layer provided in the embodiment of the present application, some light rays incident on the second semiconductor layer 200b can retrace back and forth multiple times between two opposing planes in the second semiconductor layer 200b, undergo total internal reflection, be transmitted laterally, and finally be emitted from the edge of the second semiconductor layer 200b. However, after the optical waveguide phenomenon occurs inside the second semiconductor layer 200b, the light rays emitted from the edge of the second semiconductor layer 200b are not absorbed by the light-shielding layer 301, and consequently, there is a possibility that light leakage phenomena will easily occur in the chip structure 000.

[0042] In contrast, in the embodiment of the present invention, the light-shielding layer 301 in the color conversion unit 300 needs to extend to the outer contour of the first substrate 100, and the extended light-shielding layer 301 can absorb light rays emitted from the edge of the second semiconductor layer 200b, thereby reducing the probability of light leakage occurring in the chip structure 000.

[0043] Exemplary, as shown in Figure 2, the light-shielding layer 301 may include a main body portion 3011 and an extended portion 3012 distributed around the main body portion 3011. Here, the main body portion 3011 of the light-shielding layer 301 may have a plurality of light-passing holes K1, and the orthographic projection of the main body portion 3011 onto the first substrate 100 may overlap with the orthographic projection of the limiting dam layer 302 of the color conversion unit 300 onto the first substrate 100. The extended portion 3012 of the light-shielding layer 301 protrudes beyond the outer contour of the limiting dam layer 302 in a direction parallel to the first substrate 100.

[0044] In the embodiments of this application, the outer contour of a certain structure refers to the outer boundary of the orthographic projection of this structure onto the plane on which the first substrate 100 is located. For example, the outer contour of the limiting dam layer 302 refers to the outer boundary of the orthographic projection of the limiting dam layer 302 onto the plane on which the first substrate 100 is located. The outer boundary of the orthographic projection of a certain structure onto the plane on which the first substrate 100 is located can usually be formed surrounding a sealed area, and the outer contour of this structure can also be formed surrounding a sealed area. Here, if the extended portion 3012 of the light-shielding layer 301 protrudes beyond the outer contour of the limiting dam layer 302 in a direction parallel to the first substrate 100, the orthographic projection of the limiting dam layer 302 onto the first substrate 100 can be located within the region enclosed by the outer contour of the light-shielding layer 301, and there is a certain distance between the outer contour of the light-shielding layer 301 and the outer contour of the limiting dam layer 302 in a direction parallel to the first substrate 100.

[0045] In one possible scenario, the orthographic projection of the limiting dam layer 302 onto the first substrate 100 may lie within the orthographic projection of the main body portion 3011 onto the first substrate 100 in the light-shielding layer 301, while the orthographic projection of the extension portion 3012 onto the first substrate 100 in the light-shielding layer 301 does not overlap with the orthographic projection of the limiting dam layer 302 onto the first substrate 100. That is, the boundary line between the orthographic projection of the main body portion 3011 in the light-shielding layer 301 and the orthographic projection of the extension portion 3012 onto the first substrate 100 in the light-shielding layer 301 is the outer contour of the orthographic projection of the limiting dam layer 302 onto the first substrate 100.

[0046] In this case, the light rays emitted from each sub-light-emitting functional layer 200a in the light-emitting unit 200 are emitted toward the second semiconductor layer 200b, and after the light rays cause an optical waveguide phenomenon inside the second semiconductor layer 200b, the light rays emitted from the edge of the second semiconductor layer 200b can be absorbed by the extended portion 3012 of the light-shielding layer 301, thereby reducing the probability of light leakage occurring in the chip structure 000, and consequently improving the display effect of the display panel integrating such a chip structure 000.

[0047] Furthermore, after extending the light-shielding layer 301 toward the edge of the first substrate 100, the second package layer 305 in the color conversion unit 300 can no longer package the light-shielding layer 301, and as a result, water oxygen in the external environment is absorbed by the light-shielding layer 301 and Limited Dam Layer It penetrates the optical functional layer 303 via 302, and the optical functional layer 303 This could lead to a loss of function. In response to this, in the color conversion unit 300, it is necessary to install a first package layer 304 between the light-shielding layer 301 and the limiting dam layer 302, and the first package layer 304 can cover the main body portion 3011 of the light-shielding layer 301 and cover at least a part of the extended portion 3012 of the light-shielding layer 301.

[0048] Here, a first package layer 304 is installed between the light-shielding layer 301 and the limited dam layer 302, and the first package layer 304 covers the main body portion 3011 of the light-shielding layer 301 and the main body portion 3011 of the light-shielding layer 301 Limited Dam Layer Since the orthographic projection of 302 onto the first substrate 100 can overlap, after water oxygen from the external environment penetrates the light-shielding layer 301, the water oxygen that has entered the interior of the light-shielding layer 301 can be blocked by the first package layer 304, thereby preventing these water oxygen particles from entering the light-shielding layer 301. Limited Dam Layer This prevents water from entering layer 302, ensures that water and oxygen that have entered the light-shielding layer 301 do not corrode the optical functional layer 303, and further improves the reliability of the optical functional layer 303.

[0049] In this invention, the second package layer 305 in the color conversion unit 300 can come into contact with the first package layer 304, thereby allowing the second package layer 305 to have a first contact area 305a that comes into contact with the first package layer 304, and this first contact area 305a can be installed surrounding the limiting dam layer 302.

[0050] Exemplary, the second package layer 305 can cover the sides of the limiting dam layer 302 and the optical functional layer 303 that are away from the first substrate 100, and can also cover the outer surface of the limiting dam layer 302. The orthographic projections of the limiting dam layer 302 and the optical functional layer 303 onto the first substrate 100 can both be located on the orthographic projection of the second package layer 305 onto the substrate 100. Here, of the second package layer 305, the limiting dam layer 302 The portion located on the outer surface can come into contact with the first package layer 304 on the side facing the first substrate 100. In this way, the cooperation of the first package layer 304 and the second package layer 305 enables sealing of the limiting dam layer 302 and the optical functional layer 303 so that the optical functional layer 303 is not corroded by water oxygen in the external environment.

[0051] As can be seen from the above, the chip structure provided in the embodiment of the present application includes a first substrate, a light-emitting unit, and a color conversion unit. The light-shielding layer in the color conversion unit may include a main body and an extended portion distributed around the main body. Light rays emitted from each sub-light-emitting functional layer in the light-emitting unit are emitted toward the second semiconductor layer, and after the light rays cause an optical waveguide phenomenon inside the second semiconductor layer, the light rays emitted from the edge of the second semiconductor layer can be absorbed by the extended portion of the light-shielding layer, thereby reducing the probability of light leakage occurring in the chip structure, and thus improving the display effect of a display panel integrating such a chip structure. Furthermore, a first package layer is provided between the light-shielding layer and the limiting dam layer, and the first package layer covers the main body of the light-shielding layer and the main body of the light-shielding layer Limited Dam Layer Since the orthographic projection onto the first substrate can overlap, after water oxygen from the external environment penetrates the light-shielding layer, the water oxygen that has entered the interior of the light-shielding layer can be blocked by the first packaging layer, thereby preventing these water oxygen molecules from entering the light-shielding layer. Limited Dam Layer This prevents water from penetrating the light-shielding layer, ensures that water and oxygen that penetrate the light-shielding layer do not corrode the optical functional layer, and further improves the reliability of the optical functional layer and enhances the stability of the chip structure.

[0052] As one option, as shown in Figure 2, the materials of the first package layer 304 and the second package layer 305 in the color conversion unit 300 may both be inorganic insulating materials. Exemplarily, such inorganic insulating materials may include one or more of silicon oxides, silicon nitrides, and silicon nitrogen oxides. The thickness range of both the first package layer 304 and the second package layer 305 may be 0.5 microns to 5 microns. In this way, through the cooperation of the first package layer 304 and the second package layer 305, both the limiting dam layer 302 and the optical function layer 303 can be isolated from the external environment, so that water oxygen in the external environment does not corrode the optical function layer 303.

[0053] In the embodiments of the present invention, the material of the first substrate 100 is glass. For example, the first substrate 100 can transmit light in the visible light band.

[0054] In the embodiments of the present application, the extending surface of the first substrate 100 (i.e., the upper or lower surface of the first substrate 100) may be a flat surface.

[0055] In the embodiment of the present invention, the shape of the region enclosed by the outer contour of the first substrate 100 in the chip structure 000 is rectangular, and the length and width of the rectangle are both 500 microns or less. The length and width of the rectangle may be the same; that is, the shape of the region enclosed by the outer contour of the first substrate 100 may be square. In this case, the overall dimensions of the chip structure 000 are small, and after fixing multiple such chip structures 000 on a drive backplane, it is possible to ensure a high resolution for the resulting display panel. Exemplarily, the length and width of the rectangle may both be in the range of 200 microns to 400 microns. In this case, assuming the overall dimensions of the chip structure 000 are small, it is possible to simplify the manufacturing process of the chip structure 000.

[0056] As one option, within the color conversion unit 300 in the chip structure 000, the shape of the first contact region 305a of the second package layer 305 that contacts the first package layer 304 may be ring-shaped, and the width range of this ring shape is 0.5 microns to 60 microns.

[0057] In a feasible embodiment, the minimum width of the first contact region 305a of the second package layer 305 that contacts the first package layer 304 is the thickness of the second package layer 305 itself. In this case, as shown in Figure 2, the second package layer 305 in the color conversion unit 300 may include a connected first package portion 3051 and a second package portion 3052. Here, the first package portion 3051 can cover the sides of the limiting dam layer 302 and the optical functional layer 303 away from the first substrate 100, i.e., the orthographic projections of the limiting dam layer 302 and the optical functional layer 303 onto the first substrate 100 are both located within the orthographic projection of the first package portion 3051 onto the first substrate 100, and the second package portion 3052 can cover the outer surface of the limiting dam layer 302. Here, the side of the second package portion 3052 in the second package layer 305 that faces the first substrate 100 can come into contact with the first package layer 304. That is, the region of the second package portion 3052 that comes into contact with the first package layer 304 is the first contact region 305a. Here, the width of the first contact region 305a is the thickness of the second package portion 3052, and the thickness of the second package portion 3052 is the thickness of the second package layer 305. On the other hand, the minimum width range of the first contact region 305a that comes into contact with the first package layer 304 of the second package layer 305 may be 0.5 microns to 5 microns.

[0058] In another feasible embodiment, as shown in Figure 4, which is a schematic diagram of another film layer structure in A-A' of the chip structure shown in Figure 1, the second package layer 305 may further include a third package portion 3053, the third package portion 3053 may be connected to the side of the second package portion 3052 away from the first package portion 3051, and the third package portion 3053 may be located on the side of the first package layer 304 away from the first substrate 100. Thus, the first contact region 305a of the second package layer 305 that contacts the first package layer 304 may include not only the side of the second package portion 3052 facing the first substrate 100, but also the third package portion 3053. In this case, the side of the third package portion 3053 that is separated from the second package portion is the outer contour of the second package layer 305. When the outer contour of the second package layer 305 is aligned with the outer contour of the first package layer 304, and the outer contours of both the first package layer 304 and the second package layer 305 are aligned with the outer contour of the first substrate 100, the width of the first contact region 305a of the second package layer 305 that contacts the first package layer 304 is the maximum width, and this maximum width is equal to the distance between the outer contour of the limiting dam layer 302 and the outer contour of the first substrate 100. Furthermore, the distance between the outer contour of the limiting dam layer 302 and the outer contour of the first substrate 100 needs to be 60 microns or less in order to ensure that the distance between two pixels of the subsequently obtained display panel is close. Therefore, the maximum width range of the first contact region 305a of the second package layer 305 that contacts the first package layer 304 also needs to be 60 microns.

[0059] As can be seen from this, the width range of the first contact region 305a of the second package layer 305 that contacts the first package layer 304 is 0.5 microns to 60 microns.

[0060] Furthermore, in the color conversion unit 300, the first package layer 304 and the second package layer 305 may both undergo patterning during the manufacturing process, or neither may undergo patterning, or one may undergo patterning while the other does not.

[0061] For example, if the first package layer 304 and the second package layer 305 undergo a patterning process, and the purpose of the patterning process is to form the second dicing channel pattern in a subsequent embodiment, then the first package layer 304 and the second package layer 305 can be formed using the same patterning process. That is, after the manufacturing of both the first package layer 304 and the second package layer 305 is completed, the patterning process is performed on both the first package layer 304 and the second package layer 305 simultaneously. In this case, the outer contour of the second package layer 305 is aligned with the outer contour of the first package layer 304.

[0062] Furthermore, for example, if neither the first package layer 304 nor the second package layer 305 undergoes patterning, in subsequent embodiments, during the process of forming a single chip structure 000 by a cutting process, it is necessary to simultaneously cut both the first package layer 304 and the second package layer 305. In this case, the outer contour of the second package layer 305 will also be aligned with the outer contour of the first package layer 304.

[0063] As one option, the chip structure 000 may further include a connecting layer 400 located on the side of the second package layer 305 away from the first substrate 100. Here, the light-emitting unit 200 in the chip structure 000 may be located on the side of the connecting layer 400 away from the first substrate 100, and the light-emitting unit 200 may be fixed to the side of the second package layer 305 away from the first substrate 100 via the connecting layer 400.

[0064] In this invention, the color conversion unit 300 and the light-emitting unit 200 within the chip structure 000 are manufactured independently, and then the chip structure 000 is obtained by fixing them together via a connecting layer 400.

[0065] In some examples, first, multiple color conversion units 300 can be formed on a large, integrally connected second substrate, and a connecting layer 400 can be formed on the side of each color conversion unit 300 away from the second substrate. Then, multiple light-emitting units 200 can be formed on a third substrate (usually a sapphire substrate or a silicon-based substrate). After that, the third substrate is removed, and the light-emitting units 200 are fixed to the side of the corresponding color conversion unit 300 away from the second substrate via the connecting layer 400. Finally, multiple chip structures 000 can be obtained by cutting the second substrate through a cutting process.

[0066] As one option, the connecting layer 400 in the chip structure 000 may include one of the following: an indium zinc oxide connecting layer, a metal connecting layer, and an adhesive layer. The principle by which the connecting layer 400 fixes the color conversion unit 300 and the light-emitting unit 200 will also differ for different types of connecting layers 400. In contrast, the embodiments of the present application schematically illustrate the following three types of possible situations as examples.

[0067] In the first possible scenario, if the connecting layer 400 includes an adhesive layer, the connecting layer 400 has a single-layer structure, and the color conversion unit 300 and the light-emitting unit 200 can be bonded together by the adhesive layer. Exemplarily, the material of the adhesive layer 133 is an epoxy resin-based organic adhesive material. Furthermore, since such an adhesive layer is transparent, even if the adhesive layer covers each sub-light-emitting functional layer 200a in the light-emitting unit 200, it is possible to ensure that each sub-light-emitting functional layer 200a, after passing through the adhesive layer, is emitted toward the corresponding aperture region K2.

[0068] In the second possible scenario, refer to Figure 5, which is a schematic diagram of the film layer structure of another chip structure provided in the present application, where the connecting layer 400 includes an indium zinc oxide connecting layer, the connecting layer 400 may include a first indium zinc oxide layer 401 and a second indium zinc oxide layer 402 that are stacked. Here, the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 can be connected by the bonding action of molecular bonds.

[0069] Here, the first indium zinc oxide layer 401 can be fixed to the side of the color conversion unit 300 away from the first substrate 100, and the second indium zinc oxide layer 402 can be fixed to the light-emitting side of the light-emitting unit 200. In this way, the bonding action of molecular bonds between the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 makes it possible to fix the color conversion unit 300 and the light-emitting unit 200.

[0070] Furthermore, since both the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 are transparent conductive layers, even if both the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 cover each sub-light-emitting functional layer 200a in the light-emitting unit 200, each sub-light-emitting functional layer 200a Light emitted from It is also possible to ensure that, after permeating through the second indium zinc oxide layer 402 and the first indium zinc oxide layer 401, the material is emitted toward the corresponding aperture region K2.

[0071] In a third possible scenario, refer to Figure 6, which is a schematic diagram of a film layer structure of another chip structure provided in the present application, where the connecting layer 400 includes a metal connecting layer, the connecting layer 400 may include a first submetal layer 403, a second submetal layer 404, and a third submetal layer 405 that are laminated, the second submetal layer 404 may be located between the first submetal layer 403 and the third submetal layer 405, and may be a eutectic alloy layer connecting the first submetal layer 403 and the third submetal layer 405.

[0072] Here, the first submetal layer 403 can be fixed to the side of the color conversion unit 300 away from the first substrate 100, and the third submetal layer 405 can be fixed to the light-emitting side of the light-emitting unit 200. In this way, by integrally connecting the first submetal layer 403 and the third submetal layer 405 with the eutectic alloy layer (and the second submetal layer 404), fixation between the color conversion unit 300 and the light-emitting unit 200 can be achieved.

[0073] Furthermore, since the first sub-metal layer 403, the second sub-metal layer 404, and the third sub-metal layer 405 are all conductive layers with light reflectivity, it is necessary to install multiple avoidance holes K4 in the connecting layer 400 that correspond one-to-one with multiple sub-light-emitting functional layers 200a in the light-emitting unit 200, in order to ensure that the light rays emitted from each sub-light-emitting functional layer 200a can pass through the corresponding avoidance holes K4 and then be emitted toward the corresponding aperture region K2.

[0074] As one option, the light-emitting unit 200 in the chip structure 000 may include multiple light-emitting chips, and each light-emitting chip may have one sub-light-emitting functional layer 200a. Here, the light-emitting chip is an LED chip. The LED chip may be a standard-sized LED chip, a mini light-emitting diode (mini-LED) chip, or a micro light-emitting diode (Micro-LED) chip. The embodiments of this application are not limited to these.

[0075] The following examples schematically describe the manufacturing process of the chip structure 000, using as an example that the connecting layer 400 includes a first indium zinc oxide layer 401 and a second indium zinc oxide layer 402. Here, the manufacturing process of the chip structure 000 may include the following structural steps.

[0076] In step S101, a first indium zinc oxide layer 401 is formed on the color conversion unit 300.

[0077] In the embodiment of the present application, in the manufacturing process of the color conversion unit 300, as shown in Figure 7, which is a schematic diagram of the structure of the first large plate provided in the embodiment of the present application, a first large plate M including a plurality of array-arranged color conversion units 300 can be formed synchronously first. Subsequently, a first indium zinc oxide layer 401 can be formed on each color conversion unit 300 in the first large plate M, for example, by a photolithography process. Subsequently, a plurality of first initial wafers E can be obtained by cutting the first large plate M. Here, each first initial wafer E may include a second substrate, color conversion units 300 distributed on the second substrate, and a first indium zinc oxide layer 401 distributed on the side of each color conversion unit 300 away from the second substrate.

[0078] Exemplary, as shown in Figures 7 and 8, Figure 8 is a schematic diagram of the structure of a first initial wafer provided in an embodiment of the present application. The shape of the first initial wafer E may be circular, and multiple first initial wafers E can be cut from the first large plate M by performing a special shape cutting on the first large plate M.

[0079] In step S102, a second indium zinc oxide layer 402 is formed on the light-emitting side of the light-emitting unit 200.

[0080] In the embodiment of the present invention, the light-emitting unit 200 is formed on a third substrate, and before removing the third substrate, it is necessary to form a temporary substrate on the side of the light-emitting unit 200 away from the third substrate. After forming the temporary substrate, the third substrate can be peeled off from the light-emitting unit 200. The light-emitting unit 200 with the temporary substrate can be called an initial light-emitting unit. That is, the light-emitting unit 200 can be obtained after removing the temporary substrate from the initial light-emitting unit.

[0081] In one example, as shown in Figure 9, which is a schematic diagram of the structure of a second initial wafer provided in an embodiment of the present invention, in the manufacturing process of the initial light-emitting units, a plurality of light-emitting units 200 are formed in an array on a circular third substrate, and then a temporary substrate is formed on the side of the plurality of light-emitting units 200 away from the third substrate to obtain a plurality of initial light-emitting units. Here, the temporary substrates in each initial light-emitting unit can be connected integrally, that is, the temporary substrate may be a single substrate with a relatively large area, and the shape of the temporary substrate may be circular. Finally, a second initial wafer containing a plurality of initial light-emitting units can be obtained by forming a second indium zinc oxide layer 402 on the side of each initial light-emitting unit away from the temporary substrate.

[0082] In another example, during the manufacturing process of the initial light-emitting unit, as shown in Figure 10, which is a schematic diagram of the structure of a second large plate provided in an embodiment of the present invention, a second large plate N containing a plurality of array-arranged initial light-emitting units can be formed synchronously first. Subsequently, a second indium zinc oxide layer 402 is formed on each initial light-emitting unit in the second large plate N, where the second indium zinc oxide layer 402 can be formed on the side of each initial light-emitting unit away from the temporary substrate of the light-emitting unit 200, for example, by a photolithography process, a first indium zinc oxide layer 401 can be formed on each color conversion unit 300. Subsequently, a plurality of second initial wafers F can be obtained by cutting the second large plate N. Here, each second initial wafer F may include a plurality of initial light-emitting units and a second indium zinc oxide layer 402 located on each initial light-emitting unit.

[0083] For example, the shape of the second initial wafer F may be circular, and multiple second initial wafers F can be cut from the second large plate N by performing a special shape cutting on the second large plate N. The shape of each second initial wafer F can be seen by referring to the second initial wafer F shown in Figure 9.

[0084] Furthermore, the temporary substrates within each initial light-emitting unit in the second initial wafer F can be connected integrally. That is, the temporary substrate may be a large substrate with the same area as the shape of the second initial wafer F, and each light-emitting unit 200 in the second initial wafer F can be positioned on this temporary substrate.

[0085] In step S103, the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 are bonded together.

[0086] In the embodiment of the present invention, bonding of the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 enables bonding of the first initial wafer E and the second initial wafer F, and the multiple color conversion units 300 in the first initial wafer E and the multiple initial light-emitting units in the second initial wafer F are coupled in a one-to-one correspondence.

[0087] The step of bonding the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 includes several substeps as follows.

[0088] In substep S103a, oxygen plasma is used to treat the surface of the first indium zinc oxide layer 401 on the side away from the temporary substrate in order to activate the surface of the first indium zinc oxide layer 401.

[0089] In substep S103b, oxygen plasma is used to treat the surface of the indium zinc oxide layer 402 on the side away from the initial second substrate in order to activate the surface of the indium zinc oxide layer 402.

[0090] In substep S103c, the first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 are pressed together under constant temperature conditions to form a connecting layer 400.

[0091] The first indium zinc oxide layer 401 and the second indium zinc oxide layer 402 can be bonded together by the above substeps 103a to 103c.

[0092] In step S104, the temporary substrate is removed to obtain the base wafer.

[0093] In the embodiment of the present invention, after removing the temporary substrate in the second initial wafer F, a second substrate, a plurality of color conversion units 300 located on the second substrate, and light-emitting units 200 located on the side of each color conversion unit 300 away from the second substrate can be obtained. Here, the second substrate, the plurality of color conversion units 300 located on the second substrate, and the plurality of light-emitting units 200 can be referred to as a base wafer.

[0094] In step S105, the base wafer is cut to obtain multiple chip structures 000.

[0095] In the embodiment of the present application, the single chip structure 000 is obtained after cutting the base wafer. Referring to Figure 11, which is a schematic diagram of the structure of the base wafer provided in the embodiment of the present application, the base wafer may contain a plurality of chip structures 000, and after cutting the base wafer along the cutting line L, a plurality of chip structures 000 can be obtained, and each chip structure 000 includes the first substrate 100 in the above embodiment, a light-emitting unit 200, and a color conversion unit 300. Here, in the process of cutting the base wafer, it is necessary to cut the second substrate, which has a large area of ​​integral connection in the base wafer, and after cutting the second substrate, a plurality of chip structures 000 can be obtained, and the first substrate 100 in each chip structure 000 is a part of the second substrate in the base wafer.

[0096] In this invention, since the limiting dam layer 302 in the color conversion unit 300 needs to be packaged by the first package layer 304 and the second package layer 305, the limiting dam layers 302 in each chip structure 000 are distributed independently of each other before cutting is performed on the base wafer. In this way, after cutting is performed on the base wafer, each position of the limiting dam layer 302 in each obtained chip structure 000 can be packaged by the first package layer 304 and the second package layer 305. wafer Before cutting, the first substrates 101 in each chip structure 000 are connected to one another, where the structure obtained by connecting the first substrates 101 in each chip structure 000 is the second substrate, and the light-shielding layer 301, first package layer 304, and second package layer 305 in adjacent chip structures 000 may or may not be connected. Preferably, other structures in adjacent chip structures 000 are not connected to one another in order to ensure that they can be easily separated after cutting. With respect to this, embodiments of the present application will be described for the following three types of feasible embodiments.

[0097] In the first possible embodiment, before cutting the base wafer, only the first substrate 101 in each chip structure 000 is connected to each other, while the light-shielding layer 301, the first package layer 304, and the second package layer 305 in each chip structure 000 are not connected. In this case, as shown in Figure 12, which is a partially enlarged view of part B of the base wafer shown in Figure 11, it is necessary to form a first dicing channel pattern L0 and a second dicing channel pattern in the manufacturing process of the first large plate M before cutting the base wafer. Here, the first dicing channel pattern L0 can be located between the light-shielding layers 301 in two adjacent chip structures 000, and the second dicing channel pattern can be located between the first package layer 304 and the second package layer 305 in two adjacent chip structures 000. That is, before cutting the base wafer, the light-shielding layers 301 in each chip structure 000 can be separated and arranged by a first dicing channel pattern L0, the first package layers 304 in each chip structure 000 can be separated and arranged by a second dicing channel pattern, and the second package layers 305 in each chip structure 000 can be separated and arranged by a second dicing channel pattern.

[0098] Subsequently, the base wafer is cut again according to the first dicing channel pattern L0 and the second dicing channel. In this way, only the second substrate can be cut during the process of cutting the base wafer, and as a result, within each chip structure 000 obtained after cutting the base wafer, there may be a certain distance between the outer contour of the light-shielding layer 301 and the outer contour of the first substrate 100 in a direction parallel to the first substrate 100. For example, referring to Figure 2, the distance d0 between the outer contour of the light-shielding layer 301 and the outer contour of the first substrate 100 in a direction parallel to the first substrate 100 may be 20 microns or less. In this way, it can be ensured that the leaked light emitted from the edge of the second semiconductor layer 200b is absorbed by the extended portion 3012 of the light-shielding layer 301.

[0099] Furthermore, when forming a first dicing channel pattern L0 between two adjacent chip structures 000 within a base wafer, the operator determines the position of the first dicing channel pattern L0 on the base wafer. wafer Cutting can be performed on the second substrate in the base wafer. In this way, the difficulty of cutting the second substrate in the base wafer can be simplified. In addition, it is possible to ensure that the outer contour of the light-shielding layer 301 in each chip structure 000 after cutting is not burned, and the light-shielding layer 301 can exhibit a better light-shielding effect.

[0100] The second dicing channel pattern is similar to the first dicing channel pattern in the light-shielding layer 301. By installing the second dicing channel, it is possible to ensure that the first package layer 304 and the second package layer 305 are not cut during the cutting process of the base wafer. This effectively prevents the occurrence of minute cracks inside the first package layer 304 and the second package layer 305 that would otherwise extend into the chip structure 000 when cutting is performed on the first package layer 304 and the second package layer 305, thereby effectively improving the product stability of the chip structure 000.

[0101] In the second possible embodiment, before cutting the base wafer, the first substrates 101 in each chip structure 000 are connected to each other, and the light-shielding layers 301 in each chip structure 000 are also connected, but the first package layer 304 and the second package layer 305 in each chip structure 000 are not connected. In this case, as shown in Figure 13, which is an enlarged view of another part of the base wafer B shown in Figure 12, the first dicing channel pattern L0 does not have to be formed in the manufacturing process of the first large plate M before cutting the base wafer, but the second dicing channel pattern may be formed. That is, before cutting the base wafer, the first package layers 304 in each chip structure 000 can be separated and arranged by the second dicing channel pattern, and the second package layers 305 in each chip structure 000 can be separated and arranged by the second dicing channel pattern.

[0102] Thus, in the process of cutting the base wafer, the cutting can be performed on the second substrate of the base wafer. After obtaining multiple chip structures 000 by cutting the second substrate, the connected light-shielding layers can be cut along the outer contour of the first substrate 100 in each chip structure 000. In this case, within each chip structure 000 obtained after cutting the base wafer, the outer contour of the light-shielding layer 301 is aligned with the outer contour of the first substrate 100. In this way, leaked light emitted from the edge of the second semiconductor layer 200b can always be absorbed by the extended portion 3012 of the light-shielding layer 301.

[0103] In the third possible embodiment, before cutting the base wafer, the first substrates 101 in each chip structure 000 are connected to each other, and the light-shielding layer 301, the first package layer 304, and the second package layer 305 in each chip structure 000 are all connected. In this case, it is not necessary to form the first dicing channel pattern L0 and the second dicing channel pattern in the manufacturing process of the first large plate M before cutting the base wafer. Thus, neither the first package layer nor the second package layer needs to undergo patterning. Furthermore, during the cutting process of the base wafer, cutting can be performed on the second substrate in the base wafer, and after obtaining multiple chip structures 000 by cutting the second substrate, the connected light-shielding layer, the first package layer, and the second package layer can all be cut along the outer contour of the first substrate 100 in each chip structure 000. In this case, within each chip structure 000 obtained after cutting the base wafer, the outer contour of the first substrate 100, the outer contour of the light-shielding layer 301, the outer contour of the first package layer 304, and the outer contour of the second package layer 305 are all aligned. In this way, stray light emitted from the edge of the second semiconductor layer 200b can always be absorbed by the extended portion 3012 of the light-shielding layer 301.

[0104] Furthermore, the shape enclosed by the outer contour of the light-shielding layer 301 and the shape enclosed by the first substrate 100 may both be rectangular. Therefore, the distance between each side of the light-shielding layer 301 and the side adjacent to the first substrate 100 in the direction parallel to the first substrate 100 must all be 20 microns or less.

[0105] In this application, the relationship between the outer contour of at least one of the first package layer 304 and the second package layer 305 in the color conversion unit 300 and the outer contour of the light-shielding layer 301 satisfies any of the following conditions.

[0106] In the first type of situation, the outer contour of at least one of the first package layer 304 and the second package layer 305 is aligned with the outer contour of the light-shielding layer 301. Exemplaryly, the outer contour of the first package layer 304 may be aligned with the outer contour of the light-shielding layer 301, or the outer contour of the second package layer 305 may be aligned with the outer contour of the light-shielding layer 301, or the outer contours of both the first package layer 304 and the second package layer 305 may be aligned with the outer contour of the light-shielding layer 301.

[0107] In the second type of situation, there is a distance between the outer contour of at least one of the first package layer 304 and the second package layer 305 and the outer contour of the first substrate 100.

[0108] For example, the outer contour of the first package layer 304 is closer to the outer contour of the first substrate 100 than to the outer contour of the light-shielding layer 301.

[0109] For example, the outer contour of the second package layer 305 is closer to the outer contour of the first substrate 100 than the outer contour of the light-shielding layer 301.

[0110] For example, the outer contours of both the first package layer 304 and the second package layer 305 are closer to the outer contour of the first substrate 100 than to the outer contour of the light-shielding layer 301.

[0111] For example, the outer contour of the light-shielding layer 301 is closer to the outer contour of the first substrate 100 than to the outer contour of the first package layer 304.

[0112] For example, the outer contour of the light-shielding layer 301 is closer to the outer contour of the first substrate 100 than to the outer contour of the second package layer 305.

[0113] For example, the outer contour of the light-shielding layer 301 is closer to the outer contour of the first substrate 100 than to the outer contour of the first package layer 304, and also closer to the outer contour of the first substrate 100 than to the outer contour of the second package layer 305.

[0114] For example, the outer contour of the first package layer 304 is closer to the outer contour of the first substrate 100 than the outer contour of the second package layer 305.

[0115] For example, the outer contour of the second package layer 305 is closer to the outer contour of the first substrate 100 than the outer contour of the first package layer 304.

[0116] We will illustrate this by illustrating that there may be a distance between the outer contour of the first package layer 304 and the outer contour of the first substrate 100.

[0117] Sub-straight 1, 100m It may have a first side and a second side that are arranged opposite to each other, and within the chip structure 000, in a direction parallel to the first substrate 100, the first package layer 304 A part of the outer contour adjacent to the first side and, The first side The distance between is the third distance, and the first package layer 304 The other part of the outer contour adjacent to the second side and, Second side The distance between them is the fourth distance.

[0118] Here, the sum of the third distance and the fourth distance is basically the same as the width of the second dicing channel pattern shown in the above embodiment. Also, since the width of the second dicing channel pattern in subsequent embodiments must be 5 microns or more, the sum of the third distance and the fourth distance is also 5 microns or more. Preferably, the sum of the third distance and the fourth distance is 10 microns or more.

[0119] When cutting is performed on the base wafer, the relationship between the outer contour of the first package layer 304 and the outer contour of the light-shielding layer 301 is ultimately determined by whether or not a second dicing channel pattern is formed inside at least one of the first package layer 304 and the second package layer 305 on the base wafer, and whether or not a first dicing channel pattern is formed inside the light-shielding layer 301.

[0120] For example, if a second dicing channel pattern is not formed inside at least one of the first package layer 304 and the second package layer 305 on the base wafer, and a first dicing channel pattern is not formed in the light-shielding layer 301, then in the chip structure 000 obtained after cutting the base wafer, the outer contour of the first package layer 304 is aligned with the outer contour of the light-shielding layer 301, and both are aligned with the outer contour of the first substrate 100.

[0121] When a second dicing channel pattern is not formed inside at least one of the first package layer 304 and the second package layer 305 on the base wafer, and a first dicing channel pattern is formed inside the light-shielding layer 301, in the chip structure 000 obtained after cutting the base wafer, the outer contour of at least one of the first package layer 304 and the second package layer 305 is closer to the outer contour of the first substrate 100 than the outer contour of the light-shielding layer 301, and the outer contour of at least one of the first package layer 304 and the second package layer 305 is aligned with the outer contour of the first substrate 100.

[0122] When a second dicing channel pattern is formed inside at least one of the first package layer 304 and the second package layer 305 on the base wafer, and a first dicing channel pattern is formed inside the light-shielding layer 301, if the width of the second dicing channel pattern is smaller than that of the first dicing channel pattern, the outer contour of at least one of the first package layer 304 and the second package layer 305 is closer to the outer contour of the first substrate 100 than to the outer contour of the light-shielding layer 301. If the width of the second dicing channel pattern is larger than that of the first dicing channel pattern, the outer contour of the light-shielding layer 301 is closer to the outer contour of the first substrate 100 than to the outer contour of at least one of the first package layer 304 and the second package layer 305. If the width of the second dicing channel pattern is equal to that of the first dicing channel pattern, the outer contour of the light-shielding layer 301 is aligned with the outer contour of at least one of the first package layer 304 and the second package layer 305.

[0123] Furthermore, when a second dicing channel is formed in both the first package layer 304 and the second package layer 305, and a first dicing channel pattern is formed in the light-shielding layer 301, in order to simplify the cutting process, it is necessary to cut the base wafer as close as possible to the center line of the first dicing channel pattern. In this process, in order to ensure that the first package layer 304 and the second package layer 305 are not cut, the width of the second dicing channel pattern can be made larger than the width of the first dicing channel pattern. In this way, since the first package layer 304 and the second package layer 305 are not cut during the cutting process according to the first dicing channel pattern, no minute cracks will occur in either the first package layer 304 or the second package layer 305. For this reason, the drawings in the embodiments of this application illustrate, as an example, that the outer contour of the light-shielding layer 301 is closer to the outer contour of the first substrate 100 than the outer contours of the first package layer 304 and the second package layer 305.

[0124] In this case, with respect to the single chip structure 000 obtained after cutting the second substrate in the base wafer, refer to Figure 14, which is a plan view of another chip structure provided in an embodiment of the present application. Sub-straight 1, 100m It may have a first side and a second side arranged opposite to each other, and within the chip structure 000, in a direction parallel to the first substrate 100, a light-shielding layer 301 A part of the outer contour adjacent to the first side and, The first side The distance between is the first distance d1, and the light-shielding layer 301 The other part of the outer contour adjacent to the second side and, Second side The distance between them is the second distance d2. Figure 14 provides a schematic explanation using the example that the first side is the left side of the chip structure 000 and the second side is the right side of the chip structure 000.

[0125] Here, the sum of the first distance d1 and the second distance d2 is basically the same as the width of the first dicing channel pattern L0 shown in Figure 12. Also, since the width of the first dicing channel pattern L0 shown in Figure 12 must be 5 microns or more, the sum of the first distance d1 and the second distance d2 is also 5 microns or more. Preferably, the sum of the first distance d1 and the second distance d2 is 10 microns or more.

[0126] In the embodiment of the present invention, a laser stealth dicing method can be employed to cut the second substrate in the base wafer. In this cutting process, the laser cutting beam is focused to an intermediate position in the thickness direction of the second substrate, causing the intermediate position of the second substrate to melt or gasify. Subsequently, by applying force to the upper and / or lower surfaces of the second substrate using a tool, the portion of the first substrate 100 of the single chip structure 000 in the second substrate can be separated. In this process, since the laser cutting beam reaches the intermediate position of the second substrate, no particular impurities (e.g., slicing sputters) are sputtered onto the light-emitting unit 200 or the color conversion unit 300 during the cutting process, and the reliability of the chip structure 000 obtained by subsequent cutting is increased.

[0127] In this case, after cutting the second substrate of the base wafer, the outer surface of the first substrate 100 in the obtained chip structure 000 becomes a fracture surface. Now, referring to Figure 15, which is a schematic diagram of the outer surface of the first substrate provided in an embodiment of the present application. This fracture surface may include a first fracture portion S1, a second fracture portion S2, and a laser-cut portion S3 located between the first fracture portion S1 and the second fracture portion S2. Here, the first fracture portion S1 and the second fracture portion S2 may show traces of fracture caused by applying stress, and the laser-cut portion S3 may show traces of ablation caused by laser cutting.

[0128] In this invention, during the cutting process of the second substrate, the laser cutting beam is focused to an intermediate position on the second substrate. As a result, after cutting the second substrate, the single-chip structure 000 obtained shows laser cutting ablation marks at an intermediate position on the outer surface of the first substrate 101. Furthermore, during the cutting process of the second substrate, it is necessary to melt or gasify the intermediate position of the second substrate with the laser cutting beam, and then apply force to the upper and / or lower surfaces of the second substrate using a cutting blade to achieve cutting of the second substrate. Therefore, on the outer surface of the first substrate 101 obtained to the single-chip structure 000 obtained after cutting the second substrate, both sides where the ablation marks are located show stress fracture marks.

[0129] Furthermore, in the first substrate 100 of the single chip structure 000 obtained by the cutting method, an ablation mark due to laser cutting appears at the middle position of the outer surface of the first substrate 100, and therefore, traces of fracture appear on both sides located at the middle position of the outer surface of the first substrate 100. For this reason, the outer surface of the first substrate 100 is not a single perfect plane. In contrast, the distance between the outer contour of the first substrate 100 and the outer contour of the other film layer (e.g., the light-shielding layer 301) is not a single fixed value, and in this application, the distance between the outer contour of the first substrate 100 and the outer contour of the other film layer may mean the average distance between the outer contour of the first substrate 100 and the outer contour of the other film layer.

[0130] In embodiments of the present application, as shown in Figures 16, 17, and 18, Figure 16 is a plan view of another chip structure provided in embodiments of the present application, Figure 17 is a schematic diagram of the film layer structure at C-C' of the chip structure shown in Figure 16, and Figure 18 is a schematic diagram of the film layer structure at D-D' of the chip structure shown in Figure 16. The multiple sub-light-emitting functional layers in the light-emitting unit 200 may include a first sub-light-emitting functional layer 200a1, a second sub-light-emitting functional layer 200a2, and a third sub-light-emitting functional layer 200a3. Here, the first sub-light-emitting functional layer 200a1, the second sub-light-emitting functional layer 200a2, and the third sub-light-emitting functional layer 200a3 are all used to emit a first ray in the operating state.

[0131] Accordingly, the multiple opening regions in the limited dam layer 302 may include a first opening region K21, a second opening region K22, and a third opening region K23. Here, the first opening region K21 can be positioned opposite the first sub-light-emitting functional layer 200a1, the second opening region K22 can be positioned opposite the second sub-light-emitting functional layer 200a2, and the third opening region K23 can be positioned opposite the third sub-light-emitting functional layer 200a3.

[0132] The optical functional layer 303 in the color conversion unit 300 may include a first color conversion section 303a, a second color conversion section 303b, and a third color conversion section 303c. Here, the first color conversion section 303a may be located within a first aperture region K21, the second color conversion section 303b may be located within a second aperture region K22, and the third color conversion section 303c may be located within a third aperture region K23.

[0133] In this case, the first ray emitted from the first sub-light-emitting functional layer 200a1 is emitted toward the first color conversion unit 303a, and the first color conversion unit 303a can convert the first ray emitted from the first sub-light-emitting functional layer 200a1 into a ray of another color. The first ray emitted from the second sub-light-emitting functional layer 200a1 is emitted toward the second color conversion unit 303b, and the second color conversion unit 303b can convert the first ray emitted from the second sub-light-emitting functional layer 200a2 into a ray of another color. The first ray emitted from the third sub-light-emitting functional layer 200a3 can be emitted toward the third color conversion unit 303c, and the first ray can pass through the third color conversion unit 303c or be converted by the third color conversion unit 303c.

[0134] Exemplary, the chip structure 000 may have a red subpixel R, a green subpixel G, and a blue subpixel B. The first light rays emitted from the first sub-emissive functional layer 200a1, the second sub-emissive functional layer 200a2, and the third sub-emissive functional layer 200a3 in the light-emitting unit 200 all include at least one of blue light and ultraviolet light.

[0135] Here, the first color conversion unit 303a is used to convert the first ray into red light. Exemplarily, the first color conversion unit 303a includes a red quantum dot that converts the first ray into red light, and preferably, the first color conversion unit 303a further includes scattering particles for scattering the ray. Here, the first ray emitted from the first sub-emissive functional layer 200a1 is emitted toward the first color conversion unit 303a distributed in the first aperture region K21, and then the red quantum dot can convert the first ray into red light, and the scattering particles can scatter the first ray and the red light, thereby ensuring that more of the first ray is converted into red light by the red quantum dot, and that the emission angle of the converted red light is increased, thereby ensuring that the viewing angle of the display panel on which such a chip structure 000 is integrated is increased. In contrast, the red subpixel R in the chip structure 000 is the first sub-emissive functional layer 200a1 This can include a first color conversion unit 303a.

[0136] The second color conversion unit 303b is used to convert the first ray into green light. Exemplarily, the second color conversion unit 303b includes a green quantum dot that converts the first ray into green light, and preferably further includes scattering particles for scattering the ray. Here, the first ray emitted from the second sub-emissive functional layer 200a2 is emitted toward the second color conversion unit 303b distributed in the second aperture region K22, and then the green quantum dot can convert the first ray into green light, and the scattering particles can scatter the first ray and the green light, ensuring that more of the first ray is converted into green light by the green quantum dot, and ensuring that the emission angle of the converted green light is increased, thereby ensuring that the viewing angle of the display panel on which such a chip structure 000 is integrated is increased. In contrast, the green subpixel G in the chip structure 000 may include the second sub-emissive functional layer 200a2 and the second color conversion unit 303b.

[0137] The third color conversion unit 303c is used to convert the first ray into blue light or to maintain the emission of blue light. For example, if the first ray contains only blue light, the third color conversion unit 303c may be a transparent portion, or it may contain blue quantum dots, where the transparent portion is used to directly transmit the first ray, and the blue quantum dots can be used to convert the first ray into blue light with a wavelength different from that of the first ray. Preferably, the third color conversion unit 303c further contains scattering particles that scatter the light ray. Here, the first ray emitted from the third sub-emissive functional layer 200a3 is emitted toward the third color conversion unit 303c distributed within the third aperture region K23, and then the scattering particles scatter the first ray, thereby ensuring a larger emission angle of blue light, and thus ensuring a larger viewing angle of the display panel on which such chip structure 000 is integrated. Furthermore, for example, if the first ray contains ultraviolet light, the third color conversion unit 303c includes a blue quantum dot that converts the first ray into blue light, or, simultaneously, scattering particles for scattering the light and blue quantum dots for converting ultraviolet light into blue light are distributed within the third color conversion unit 303c. Here, the first ray emitted from the second sub-emissive functional layer 200a2 is emitted toward the third color conversion unit 303c distributed within the third aperture region K23, and then the ultraviolet light in the first ray can be converted into blue light by the blue quantum dot, and the first ray and blue light can be scattered by the scattering particles, thereby ensuring that more ultraviolet light is converted into blue light by the blue quantum dot, and that the emission angle of the converted blue light is increased, thereby ensuring that the viewing angle of the display panel on which such a chip structure 000 is integrated is increased. In contrast, the blue subpixel B in the chip structure 000 may include a third sub-emissive functional layer 200a3 and a third color conversion unit 303c.

[0138] In embodiments of the present invention, the color conversion unit 300 within the chip structure 000 may further include a filter layer 306 located between the first substrate 100 and the optical functional layer 200. Here, the filter layer 306 may include a plurality of filter units corresponding one-to-one to a plurality of light-passing holes K1, and the orthographic projection of each filter unit onto the first substrate 100 may overlap with the orthographic projection of the corresponding light-passing hole onto the first substrate 100.

[0139] Exemplary, the filter units in the filter layer 306 may include a first filter unit 306a, a second filter unit 306b, and a third filter unit 306c. Here, the first filter unit 306a may be installed in correspondence with the first color conversion unit 303a, the second filter unit 306b may be installed in correspondence with the second color conversion unit 303b, and the third filter unit 306c may be installed in correspondence with the third color conversion unit 303c. In contrast, the red subpixel R in the chip structure 000 may further include the first filter unit 306a, the green subpixel G in the chip structure 000 may further include the second filter unit 306b, and the blue subpixel B in the chip structure 000 may further include the third filter unit 306c.

[0140] For example, the first light rays emitted from the first sub-light-emitting functional layer 200a1, the second sub-light-emitting functional layer 200a2, and the third sub-light-emitting functional layer 200a3 in the light-emitting unit 200 are all blue light, and the first filter unit 306a may be a red color resist block, which transmits red light and absorbs light rays of other colors. In this way, the light rays emitted from the first color conversion unit 303a can be emitted after passing through the first filter unit 306a, and the first filter unit 306a can filter out light rays of other colors besides red light, thereby ensuring that the red subpixel R in the chip structure 000 can filter out the blue light component. In other possible embodiments, the first filter unit 306a may be a film layer that transmits red light and reflects blue light. In this way, the light emitted from the first color conversion unit 303a is emitted toward the first filter unit 306a, the red light in these light rays can be emitted after passing through the first filter unit 306a, and the blue light in these light rays can be reflected back to the first color conversion unit 303a by the first filter unit 306a. As a result, the red quantum dots in the first color conversion unit 303a can further excite this blue light into red light, thereby further improving the excitation efficiency of the red quantum dots.

[0141] For example, the first light rays emitted from the first sub-light-emitting functional layer 200a1, the second sub-light-emitting functional layer 200a2, and the third sub-light-emitting functional layer 200a3 in the light-emitting unit 200 are all blue light, and the second filter unit 306b may be a green color resist block, which transmits green light and absorbs light rays of other colors. In this way, the light rays emitted from the second color conversion unit 303b can be emitted after passing through the second filter unit 306b, and the second filter unit 306b can filter out light rays of other colors besides green light, thereby ensuring that the green subpixel G in the chip structure 000 can filter out the blue light component. In other possible embodiments, the second filter unit 306b may be a film layer that transmits green light and reflects blue light. In this way, the light emitted from the second color conversion unit 303b is emitted toward the second filter unit 306b, the green light in these light rays can be emitted after passing through the second filter unit 306b, and the blue light in these light rays can be reflected by the second filter unit 306b toward the second color conversion unit 303b. As a result, the green quantum dots in the second color conversion unit 303b can further excite this blue light into green light, thereby further improving the excitation efficiency of the green quantum dots.

[0142] The film layer structures of the first filter unit 306a and the second filter unit 306b may be the same and can be manufactured by the same process. For example, both the first filter unit 306a and the second filter unit 306b have film layers that transmit red and green light and reflect blue light.

[0143] For example, the first light rays emitted from the first sub-light-emitting functional layer 200a1, the second sub-light-emitting functional layer 200a2, and the third sub-light-emitting functional layer 200a3 in the light-emitting unit 200 are all blue light, and the third filter unit 306c may be a blue color resist block, which transmits blue light and absorbs light rays of other colors. In this way, the light rays emitted from the third color conversion unit 303c can be emitted after passing through the third filter unit 306c, and the third filter unit 306c can filter out light rays of other colors besides blue light, thereby ensuring that the blue subpixel B in the chip structure 000 can emit relatively pure blue light.

[0144] For example, the first light rays emitted from the first sub-light-emitting functional layer 200a1, the second sub-light-emitting functional layer 200a2, and the third sub-light-emitting functional layer 200a3 in the light-emitting unit 200 are all blue light, and the third filter unit 306c may be a transparent block, which can transmit blue light.

[0145] Furthermore, since the orthographic projection of each filter unit in the filter layer 306 onto the first substrate 100 coincides with the orthographic projection of the corresponding light-passing hole K1 in the light-shielding layer 301 onto the first substrate 100, a portion of the light-shielding layer 301 can be distributed between two adjacent filter units in the filter layer 306 in a direction parallel to the first substrate 100. In this way, light rays emitted from the side of a certain filter unit in the filter layer 306 can be absorbed by the light-shielding layer 301, thereby ensuring that light rays emitted from each subpixel are not emitted toward adjacent subpixels, and effectively reducing the probability of color crosstalk occurring in the chip structure 000.

[0146] In the embodiments of the present application, the structure of the first package layer 304 in the color conversion unit 300 varies, and the embodiments of the present application will be schematically explained using the following two types of implementations as examples.

[0147] In the first type of implementation, as shown in Figure 19, which is a schematic diagram of the film layer structure of a chip structure provided in other embodiments of the present application, the first package layer 304 in the color conversion unit 300 is a film layer structure that is installed in all layers on the first substrate 100, that is, the first package layer 304 located on the first substrate 100 is not patterned. In this case, the orthographic projections of the optical functional layer 303 and the limiting dam layer 302 in the color conversion unit 300 onto the first substrate 100 can both be located on the orthographic projection of the first package layer 304 onto the substrate 100. In this way, the first package layer 304 covers the side of the optical functional layer 303 facing the first substrate 100 and also covers the side of the limiting dam layer 302 facing the first substrate 100. As a result, after water oxygen from the external environment penetrates the light-shielding layer 301, the water oxygen that has entered the light-shielding layer 301 is blocked by the first package layer 304. Furthermore, the water oxygen that has entered the light-shielding layer 301 does not penetrate the limiting dam layer 302 from the side facing the first substrate 100, nor does it penetrate the optical functional layer 303 on the side facing the first substrate 100.

[0148] Here, the first package layer 304 in the color conversion unit 300 consists of a light-shielding layer 301 and a limited dam layer. 302 The first package layer 304 and the filter layer 306 in the color conversion unit 300 are located between these two points, and the positional relationship between them can vary. The embodiment of this application schematically explains the following two types of situations as examples.

[0149] In the first type of situation, as shown in Figure 19, the filter layer 306 in the color conversion unit 300 can be located on the side of the first package layer 304 away from the first substrate 100, and a portion of the first package layer 304 can be located within the light-passing holes K1 in the light-shielding layer 301. Here, the side of the filter layer 306 away from the first substrate 100 can be in direct contact with the side of the optical functional layer 303 facing the first substrate 100.

[0150] As one option, the orthographic projection of each filter unit in the filter layer 306 onto the first substrate 100 can cover the orthographic projection of the corresponding aperture region K2 in the limiting dam layer 302 onto the first substrate 100. In this way, all light rays emitted from the optical functional layer 303 distributed within the aperture region K2 of the limiting dam layer 302 can be emitted toward the corresponding filter unit in the filter layer 306, and the filtering effect of the light rays by the filter unit can be ensured to be good so that the color of the light rays subsequently emitted from the corresponding light-passing holes K1 in the light-shielding layer 301 becomes purer.

[0151] In the second type of situation, as shown in Figure 20, which is a schematic diagram of a film layer structure of another chip structure provided in other embodiments of the present application, the filter layer 306 in the color conversion unit 300 may be located on the side of the first package layer 304 facing the first substrate 100, and at least a portion of each filter unit in the filter layer 306 may be located in the corresponding light-passing holes K1 in the light-shielding layer 301. Here, the side of the first package layer 304 in the color conversion unit 300 facing the first substrate 100 may be in direct contact with the side of the light-shielding layer 301 away from the first substrate 100 and may be in direct contact with the side of the filter layer 306 away from the first substrate 100, and the side of the first package layer 304 in the color conversion unit 300 away from the first substrate 100 may be in direct contact with the side of the limiting dam layer 302 facing the first substrate 100 and may be in direct contact with the side of the optical functional layer 303 facing the first substrate 100.

[0152] As one option, the orthographic projection of each filter unit in the filter layer 306 onto the first substrate 100 can cover the orthographic projection of the corresponding light-passing hole K1 in the light-shielding layer 301 onto the first substrate 100. Here, within the filter layer 306, a portion of each filter unit can be distributed within the corresponding light-passing hole K1 in the light-shielding layer 301, and another portion can be distributed outside the corresponding light-passing hole K1. In this way, light rays emitted from the optical functional layer 303 distributed within the aperture region K2 of the limiting dam layer 302 are emitted toward the corresponding light-passing hole K1 in the light-shielding layer 301, and then all of them can be filtered by the corresponding filter unit in the filter layer 306, and the filtering effect of the light rays by the filter unit can be ensured to be good so that the color of the light rays emitted from the corresponding light-passing hole K1 in the light-shielding layer 301 becomes purer.

[0153] In a second type of realization, as shown in Figure 21, Figure 21 is a schematic diagram of a film layer structure of another chip structure provided in other embodiments of the present application, where the film layer structure of the color conversion unit 300 after the first package layer 304 in the color conversion unit 300 has been patterned on the first substrate 100, i.e., the first package layer 304 located on the first substrate 100 needs to undergo a patterning process. In this case, the first package layer 304 may have a plurality of auxiliary openings K3 that correspond one-to-one with a plurality of light-passing holes K1 in the light-shielding layer 301, and the orthographic projection of each auxiliary opening K3 in the first package layer 304 onto the first substrate 100 may overlap with the orthographic projection of the corresponding light-passing holes K1 in the light-shielding layer 301 onto the first substrate 100.

[0154] Here, at least a portion of each filter unit in the filter layer 306 may be located within the corresponding auxiliary opening K3 in the first package layer 304 and within the corresponding light-passing hole K1 in the light-shielding layer 301. Both opposing sides of each filter unit in the filter layer 306 may be in contact with the first substrate 100 and the optical functional layer 303. Exemplarily, the portion of each filter unit in the filter layer 306 located within the corresponding light-passing hole K1 may have the side facing the first substrate 100 in direct contact with the first substrate 100, while the side of each filter unit in the filter layer 306 away from the substrate 100 may be in contact with the limiting dam layer. 302 In this configuration, the side of the optical functional layer 304 located within the corresponding aperture region K2 that faces the first substrate 100 can be directly contacted.

[0155] In this case, multiple auxiliary openings K3 are provided within the first package layer 304, and both opposing surfaces of each filter unit in the filter layer 306 are in direct contact with the first substrate 100 and the optical functional layer 303. Therefore, light rays emitted from the optical functional layer 303 distributed within the aperture region K2 of the limiting dam layer 302 can be emitted directly toward the corresponding filter unit in the filter layer 306, and light rays emitted from said filter unit can be emitted directly after passing through the first substrate 100. In contrast, the light rays emitted from the optical functional layer 303 do not pass through the first package layer 304. Thus, the light rays emitted toward the first package layer 304 can avoid causing optical waveguide phenomena within the first package layer 304, and it can be ensured that the light rays emitted from the optical functional layer 303 distributed within a certain aperture region K2 do not transmit to the subpixels where adjacent aperture regions K2 are located. Furthermore, the probability of color crosstalk occurring in the chip structure 000 is reduced.

[0156] As one option, the orthographic projection of each filter unit in the filter layer 306 onto the first substrate 100 can cover the orthographic projection of the corresponding aperture region K2 in the limiting dam layer 302 onto the first substrate 100, and the light rays emitted from the optical functional layer 303 can be made purer in color after passing through the first substrate 100.

[0157] In a selectable implementation, if the color conversion unit 300 has a film layer structure after the first package layer 304 is patterned on the first substrate 100, the orthographic projection of each auxiliary opening K3 in the first package layer 304 onto the first substrate 100 can be located within the orthographic projection of the corresponding light-passing holes K1 in the light-shielding layer 301 onto the first substrate 100, and a portion of the first package layer 304 can enter into the light-passing holes K1 of the light-shielding layer 301, and the portion of the first package layer 304 that enters into the light-passing holes K1 can cover the inner wall of the light-passing holes K1. In this way, it is possible to ensure that the filter unit is positioned at a distance from the light-shielding layer 301. The portion of the light-passing holes K1 that enters into the first package layer 304 can block water-oxygen that has entered into the light-shielding layer 301 in a direction parallel to the first substrate 100. This ensures that even if both opposing surfaces of each filter unit within the filter layer 306 are in direct contact with the first substrate 100 and the optical functional layer 303, water oxygen that has entered the light-shielding layer 301 will not pass through the filter layer 306 and corrode the optical functional layer 303.

[0158] In an embodiment of the present application, refer to Figure 22, which is a plan view of a chip structure provided in another embodiment of the present application. The light-shielding layer 301 in the color conversion unit 300 within the chip structure 000 may have at least one ring-shaped through groove U. The orthographic projections of the plurality of light-passing holes K1 in the light-shielding layer 301 onto the first substrate 100 are all located within the region enclosed by the orthographic projection of the ring-shaped through groove U onto the first substrate 100. In contrast, the orthographic projections of the plurality of filter units in the filter layer 306 within the color conversion unit 300 onto the first substrate 100 may also all be located within the region enclosed by the orthographic projection of the ring-shaped through groove U onto the first substrate 100. A portion of the first package layer 304 in the color conversion unit 300 may be located within the ring-shaped through groove U. Specifically, the first package layer 304 located within the region enclosed by the ring-shaped through groove U is in contact with the first substrate 100. In this case, the portion within the ring-shaped through groove U distributed in the first package layer 304 acts as a barrier dam, which can prevent water-oxygen from entering from the edge of the light-shielding layer 301 in a direction parallel to the first substrate 100, and ensure that water-oxygen does not enter the internal region of the light-shielding layer 301. This further reduces the probability that water-oxygen in the external environment will corrode the elementary optical functional layer 303.

[0159] Furthermore, by positioning a portion of the first package layer 304 within the ring-shaped through groove U, it is possible to ensure that minute cracks generated in the first substrate 100 or the first package layer 304 during the cutting process to obtain the chip structure 000 are blocked by the barrier dam g located within the ring-shaped through groove U. This prevents the minute cracks from diffusing into the internal region of the light-shielding layer 301, and further improves the product yield of the chip structure 000 obtained after the cutting process.

[0160] The above embodiments are described as examples in which the light-shielding layer 301 in the film layer structure of the color conversion unit 300 does not contain a ring-shaped through groove U. Furthermore, since there are various ways in which the structure and distribution position of the first package layer 304 in the color conversion unit 300 can be arranged, the embodiments of this application schematically describe the film layer structure of the color conversion unit 300 in which the light-shielding layer 301 having a ring-shaped through groove U is located, using the following three exemplary realization forms.

[0161] For an exemplary embodiment of the first type, refer to Figure 23, which is a schematic diagram of the film layer structure at E-E' of the chip structure shown in Figure 22, where the first package layer 304 in the color conversion unit 300 is a film layer structure with the entire layer installed on the first substrate 100, and the filter layer 306 in the color conversion unit 300 is located on the side of the first package layer 304 away from the first substrate 100, then a portion of the first package layer 304 can simultaneously enter the ring-shaped through groove U and light-passing hole K1 of the light-shielding layer 301.

[0162] For a second exemplary embodiment, refer to Figure 24, which is a schematic diagram of another film layer structure in E-E' of the chip structure shown in Figure 22, where the first package layer 304 in the color conversion unit 300 is a film layer structure that is fully installed on the first substrate 100, and the filter layer 306 in the color conversion unit 300 is located on the side of the first package layer 304 facing the first substrate 100, in which case a portion of the first package layer 304 can enter into the ring-shaped through groove U of the light-shielding layer 301, and each filter unit in the filter layer 306 can enter into the corresponding light-passing hole K1 in the light-shielding layer 301.

[0163] For a third exemplary embodiment, refer to Figure 25, which is a schematic diagram of another film layer structure in E-E' of the chip structure shown in Figure 22, where the first package layer 304 in the color conversion unit 300 has a plurality of auxiliary openings K3 that correspond one-to-one with a plurality of light-passing holes K1 in the light-shielding layer 301, and each filter unit in the filter layer 306 can enter into the corresponding light-passing hole K1 in the light-shielding layer 301. Furthermore, in this case, in order to ensure that the color of the light rays emitted from the light-passing holes K1 in the light-shielding layer 301 is purer, Auxiliary opening hole K3 The orthographic projection onto the first substrate 100 is the corresponding Light passage hole K1 It is necessary to cover the orthographic projection of the light through hole K1 on the first substrate 100, thereby ensuring that the orthographic projection of each filter unit in the filter layer 306 on the first substrate 100 covers the orthographic projection of the corresponding light through hole K1 in the light shielding layer 301 on the first substrate 100. That is, a portion of each filter unit in the filter layer 306 can enter the corresponding light through hole K1 in the light shielding layer 301, while another portion can be located outside the corresponding light through hole K1. In this way, it is possible to ensure that the light rays emitted from the optical functional layer 303 distributed within the aperture region K2 of the limiting dam layer 302 are emitted toward the corresponding light through hole K1 in the light shielding layer 301 and then all are filtered by the corresponding filter unit in the filter layer 306.

[0164] In the embodiment of the present application, the orthographic projection of the ring-shaped through groove U onto the first substrate 100 can be located within the orthographic projection of the limiting dam layer 302 onto the first substrate 100. Preferably, the orthographic projection of the ring-shaped through groove U onto the first substrate 100 can be located within the orthographic projection of the limiting dam layer 302 onto the first substrate 100 on the side facing the first substrate 100.

[0165] In this case, the boundary line between the orthographic projection of the main body portion 3011 in the light-shielding layer 301 and the orthographic projection of the extended portion 3012 in the light-shielding layer 301 onto the first substrate 100 is the outer contour of the orthographic projection of the limiting dam layer 302 onto the first substrate 100. Therefore, if the orthographic projection of the ring-shaped through groove U onto the first substrate 100 is located within the orthographic projection of the limiting dam layer 302 onto the first substrate 100, it can be ensured that the ring-shaped through groove U is distributed only within the main body portion 3011 of the light-shielding layer 301 and not within the extended portion 3012 of the light-shielding layer 301. Thus, assuming that it can be ensured that the ring-shaped through groove U can be properly installed in the light-shielding layer 301, it is also ensured that after the light rays undergo an optical waveguide phenomenon inside the second semiconductor layer, the light rays emitted from the edge of the second semiconductor layer can still be properly absorbed by the extended portion 3012 in the light-shielding layer 301.

[0166] As one option, as shown in Figures 22 to 25, if the light-shielding layer 301 in the color conversion unit 300 has multiple ring-shaped through grooves U, the multiple ring-shaped through grooves U can be distributed sequentially in a nested manner. In this embodiment, the example of two ring-shaped through grooves U distributed within the light-shielding layer 301 is used for a schematic explanation.

[0167] For example, assuming that the two ring-shaped through grooves U are ring-shaped through groove U1 and ring-shaped through groove U2, and that the area of ​​the region enclosed by ring-shaped through groove U1 is larger than the area of ​​the region enclosed by ring-shaped through groove U2, then the orthographic projection of the filter layer 306 in the color conversion unit 300 onto the first substrate 100 can be located within the region enclosed by the orthographic projection of the ring-shaped through groove U2 onto the first substrate 100, and the orthographic projection of the ring-shaped through groove U2 onto the first substrate 100 can be located within the region enclosed by the orthographic projection of the ring-shaped through groove U1 onto the first substrate 100.

[0168] In this case, if the light-shielding layer 300 includes multiple nested ring-shaped through grooves U, a portion of the first package layer 304 can enter into each ring-shaped through groove U, and the portion of the ring-shaped through groove U that enters into the first package layer 304 can act as a barrier dam. Thus, multiple nested barrier dams are sequentially distributed around the edge region of the light-shielding layer 300. These sequentially distributed nested barrier dams can further prevent water and oxygen from entering from the edge of the light-shielding layer 301 in a direction parallel to the first substrate 100.

[0169] In the embodiment of the present application, if the light-shielding layer 300 includes a plurality of nested ring-shaped through grooves U, the width range of each ring-shaped through groove U may be 3 microns to 5 microns, the distance range between two adjacent ring-shaped through grooves U (for example, between ring-shaped through groove U1 and ring-shaped through groove U2) is 3 microns to 5 microns, and the distance range between the ring-shaped through groove U closest to the outer contour of the first substrate 100 (for example, ring-shaped through groove U1) and the outer contour of the first substrate 100 is 5 microns to 15 microns.

[0170] In the embodiment of the present invention, as shown in Figures 19 to 25, the second package layer 305 in the color conversion unit 300 can be located on the side away from the first substrate 100 of the limiting dam layer 302 and the optical functional layer 303, and since the color conversion unit 300 in the chip structure 000 is distributed between the first substrate 100 and the light-emitting unit 200, the light-emitting unit 200 in the chip structure 000 can be located on the side away from the first substrate 100 of the second package layer 305.

[0171] In the embodiments of the present application, with reference to Figures 26 and 27, Figure 26 is a plan view of a light-emitting unit located on a connecting layer provided in the embodiments of the present application, and Figure 27 is a schematic diagram of the film layer structure at F-F' of the light-emitting unit shown in Figure 26. Each sub-light-emitting functional layer 200a in the light-emitting unit 200 may include a first electrode 201, a first semiconductor layer 202, and a light-emitting layer 203, which are stacked and installed perpendicular to the first substrate 100.

[0172] Here, the second semiconductor layer 200b in the light-emitting unit 200 is located on the light-emitting side of each sub-light-emitting functional layer 200a, and the second semiconductor layer 200b is closer to the first substrate 100 than each sub-light-emitting functional layer 200a. Therefore, the second semiconductor layer 200b can come into contact with the side of each sub-light-emitting functional layer 200a of the light-emitting layer 203 that is away from the first semiconductor layer 202.

[0173] In embodiments of the present application, with reference to Figures 28 and 29, Figure 28 is a plan view of a light-emitting unit located on another connecting layer provided in embodiments of the present application, and Figure 29 is a schematic diagram of the film layer structure at G-G' of the light-emitting unit shown in Figure 28. The second semiconductor layer 200b may include connecting portions 200b1 and auxiliary portions 200b2 arranged in a direction parallel to the first substrate 100. Here, the number of connecting portions 200b1 in the second semiconductor layer 200b may be multiple, and the multiple connecting portions 200b1 may correspond one-to-one with a multiple sub-light-emitting functional layers 200a, and each connecting portion 200b1 may be installed connected to the corresponding sub-light-emitting functional layer 200a, for example, each connecting portion 200b1 may be installed connected to the side of the light-emitting layer 203 of the corresponding sub-light-emitting functional layer 200a away from the first semiconductor layer 202. The auxiliary portion 200b2 in the second semiconductor layer 200b connects multiple connection portions 200b1.

[0174] Furthermore, any portion of the second semiconductor layer 200b other than the spaces between the multiple connection portions 200b1 may be an auxiliary portion 200b2. For example, an auxiliary portion 200b2 includes a first auxiliary portion 200b21 and a second auxiliary portion 200b22, where the first auxiliary portion 200b21 is located between adjacent connection portions 200b1, and the second auxiliary portion 200b22 surrounds both the first auxiliary portion 200b21 and the connection portions 200b1. Specifically, the connection portions 200b1 and the auxiliary portions 200b2 are made of the same material and have an integrated structure. In the above embodiment, the light rays emitted from each sub-emissive functional layer 200a are emitted toward the second semiconductor layer 200b, generating optical waveguides within the second semiconductor layer and facilitating emission from the edges of the second semiconductor layer 200b. The light rays emitted from the edges of the second semiconductor layer 200b can be absorbed by the extended portion 3012 on the light-shielding side 301, thereby reducing or avoiding light leakage phenomena in the chip structure 000.

[0175] In this application, the light-emitting unit 200 may further include a common electrode layer 200c. Here, the common electrode layer 200c may be installed in connection with an auxiliary portion 200b2 in the second semiconductor layer 200b.

[0176] As one option, in the light-emitting unit 200, the material of the first semiconductor layer 202 in each sub-light-emitting functional layer 200a may include P-type doped gallium nitride, and the light-emitting layer 203 in each sub-light-emitting functional layer 200a may be a multiple quantum well layer. The second semiconductor layer 200b may include a first sub-layer 200b3 and a second sub-layer 200b4 stacked in a direction perpendicular to and facing the first substrate 100, that is, the first sub-layer 200b3 is closer to the sub-light-emitting functional layer 200a than the second sub-layer 200b4, that is, the first sub-layer 200b3 may be located between the second sub-layer 200b3 and the light-emitting layer 203 in the sub-light-emitting functional layer 200a. Here, the material of the first sublayer 200b1 in the second semiconductor layer 200b may be N-type doped gallium nitride, and the second sublayer 200bb in the second semiconductor layer 200b may be a gallium nitride buffer layer.

[0177] In this case, if a cathode signal is applied to the common electrode layer 200c in the light-emitting unit 200, and then an anode signal is applied to the first electrode 201 in a certain sub-light-emitting functional layer 200a, the light-emitting layer 203 in this sub-light-emitting functional layer 200a can emit a first ray.

[0178] In the embodiments of the present invention, each sub-emissive functional layer 200a in the light-emitting unit 200 may further include a current expansion layer 204 located between the first electrode 201 and the first semiconductor layer 202. Here, one side of the current expansion layer 204 in each sub-emissive functional layer 200a can be in contact with the first semiconductor layer 202, and the other side can be electrically connected to the first electrode 201. As one option, adopting ITO (indium tin oxide) as the material for the current expansion layer 204 and installing the current expansion layer 204 in the sub-emissive functional layer 200a is advantageous for hole transmission and improves the electrical performance of the chip structure 000.

[0179] In this application, the common electrode layer 200c in the light-emitting unit 200 may include a first common electrode layer 200c01 installed in contact with the second semiconductor 200b, and a second common electrode layer 200c02 electrically connected to the side of the first common electrode layer 200c01 away from the second semiconductor 200b. Here, the second common electrode layer 200c02 may be provided in the same layer as the first electrode 201 in each sub-light-emitting functional layer 200a, and may be made of the same material; that is, the second common electrode layer 200c02 and each first electrode 201 are formed using the same patterning process.

[0180] In embodiments of the present invention, the light-emitting unit 200 may further include an insulating protective layer 206 located on the side of each sub-light-emitting functional layer 200a away from the second semiconductor layer 200b, which is the first common electrode layer 200c01. Here, the insulating protective layer 206 may have a plurality of first connection holes V1 that are provided in a one-to-one correspondence with a plurality of sub-light-emitting functional layers 200a, and a second connection hole V2 provided in a correspondence with the first common electrode layer 200c01. The plurality of first connection holes V1 may also correspond in a one-to-one correspondence with a plurality of first electrodes 201, and each first electrode 201 can be electrically connected to the current expansion layer 204 in the corresponding sub-light-emitting functional layer 200a by the corresponding first connection hole V1. The second connection hole V2 may correspond to a second common electrode layer 200c02, and the second common electrode layer 200c02 can be electrically connected to the first common electrode layer 200c01 by the second connection hole V2. Note that the insulating protective layer 206 is shown in Figure 26 for clarity in the light-emitting unit, but it is not shown in Figure 28.

[0181] For example, the first common electrode layer 200c01 can play a role in current expansion.

[0182] For example, the materials of the first common electrode layer 200c01 and the second common electrode layer 200c02 are both metals.

[0183] As one option, the thickness of the first common electrode layer 200c01 can be much larger than the thickness of the current expansion layer 204. For example, the thickness of the first common electrode layer 200c01 can be much larger than the thickness of the sub-light-emitting functional layer 200a. That is, the side of the first common electrode layer 200c01 away from the second semiconductor layer 200b can be aligned with the side of the current expansion layer 204 away from the second semiconductor layer 200b. In this way, the first electrode 201 in the light-emitting unit 200 can also be aligned with the side of the second common electrode layer 200c02 away from the connecting layer 400. When connecting the chip structure 000 to the drive backplane, the first electrode 201 and the second common electrode layer 200c02 of the chip structure 000 need to be welded to the drive backplane. Therefore, if the first electrode 201 of the chip structure 000 is aligned with the side of the second common electrode layer 200c02 that is away from the connecting layer 400, it can be ensured that the chip structure 000 is stably fixed on the drive backplane.

[0184] In the embodiment of the present application, the first common electrode layer 200c01 may include a common electrode body portion 200c1, a first support portion 200c2 fixedly connected to the common electrode body portion 200c1, and two second support portions 200c3 fixedly connected to the first support portion 200c2. Here, the common electrode body portion 200c1 may be electrically connected to the second common electrode layer 200c02, the first support portion 200c2 may be distributed around the outer circumference of the common electrode body portion 200c1, and each of the second support portions 200c3 may be distributed on the side of the first support portion 200c2 away from the common electrode body portion 200c1. Furthermore, one of the two second support portions 200c3 can be located between the first pixel light-emitting functional layer 200a1 and the second pixel light-emitting functional layer 200a2, which are distributed in the row direction, and the other second support portion 200c3 can be located between the second pixel light-emitting functional layer 200a2 and the third pixel light-emitting functional layer 200a3, which are distributed in the column direction. In this way, it is possible to ensure that the overall light-emitting unit 200 has a high intensity, to ensure that the volume of the common electrode layer 200c is high, and to reduce the resistance for transmitting the common cathode signal in the light-emitting unit 200.

[0185] As can be seen from the above, the chip structure provided in the embodiment of the present application includes a first substrate, a light-emitting unit, and a color conversion unit. The light-shielding layer in the color conversion unit may include a main body and an extended portion distributed around the main body. Light rays emitted from each sub-light-emitting functional layer in the light-emitting unit are emitted toward the second semiconductor layer, and after the light rays cause an optical waveguide phenomenon inside the second semiconductor layer, the light rays emitted from the edge of the second semiconductor layer can be absorbed by the extended portion of the light-shielding layer, thereby reducing the probability of light leakage occurring in the chip structure, and thus improving the display effect of a display panel integrating such chip structures. Furthermore, a first package layer is provided between the light-shielding layer and the limiting dam layer, and the first package layer can cover the main body in the light-shielding layer and the main body in the light-shielding layer Limited Dam LayerBecause it overlaps with the orthographic projection onto the first substrate, after water oxygen from the external environment penetrates the light-shielding layer, the water oxygen that has entered the interior of the light-shielding layer can be blocked by the first packaging layer, thereby preventing these water oxygen molecules from entering the light-shielding layer. Limited Dam Layer This prevents water from penetrating the light-shielding layer, ensures that water and oxygen that penetrate the light-shielding layer do not corrode the optical functional layer, and further improves the reliability of the optical functional layer and enhances the stability of the chip structure.

[0186] Embodiments of the present invention further provide a display panel, which may be a display in a mobile phone, notebook computer, or tablet computer, or an outdoor advertising screen. Here, the display panel may include a drive backplane and a plurality of chip structures located on one side of the drive backplane. Here, each chip structure in the display panel may be one of the chip structures in the above embodiment. Furthermore, each anode pad and cathode pad in the chip structure may be fixed to the drive backplane by welding so as to be electrically connected to the drive backplane. The drive backplane can provide drive signals corresponding to each chip structure, cause the light-emitting units in the chip structures to emit light, and display a display screen corresponding to the display panel.

[0187] In the drawings, the dimensions of layers and areas may be exaggerated for clarity. Furthermore, when an element or layer is referred to as being "above" another element or layer, it can be understood that it may be directly above another element, or there may be an intermediate layer. Similarly, when an element or layer is referred to as being "below" another element or layer, it can be understood that it may be directly below another element, or there may be one or more intermediate layers or elements. Furthermore, when a layer or element is referred to as being "between" two layers or two elements, it can be understood that it may be the only layer between two layers or two elements, or there may be one or more further intermediate layers or elements. In this specification, similar reference numbers indicate similar elements.

[0188] In this application, the terms "first" and "second" are used solely for explanatory purposes and should not be understood as explicitly or implicitly indicating relative importance. The term "plural" means two or more unless explicitly limited.

[0189] The foregoing are merely selectable embodiments of the Application and are not intended to limit it. Any modifications, equivalent substitutions, improvements, etc., made in the spirit and principles of the Application should all be included within the scope of protection.

Claims

1. It includes a first substrate, a light-emitting unit, and a color conversion unit. The color conversion unit is located on the light-emitting side of the light-emitting unit, and the color conversion unit includes a light-shielding layer, a limiting dam layer, a first package layer, an optical function layer, and a second package layer. The light-shielding layer is located on one side of the first substrate, and the light-shielding layer includes a main body and an extended portion that surrounds the main body, and the main body has light-passing holes. The limiting dam layer is located on the side away from the first substrate of the light-shielding layer, the limiting dam layer has an opening region corresponding to the light-passing hole, the orthographic projection of the opening region onto the first substrate coincides with the orthographic projection of the corresponding light-passing hole onto the first substrate, the orthographic projection of the main body onto the first substrate coincides with the orthographic projection of the limiting dam layer onto the first substrate, and the extending portion protrudes beyond the outer contour of the limiting dam layer in a direction parallel to the first substrate. The first package layer is located between the light-shielding layer and the limiting dam layer, and the first package layer covers the main body and covers at least a portion of the extended portion. The optical functional layer is located within the aperture region, and at least a portion of the optical functional layer is used to convert the color of light rays entering the optical functional layer. The second package layer is located on the side away from the first substrate of the limiting dam layer, and the second package layer has a first contact area that contacts the first package layer, and the first contact area is installed surrounding the limiting dam layer. Chip structure.

2. The shape of the first contact area is ring-shaped, and the width range of the ring shape is 0.5 microns to 60 microns. The shape enclosed by the outer contour of the first substrate is rectangular, and the length and width of the rectangular shape are both 500 microns or less. The chip structure according to claim 1.

3. In a direction parallel to the first substrate, the distance between the outer contour of the light-shielding layer and the outer contour of the first substrate is 20 microns or less. The chip structure according to claim 1.

4. The outer contour of the first substrate is aligned with the outer contour of the light-shielding layer. The chip structure according to claim 1.

5. The first substrate has a first side and a second side that are arranged opposite to each other, and in a direction parallel to the first substrate, the distance between a part of the outer contour of the light-shielding layer adjacent to the first side and the first side is a first distance, and the distance between the other part of the outer contour of the light-shielding layer adjacent to the second side and the second side is a second distance, and the sum of the first distance and the second distance is 5 microns or more. The chip structure according to claim 3.

6. The outer contour of at least one of the first package layer and the second package layer is aligned with the outer contour of the first substrate. The chip structure according to claim 1.

7. There is a distance between the outer contour of at least one of the first package layer and the second package layer and the outer contour of the first substrate. The chip structure according to claim 1.

8. The outer surface of the first substrate is a fracture surface, and the fracture includes a first fracture portion, a second fracture portion, and a laser-cut portion located between the first fracture portion and the second fracture portion. The first fractured portion and the second fractured portion show traces of fracture caused by applying stress, and the laser-cut portion shows traces of ablation caused by laser cutting. The chip structure according to any one of claims 1 to 7.

9. The color conversion unit further includes a filter layer located between the first substrate and the optical functional layer, the filter layer includes a filter unit corresponding to the light-passing hole, and the orthographic projection of the filter unit onto the first substrate coincides with the orthographic projection of the corresponding light-passing hole onto the first substrate. The chip structure according to any one of claims 1 to 7.

10. The orthographic projections of the optical functional layer and the limiting dam layer onto the first substrate are both located within the orthographic projection of the first package layer onto the first substrate. The filter unit is located on the side of the first package layer away from the first substrate, and a portion of the first package layer is located within the light-passing holes. Alternatively, the filter unit is located on the side of the first package layer facing the first substrate, and at least a portion of the filter layer is located within the light-passing holes. The chip structure according to claim 9.

11. The first package layer has auxiliary openings corresponding to the light-passing holes, and the orthographic projection of the auxiliary openings onto the first substrate overlaps with the orthographic projection of the corresponding light-passing holes onto the first substrate. At least a portion of the filter unit is located within the auxiliary opening, and both opposing surfaces of the filter unit are in contact with the first substrate and the optical functional layer, respectively. The chip structure according to claim 9.

12. The orthographic projection of the auxiliary opening onto the first substrate lies within the orthographic projection of the light-passing hole onto the first substrate, and a portion of the first package layer extends into the light-passing hole and covers the inner wall of the light-passing hole such that the filter unit is positioned at a distance from the light-shielding layer. The chip structure according to claim 11.

13. The light-shielding layer has at least one ring-shaped through groove, and the orthographic projection of the light-passing hole onto the first substrate is located within the region enclosed by the orthographic projection of the ring-shaped through groove onto the first substrate. A portion of the first package layer is located within the ring-shaped through groove. The chip structure according to any one of claims 1 to 7.

14. The orthogonal projection of the ring-shaped through groove onto the first substrate is located within the orthogonal projection of the limiting dam layer onto the first substrate. The chip structure according to claim 13.

15. The second package layer covers the surfaces of the limiting dam layer and the optical functional layer that are away from the first substrate, and covers the outer surface of the limiting dam layer, and the light-emitting unit is located on the side of the second package layer that is away from the first substrate. The orthographic projections of the limited dam layer and the optical functional layer onto the first substrate are both located within the orthographic projection of the second package layer onto the first substrate. The chip structure according to any one of claims 1 to 7.

16. The materials of the first and second package layers are both inorganic materials. The chip structure according to claim 15.

17. The chip structure further includes a connecting layer located on the side of the second package layer away from the first substrate, the light-emitting unit located on the side of the connecting layer away from the first substrate, and the light-emitting unit is fixed to the side of the second package layer away from the first substrate via the connecting layer. The chip structure according to any one of claims 1 to 7.

18. The light-emitting unit includes a sub-light-emitting functional layer corresponding to the aperture region, and the orthographic projection of the sub-light-emitting functional layer onto the first substrate overlaps with the orthographic projection of the corresponding aperture region onto the first substrate. The chip structure according to claim 17.

19. The number of sub-light-emitting functional layers is multiple, The plurality of sub-emitting functional layers include an A sub-emitting functional layer and an B sub-emitting functional layer, and the plurality of sub-emitting functional layers emit a first ray in the operating state, and the first ray includes at least one of blue light and ultraviolet light. The number of aperture regions is multiple, and the multiple aperture regions include A-aperture region and B-aperture region, where A-aperture region is installed corresponding to the A-sub-light-emitting functional layer, and B-aperture region is installed corresponding to the B-sub-light-emitting functional layer. The optical functional layer includes a color conversion unit A for converting a first ray into red light, and a color conversion unit B for converting or maintaining the first ray into blue light, wherein the color conversion unit A is located within the aperture region A, and the color conversion unit B is located within the aperture region B. The chip structure according to claim 18.

20. Each of the plurality of sub-emissive functional layers includes a first electrode, a first semiconductor layer, and an emissive layer, which are stacked and arranged perpendicular to the first substrate. The light-emitting unit further includes a second semiconductor layer and a common electrode layer, wherein the second semiconductor layer is located on the light-emitting side of the plurality of sub-light-emitting functional layers. The second semiconductor layer includes connecting portions and auxiliary portions arranged in a direction parallel to the first substrate, the connecting portions being installed connected to the sub-light-emitting functional layer, the auxiliary portions connecting the connecting portions to each other, the connecting portions and the auxiliary portions having an integrated structure, and the common electrode layer being installed connected to the auxiliary portions. The chip structure according to claim 19.

21. The material of the first semiconductor layer contains p-type doped gallium nitride, and the light-emitting layer is a multiple quantum well layer. The second semiconductor layer includes a first sublayer and a second sublayer stacked perpendicular to and facing the first substrate, the first sublayer being located between the second sublayer and the light-emitting layer, the first sublayer being made of N-type doped gallium nitride, and the second sublayer being a gallium nitride buffer layer. The chip structure according to claim 20.

22. Each of the aforementioned sub-light-emitting functional layers further includes a current-extending layer located between the first electrode and the first semiconductor layer. The chip structure according to claim 20.

23. The invention comprises a drive backplane and a plurality of chip structures arranged in an array on one side of the drive backplane, wherein the chip structures are the chip structures described in any one of claims 1 to 7. Display panel.

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