Real-time recipe adjustment for inspection systems
Patent Information
- Application Number
- JP2026513100
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-13
- Filing Date
- 2024-08-13
- Publication Date
- 2026-10-14
AI Technical Summary
【0007】 【0007】 本開示の実施形態の他の利点は、本発明の特定の実施形態が例示及び例として示される添付図面と併せて解釈される以下の説明から明らかになるであろう。
Smart Images

Figure 2026533964000001_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Cross-Reference to Related Applications
[0001] This application claims priority to U.S. Patent Application No. 63 / 538,268 filed on September 13, 2023, which is incorporated herein by reference in its entirety.
[0002] Technical Field
[0002] Embodiments provided herein relate generally to inspection recipe adjustment techniques, and more specifically to real-time inspection adjustment techniques utilizing an offline computing platform.
BACKGROUND ART
[0003] Background
[0003] In the manufacturing process of integrated circuits (ICs), unfinished or finished circuit components are inspected to ensure that they are manufactured as designed and are free of defects. Inspection systems utilizing charged particle (e.g., electron) beam microscopes such as scanning electron microscopes (SEMs) or optical microscopes may be employed. As the physical size of IC components continues to shrink, accuracy and yield in defect detection are becoming increasingly important. Thus, precise control of inspection tools such as SCPM tools is critical for accurate defect detection and metrology. The process of record (POR) recipe for an inspection tool generally includes thousands of parameters, some of which are interdependent, making adjustment of inspection tool recipes labor-intensive and time-consuming, resulting in long cycle times. There is a demand in the art to provide recipe adjustment techniques without reducing the throughput of inspection systems.
SUMMARY OF THE INVENTION
[0004]
[0004] Some embodiments of the present disclosure can provide a real-time parameter tuning method for a wafer inspection system. The method includes acquiring one or more input images streamed from a wafer inspection system; applying a plurality of image enhancement parameters to one or more input images to generate a plurality of images having different features; identifying defects from the plurality of images by applying a plurality of defect detection parameters; and determining a parameter combination of a plurality of image enhancement parameters and a plurality of defect detection parameters used to detect a first type of defect based on the defects identified on the plurality of images.
[0005]
[0005] Some embodiments of the present disclosure can provide a real-time parameter tuning method for a wafer inspection system. The method includes: acquiring one or more input images streamed from a wafer inspection system; applying a first parameter combination to one or more input images to identify a first set of defects in one or more input images; applying a second parameter combination to one or more input images to identify a second set of defects in one or more input images; determining a first key performance indicator (KPI) value for the first parameter combination based on the first set of defects; determining a second KPI value for the second parameter combination based on the second set of defects; and ranking the first and second parameter combinations based on the first and second KPI values.
[0006]
[0006] Some embodiments of the present disclosure can provide a real-time parameter adjustment device for a wafer inspection system. The device includes a memory for storing a set of instructions and at least one processor configured to execute a set of instructions causing the device to perform operations including: acquiring one or more input images streamed from a wafer inspection system; applying a plurality of image enhancement parameters to one or more input images to generate a plurality of images having different features; identifying defects from the plurality of images by applying a plurality of defect detection parameters; and determining a parameter combination of a plurality of image enhancement parameters and a plurality of defect detection parameters used to detect a first type of defect based on the defects identified on the plurality of images.
[0007]
[0007] Other advantages of embodiments of the present disclosure will become apparent from the following description, which will be interpreted in conjunction with the accompanying drawings in which specific embodiments of the present invention are shown as examples and illustrative.
[0008] Brief explanation of the drawing
[0008] The above and other aspects of the present disclosure will become more apparent from the description of exemplary embodiments, which will be interpreted in conjunction with the accompanying drawings. [Brief explanation of the drawing]
[0009] [Figure 1]
[0009] This is a schematic diagram showing an exemplary charged particle beam inspection system consistent with embodiments of the present disclosure. [Figure 2A]
[0010] This is a schematic diagram showing an exemplary multibeam tool consistent with an embodiment of the disclosure, which may be part of the exemplary charged particle beam inspection system shown in Figure 1. [Figure 2B]
[0011] This is a schematic diagram showing an exemplary single-beam tool consistent with an embodiment of the present disclosure, which may be part of the exemplary charged particle beam inspection system shown in Figure 1. [Figure 3]
[0012] This is a flowchart illustrating an exemplary real-time recipe adjustment method for an inspection tool, consistent with embodiments of the present disclosure. [Figure 4A]
[0013] This is an exemplary parameter structure for parameter setting, consistent with embodiments of the present disclosure. [Figure 4B]
[0014] The following are exemplary results after applying various image enhancement parameters to an input image, consistent with the embodiments of this disclosure. [Figure 4C]
[0015] The following are exemplary images obtained after applying various image enhancement parameters to an input image, consistent with embodiments of the present disclosure. [Figure 5A]
[0016] The following shows the results of exemplary parameter combinations after applying various detection parameters to enhanced images, consistent with embodiments of this disclosure. [Figure 5B]
[0017] The following is an exemplary resulting image, suitable for measuring critical dimensions, consistent with embodiments of the present disclosure. [Figure 5C]
[0018] The following are exemplary resulting images suitable for detecting bridge defect types, consistent with embodiments of this disclosure. [Figure 5D]
[0019] The following are exemplary resulting images, suitable for detecting damage or defect types, consistent with embodiments of the present disclosure. [Figure 6A]
[0020] The results of exemplary parameter combinations after applying various threshold parameters to a first defect type, consistent with embodiments of this disclosure, are shown. [Figure 6B]
[0021] This document demonstrates the effect of changing threshold parameters when detecting defects, consistent with embodiments of this disclosure. [Figure 7A]
[0022] The following is a first exemplary analysis result for a set parameter combination consistent with the embodiments of this disclosure. [Figure 7B]
[0023] Shows a second exemplary analysis result for a set parameter combination, consistent with embodiments of the present disclosure. [Figure 7C]
[0024] Shows an exemplary KPI map for each parameter combination, consistent with embodiments of the present disclosure. [Figure 8]
[0025] This is a flowchart showing an exemplary real-time recipe adjustment method for an in-line inspection system, consistent with embodiments of the present disclosure. [Figure 9]
[0026] This is a block diagram of an exemplary computer system, consistent with embodiments of the present disclosure. [Modes for Carrying Out the Invention]
[0010]
[0027] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which the same reference numerals in different drawings represent the same or similar elements unless otherwise specified. The implementations set forth in the following description of the exemplary embodiments do not represent all implementations. Instead, these implementations are merely examples of apparatuses and methods consistent with aspects related to the disclosed embodiments as recited in the appended claims. For example, some embodiments are described in relation to the use of electron beams, but the present disclosure is not so limited. Other types of charged particle beams (including, for example, protons, ions, muons, or any other particle that carries charge) may also be applied similarly. Furthermore, other imaging systems such as optical imaging, photon detection, X-ray detection, and ion detection may be used.
[0011]
[0028] Electronic devices consist of circuits formed on a single piece of semiconductor material called a substrate. Semiconductor materials can include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium. Many circuits are formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has been dramatically reduced so that more circuits can be mounted on a substrate. For example, a smartphone IC chip may be about the size of a thumbnail but may contain more than 2 billion transistors, each transistor being less than 1 / 1000th the thickness of a human hair.
[0012]
[0029] Manufacturing these ICs, which have extremely small structures or components, is a complex, time-consuming, and costly process that often involves hundreds of individual steps. Even an error in a single step can result in a defective finished IC, rendering it unusable. Therefore, one goal of the manufacturing process is to avoid such defects and maximize the number of working ICs produced by the process, that is, to improve the overall process yield.
[0013]
[0030] One component that improves yield is monitoring the chip manufacturing process to ensure that a sufficient number of working integrated circuits are produced during the chip manufacturing process. One way to monitor the process is to inspect the chip circuit structure at various stages of its formation. This inspection can be performed using a scanning charged particle microscope ("SCPM"). For example, an SCPM can be a scanning electron microscope (SEM). An SCPM can be used to image these extremely small structures, essentially taking a "photograph" of the wafer structure. This image can be used to determine whether the structure was properly formed in the right place. If there are defects in the structure, the process can be adjusted, making it less likely that the defects will recur.
[0014]
[0031] As the physical size of IC components continues to shrink, accuracy and yield in defect detection are becoming increasingly important. Therefore, precise control of inspection tools such as SCPM tools is crucial for accurate defect detection and measurement. Since inspection tool recording process (POR) recipes generally contain thousands of parameters, some of which are interdependent, tuning inspection tool recipes is labor-intensive and time-consuming, resulting in longer cycle times. Current recipe tuning methods heavily rely on user experience, leading to inconsistent tuning performance and potentially low robustness of the resulting recipes. Furthermore, current inspection tools used for inline inspection have limited computing resources, and image processing for defect detection and measurement is already a bottleneck in high-volume manufacturing (HVM) wafer processes, making them unable to support additional computationally intensive processing such as recipe tuning. If the computational resources of the inspection tool are allocated to recipe tuning during manufacturing, wafer cycle time is consumed, reducing the throughput of the HVM wafer process. As described above, there is a trade-off between inspection sensitivity and throughput over wafer cycle time. Therefore, HVM production recipes are generally set to capture specific defect types under specific detection thresholds and image enhancement conditions, and are maintained throughout production. However, HVM wafer processing tends to experience process variations over time, resulting in defects being missed due to a fixed production recipe. Furthermore, because HVM processing is set to use the same threshold for specific defect types throughout the entire inspection of all HVM wafers, it may be impossible to capture new defects or new defect types without increasing wafer cycle time at the start of production. The industry needs a method for adjusting recipes without reducing the throughput of inspection systems.
[0015]
[0032] According to some embodiments of this disclosure, real-time recipe adjustment technology for inspection systems is provided. According to some embodiments of this disclosure, an offline computing platform, separate from the in-line inspection tools used in production, is used for real-time recipe adjustment for the in-line inspection tools. According to some embodiments of this disclosure, comprehensive and computationally intensive recipe adjustment for image inspection or measurement can be performed in parallel with in-line production without increasing wafer cycle time. According to some embodiments of this disclosure, it is possible to provide parameter combinations that can improve defect capture rates, including the detection of new defects or new defect types. According to some embodiments of this disclosure, it is possible to predict weaknesses in subsequent inspections.
[0016]
[0033] The relative dimensions of components in the drawings may be exaggerated for clarity. In the following description of the drawings, the same or similar reference numerals refer to the same or similar components or entities, and only differences relating to individual embodiments are described. Other purposes and advantages of the present disclosure may be realized by the elements and combinations described in the embodiments described herein. However, embodiments of the present disclosure are not necessarily required to achieve such exemplary purposes or advantages, and some embodiments may not achieve any of the purposes or advantages described.
[0017]
[0034] Without limiting the scope of this disclosure, several embodiments may be described in relation to providing scanning deflection systems and scanning deflection methods within systems utilizing electron beams ("e-beams"). Some scanning deflection systems may use electric fields to influence charged particle beams. However, this disclosure is not limited in that way. Other types of charged particle beams may be applied as well. For example, systems and methods may be applicable to optical systems, photons, X-rays, and ions, etc. Deflection may be used, for example, to scan a beam on a surface with a cathode ray tube (CRT), lithography machine, scanning charged particle microscope (SCPM), or other analytical instrument. While some embodiments discuss deflection systems that use electric fields to influence a beam, deflection may also be achieved, for example, by a magnetic field.
[0018]
[0035] As used herein, unless otherwise specified, the term “or” encompasses all possible combinations, except in cases where it is impossible. For example, if it is stated that a component includes A or B, unless otherwise specified or impossible, that component may include A, or B, or A and B. As a second example, if it is stated that a component includes A, B, or C, unless otherwise specified or impossible, that component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Expressions such as “at least one” do not necessarily modify the entire list that follows, nor do they necessarily modify each element of the list; “at least one of A, B, and C” should be understood to include only A, only B, only C, or any combination of A, B, and C. The phrases "one of A and B" or "any one of A and B" shall be interpreted in their broadest sense as including either one of A or one of B.
[0019]
[0036] Figure 1 shows an exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. The EBI system 100 may be used for imaging. As shown in Figure 1, the EBI system 100 includes a main chamber 101, a loading / locking chamber 102, a beam tool 104, and an instrument front-end module (EFEM) 106. The beam tool 104 is located within the main chamber 101. The EFEM 106 includes a first loading port 106a and a second loading port 106b. The EFEM 106 may include additional loading ports. The first loading port 106a and the second loading port 106b receive a wafer front-opening integrated pod (FOUP) containing a wafer to be inspected (e.g., a semiconductor wafer or a wafer made of other materials) or a sample (wafers and samples may be used interchangeably). A “lot” is a group of wafers that may be loaded for processing as a batch.
[0020]
[0037] One or more robotic arms (not shown) of the EFEM106 may transport a wafer to the loading / locking chamber 102. The loading / locking chamber 102 is connected to a loading / locking vacuum pump system (not shown) that removes gas molecules from within the loading / locking chamber 102 to a first pressure below atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from the loading / locking chamber 102 to the main chamber 101. The main chamber 101 is connected to a main chamber vacuum pump system (not shown) that removes gas molecules from within the main chamber 101 to a second pressure below the first pressure. After reaching the second pressure, the wafer is inspected by a beam tool 104. The beam tool 104 may be a single-beam system or a multi-beam system.
[0021]
[0038] The controller 109 is electronically connected to the beam tool 104. The controller 109 may be a computer configured to perform various controls of the EBI system 100. In Figure 1, the controller 109 is shown as being outside the structure, which includes the main chamber 101, the loading / locking chamber 102, and the EFEM 106, but it is recognized that the controller 109 may be part of the structure.
[0022]
[0039] In some embodiments, the controller 109 may include one or more processors (not shown). A processor may be a general-purpose or dedicated electronic device capable of manipulating or processing information. For example, a processor may include any number or any combination of a central processing unit (or "CPU"), a graphics processing unit (or "GPU"), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a programmable logic array (PLA), a programmable array logic (PAL), a generic array logic (GAL), a composite programmable logic device (CPLD), a field-programmable gate array (FPGA), a system-on-a-chip (SoC), an application-specific integrated circuit (ASIC), and any type of circuitry capable of data processing. A processor may also be a virtual processor, comprising one or more processors distributed across multiple machines or devices connected via a network.
[0023]
[0040] In some embodiments, the controller 109 may further include one or more memories (not shown). The memories may be general-purpose or dedicated electronic devices capable of storing code and data accessible by the processor (e.g., via a bus). For example, the memories may include any number of random-access memories (RAM), read-only memories (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, CompactFlash® (CF) cards, or any combination of any type of storage device. The code and data may include an operating system (OS) and one or more application programs (or "apps") for a particular task. The memories may also be virtual memories, including one or more memories distributed across multiple machines or devices connected via a network.
[0024]
[0041] Figure 2A shows a schematic diagram of an exemplary multibeam tool 104A (also referred to herein as apparatus 104A) and an image processing system 290 that may be configured for use in an EBI system 100 (Figure 1), consistent with embodiments of the present disclosure.
[0025]
[0042] The beam tool 104A includes a charged particle source 202, a gun aperture 204, a focusing lens 206, a primary charged particle beam 210 emitted from the charged particle source 202, a radiation source conversion unit 212, multiple beamlets 214, 216, and 218 of the primary charged particle beam 210, a primary projection optical system 220, an electric wafer stage 280, a wafer holder 282, multiple secondary charged particle beams 236, 238, and 240, a secondary optical system 242, and a charged particle detection device 244. The primary projection optical system 220 may include a beam separator 222, a deflection scanning unit 226, and an objective lens 228. The charged particle detection device 244 may include detection sub-regions 246, 248, and 250.
[0026]
[0043] The charged particle source 202, gun aperture 204, focusing lens 206, radiation source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 can be aligned with the primary optical axis 260 of the device 104A. The secondary optical system 242 and charged particle detection device 244 can be aligned with the secondary optical axis 252 of the device 104A.
[0027]
[0044] The charged particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other charge-carrying particles. In some embodiments, the charged particle source 202 may be an electron emission source. For example, the charged particle source 202 may include a cathode, an extractor, or an anode, and primary electrons may be emitted from the cathode and extracted or accelerated to form a primary charged particle beam 210 (in this case, a primary electron beam) together with a (virtual or real) crossover 208. For the sake of ease of explanation without causing ambiguity, electrons are used as examples in parts of this description. However, it should be noted that in any embodiment of this disclosure, any charged particle, not limited to electrons, may be used. The primary charged particle beam 210 can be visualized as being emitted from the crossover 208. The gun aperture 204 can block surrounding charged particles of the primary charged particle beam 210 to reduce the Coulomb effect. The Coulomb effect can cause an increase in the size of the probe spot.
[0028]
[0045] The radiation source conversion unit 212 may include an array of image forming elements and an array of beam limiting apertures. The array of image forming elements may include an array of micro-deflectors or microlenses. The array of image forming elements can form multiple (virtual or real) parallel images of the crossover 208 together with multiple beamlets 214, 216, and 218 of the primary charged particle beam 210. The array of beam limiting apertures can limit the multiple beamlets 214, 216, and 218. Three beamlets 214, 216, and 218 are shown in Figure 2A, but embodiments of the present disclosure are not so limited. For example, in some embodiments, the apparatus 104A may be configured to generate a first number of beamlets. In some embodiments, the first number of beamlets may be in the range of 1 to 1000. In some embodiments, the first number of beamlets may be in the range of 200 to 500. In some embodiments, the apparatus 104A may generate 400 beamlets.
[0029]
[0046] The focusing lens 206 can focus the primary charged particle beam 210. The currents in the beamlets 214, 216, and 218 downstream of the radiation source conversion unit 212 can be changed by adjusting the focusing force of the focusing lens 206 or by changing the radius size of the corresponding beam limiting aperture in the beam limiting aperture array. The objective lens 228 can focus the beamlets 214, 216, and 218 onto the wafer 230 for imaging, and can form a plurality of probe spots 270, 272, and 274 on the surface of the wafer 230.
[0030]
[0047] The beam separator 222 can be a Wien filter type beam separator that generates electrostatic and magnetic dipole fields. In some embodiments, when these are applied, the force exerted by the electrostatic dipole field on the charged particles (e.g., electrons) of the beamlets 214, 216, and 218 may be substantially equal in magnitude and opposite in direction to the force exerted by the magnetic dipole field on the charged particles. Thus, the beamlets 214, 216, and 218 can pass straight through the beam separator 222 with zero deflection angle. However, the total variance of the beamlets 214, 216, and 218 generated by the beam separator 222 may not be zero. The beam separator 222 can separate the secondary charged particle beams 236, 238, and 240 from the beamlets 214, 216, and 218 and guide the secondary charged particle beams 236, 238, and 240 into the secondary optical system 242.
[0031]
[0048] The deflection scanning unit 226 can deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 on the surface area of wafer 230. In response to the incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary charged particle beams 236, 238, and 240 can be emitted from wafer 230. The secondary charged particle beams 236, 238, and 240 may contain charged particles (e.g., electrons) having an energy distribution. For example, the secondary charged particle beams 236, 238, and 240 may be secondary electron beams containing secondary electrons (energy ≤ 50 eV) and backscattered electrons (energy between 50 eV and the incident energies of beamlets 214, 216, and 218). The secondary optical system 242 can focus the secondary charged particle beams 236, 238, and 240 onto the detection subregions 246, 248, and 250 of the charged particle detection device 244. The detection subregions 246, 248, and 250 may be configured to detect the corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, etc.) used to reconstruct an inspection image of structures on or beneath the surface area of the wafer 230.
[0032]
[0049] The generated signals can represent the intensities of the secondary charged particle beams 236, 238, and 240 and can be provided to an image processing system 290 that communicates with a charged particle detection device 244, a primary projection optical system 220, and an electric wafer stage 280. The movement speed of the electric wafer stage 280 can be synchronized and adjusted with the beam deflection controlled by a deflection scanning unit 226 so that the movement of the scanning probe spots (e.g., scanning probe spots 270, 272, and 274) can neatly cover the target area on the wafer 230. Such synchronization and adjustment parameters can be adjusted to suit wafers 230 of different materials. For example, wafers 230 of different materials may have different resistive-capacitive characteristics that can result in different signal sensitivities to the movement of the scan probe spots.
[0033]
[0050] The intensities of the secondary charged particle beams 236, 238, and 240 can vary depending on the external or internal structure of the wafer 230, thus indicating whether the wafer 230 contains defects. Furthermore, as described above, the beamlets 214, 216, and 218 can be projected onto different locations on the upper surface of the wafer 230 or different sides of the local structure of the wafer 230 to generate secondary charged particle beams 236, 238, and 240 which may have different intensities. Therefore, by mapping the intensities of the secondary charged particle beams 236, 238, and 240 to areas of the wafer 230, the image processing system 290 can reconstruct an image that reflects the characteristics of the internal or external structure of the wafer 230.
[0034]
[0051] In some embodiments, the image processing system 290 may include an image acquirer 292, storage 294, and a controller 296. The image acquirer 292 may include one or more processors. For example, the image acquirer 292 may include a computer, server, mainframe host, terminal, personal computer, or similar, or a combination thereof. The image acquirer 292 may be communicatively coupled to the charged particle detection device 244 of the beam tool 104A via a medium such as a conductor, fiber optic cable, portable storage medium, IR, Bluetooth, the Internet, a wireless network, wireless, or a combination thereof. In some embodiments, the image acquirer 292 may receive signals from the charged particle detection device 244 and construct an image. In this way, the image acquirer 292 may acquire an inspection image of the wafer 230. The image acquirer 292 may also perform various post-processing functions such as contour generation and overlaying indicators onto the acquired image. The image acquirer 292 may be configured to adjust the brightness and contrast of the acquired image. In some embodiments, the storage 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), or other types of computer-readable memory. The storage 294 may be coupled to the image acquirer 292 and used to store scanned raw image data as the original image and to store the post-processed image. The image acquirer 292 and the storage 294 may be connected to a controller 296. In some embodiments, the image acquirer 292, the storage 294, and the controller 296 may be integrated as a single control unit.
[0035]
[0052] In some embodiments, the image acquisition device 292 may acquire one or more inspection images of the wafer based on an imaging signal received from the charged particle detection device 244. The imaging signal may correspond to a scanning operation for imaging charged particles. The acquired image may be a single image containing multiple imaging areas. This single image may be stored in storage 294. This single image may be a source image that can be divided into multiple regions. Each of those regions may contain one imaging area containing a feature of the wafer 230. The acquired image may contain multiple images of a single imaging area of the wafer 230 sampled multiple times over time. These multiple images may be stored in storage 294. In some embodiments, the image processing system 290 may be configured to perform image processing steps using multiple images of the same location on the wafer 230. In some embodiments, the image processing system 290 may be configured to detect defects on the image or enhanced image according to a POR recipe. In some embodiments, the POR recipe may define a defect type for detection and a threshold for the set defect type. In some embodiments, the POR recipe may set image enhancement parameters to be applied to the image acquired by the image acquisition device 292. In some embodiments, detected defects can be stored in storage 294 along with their corresponding locations on the wafer or reticle.
[0036]
[0053] In some embodiments, the image processing system 290 may include a measurement circuit (e.g., an analog-to-digital converter) for obtaining the distribution of detected secondary charged particles (e.g., secondary electrons). The distribution data of charged particles collected during the detection time window can be used in combination with the corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface to reconstruct an image of the wafer structure under inspection. The reconstructed image can be used to reveal various features of the internal or external structure of the wafer 230, thereby revealing any defects that may be present in the wafer.
[0037]
[0054] In some embodiments, the charged particles can be electrons. When electrons from the primary charged particle beam 210 are projected onto the surface of the wafer 230 (e.g., probe spots 270, 272, and 274), the electrons from the primary charged particle beam 210 can interact with the particles of the wafer 230 and penetrate the surface of the wafer 230 to a certain depth. Some electrons from the primary charged particle beam 210 may interact elastically with the material of the wafer 230 (e.g., in the form of elastic scattering or collision) and be reflected or bounced back from the surface of the wafer 230. Elastic interactions conserve the total kinetic energy of the interacting objects (e.g., electrons from the primary charged particle beam 210), and the kinetic energy of the interacting objects is not converted into other forms of energy (e.g., heat, electromagnetic energy, etc.). Reflected electrons resulting from such elastic interactions may be called backscattered electrons (BSEs). Some electrons from the primary charged particle beam 210 may interact inelastically with the material of the wafer 230 (e.g., in the form of inelastic scattering or collision). Inelastic interactions do not conserve the total kinetic energy of the interacting objects; rather, some or all of the kinetic energy of the interacting objects is converted into other forms of energy. For example, inelastic interactions can cause the kinetic energy of some electrons in the primary charged particle beam 210 to cause electronic excitation and transitions of atoms in the material. Such inelastic interactions can also generate electrons that emanate from the surface of the wafer 230, which may be called secondary electrons (SEs). The yield or emission rate of BSEs and SEs depends, in particular, on the incident energy of the electrons in the primary charged particle beam 210 incident on the material under inspection and on the surface of the material. The energy of the electrons in the primary charged particle beam 210 can be partially imparted by its accelerating voltage (e.g., the accelerating voltage between the anode and cathode of the charged particle source 202 in Figure 2A). The amount of BSEs and SEs may be greater than or less than (or even the same as) the injected electrons in the primary charged particle beam 210.
[0038]
[0055] Next, with reference to Figure 2B, another example of a charged particle beam apparatus is described. Beam tool 104B (also referred to herein as apparatus 104B) may be an example of beam tool 104 and may be similar to beam tool 104A shown in Figure 2A. However, unlike apparatus 104A, apparatus 104B may be a single-beam tool that scans locations on the wafer one at a time using only one primary electron beam.
[0039]
[0056] As shown in Figure 2B, the apparatus 104B includes a wafer holder 136 supported by an electric stage 134 to hold the wafer 150 to be inspected. The beam tool 104B includes an electron emitter, which may include a cathode 103, an anode 121, and a gun aperture 122. The beam tool 104B further includes a beam limiting aperture 125, a focusing lens 126, a column aperture 135, an objective lens assembly 132, and a detector 144. In some embodiments, the objective lens assembly 132 may be a modified SORIL lens, which includes a pole piece 132a, a control electrode 132b, a deflector unit 132c, and an excitation coil 132d. In the detection or imaging process, the electron beam 161 emitted from the tip of the cathode 103 is accelerated by the voltage of the anode 121, passes through the gun aperture 122, the beam limiting aperture 125, and the focusing lens 126, and is focused to a probe spot 170 by the modified SORIL lens, which can then collide with the surface of the wafer 150. The probe spot 170 can be scanned across the surface of the wafer 150 by a deflector, such as the deflector unit 132c or other deflectors in the SORIL lens. Secondary particles or scattered particles, such as secondary electrons or scattered primary electrons emitted from the wafer surface, can be collected by the detector 144 to determine the beam intensity, and as a result, an image of the target area on the wafer 150 can be reconstructed.
[0040]
[0057] An image processing system 199, including an image acquirer 120, storage 130, and a controller 109, may also be provided. The image acquirer 120 may include one or more processors. For example, the image acquirer 120 may include a computer, server, mainframe host, terminal, personal computer, any kind of mobile computing device, and the like, or a combination thereof. The image acquirer 120 may be connected to the detector 144 of the beam tool 104B through a medium such as a conductor, fiber optic cable, portable storage medium, IR, Bluetooth, the internet, wireless network, wireless communication, or a combination thereof. The image acquirer 120 may receive signals from the detector 144 and construct an image. Thus, the image acquirer 120 may acquire an image of the wafer 150. The image acquirer 120 may also perform various post-processing functions such as image averaging, contour generation, overlaying indicators onto the acquired image, and the like. The image acquirer 120 may be configured to perform adjustments such as brightness and contrast of the acquired image. The storage 130 may be a storage medium such as a hard disk, random access memory (RAM), cloud storage, other types of computer-readable memory, and the like. The storage 130 may be coupled to the image acquirer 120 and may be used to store scanned raw image data as the original image and to store the post-processed image. The image acquirer 120 and the storage 130 may be connected to the controller 109. In some embodiments, the image acquirer 120, the storage 130, and the controller 109 may be integrated together as a single electronic control unit. In some embodiments, the image processing system 199 may be configured to detect defects on the image or enhanced image according to a POR recipe. In some embodiments, the POR recipe may set a defect type for detection and a threshold for the set defect type. In some embodiments, the POR recipe may set image enhancement parameters to be applied to the image acquired by the image acquirer 120. In some embodiments, the detected defects may be stored in the storage 130 along with the corresponding locations on the wafer or reticle.
[0041]
[0058] In some embodiments, the image acquisition unit 120 may acquire one or more images of a sample based on an imaging signal received from the detector 144. The imaging signal may correspond to a scanning operation for imaging charged particles. The acquired image may be a single image containing multiple imaging areas that may include various features of the wafer 150. This single image may be stored in the storage 130. Imaging may be performed based on imaging frames.
[0042]
[0059] The focusing and illumination optics of an electron beam tool may include or be complemented by electromagnetic quadrupole lenses. For example, as shown in Figure 2B, the electron beam tool 104B may include a first quadrupole lens 148 and a second quadrupole lens 158. In some embodiments, the quadrupole lenses may be used to control the electron beam. For example, the first quadrupole lens 148 may be controlled to adjust the beam current, and the second quadrupole lens 158 may be controlled to adjust the beam spot size and beam shape.
[0043]
[0060] Figure 2B shows a charged particle beam apparatus that may use a single primary beam configured to generate secondary electrons by interacting with a wafer 150. The detector 144 may be positioned along the optical axis 105, as in the embodiment shown in Figure 2B. The primary electron beam may be configured to move along the optical axis 105. Therefore, the detector 144 may include a hole in its center so that the primary electron beam can pass through and reach the wafer 150. Figure 2B shows an example of a detector 144 having an opening in its center. However, some embodiments may use a detector positioned off-axis with respect to the optical axis along which the primary electron beam moves. For example, a beam separator 222 may be provided to guide the secondary electron beam toward an off-axis detector, as in the embodiment shown in Figure 2B above. The beam separator 222 may be configured to redirect the secondary electron beam toward an electron detection device 244, as shown in Figure 2A.
[0044]
[0061] Images generated by SCPM can be used for defect inspection. For example, a generated image capturing a test device area on a wafer can be compared to a reference image capturing the same test device area. The reference image may be predetermined (e.g., by simulation) and may not contain known defects. If the difference between the generated image and the reference image exceeds an acceptable level, a potential defect may be identified. As another example, SCPM may scan multiple areas of a wafer, each containing a test device area designed similarly, and generate multiple images capturing those test device areas during manufacturing. The multiple images can be compared to each other. If the difference between the multiple images exceeds an acceptable level, a potential defect may be identified.
[0045]
[0062] In some embodiments, machine learning may be used to generate inspection images, reference images, or other images associated with the apparatus 100, 104A, or 104B. For example, in some embodiments, the machine learning system can operate in conjunction with, for example, the controller 109 or 296, the image processing system 199 or 290, the image acquirer 120 or 292, or the storage unit 130 or 294 in Figures 1 to 2B. In some embodiments, machine learning may be used in real-time recipe adjustment methods, for example, method 300 in Figure 3 or method 800 in Figure 8, in conjunction with, for example, the offline computing platform 301 in Figure 3, as described below. In some embodiments, the machine learning system may include a discriminative model. In some embodiments, the machine learning system may include a generative model. For example, learning can feature two types of mechanisms: discriminative learning, which can be used to create classification and detection algorithms, and generative learning, which can be used to actually create models that can render images. For example, as will be further described below, the generative model may be configured to generate images from design clips similar to corresponding locations on a wafer in an SEM image. This can be done by 1) training a generative model using design clips from locations on the wafer and associated actual SEM images, and 2) using the model in inference mode to supply model design clips to locations where simulated SEM images are required. Such simulated images can be used, for example, as reference images in die-versus-database inspection.
[0046]
[0063] If a model includes one or more discriminative models, the discriminative models may have any suitable architecture or configuration known in the art. Discriminative models, also known as conditional models, are a class of models used in machine learning to model the dependence of an unobserved variable "y" on an observed variable "x". Within a probabilistic framework, this can be done by modeling a conditional probability distribution P(y|x) that can be used to predict y based on x. Discriminative models, in contrast to generative models, may not be able to generate samples from a joint distribution of x and y. However, for tasks such as classification and regression that do not require a joint distribution, discriminative models can yield superior performance. Generative models, on the other hand, are typically more flexible than discriminative models in representing dependencies in complex learning tasks. In addition, most discriminative models are inherently supervised and cannot be easily extended to unsupervised learning. Application-specific details ultimately determine the suitability of the choice between discriminative and generative models.
[0047]
[0064] Generative models can generally be defined as models that are inherently probabilistic. In other words, a “generative” model is not a model that performs forward simulation or a rule-based approach, and therefore may not need to model the physics of the processes involved in the generation of the actual image or output (for which the simulated image or output is generated). Instead, a generative model can be trained (in the sense that its parameters can be learned) based on a suitable training dataset. Such a generative model may have numerous advantages over the embodiments described herein. In addition, a generative model may be configured to have a deep learning architecture in that the generative model may include multiple layers, and these multiple layers may perform several algorithms or transformations. The number of layers included in a generative model may depend on the specific use case. For practical purposes, a suitable range of layers is two to several dozen.
[0048]
[0065] Deep learning is a type of machine learning. Machine learning can generally be defined as a type of artificial intelligence (AI) that gives computers the ability to learn without being explicitly programmed. Machine learning focuses on developing computer programs that can teach themselves to grow and change when exposed to new data. Machine learning explores the study and construction of algorithms that can learn from data and make predictions on data, and such algorithms overcome the need to follow strictly static program instructions by making data-driven predictions or decisions by building models from sample inputs.
[0049]
[0066] The machine learning described herein can be further implemented as described in “Statistical Machine Learning,” by Sugiyama, Morgan Kaufmann, 2016, 534 pages, “Discriminative, Generative, and Imitative Learning,” Jebara, MIT Thesis, 2002, 212 pages, and “Principles of Data Mining (Adaptive Computation and Machine Learning),” Hand et al., MIT Press, 2001, 578 pages, which are incorporated by reference as if fully described herein. The embodiments described herein can further be configured as described in these references.
[0050]
[0067] In some embodiments, machine learning systems may include neural networks. For example, a model may be a deep neural network with a set of weights that model the world according to the data supplied to train it. Neural networks can generally be defined as computational methods based on a set of relatively large neural units that loosely model how a biological brain solves problems using relatively large clusters of biological neurons connected by axons. Each neural unit is connected to many other neural units, and the links may be coercive or inhibitory in their influence on the activation state of the connected neural units. These systems are self-learning and trainable rather than explicitly programmed, and excel in areas where traditional computer programs struggle to represent solutions or feature detection.
[0051]
[0068] A neural network typically consists of multiple layers, with signal paths traversing from front to back. While the goal of a neural network is to solve problems in the same way the human brain does, some neural networks are far more abstract. Modern neural network projects typically operate with thousands to millions of neural units and millions of connections. A neural network can have any suitable architecture or configuration known in the relevant field.
[0052]
[0069] In further embodiments, the model may include convolutional and deconvolutional neural networks. For example, embodiments described herein can utilize learning concepts such as convolutional and deconvolutional neural networks to solve representation transformation problems that are normally difficult to handle (e.g., rendering). The model may have any convolutional and deconvolutional neural network configuration or architecture known in the art.
[0053]
[0070] Herein, we refer to Figure 3, a flowchart of an exemplary real-time recipe adjustment method 300 for an inspection tool, consistent with embodiments of the present disclosure. According to some embodiments of the present disclosure, the real-time recipe adjustment method 300 can be executed on an offline computing platform 301, separate from the inline tool 1001. In some embodiments, the inline tool 1001 can be an inspection tool, for example, the inspection system 100 in Figure 1, the multi-beam tool 104A in Figure 2A, or the single-beam tool 104B in Figure 2B. In some embodiments, the inline tool 1001 can be one or more inline systems used in an HVM wafer process. For example, if multiple inspection systems use the same design data in an HVM process, the offline computing platform 301 can perform the real-time recipe adjustment method 300 for these multiple inspection systems. In some embodiments, the offline computing platform 301 has the capability to perform image processing and defect detection to mimic the inspection and measurement performed by the inline tool 1001. Since the inline tool 1001 can continue to perform its operations while the offline computing platform 301 is performing the recipe adjustment method 300, recipe adjustments for the inline tool 1001 can be performed without affecting the throughput of the inline tool 1001.
[0054]
[0071] According to some embodiments of the present disclosure, the real-time recipe adjustment method 300 can be initiated by acquiring one or more input images 3001, as shown in Figure 3. In some embodiments, the input images 3001 can be acquired from an inline tool 1001. In some embodiments, once acquired from the inline tool 1001, the input images 3001 are streamed in real time from the inline tool 1001. Although not shown in Figure 3, the input images 3001 can be stored on the offline computing platform 301, such as in a database on the offline computing platform 301. According to some embodiments of the present disclosure, the input images 3001 can be inspection images generated by, for example, the EBI system 100 in Figure 1, the multi-beam tool 104A in Figure 2A, or the single-beam tool 104B in Figure 2B. In some embodiments, the inspection image is an SCPM image of a sample or wafer. In some embodiments, the input images 3001 can be raw images scanned by the inspection tool. Although "input image 3001" is singular, it should be recognized that "input image 3001" may refer to a set of input images streamed from inline tool 1001.
[0055]
[0072] According to some embodiments of this disclosure, when an input image 3001 is streamed to an offline computing platform 301, the inline tool 1001 may stream a POR recipe containing parameter information used to generate the input image 3001. The POR recipe may also be stored in the offline computing platform 301. In some embodiments, the inline tool 1001 may also stream the results of image inspection and measurement of the input image 3001, along with a POR parameter recipe for performing image inspection and measurement on the input image 3001. For example, the POR parameter recipe for performing image inspection and measurement may include image enhancement parameters, defect type parameters, thresholds for determining defect types, etc. In some embodiments where multiple beams are used in the inline tool 1001, the inline tool 1001 may also stream information on which beam from among the multiple beams is associated with the input image 3001. In some embodiments where multiple inline systems are used, the inline tool 1001 may also stream information on which inline system from among the multiple inline systems is associated with the input image 3001.
[0056]
[0073] According to some embodiments of this disclosure, a parameter recipe can be set up for an experiment in a Design of Experiment (DOE) process 310. During the DOE process 310, parameter values for a set of target parameters can be set up for the experiment. In some embodiments, the set of parameters may include at least one parameter used in an inline tool 1001 for inspection and measurement of inspection images. In some embodiments, the DOE process 310 can be repeated to sweep through various combinations of target parameters. In some embodiments, an experiment using a pre-designed or predetermined recipe combination can be automatically triggered when an input image 3001 is streamed to an offline computing platform 301. According to some embodiments of this disclosure, the input image 3001 is used as input for image inspection for defect detection or measurement using a predetermined recipe combination.
[0057]
[0074] In some embodiments, the offline computing platform 301 can provide an interface for displaying parameters organized in a layered structure 400, thereby facilitating the parameter value setting process. Figure 4A is an exemplary parameter structure for parameter setting consistent with embodiments of the present disclosure. As shown in Figure 4A, the parameter structure 400 can be configured to have multiple levels. In Figure 4A, each level can include multiple parameter groups belonging to different categories. For example, the parameters L1 at the first level may include a first parameter group PG1 related to area selection for inspection / measurement, a second parameter group PG2 related to image enhancement, and a third parameter group PG3 related to defect type. The parameters L2 at the second level may include parameter subgroups belonging to each parameter group PG1, PG2, or PG3 in the first level L1. In some embodiments, parameter subgroups belonging to a particular parameter group in the first level L1 can be configured to appear on the interface after the corresponding parameter group has been selected. Figure 4A shows the subgroups of parameters belonging to the third group PG3 when the third group PG3 is selected, and the third group PG3 is shown in gray. For example, the second level L2 may include the first parameter subgroup PSG31 related to the first defect type, the second parameter subgroup PSG32 related to the second defect type, and the third parameter subgroup PSG33 related to the third defect type. Similarly, the parameters L3 at the third level may include the parameter subgroups belonging to each of the higher-level parameter subgroups PSG31, PSG32, or PSG33 in the second level L2. Figure 4A shows the subgroups of parameters belonging to the second subgroup PSG32 when the second subgroup PSG32 is selected, and the second subgroup PSG32 is shown in a darker gray.For example, the third level L3 may include a first parameter subgroup PSG321 related to a first threshold for determining a second defect type, a second parameter subgroup PSG322 related to a second threshold for determining a second defect type, and a third parameter subgroup PSG323 related to a third threshold for determining a second defect type.
[0058]
[0075] While the parameter structure 400 is shown to have three levels, each having three groups, it will be recognized that any level having any number of parameter groups / parameters can be used in embodiments of this disclosure. It will also be recognized that any parameters available for inspection / measurement in the inline tool 1001 can be set and tested for optimization. In some embodiments, the parameter structure 400 may include other parameters not used in the inline tool 1001. For example, if the inline tool 1001 uses a POR recipe to detect first and second defect types, the parameter structure 400 may have parameters for detecting a third defect type.
[0059]
[0076] Referring again to Figure 3, according to some embodiments of the present disclosure, image enhancement (IH) parameters can be set and applied during the DOE process 310. During the IH process 3110, various image enhancement parameters can be set and applied to the input image 3001. Figure 4B shows an exemplary enhanced image 3002 after applying various image enhancement parameters to the input image 3001, consistent with embodiments of the present disclosure. As shown in Figure 4B, the first group of images shows the results after applying a first image enhancement parameter E1 to a group of input images 3001. Similarly, the second group of images shows the results after applying a second image enhancement parameter E2 to a group of input images 3001. Figure 4B also shows the nth group of images after applying an nth image enhancement parameter EN to a group of input images 3001.
[0060]
[0077] According to some embodiments of the present disclosure, a series of images with different characteristics can be created by applying various image enhancement parameters to an input image 3001. Figure 4C shows an exemplary enhanced image 3002 after applying various image enhancement parameters (e.g., E1 to EN) to the input image 3001, consistent with embodiments of the present disclosure. For example, enhanced image 401 can be obtained by applying a first image enhancement parameter to the input image 3001, and enhanced image 402 can be obtained by applying an Nth image enhancement parameter to the input image 3001. In Figure 4C, the input image 3001 is also included as a raw image that has not undergone any image enhancement. As will be discussed later with respect to Figures 5B, 5C, and 5D, each enhanced image 3002 exhibits different characteristics that can make the enhanced image more suitable for a particular defect inspection or measurement.
[0061]
[0078] Referring again to Figure 3, according to some embodiments of the present disclosure, detection (DD) parameters can be set and applied during the DOE process 310. Various detection parameters can be set during the DD process 3120, and defect detection or measurement can be performed on the input image 3001 or enhanced image 3002 according to the set detection parameters.
[0062]
[0079] Figure 5A shows exemplary detection results 3003 after applying various detection parameters to a enhanced image, consistent with embodiments of the present disclosure. In Figure 5A, the first column C1 represents the result after applying a first detection parameter D1 to a enhanced image, e.g., the enhanced image 3002 of Figure 4B, and the second column C2 represents the result after applying a second detection parameter D2 to the enhanced image 3002 of Figure 4B. Similarly, the Mth column CM represents the result after applying the Mth detection parameter DM to the enhanced image 3002 of Figure 4B. According to some embodiments of the present disclosure, the detection results 3003 in Figure 5A can be used to evaluate the performance of each combination of two parameters: image enhancement parameters (e.g., E1-EN) and detection parameters (e.g., D1-DM).
[0063]
[0080] According to some embodiments of this disclosure, each enhanced image 3002 having different image enhancement parameters from a single original input image 3001 may exhibit different features. Figures 5B, 5C, and 5D show exemplary enhanced images better suited for specific defect detection or measurement. Figure 5B shows an exemplary image better suited for measuring critical dimensions, consistent with embodiments of this disclosure. In Figure 5B, image 510 may be the original image, for example, the input image 3001 to which no image enhancement parameters have been applied. As shown in Figure 5B, image 510 may have features suitable for measuring a critical dimension 5001 of a structure having a particular pattern. Image 510 and its measured critical dimension 5001 are provided as examples for illustration, and it will be recognized that any enhancement can be applied to the input image to make the image suitable for any other type of critical dimension. Figure 5C shows an exemplary image suitable for detecting bridge defects, consistent with embodiments of this disclosure. In Figure 5C, image 520 may be an enhanced image after applying a specific image enhancement parameter, such as high contrast, to the input image 3001. As shown in Figure 5C, image 520 may have features suitable for detecting a bridge defect 5002. Figure 5D shows an exemplary image suitable for detecting a fracture defect, consistent with embodiments of the present disclosure. In Figure 5D, image 530 may be an enhanced image after applying specific image enhancement parameters, such as low brightness, to the input image 3001. As shown in Figure 5D, image 530 may have features suitable for detecting a fracture defect 5003.
[0064]
[0081] Referring again to Figure 3, according to some embodiments of the present disclosure, in the DD process 3120, one or more additional detection parameters can be set, and defect detection or measurement can be performed on the input image 3001 or enhanced image 3002 according to the set detection parameters. Figure 6A shows exemplary results after applying various threshold parameters for a first defect, consistent with embodiments of the present disclosure. In Figure 6A, the first column C11 represents the result after applying a first threshold T1 for a first detection parameter D1 to an enhanced image, for example, the enhanced image 3002 in Figure 4B, and the second column C12 represents the result after applying a second threshold T2 for the first detection parameter D1 to the enhanced image 3002 in Figure 4B. Similarly, the Kth column C1K represents the result after applying a Kth threshold TK for the first detection parameter D1 to the enhanced image 3002 in Figure 4B. According to some embodiments of this disclosure, the results in Figure 6A can be used to evaluate the performance of each combination of three parameters: an image enhancement parameter (e.g., E1), a first detection parameter (e.g., D1), and various thresholds (e.g., T1-TK).
[0065]
[0082] According to some embodiments of this disclosure, a specific defect can be identified when a particular measurement exceeds a set threshold. In some embodiments, the threshold for detecting a particular defect type can be determined based on the most stable critical dimension suitable for a particular pattern. Figure 6B illustrates the effect of changing the threshold parameter when detecting a defect, consistent with embodiments of this disclosure. Figure 6B shows two bridge defect candidates, 6004 and 6005. Depending on the applied threshold, the two bridge defect candidates 6004 and 6005 can be identified as either a defect or not a defect. For example, a bridge defect can be identified when the distance between two adjacent structures is less than a threshold. If the threshold is set too low, neither of the two bridge defect candidates 6004 and 6005 can be identified as a bridge defect. In contrast, if the threshold is set too high, both bridge defect candidates 6004 and 6005 can be identified as bridge defects. If the threshold is set to an intermediate value, the first bridge defect candidate 6004 may not be identified as a bridge defect, while the second bridge defect candidate 6005 may be identified as a bridge defect. By setting an appropriate threshold for a particular defect type, the defect detection rate can be improved and the false positive rate can be reduced. Although embodiments are shown using a limited number of parameter combinations with a limited number of parameters, it will be recognized that any number of parameter combinations with any number of parameters can be used in the DOE process 310 to yield a variety of experimental results depending on which performance of the set parameter combinations is evaluated.
[0066]
[0083] Referring again to Figure 3, according to some embodiments of the present disclosure, detection analysis can be performed based on the detection results 3003. In some embodiments, detection analysis can be performed for each parameter combination. In some embodiments, during the analysis process 320, defects found in the detection results 3003 can be listed as defects. In some embodiments, defects found in the detection results 3003 can be associated with corresponding locations on the wafer or design data. In some embodiments, during the analysis process 320, the false positive rate can be determined from the detection results 3003. For example, the ratio of the number of false positives to the total number of defects found in the detection results 3003 can be determined. In some embodiments, defects found in the detection results 3003 that are not harmful defects can be listed as captured defects. The capture rate can also be determined for each parameter combination during the analysis process 320. In some embodiments, captured defects can be classified according to their defect type. In some embodiments, the process time for defect detection or measurement can be determined for each parameter combination.
[0067]
[0084] In some embodiments, the location of a defect or corresponding defect can be identified by comparing the detection result 3003 with the corresponding design data. In some embodiments, the design data may be a layout file for wafer design, which may be a golden image or in the Graphic Database System (GDS) format, Graphic Database System II (GDS II) format, Open Artwork System Interchange Standard (OASIS) format, Caltech Intermediate Format (CIF), etc. The wafer design may include patterns or structures to be included on the wafer. The patterns or structures may be mask patterns used to transfer features from a photolithography mask or reticle to the wafer. In some embodiments, among other things, the layout in GDS or OASIS format may include feature information stored in a binary file format that represents planar geometric shapes, text, and other information relating to the wafer design. In some embodiments, the design data may also be retrieved from the inline tool 1001 when the corresponding input image 3001 is streamed from the inline tool 1001.
[0068]
[0085] In some embodiments, the detected defects can be compared with the results from the inline tool 1001. In some embodiments, if a new defect is found in the detection results 3003 that was not found by the inline tool 1001, the new defect is shown as a newly discovered defect. In some embodiments, if a new defect type is found in the detection results 3003 that was not found by the inline tool 1001, the new defect type is shown as a newly discovered defect type. In some embodiments, if a defect found by the inline tool 1001 is not found in the detection results 3003, the defect is shown as an undetected defect.
[0069]
[0086] Figure 7A shows a first exemplary analysis result for a set parameter combination consistent with embodiments of the present disclosure. In Figure 7A, Figure 710 shows the detected defects at corresponding locations on wafer 711. As shown in Figure 7A, defect 7001 indicates a defect already found by the inline tool 1001, and defect 7002 indicates a defect newly discovered by the offline computing platform 301 using the set parameter combination. In some embodiments, the offline computing platform 301 may not find the existing defect 7001 found by the inline tool 1001, and this defect may be referred to as an undetected defect in the present disclosure. In some embodiments, although not shown in Figure 7A, an undetected defect may also be shown in Figure 710. While Figure 710 shows a defect of the first defect type, it will be recognized that similar analysis can be performed for any defect type. Figure 7B shows a second exemplary analysis result for a set parameter combination consistent with embodiments of the present disclosure. Graph 720 shows the number of new defects 7002 compared to the number of existing defects 7001 for the first defect type D1 and the second defect type D2. In some embodiments, Graph 720 can show the ratio of the number of new defects 7002 to the number of existing defects 7001.
[0070]
[0087] According to some embodiments of the present disclosure, referring to Figure 3, analysis results 3004 (such as the results shown in Figures 7A and 7B) can be generated for each parameter combination containing two or more parameters, or for each defect type. In some embodiments, the analysis results 3004 can be provided in any other form that facilitates qualitative or quantitative evaluation of the parameter combinations. According to some embodiments of the present disclosure, the analysis results 3004 may also include false positive rates for each parameter combination or for each defect type. According to some embodiments of the present disclosure, the analysis results 3004 may have capture rates or false positive rates for each defect type or for each parameter combination. According to some embodiments of the present disclosure, the analysis results 3004 may include throughput information such as process time for each defect type or for each parameter combination. According to some embodiments of the present disclosure, the analysis process 320 can be performed on an input image 3001 generated by a single-beam inspection system (e.g., single-beam tool 104B in Figure 4B) or on an input image 3001 generated by each beam of a multi-beam inspection system (e.g., multi-beam tool 104A in Figure 4A). Furthermore, in some embodiments, the analysis results 3004 can be generated for each beam channel (for example, a single beam of the single-beam tool 104B in Figure 4B or each beam of the multi-beam tool 104A in Figure 4A). According to some embodiments of this disclosure, a deep learning algorithm can be applied to the analysis process 320. In some embodiments, a deep learning algorithm can be used to classify defects into multiple groups according to defect type to determine the capture rate or false positive rate, etc. Separate from the inline tool 1001, the offline computing platform 301 performs recipe adjustments for the inline tool 1001, enabling real-time analysis of large amounts of data with the help of a computationally intensive deep learning model without increasing wafer cycle time.
[0071]
[0088] Referring again to Figure 3, according to some embodiments of the present disclosure, parameter optimization can be performed based on the analysis results 3004. In some embodiments, optimized parameter combinations for each defect type detection can be found during the optimization process 330. According to some embodiments of the present disclosure, key performance indicators (KPIs) can be set to evaluate the performance of parameter combinations for detecting a particular defect type. For example, KPIs for a particular defect type may indicate the capture rate, throughput, etc., within a specific range. In some embodiments, KPIs may vary depending on the defect type, implementation, requirements, etc. For example, KPIs can be determined based on various criteria, such as defect threshold, defect intensity, density histogram, image clarity, etc.
[0072]
[0089] Figure 7C shows an exemplary KPI map for each combination of parameters consistent with embodiments of the present disclosure. As shown in Figure 7C, the X-axis represents the value of the first parameter P1, the Y-axis represents the value of the second parameter P2, and the graph shows the capture rate as a KPI according to the combination of the first parameter P1 and the second parameter P2. For example, the capture rate for the value of the first parameter P1 p11 and the value of the second parameter p21 is 80% in Figure 7C. Similarly, the graph can show the capture rate for any combination of the first parameter P1 and the second parameter P2.
[0073]
[0090] According to some embodiments of the present disclosure, parameter combinations can be automatically ranked according to their KPI values during the optimization process 330. For example, parameter combinations for a particular defect type can be ranked according to their capture rate so that the parameter combination with the highest capture rate is ranked higher. In some embodiments where two parameter combinations have the same capture rate, the parameter combinations can be ranked according to additional criteria. For example, a parameter combination that provides more stable defect detection results can be ranked higher. In Figure 7C, the parameter combinations corresponding to the first area A1 and the second area A2 have the same capture rate of 60-80%. In this example, because the first parameter combination is located in a wider area (i.e., A1) compared to the second parameter combination in the second area A2, the first parameter combination of the value p11 of the first parameter P1 and the value p21 of the second parameter P2 can be ranked higher than the second parameter combination of the value p12 of the first parameter P1 and the value p22 of the second parameter P2. In this case, when using the first parameter combination, the defect detection results may be more stable even when the parameters are not precisely calibrated. It will be recognized that various ranking strategies may be applicable to some embodiments of this disclosure. In some embodiments, parameter combinations can be automatically ranked as long as they meet certain criteria. For example, the criterion may be a defect capture rate of 60% or higher. In this example, parameter combinations having a capture rate of 60% or higher can be ranked for use in inline production.
[0074]
[0091] According to some embodiments of this disclosure, a deep learning algorithm can be applied to the optimization process 330. In some embodiments, the deep learning algorithm can be trained to determine an optimized parameter combination based on the analysis results 3004 and set criteria. In some embodiments, the deep learning algorithm can automatically rank the parameter combinations according to its set criteria and KPIs. Separate from the inline tool 1001, the offline computing platform 301 performs recipe tuning for the inline tool 1001, enabling real-time analysis of large amounts of data with the help of a computationally intensive deep learning model without increasing wafer cycle time. According to some embodiments of this disclosure, the optimization results, including the optimized parameter combination 3005 or ranked parameter combinations for a particular defect type, can be stored in the offline computing platform 301 for later reference, for example. In some embodiments, parameter combinations ranked by different KPIs or criteria (e.g., throughput) can also be stored in the offline computing platform 301. In some embodiments, only parameter combinations ranked to a certain percentage or a certain number of highs can be stored in the offline computing platform 301.
[0075]
[0092] According to some embodiments of this disclosure, a parameter combination 3005 determined to be an optimized parameter combination for a particular defect type can be provided to the inline tool 1001. In some embodiments, the parameter combination 3005 can be used in the real-time inline tool 1001 when detecting defects for a particular defect type. In some embodiments, the inline tool 1001 updates the parameters of the POR recipe corresponding to the parameter combination 3005 and continues to perform inspections using the updated parameters. According to some embodiments of this disclosure, the parameter combination 3005 determined to be an optimized parameter combination for a particular defect type can also be used in the DOE process 310. For example, in the DOE process 310, the parameter range for experiments to detect a particular defect type can be narrowed based on the provided parameter combination 3005. Thus, more accurate experimental results can be obtained in a shorter experiment time.
[0076]
[0093] Referring again to Figure 3, according to some embodiments of this disclosure, weakness prediction can be performed based on the analysis results 3004. In some embodiments, during the prediction process 340, pattern analysis can be performed to determine patterns that are more likely to have defects of a particular defect type, based on the patterns of defects found and the design data. Patterns that are more likely to have defects of a particular defect type can be determined based on the analysis results 3004. In some embodiments, pattern search can be applied to find additional locations on the reticle or mask pattern that are more likely to have defects of a particular defect type. In some embodiments, pattern search can be performed to find locations on the design data that have patterns similar to or identical to patterns that have defects of a particular defect type.
[0077]
[0094] According to some embodiments of this disclosure, weak point data 3006 can be provided to an inline tool 1001. In some embodiments, the weak point data 3006 can be used by the inline tool 1001 to inspect portions of the wafer corresponding to weak points that are likely to have defects of a particular type. In some embodiments, the inline tool 1001 can inspect portions of the wafer corresponding to weak points for a particular type using a parameter combination 3005 which has been determined to be an optimized parameter combination for a particular type of defect.
[0078]
[0095] According to some embodiments of the present disclosure, inspection performance for a particular parameter combination is monitored during real-time recipe adjustment 300, making it possible to detect variations in the HVM process or drift of the inspection tool early for correction. Furthermore, according to some embodiments of the present disclosure, all adjusted parameter combinations are saved, making it possible to provide cross-tool matching for better accuracy and consistency in defect inspection or measurement. For example, by comparing the performance of different runs, the POR recipe of an inspection tool can be compared and verified between different runs of the same tool. In some embodiments where multibeams are used, the POR recipe of each beam can be compared and verified between two different beams.
[0079]
[0096] In some embodiments where two different systems are used, POR recipes can be compared and verified between the two different tools. Figure 8 is a flowchart illustrating an exemplary real-time recipe adjustment method for an inline inspection system consistent with embodiments of the present disclosure. The steps of Method 800 can be performed by an offline computing platform, for example, the offline computing platform 301 in Figure 3. It is recognized that Method 800 as illustrated can be modified by changing the order of the steps and including additional steps.
[0080]
[0097] In step S810, one or more input images can be acquired from separate wafer inspection systems. In some embodiments, the wafer inspection system may be an inline inspection tool, for example, the inline tool 1001 in Figure 3. In some embodiments, the input image may be the input image 3001 in Figure 3. In some embodiments, once the input image 3001 is acquired from the inline tool 1001, it is streamed from the inline tool 1001 in real time. According to some embodiments of this disclosure, when acquiring the input image 3001, a POR recipe containing parameter information used to generate the input image 3001 can also be acquired from the inline tool 1001. In some embodiments, the image inspection and measurement results of the inline tool on the input image 3001 can also be acquired together with a POR parameter recipe for performing image inspection and measurement on the input image 3001.
[0081]
[0098] In step S820, a parameter recipe can be set, and detection results can be obtained that follow the set parameter recipe. In some embodiments, the experimental results may be the detection results 3003 in Figure 3. In step S820, parameter values of a set of target parameters can be set for the experiment. In some embodiments, the set of parameters may include at least one parameter used in the inline tool 1001 for inspection and measurement of the inspection image. In some embodiments, step S820 can be repeated to sweep through various combinations of target parameters. In some embodiments, an experiment using a pre-designed or predetermined recipe combination can be automatically triggered when the input image 3001 is streamed to the offline computing platform 301. According to some embodiments of this disclosure, the input image 3001 is used as input for image inspection for defect detection or measurement using a predetermined recipe combination.
[0082]
[0099] In some embodiments, image enhancement (IH) parameters can be set and applied in step S820. Various image enhancement parameters can be set and applied to the input image 3001 in step S820. According to some embodiments of the present disclosure, a series of images with different characteristics can be created by applying various image enhancement parameters to the input image 3001. In some embodiments, detection parameters can be set and applied in step S820. Various detection parameters can be set in S820, and defect detection or measurement can be performed on the input image 3001 or the enhanced image 3002 according to the set detection parameters. In some embodiments, the detection parameters can include dimensional measurement reference parameters, defect type parameters, threshold parameters for detecting a particular defect type, etc. In step S820, the detection results can include critical dimension measurements or defects found on the image according to the set parameter recipe.
[0083]
[0100] In step S830, a detection analysis can be performed based on the detection results. In some embodiments, the detection analysis can be performed for each parameter combination. In some embodiments, in step S830, defects found in the detection results 3003 can be listed as defects. In some embodiments, defects found in the detection results 3003 can be associated with corresponding locations on the wafer or design data. In some embodiments, the false positive rate can be determined from the detection results 3003 in step S830. In some embodiments, defects found in the detection results 3003 that are not harmful defects can be listed as captured defects. The capture rate can also be determined for each parameter combination during the analysis process 320. In some embodiments, captured defects can be classified according to their defect type. In some embodiments, the process time for defect detection or measurement can be determined for each parameter combination. In some embodiments, captured defects can be compared with results from the inline tool 1001. In some embodiments, if new defects not found by the inline tool 1001 are found in the detection results 3003, the new defects are shown as newly discovered defects. In some embodiments, if a new defect type that was not detected by the inline tool 1001 is found in the detection result 3003, the new defect type is shown as a newly discovered defect type. In some embodiments, if a defect detected by the inline tool 1001 is not found in the detection result 3003, the defect is shown as an undetected defect.
[0084]
[0101] In step S840, parameter optimization can be performed based on the analysis results from step S830. In some embodiments, the analysis results may be the analysis results 3004 in Figure 3. In some embodiments, an optimized parameter combination for each defect type detection can be found in step S840. According to some embodiments of this disclosure, key performance indicators (KPIs) can be set to evaluate the performance of parameter combinations for detecting a particular defect type. For example, KPIs for a particular defect type may indicate a capture rate within a specific range, throughput, etc. In some embodiments, KPIs may vary depending on the defect type, implementation, requirements, etc. In some embodiments, parameter combinations can be automatically ranked in step S840 according to their KPI values. For example, parameter combinations for a particular defect type can be ranked according to their capture rate so that the parameter combination with the highest capture rate is ranked higher. It will be recognized that various ranking strategies may be applicable to some embodiments of this disclosure. In some embodiments, parameter combinations can be automatically ranked as long as they meet certain criteria.
[0085]
[0102] In step S860, a parameter combination determined to be an optimized parameter combination for a particular defect type can be provided to the inline tool 1001. In some embodiments, the parameter combination may be parameter combination 3005 shown in Figure 3. In some embodiments, parameter combination 3005 can be used in the real-time inline tool 1001 when detecting defects for a particular defect type. In some embodiments, the inline tool 1001 can update the parameters of the POR recipe corresponding to parameter combination 3005 and continue performing inspections using the updated parameters. According to some embodiments of this disclosure, parameter combination 3005 determined to be an optimized parameter combination for a particular defect type can also be used in step S820. For example, in step S820, the parameter range for an experiment to detect a particular defect type can be narrowed based on the provided parameter combination 3005.
[0086]
[0103] In step S850, weakness prediction can be performed. In some embodiments, in step S850, pattern analysis can be performed to determine patterns that are more likely to have defects of a particular type, based on the patterns of the defects found and the design data. Patterns that are more likely to have defects of a particular type can be determined based on the analysis results 3004. In some embodiments, pattern search can be applied to find additional locations on the reticle or mask pattern that are more likely to have defects of a particular type. In some embodiments, pattern search can be performed to find locations on the design data that have patterns similar to or identical to patterns that have defects of a particular type.
[0087]
[0104] In step S860, weak point data can be provided to the inline tool 1001. In some embodiments, the weak point data can be used by the inline tool 1001 to inspect portions of the wafer corresponding to weak points that are likely to have a particular type of defect. In some embodiments, the inline tool 1001 can inspect portions of the wafer corresponding to weak points for a particular type of defect using a parameter combination 3005 which has been determined to be an optimized parameter combination for a particular type of defect.
[0088]
[0105] Figure 9 is a block diagram showing an exemplary computer system 900 that can assist in the implementation of a method, flow, or apparatus disclosed herein. In some embodiments, the computer system 900 can assist in the implementation of at least a portion of the controller 109 in Figure 1, the image processing system 290 in Figure 2A, or the image processing system 199 in Figure 2B. In some embodiments, the computer system 900 can assist in the implementation of at least a portion of a process or the offline computing platform 301 in Figure 3 or the method 800 in Figure 8. The computer system 900 includes a bus 902 or other communication mechanism for communicating information and a processor 904 (or a plurality of processors 904 and 905, which may include hardware accelerators) coupled to the bus 902 for processing the information. The computer system 900 also includes main memory 906, such as random access memory (RAM) or other dynamic memory device, coupled to the bus 902 for storing information and instructions executed by the processor 904. The main memory 906 may also be used to store temporary variables or other intermediate information during the execution of instructions executed by the processor 904. The computer system 900 further includes a read-only memory (ROM) 908 or other static storage device coupled to the bus 902 for storing static information and instructions for the processor 904. A storage device 910, such as a magnetic disk or optical disk, is provided and coupled to the bus 902 for storing information and instructions.
[0089]
[0106] The computer system 900 may be coupled via a bus 902 to a display 912, such as a cathode ray tube (CRT) or a flat panel or touch panel display, for displaying information to the computer user. An input device 914, including alphanumeric and other keys, is coupled to the bus 902 for communicating information and command selections to the processor 904. Another type of user input device is a cursor control 916, such as a mouse, trackball, or cursor directional keys, for communicating directional information and command selections to the processor 904 and for controlling the movement of a cursor on the display 912. This input device typically has two degrees of freedom on two axes, namely a first axis (e.g., x) and a second axis (e.g., y), allowing the device to specify a position in a plane. A touch panel (screen) display may also be used as an input device.
[0090]
[0107] According to some embodiments, a portion of one or more methods described herein may be executed by a computer system 900 in response to a processor 904 executing one or more sequences of one or more instructions contained in main memory 906. Such instructions may be read into main memory 906 from another computer-readable medium, such as a storage device 910. By executing the instruction sequence contained in main memory 906, the processor 904 performs the process steps described herein. One or more processors in a multi-processing configuration may also be used to execute the instruction sequence contained in main memory 906. In alternative embodiments, hardwired circuits may be used instead of or in combination with software instructions. Therefore, the description herein is not limited to any particular combination of hardware circuits and software.
[0091]
[0108] As used herein, the term “computer-readable medium” refers to any medium involved in providing instructions to the processor 904 for execution. Computer-readable medium includes non-transient computer media. Computer-readable medium may store instructions for the processor of a controller (e.g., controller 109 in Figure 1), the processor of the image processing system 290 in Figure 2A, the processor of the image processing system 199 in Figure 2B, or the processor of the offline computing platform 301 in Figure 3, in particular, for performing image inspection, image acquisition, stage positioning, beam focusing, electric field adjustment, beam bending, focusing lens adjustment, operation of a charged particle source, beam deflection, method 300 in Figure 3, and method 800 in Figure 8. Such media can take many forms, but are not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks such as the storage device 910. Volatile media include dynamic memory such as the main memory 906. Transmission media include coaxial cables, copper wires, and optical fibers, including the wires that make up the bus 902. The transmission medium may also take the form of acoustic waves or optical waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, floppy disks, flexible disks, solid-state drives, hard disks, magnetic tapes, any other magnetic data storage media, compact disk read-only memory (CD-ROM), DVDs, any other optical data storage media, punch cards, paper tapes, any other physical media having a pattern of holes, random access memory (RAM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM), flash EPROM, any other flash memory, non-volatile random access memory (NVRAM), caches, registers, any other memory chips or cartridges, carrier waves as described later, or any other media that a computer can read, as well as networked versions of the aforementioned.
[0092]
[0109] Various forms of computer-readable media may be involved in transporting one or more sequences of one or more instructions to the processor 904 for execution. For example, the instructions may initially reside on a magnetic disk of a remote computer. The remote computer may load the instructions into dynamic memory and transmit them over a telephone line using a modem. The local modem of computer system 900 may receive data over the telephone line and convert the data into an infrared signal using an infrared transmitter. An infrared detector coupled to bus 902 may receive the data transported by the infrared signal and place the data on bus 902. Bus 902 transports the data to main memory 906, and the processor 904 retrieves the instructions from main memory 906 and executes them. The instructions received by main memory 906 may optionally be stored in storage device 910 either before or after execution by the processor 904.
[0093]
[0110] The computer system 900 may also include a communication interface 918 coupled to the bus 902. The communication interface 918 provides bidirectional data communication coupling to a network link 920 connected to a local network 922. For example, the communication interface 918 may be an Integrated Services Digital Network (ISDN) card or modem for providing data communication connectivity to a corresponding type of telephone line. As another example, the communication interface 918 may be a Local Area Network (LAN) card for providing data communication connectivity to a compatible LAN. Wireless links may also be implemented. In any such embodiment, the communication interface 918 transmits and receives electrical, electromagnetic, or optical signals carrying digital data streams representing various types of information.
[0094]
[0111] A network link 920 typically provides data communication to other data devices over one or more networks. For example, a network link 920 may provide a connection to a host computer 924 via a local network 922 or to data equipment operated by an Internet service provider (ISP) 926. The ISP 926 then provides data communication services over a worldwide packet data communication network, now commonly referred to as the “Internet” 928. Both the local network 922 and the Internet 928 use electrical, electromagnetic, or optical signals to carry digital data streams. Signals traversing various networks that carry digital data to and from a computer system 900, as well as signals on the network link 920 and signals traversing the communication interface 918, are exemplary forms of carrier waves that transmit information.
[0095]
[0112] The computer system 900 can send messages and receive data, including program code, via a network, network link 920, and communication interface 918. In the example of the Internet, server 930 may transmit requested code for an application program via the Internet 928, ISP 926, local network 922, and communication interface 918. One such downloaded application may provide, for example, all or part of the method described herein. The received code may be executed by processor 904 upon receipt or stored in storage device 910 or other non-volatile storage for later execution. In this way, the computer system 900 can obtain application code in carrier form.
[0096]
[0113] Embodiments may be further described using the following clauses. 1. A real-time parameter adjustment method for a wafer inspection system, Acquiring one or more input images streamed from a wafer inspection system, Applying multiple image enhancement parameters to one or more input images to generate multiple images with different features, Identifying defects from multiple images by applying multiple defect detection parameters, Based on defects identified on multiple images, determine a combination of multiple image enhancement parameters and multiple defect detection parameters used to detect a first type of defect. A real-time parameter adjustment method, including... 2. Identifying newly discovered defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by a wafer inspection system that were not previously identified from multiple images. The method described in Clause 1, further including the following: 3. Identifying defects from multiple images is Identifying defects and the corresponding locations of those defects. The method described in Clause 1 or 2, including the method described in Clause 1 or 2. 4. The method described in any one of the clauses 1 to 3, further comprising classifying defects by defect type. 5. Determining the parameter combination is Determining parameter combinations based on defect classification by defect type. The method described in Clause 4, including the method described in Clause 4. 6. Determining the parameter combination is Determining parameter combinations using deep learning algorithms The method described in any one of the clauses 1 to 5, including the method described in any one of the clauses 1 to 5. 7. Provide the wafer inspection system with the determined parameter combinations so that the wafer inspection system updates the recorded process recipe in real time according to the determined parameter combinations for inline production. The method described in any one of the clauses 1 to 6, further including the method described in any one of the clauses 1 to 6. 8. Predicting weaknesses in design data based on defects identified across multiple images. The method described in any one of the clauses 1 to 7, further including the method described in any one of the clauses 1 to 7. 9. Predicting weaknesses in design data is Predicting weaknesses in design data by applying pattern search based on defect pattern data identified across multiple images. The method described in Article 8, including the method described in Article 8. 10. Provide the wafer inspection system with information about weaknesses so that it updates the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. The method described in Clause 8 or 9, further including the following: 11. Setting key performance indicators (KPIs), The process involves ranking various parameter combinations of multiple image enhancement parameters and multiple defect detection parameters according to corresponding KPI values determined based on defects identified on multiple images. The method described in any one of the clauses 1 to 10, further including the method described in any one of the clauses 1 to 10. 12. The method according to Clause 11, wherein the KPI is at least the defect detection rate or throughput. 13. The method is the method described in any one of the clauses 1 to 12, performed in parallel with the operation of the wafer inspection system. 14. The wafer inspection system is a separate wafer inspection system as described in any one of the provisions 1 to 13. 15. A real-time parameter adjustment method for a wafer inspection system, Acquiring one or more input images streamed from a wafer inspection system, Applying a first parameter combination to one or more input images to identify defects in a first set of one or more input images, Applying a second parameter combination to one or more input images to identify defects in a second set of one or more input images, Determining the first key performance indicator (KPI) value for the first parameter combination based on the defects of the first set, Determining a second KPI value for a second parameter combination based on the defects of the second set, The first parameter combination and the second parameter combination are ranked based on the first KPI value and the second KPI value. A real-time parameter adjustment method, including... 16. To identify newly discovered defects from the first set of defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by the wafer inspection system that were not previously identified by a first set of defects. The method described in Article 15, further including the method described in Article 15. 17. Identifying defects in the first set is Identifying the defects in the first set and their corresponding locations. The method described in Article 15 or 16, including the method described in Article 15 or 16. 18. Classify the first set of defects by defect type. The method described in any one of the clauses 15 to 17, further including the method described in any one of the clauses 15 to 17. 19. Determining the parameter combination is Determining parameter combinations based on defect classification by defect type. The method described in Article 18, including the method described in Article 18. 20. The first KPI value and the second KPI value are associated with the first defect type, as described in Clause 19. 21. Ranking the first parameter combination and the second parameter combination is Ranking the first parameter combination and the second parameter combination using a deep learning algorithm. The method described in any one of the clauses 15 to 20, including the method described in any one of the clauses 15 to 20. 22. The method according to any one of the clauses 15 to 21, further comprising providing the wafer inspection system with a higher-ranked parameter combination of a first parameter combination and a second parameter combination, so that the wafer inspection system updates a recorded process recipe in real time according to a provided parameter combination for inline production. 23. Predicting weaknesses in design data based on the first set of defects. The method described in any one of the clauses 15 to 22, further including the method described in any one of the clauses 15 to 22. 24. Predicting weaknesses in design data is Predicting weaknesses in design data by applying pattern search based on the pattern data of the first set of defects. The method described in Article 23, including the method described in Article 23. 25. Provide the wafer inspection system with information about weaknesses so that it updates the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. The method described in clause 23 or 24, further including the method described in clause 23 or 24. 26. The method described in any one of the clauses 15 to 25, wherein the KPI is at least the defect detection rate or throughput. 27. The wafer inspection system is a separate wafer inspection system, as described in any one of the provisions of Clauses 15 to 26. 28. A real-time parameter adjustment device for a wafer inspection system, Memory that stores a set of instructions, At least one processor, Acquiring one or more input images streamed from a wafer inspection system, Applying multiple image enhancement parameters to one or more input images to generate multiple images with different features, Identifying defects from multiple images by applying multiple defect detection parameters, Based on defects identified on multiple images, determine a combination of multiple image enhancement parameters and multiple defect detection parameters used to detect a first type of defect. A processor configured to execute a set of instructions that cause the device to perform an operation including A real-time parameter adjustment device, including one. 29. The operation is, Identifying newly discovered defects that were not previously detected by wafer inspection systems, Identifying undetected defects detected by a wafer inspection system that were not previously identified from multiple images. The apparatus described in Clause 28, further including the following. 30. When identifying defects from multiple images, at least one processor is required. Execute a set of instructions that further instruct the device to identify defects and their corresponding locations. The apparatus as described in Clause 28 or 29, configured as such. 31. The operation is, Classifying defects by defect type The apparatus described in any one of clauses 28 to 30, further including the following. 32. When determining parameter combinations, at least one processor, Determining parameter combinations based on defect classification by defect type. The apparatus described in Clause 31, configured to execute a set of instructions that cause the apparatus to perform further actions. 33. When determining the parameter combination, at least one processor, Determining parameter combinations using deep learning algorithms A device as described in any one of clauses 28 to 32, configured to execute a set of instructions that cause the device to perform further actions. 34. The operation is, To provide the wafer inspection system with the determined parameter combinations so that the wafer inspection system updates the recorded process recipe in real time according to the determined parameter combinations for inline production. The apparatus described in any one of clauses 28 to 33, further including the following. 35. The operation is, Predicting weaknesses in design data based on defects identified across multiple images. The apparatus described in any one of clauses 28 to 34, further including the following. 36. When predicting weaknesses in the design data, at least one processor is required. Predicting weaknesses in design data by applying pattern search based on defect pattern data identified across multiple images. The apparatus described in Clause 35, configured to execute a set of instructions that cause the apparatus to perform further actions. 37. The operation is, Providing the wafer inspection system with information about weaknesses so that it can update the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. The apparatus described in Clause 35 or 36, further including the following: 38. The operation is, Setting key performance indicators (KPIs), The process involves ranking various parameter combinations of multiple image enhancement parameters and multiple defect detection parameters according to corresponding KPI values determined based on defects identified on multiple images. The apparatus described in any one of clauses 28 to 37, further including the following. 39. The apparatus described in Clause 38, wherein the KPI is at least defect detection rate or throughput. 40. The apparatus as described in any one of clauses 28 to 39, wherein at least one processor is configured to execute a set of instructions that cause the apparatus to perform actions in parallel while the wafer inspection system is running. 41. A wafer inspection system is a separate device from any of the devices described in any one of clauses 28 to 40. 42. A real-time parameter adjustment device for a wafer inspection system, Memory that stores a set of instructions, At least one processor, Acquiring one or more input images streamed from a wafer inspection system, Applying a first parameter combination to one or more input images to identify defects in a first set of one or more input images, Applying a second parameter combination to one or more input images to identify defects in a second set of one or more input images, Determining the first key performance indicator (KPI) value for the first parameter combination based on the defects of the first set, Determining a second KPI value for a second parameter combination based on the defects of the second set, The first parameter combination and the second parameter combination are ranked based on the first KPI value and the second KPI value. A processor configured to execute a set of instructions that cause the device to perform an operation including A real-time parameter adjustment device, including one. 43. The operation is, To identify newly discovered defects from the first set of defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by the wafer inspection system that were not previously identified by a first set of defects. The apparatus described in Clause 42, further including the following: 44. When identifying the first set of defects, at least one processor, Identifying the defects in the first set and their corresponding locations. The apparatus described in clause 42 or 43, configured to execute a set of instructions that cause the apparatus to perform further actions. 45. The operation is, Classify the first set of defects by defect type. The apparatus described in any one of clauses 42 to 44, further including the following. 46. When determining parameter combinations, at least one processor, Determining parameter combinations based on defect classification by defect type. The apparatus described in Clause 45, configured to execute a set of instructions that cause the apparatus to perform further actions. 47. The apparatus described in Clause 46, the first KPI value and the second KPI value are associated with the first defect type. 48. When ranking the first combination of parameters and the second combination of parameters, at least one processor, Ranking the first parameter combination and the second parameter combination using a deep learning algorithm. A device as described in any one of clauses 42 to 47, configured to execute a set of instructions that cause the device to perform further actions. 49. The operation is, To provide the wafer inspection system with a higher-ranked parameter combination of a first parameter combination and a second parameter combination, so that the wafer inspection system updates the recorded process recipe in real time according to the provided parameter combination for inline production. The apparatus described in any one of the clauses 42 to 48, further including the following. 50. The operation is, The apparatus as described in any one of clauses 42 to 49, further comprising predicting weaknesses in the design data based on defects in the first set. 51. When predicting weaknesses in the design data, at least one processor is required. Predicting weaknesses in design data by applying pattern search based on the pattern data of the first set of defects. The apparatus described in Clause 50, configured to execute a set of instructions that cause the apparatus to perform further actions. 52. The operation is, Providing the wafer inspection system with information about weaknesses so that it can update the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. The apparatus described in Clause 50 or 51, further including the following: 53. The device described in any one of clauses 42 to 52, the KPI being at least defect detection rate or throughput. 54. A wafer inspection system is a separate device from any of the devices described in any one of clauses 42 to 53. 55. A non-temporary computer-readable medium storing a set of instructions executable by at least one processor of a computing device to cause the computing device to perform a real-time parameter adjustment method for a wafer inspection system, wherein the method is: Acquiring one or more input images streamed from a wafer inspection system, Applying multiple image enhancement parameters to one or more input images to generate multiple images with different features, Identifying defects from multiple images by applying multiple defect detection parameters, Based on defects identified on multiple images, determine a combination of multiple image enhancement parameters and multiple defect detection parameters used to detect a first type of defect. Non-temporary computer-readable media, including [specific examples of such media]. 56. The set of instructions that can be executed by at least one processor of a computing device is: Identifying newly discovered defects that were not previously detected by wafer inspection systems, Identifying undetected defects detected by a wafer inspection system that were not previously identified from multiple images. Computer-readable media as described in Clause 55, which allows a computing device to perform the same actions. 57. When identifying defects from multiple images, the set of instructions that can be executed by at least one processor of the computing device is: Identifying defects and the corresponding locations of those defects. A computer-readable medium as described in Clause 55 or 56, which causes a computing device to perform the same action. 58. The set of instructions that can be executed by at least one processor of a computing device is: Classifying defects by defect type A computer-readable medium as described in any one of clauses 55 to 57, which causes a computing device to perform the same action. 59. When determining parameter combinations, the set of instructions that can be executed by at least one processor of the computing device is: Determining parameter combinations based on defect classification by defect type. A computer-readable medium as described in Clause 58, which causes a computing device to perform the same action. 60. When determining parameter combinations, the set of instructions that can be executed by at least one processor of the computing device is: Determining parameter combinations using deep learning algorithms A computer-readable medium as described in any one of clauses 55 to 59, which causes a computing device to perform the same action. 61. The set of instructions that can be executed by at least one processor of a computing device is: To provide the wafer inspection system with the determined parameter combinations so that the wafer inspection system updates the recorded process recipe in real time according to the determined parameter combinations for inline production. A computer-readable medium as described in any one of clauses 55-60, which allows a computing device to perform the same actions. 62. The set of instructions that can be executed by at least one processor of a computing device is: Predicting weaknesses in design data based on defects identified across multiple images. A computer-readable medium as described in any one of clauses 55 to 61, which causes a computing device to perform the same action. 63. When predicting weaknesses in design data, the set of instructions executable by at least one processor of the computing device is: Predicting weaknesses in design data by applying pattern search based on defect pattern data identified across multiple images. A computer-readable medium as described in Clause 62, which allows a computing device to perform the same actions. 64. The set of instructions that can be executed by at least one processor of a computing device is: Providing the wafer inspection system with information about weaknesses so that it can update the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. A computer-readable medium as described in Clause 62 or 63, which causes a computing device to perform the same action. 65. The set of instructions that can be executed by at least one processor of a computing device is: Setting key performance indicators (KPIs), The process involves ranking various parameter combinations of multiple image enhancement parameters and multiple defect detection parameters according to corresponding KPI values determined based on defects identified on multiple images. A computer-readable medium as described in any one of clauses 55 to 64, which allows a computing device to perform the same actions. 66. The KPI is at least defect detection rate or throughput, as described in the computer-readable media of Clause 65. 67. A set of instructions executable by at least one processor of a computing device, which causes the computing device to perform a method in parallel while the wafer inspection system is in operation, as described in any one of the clauses 55 to 66. 68. A wafer inspection system is a separate wafer inspection system, a computer-readable medium as described in any one of clauses 55 to 67. 69. A non-temporary computer-readable medium for storing a set of instructions executable by at least one processor of a computing device to cause the computing device to perform a real-time parameter adjustment method for a wafer inspection system, wherein the method is: Acquiring one or more input images streamed from a wafer inspection system, Applying a first parameter combination to one or more input images to identify defects in a first set of one or more input images, Applying a second parameter combination to one or more input images to identify defects in a second set of one or more input images, Determining the first key performance indicator (KPI) value for the first parameter combination based on the defects of the first set, Determining a second KPI value for a second parameter combination based on the defects of the second set, The first parameter combination and the second parameter combination are ranked based on the first KPI value and the second KPI value. Non-temporary computer-readable media, including [specific examples of such media]. 70. The set of instructions that can be executed by at least one processor of a computing device is: To identify newly discovered defects from the first set of defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by the wafer inspection system that were not previously identified by a first set of defects. Computer-readable media as described in Clause 69, which further enables a computing device to perform the same action. 71. When identifying a defect in the first set, the set of instructions that can be executed by at least one processor of the computing device is: Identifying the defects in the first set and their corresponding locations. A computer-readable medium as described in Clause 69 or 70, which causes a computing device to perform the same action. 72. The set of instructions that can be executed by at least one processor of a computing device is: Classify the first set of defects by defect type. A computer-readable medium as described in any one of clauses 69 to 71, which allows a computing device to perform the same actions. 73. When determining parameter combinations, the set of instructions that can be executed by at least one processor of the computing device is: Determining parameter combinations based on defect classification by defect type. A computer-readable medium as described in Clause 72, which causes a computing device to perform the same action. 74. The first and second KPI values are associated with the first defect type in the computer-readable media as described in Clause 73. 75. When ranking the first parameter combination and the second parameter combination, the set of instructions that can be executed by at least one processor of the computing device is: Ranking the first parameter combination and the second parameter combination using a deep learning algorithm. A computer-readable medium as described in any one of clauses 69 to 74, which causes a computing device to perform the same action. 76. The set of instructions that can be executed by at least one processor of a computing device is: To provide the wafer inspection system with a higher-ranked parameter combination of a first parameter combination and a second parameter combination, so that the wafer inspection system updates the recorded process recipe in real time according to the provided parameter combination for inline production. A computer-readable medium as described in any one of clauses 69 to 75, which allows a computing device to perform the same actions. 77. The set of instructions that can be executed by at least one processor of a computing device is: Predicting weaknesses in design data based on the first set of defects. A computer-readable medium as described in any one of clauses 69 to 76, which allows a computing device to perform the same actions. 78. When predicting weaknesses in design data, the set of instructions executable by at least one processor of the computing device is: Predicting weaknesses in design data by applying pattern search based on the pattern data of the first set of defects. A computer-readable medium as described in Clause 77, which causes a computing device to perform the same action. 79. The set of instructions that can be executed by at least one processor of a computing device is: Providing the wafer inspection system with information about weaknesses so that it can update the recorded process recipe in real time to inspect the wafer portion corresponding to the weakness. Computer-readable media as described in Clause 78 or 79, which further causes a computing device to perform the same action. 80. The KPI is at least defect detection rate or throughput, as specified in any one of clauses 69-79 of the computer-readable media. 81. A wafer inspection system is a separate wafer inspection system, a computer-readable medium as described in any one of clauses 69 to 80.
[0097]
[0114] The block diagrams in the figures may illustrate the architecture, function, and operation of possible embodiments of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in the schematic diagram may represent a specific arithmetic or logical operation that can be performed using hardware such as an electronic circuit. A block may also represent a module, segment, or part of code containing one or more executable instructions for performing a specified logical function. In some alternative embodiments, it should be understood that the functions shown in a block may be performed in an order different from the order shown in the drawings. For example, two blocks shown consecutively may be executed or performed substantially simultaneously, or two blocks may be executed in reverse order depending on the functions they relate to. Some blocks may be omitted. It should also be understood that each block and combination of blocks in the block diagram may be performed by a dedicated hardware-based system or by a combination of dedicated hardware and computer instructions to perform a specified function or operation.
[0098]
[0115] It will be recognized that the embodiments of this disclosure are not limited to the structures described above and shown in the accompanying drawings, and that various modifications and changes can be made without departing from the scope of this disclosure. Although this disclosure has been described in relation to various embodiments, other embodiments of the invention will be apparent to those skilled in the art from examining the specifications and practices of the invention disclosed herein. This specification and examples are to be considered merely illustrative, and the true scope and spirit of the invention are intended to be shown by the following claims.
Claims
1. A real-time parameter adjustment method for a wafer inspection system, Acquiring one or more input images streamed from the wafer inspection system, Applying multiple image enhancement parameters to one or more input images to generate multiple images with different features, By applying multiple defect detection parameters, defects are identified from the multiple images, Based on the defects identified on the plurality of images, a combination of the plurality of image enhancement parameters and the plurality of defect detection parameters used to detect a first defect type is determined. A real-time parameter adjustment method, including...
2. To identify newly discovered defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by the wafer inspection system that were not previously identified from the plurality of images. The method according to claim 1, further comprising:
3. Determining the aforementioned parameter combination is The combination of parameters is determined using a deep learning algorithm. The method according to claim 1, including the method described in claim 1.
4. The wafer inspection system is provided with the determined parameter combination so that it updates the recording process recipe in real time according to the determined parameter combination for inline production. The method according to claim 1, further comprising:
5. Predicting weaknesses in design data based on the defects identified in the aforementioned multiple images. The method according to claim 1, further comprising:
6. Predicting the aforementioned weaknesses in the design data is The weakness in the design data is predicted by applying a pattern search based on the pattern data of the defects identified on the plurality of images. The method according to claim 5, including the method described in claim 5.
7. The wafer inspection system is provided with information about the weakness so that it updates the recording process recipe in real time to inspect the portion of the wafer corresponding to the weakness. The method according to claim 5, further comprising:
8. Setting key performance indicators (KPIs), The process involves ranking various parameter combinations of the multiple image enhancement parameters and the multiple defect detection parameters according to the corresponding KPI values determined based on the defects identified on the multiple images. The method according to claim 1, further comprising:
9. A real-time parameter adjustment method for a wafer inspection system, Acquiring one or more input images streamed from the wafer inspection system, Applying a first parameter combination to one or more input images to identify defects in a first set of the one or more input images, Applying a second parameter combination to one or more input images to identify defects in a second set of the one or more input images, Based on the defects of the first set, a first key performance indicator (KPI) value for the first parameter combination is determined, Based on the defects of the second set, a second KPI value for the second parameter combination is determined, The first parameter combination and the second parameter combination are ranked based on the first KPI value and the second KPI value. A real-time parameter adjustment method, including...
10. To identify newly discovered defects from the first set of defects that were not previously detected by the wafer inspection system, Identifying undetected defects detected by the wafer inspection system that were not previously identified by the first set of defects. The method according to claim 9, further comprising:
11. Ranking the first parameter combination and the second parameter combination is, Ranking the first parameter combination and the second parameter combination using a deep learning algorithm. The method according to claim 9, including the method described in claim 9.
12. To provide the wafer inspection system with a higher-ranked parameter combination of the first parameter combination and the second parameter combination, so that the wafer inspection system updates the recording process recipe in real time according to the provided parameter combination for inline production. The method according to claim 9, further comprising:
13. Predicting weaknesses in the design data based on the defects in the first set. The method according to claim 9, further comprising:
14. The wafer inspection system is provided with information about the weakness so that it updates the recording process recipe in real time to inspect the portion of the wafer corresponding to the weakness. The method according to claim 13, further comprising:
15. A real-time parameter adjustment device for a wafer inspection system, Memory that stores a set of instructions, At least one processor, Acquiring one or more input images streamed from the wafer inspection system, Applying multiple image enhancement parameters to one or more input images to generate multiple images with different features, By applying multiple defect detection parameters, defects are identified from the multiple images, Based on the defects identified on the plurality of images, a combination of the plurality of image enhancement parameters and the plurality of defect detection parameters used to detect a first defect type is determined. At least one processor configured to execute the set of instructions that cause the device to perform an operation including the above. A real-time parameter adjustment device, including one.