Radio frequency (RF) matched network and tuning technology

Abstract

The embodiments provided herein generally include apparatus, plasma processing systems, and methods for tuning a radio frequency (RF) plasma processing system to improve substrate processing metrics. Some embodiments relate to methods for processing a substrate in a plasma processing system. These methods generally include detecting one or more intermodulation or harmonic components of a signal at a node connected to a plasma chamber via one or more sensors, and controlling one or more signal processing devices in the plasma processing system to process the substrate according to a frequency domain configuration identified by analyzing one or more substrate processing metrics based on one or more intermodulation or harmonic components.

Description

TECHNICAL FIELD

[0001]

[0001] Embodiments of the present invention generally relate to systems and methods used in semiconductor device manufacturing. More specifically, embodiments of the present disclosure relate to plasma processing systems used for processing substrates.

BACKGROUND ART

[0002]

[0002] Reliably manufacturing high-aspect-ratio features is one of the important technical challenges for next-generation semiconductor devices. In one method of forming high-aspect-ratio features, a plasma etching process, such as a reactive ion etching (RIE) plasma process, is used to form high-aspect-ratio openings in a material layer, such as a dielectric layer of a substrate. In a typical RIE plasma process, plasma is formed in a processing chamber, and ions from the plasma are accelerated toward the substrate surface to form openings in the material layer disposed under the mask layer formed on the substrate surface.

[0003]

[0003] A typical RIE plasma processing chamber includes a radio frequency (RF) bias generator that supplies an RF voltage to a power electrode. In capacitively coupled gas discharge, plasma is generated using an RF generator coupled to a power electrode disposed in an electrostatic chuck (ESC) assembly or another part of the processing chamber. Typically, an RF matching network ("RF matcher") tunes the RF waveform supplied from the RF generator so that the RF power is supplied to an apparent 50 Ω load, in order to minimize reflected power and maximize power supply efficiency. If the impedance of the load is not properly matched to the impedance of the source (e.g., the RF generator), part of the forward-transmitted RF waveform may be reflected back in the opposite direction along the same transmission line.

[0004]

[0004] Accordingly, there is a need for an apparatus and method for processing a substrate in a plasma processing system that solves the above-mentioned problems.

SUMMARY OF THE INVENTION

[0005]

[0005] Embodiments provided herein generally include apparatus, plasma processing systems, and methods for tuning (adjusting) a radio frequency (RF) plasma processing system to improve substrate processing metrics.

[0006]

[0006] Some embodiments relate to methods for processing a substrate in a plasma processing system. These methods generally include detecting one or more intermodulation or harmonic components of a signal at a node connected to a plasma chamber via one or more sensors, and controlling one or more signal processing devices in the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

[0007]

[0007] Some embodiments relate to apparatus for processing substrates in a plasma processing system. The apparatus generally comprises one or more sensors configured to detect one or more intermodulation or harmonic components of a signal at a node connected to a plasma chamber, one or more signal processing devices connected to the plasma chamber, and one or more signal processing devices of the plasma processing system configured to process the substrate in accordance with a frequency domain configuration determined by analyzing one or more substrate processing metrics based on one or more intermodulation or harmonic components.

[0008]

[0008] Some embodiments relate to a plasma processing system, which includes a plasma chamber, one or more sensors configured to detect one or more intermodulation or harmonic components of signals at nodes connected to the plasma chamber, one or more signal processing devices connected to the plasma chamber, and a controller configured to control one or more signal processing devices of the plasma processing system for processing a substrate based on one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

[0009]

[0009] To allow for a more detailed understanding of the above-mentioned features of the Disclosure, a more specific description of the Disclosure, which has been briefly summarized above, can be given by reference to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings show only exemplary embodiments and are not intended to limit the scope of the Disclosure, and other equally effective embodiments are also permitted. [Brief explanation of the drawing]

[0010] [Figure 1A] This is a schematic diagram of a plasma processing system according to a specific embodiment of the present disclosure. [Figure 1B] This is a schematic detailed cross-sectional view of a plasma processing system according to a specific embodiment of the present disclosure. [Figure 2] The voltage waveform established on the substrate by the voltage waveform applied to the electrodes of the processing chamber according to a specific embodiment of the present disclosure. [Figure 3] This is a schematic diagram of a radio frequency (RF) matching network according to a specific embodiment of the present disclosure. [Figure 4] This is a schematic diagram of a plasma processing system having an RF generator and respective RF matching circuits according to a particular embodiment of the present disclosure. [Figure 5] This graph shows the fundamental components, intermodulation components, and harmonic components of a signal in the frequency domain. [Figure 6] This is a schematic diagram of a plasma processing system having a sensor connected to the output of a pulse voltage (PV) waveform generator, according to a particular embodiment of the present disclosure. [Figure 7] This is a process flow diagram illustrating a method for processing a substrate in a plasma processing system according to a specific embodiment of the present disclosure. [Modes for carrying out the invention]

[0011]

[0018] For ease of understanding, the same reference numerals are used whenever possible to indicate identical elements common to the figures. It is assumed that elements and features of one embodiment can be usefully incorporated into other embodiments without further detail.

[0012]

[0019] Embodiments of this disclosure generally relate to systems used in semiconductor device manufacturing processes. More specifically, embodiments provided herein generally include apparatus and methods for tuning a radio frequency (RF) plasma processing system to provide, modify, and / or control the supply, generation, and / or application of intermodulation and harmonic components generated during plasma processing. For example, a frequency-domain configuration (e.g., magnitude or phase related to one or more intermodulation and harmonic components) may be specified to satisfy a particular substrate processing metric (e.g., improved etching rate, reduced process variability, and / or uniformity). The processing system may include sensors that measure the intermodulation and harmonic components of a signal during substrate processing. Based on the measured intermodulation and harmonic components, one or more processing components (e.g., one or more matching circuits, pulse voltage (PV) waveform generators, and / or radio frequency (RF) generators) may be controlled according to the specified frequency-domain configuration. For example, the frequency domain configuration may include a ratio of signal magnitudes at selected frequencies (e.g., selected intermodulation or harmonic components) that improves the substrate processing metric (also referred to herein as the “wafer result”). One or more processing components used to process the substrate may be controlled to generate a signal for driving the processing chamber according to the ratio of signal magnitudes at selected frequencies.

[0013] Examples of plasma treatment systems

[0020] Figure 1A is a schematic diagram of a plasma processing system. The plasma processing system 10 is configured for plasma etching processes such as reactive ion etching (RIE) plasma processing. The plasma processing system 10 can also be used in other plasma processes such as plasma deposition processes (e.g., plasma chemical vapor deposition (PECVD), plasma physical vapor deposition (PEPVD), plasma atomic layer deposition (PEALD)), plasma processing, plasma-based ion implantation, or plasma doping (PLAD). In one configuration, as shown in Figure 1A, the plasma processing system 10 is configured to form a capacitively coupled plasma (CPP). However, in some embodiments, the plasma may instead be generated by an inductively coupled source located above the processing area of ​​the plasma processing system 10.

[0014]

[0021] The plasma processing system 10 includes a processing chamber 100, a substrate support assembly 136, a gas supply system 182, a high DC voltage supply source 173, a radio frequency (RF) generator 171, and an RF matcher 172 (e.g., an RF impedance matching network). The chamber lid 123 includes one or more side walls and a chamber base configured to withstand the pressure and energy applied while the plasma 101 is being generated in a vacuum environment maintained within the processing space 129 of the processing chamber 100 during processing.

[0015]

[0022] A gas supply system 182 connected to the processing space 129 of the processing chamber 100 is configured to supply at least one type of processing gas to the processing space 129 of the processing chamber 100 from at least one processing gas source 119. The gas supply system 182 includes the processing gas source 119 and one or more gas inlets 128 positioned through the chamber lid 123. The gas inlets 128 are configured to supply one or more types of processing gas to the processing space 129 of the processing chamber 100.

[0016]

[0023] The processing chamber 100 includes an upper electrode (e.g., a chamber lid 123) and a lower electrode (e.g., a substrate support assembly 136) disposed in a processing space 129 of the processing chamber 100. The upper electrode and the lower electrode are opposed to each other. In one embodiment, an RF generator 171 is electrically coupled to the lower electrode. The RF generator 171 is configured to supply an RF signal for igniting and maintaining plasma 101 between the upper electrode and the lower electrode. In some alternative configurations, the RF generator 171 may also be electrically coupled to the upper electrode. For example, the RF generator 171 may supply RF source power to an RF base plate in a cathode assembly (e.g., in the substrate support assembly 136) for plasma generation, while the upper electrode is grounded. The center frequency of the RF source power can range from 13.56 MHz to very high frequency bands such as 40 MHz, 60 MHz, 120 MHz, or 162 MHz. In some embodiments, the RF source power may also be supplied through the upper electrode. The RF source power can operate in a continuous mode or a pulse mode. The pulse frequency of the RF power may be 100 to 10 kHz, and the duty cycle ranges from 5% to 95%. The RF generator 171 has frequency tuning capability, and can adjust its own RF power frequency within a range of, for example, ±5% or ±10%. In some embodiments, the RF generator 171 switches the RF power frequency at a predetermined speed (e.g., 2 nanoseconds, 50 nanoseconds, etc.).

[0017]

[0024] The substrate support assembly 136 may be coupled to a high voltage DC supply 173 that supplies a chucking voltage. The high voltage DC supply 173 may be coupled to a filter assembly 178 disposed between the high voltage DC supply 173 and the substrate support assembly 136.

[0018]

[0025] The filter assembly 178 is configured to electrically isolate the high-voltage DC supply source 173 during plasma processing. In one configuration, the static DC voltage is between approximately -5000V and approximately 5000V, and is supplied using a conductor (such as a coaxial power supply line). The filter assembly 178 may include multiple filter components or a single common filter.

[0019]

[0026] The substrate support assembly 136 is coupled to a pulse voltage (PV) waveform generator 175 configured to supply PV for biasing the substrate support assembly 136. The PV waveform generator 175 is coupled to the filter assembly 178. The filter assembly 178 is disposed between the PV waveform generator 175 and the substrate support assembly 136. The filter assembly 178 is configured to electrically isolate the PV waveform generator 175 during plasma processing.

[0020]

[0027] The substrate support assembly 136 is coupled to an RF generator 171 configured to supply an RF signal to the processing space 129 of the processing chamber 100. The RF generator 171 is electrically coupled to an RF matcher 172 disposed between the RF generator 171 and the processing space 129 of the processing chamber 100. For example, the RF matcher 172 is an electrical circuit used between the RF generator 171 and the plasma reactor (e.g., the processing space 129 of the processing chamber 100) to optimize power supply efficiency. One or more RF filters (e.g., within the RF matcher 172) are designed to allow only power within a selected frequency range and electrically isolate the RF power supplies from each other. In some cases, the bandwidth of the RF filter must be larger than the frequency tuning range of the RF generator 171.

[0021]

[0028] During plasma processing, the RF generator 171 supplies an RF signal to the substrate support assembly 136 via the RF matcher 172. For example, the RF signal is applied to a load (e.g., gas) in the processing space 129 of the processing chamber 100. If the impedance of the load is not properly matched to the impedance of the source (e.g., the RF generator 171), a portion of the waveform may be reflected back in the opposite direction. Therefore, to prevent a large portion of the waveform from being reflected back, in some embodiments, a matched impedance (e.g., a match point) is found by adjusting one or more components of the RF matcher 172 when the source impedance and load impedance are changing.

[0022]

[0029] The RF matcher 172 is electrically connected to the RF generator 171, the substrate support assembly 136, and the PV waveform generator 175. The RF matcher 172 is configured to receive synchronization signals from either or both of the RF generator 171 and the PV waveform generator 175.

[0023]

[0030] The RF generator 171 and the PV waveform generator 175 are each directly connected to the system controller 126. The system controller 126 synchronizes the generated RF signals and PV waveforms.

[0024]

[0031] Voltage and current sensors may be placed at the input and / or output of the RF matcher 172 to measure impedance and other parameters. These sensors can be synchronized using an external TTL (transistor-transistor logic) synchronization signal from an advanced waveform generator and / or RF generator, or by internally determining timing using measured voltage and current data. For example, output sensor 117 is configured to measure the impedance and other characteristics (voltage, current, harmonics, and / or phase, etc.) of the plasma processing chamber 100. Input sensor 116 is configured to measure the impedance and other characteristics (voltage, current, harmonics, and / or phase, etc.) of the RF generator 171. Based on either the synchronization signal or the characteristics of the plasma processing chamber 100, the RF matcher 172 can capture rapid impedance changes and optimize impedance matching.

[0025]

[0032] The PV waveform generator 175 is used to supply a tailored voltage waveform, which is the sum of the PV waveform and / or the harmonic frequencies associated with the waveform. The PV waveform generator 175 may output a synchronous TTL signal to the RF matcher 172. The voltage waveform is coupled to a bias electrode (e.g., bias electrode 104 shown in Figure 1B) via a filter assembly 178. A high DC voltage source 173 is applied to chuck the substrate for thermal control during the process. In some cases, a third electrode may be present at the edge of the cathode assembly for edge uniformity control.

[0026]

[0033] Figure 1B is a schematic detail cross-sectional view of the plasma processing system 10. As shown in Figure 1B, the plasma processing system 10 is configured to form a capacitively coupled plasma (CCP). However, in some embodiments, the plasma 101 may instead be generated by an inductively coupled source located above the processing area of ​​the plasma processing system 10. In this configuration, a coil may be located above the ceramic lid (e.g., vacuum boundary) of the plasma processing chamber 100.

[0027]

[0034] The plasma processing system 10 includes a processing chamber 100, a substrate support assembly 136, a gas supply system 182, a DC power system 183, an RF power system 189, and a system controller 126. The processing chamber 100 includes a chamber body 113, which includes a chamber lid 123, one or more side walls 122, and a chamber base 124. Collectively, the chamber lid 123, one or more side walls 122, and the chamber base 124 define the processing space 129 of the processing chamber 100. The one or more side walls 122 and the chamber base 124 include a material (such as aluminum, an aluminum alloy, or a stainless steel alloy) whose size and shape are determined to form structural supports for the elements of the processing chamber 100 and which is configured to withstand the pressure and additional energy applied while the plasma 101 is generated in a vacuum environment maintained within the processing space 129 of the processing chamber 100 during processing. The substrate 103 is loaded into the processing space 129 of the processing chamber 100 through an opening (not shown) in one of the side walls 122, and then removed from there. The opening is sealed with a slit valve (not shown) during the plasma processing of the substrate 103.

[0028]

[0035] The gas supply system 182 connected to the processing space 129 of the processing chamber 100 includes a processing gas source 119 and a gas inlet 128 positioned through the chamber lid 123. The gas inlet 128 is configured to supply one or more types of processing gases from the processing gas source 119 to the processing space 129 of the processing chamber 100.

[0029]

[0036] As described above, the processing chamber 100 includes an upper electrode (e.g., a chamber lid 123) and a lower electrode (e.g., a substrate support assembly 136) located within the processing space 129 of the processing chamber 100. The upper and lower electrodes are positioned opposite each other. As can be seen in Figure 1B, the RF generator 171 is electrically connected to the lower electrode. The RF generator 171 is configured to supply an RF signal for igniting and maintaining the plasma 101 between the upper and lower electrodes. In some alternative configurations, the RF generator 171 can also be electrically connected to the upper electrode.

[0030]

[0037] The substrate support assembly 136 includes a substrate support 105, a substrate support base 107, an insulating plate 111, a grounding plate 112, a plurality of lift pins 186, one or more substrate potential sensing assemblies 184 (including, for example, a signal detection assembly 188), and a bias electrode 104. Each lift pin 186 is positioned through a through hole 185 formed in the substrate support assembly 136 and is used to facilitate the movement of the substrate 103 to and from the substrate receiving surface 105A of the substrate support 105. The substrate support 105 is formed of a dielectric material. The dielectric material may include bulk sintered ceramic materials, corrosion-resistant metal oxides (e.g., aluminum oxide (Al2O3), titanium oxide (TiO), yttrium oxide (Y2O3)), metal nitride materials (e.g., aluminum nitride (AIN), titanium nitride (TiN)), mixtures thereof, or combinations thereof.

[0031]

[0038] The substrate support base 107 is formed from a conductive material (e.g., aluminum, an aluminum alloy, or a stainless steel alloy). The substrate support base 107 is electrically insulated from the chamber base 124 by an insulating plate 111 and a grounding plate 112 sandwiched between the insulating plate 111 and the chamber base 124. The substrate support base 107 is configured to regulate the temperature of both the substrate support 105 and the substrate 103 placed on the substrate support 105 during substrate processing. The substrate support base 107 includes one or more cooling channels (not shown) located therein, which are fluidically coupled and in fluid communication with a coolant source (not shown), such as a refrigerant source or a substrate source having relatively high electrical resistance. The substrate support 105 includes a heater (not shown) for heating the substrate support 105 and the substrate 103 placed on the substrate support 105.

[0032]

[0039] The bias electrode 104 is embedded in the dielectric material of the substrate support 105. The bias electrode 104 is formed of one or more conductive components. The conductive components include mesh, foil, plate, or a combination thereof. The bias electrode 104 functions as a chuck electrode (i.e., an electrostatic chuck electrode) used to fix the substrate 103 to the substrate receiving surface 105A of the substrate support 105 (e.g., electrostatic chuck). A parallel plate-like structure is formed by the bias electrode 104 and a layer of dielectric material placed between the bias electrode 104 and the substrate receiving surface 105A. The dielectric material has an effective capacitance C between approximately 5 nF and approximately 50 nF. EThe dielectric material (e.g., aluminum nitride (AlN), aluminum oxide (Al2O3), etc.) has a thickness of approximately 0.3 mm to approximately 5 mm, for example, approximately 0.1 mm to approximately 3 mm, for example, approximately 0.1 mm to approximately 1 mm, or even further, approximately 0.1 mm to approximately 0.5 mm. The bias electrode 104 is electrically connected to a clamp network that supplies a chucking voltage. The clamp network includes a DC voltage source 173 (e.g., a high-voltage DC source), which is connected to a filter 178A of a filter assembly 178 positioned between the DC voltage source 173 and the bias electrode 104. The filter 178A is a low-pass filter configured to block RF frequency signals and PV waveform signals supplied from other bias components within the processing chamber 100 from reaching the DC voltage source 173 during plasma processing. The static DV voltage is between approximately -5000V and approximately 5000V and is supplied using a conductor (such as a coaxial power supply line 106). The bias electrode 104 can bias the substrate 103 to the plasma 101 using one or more PV biasing methods.

[0033]

[0040] The substrate support assembly 136 includes an edge control electrode 115. The edge control electrode 115 is formed of one or more conductive components. The conductive components include mesh, foil, plate, or a combination thereof. The edge control electrode 115 is positioned below the edge ring 114, surrounding the bias electrode 104 and / or at a distance from the center of the bias electrode 104. In the case of a processing chamber 100 configured to process a circular substrate, the edge control electrode 115 is annular in shape, made of a conductive material, and configured to surround at least a portion of the bias electrode 104. As shown in Figure 1B, the edge control electrode 115 is positioned within the region of the substrate support 105 and is biased using a PV waveform generator 175. The edge control electrode 115 is biased using a different PV waveform generator than the one used for the bias electrode 104. The edge control electrode 115 is biased by splitting a portion of the signal supplied from the PV waveform generator 175 to the bias electrode 104.

[0034]

[0041] The DC power system 183 includes a DC voltage source 173, a PV waveform generator 175, and a current source 177. The RF power system 189 includes an RF waveform generator 171, an RF matching circuit 172, and an RF filter 174. As shown in Figure 1B, a power supply line 163 electrically connects the output of the RF generator 171 to the RF matching circuit 172, the RF filter 174, and the substrate support base 107. As described above, during plasma processing, the DC voltage source 173 supplies a constant chucking voltage, while the RF generator 171 supplies an RF signal to the processing area, and the PV waveform generator 175 establishes a PV waveform on the bias electrode 104. For example, a sufficient amount of RF power is applied to the RF bias voltage signal (also referred to herein as the RF waveform), and the RF waveform is supplied to the electrode (e.g., the substrate support base 107) to form plasma 101 in the processing space 129 of the processing chamber 100. The RF waveform has a frequency range between approximately 1 MHz and 200 MHz, for example, between 2 MHz and 40 MHz.

[0035]

[0042] The DC power system 183 includes a filter assembly 178 for electrically isolating one or more components contained within the DC power system 183. Power supply line 160 electrically connects the output of the DC voltage source 173 to the filter assembly 178. Power supply line 161 electrically connects the output of the PV waveform generator 175 to the filter assembly 178. Power supply line 162 connects the output of the current source 177 to the filter assembly 178.

[0036]

[0043] The current source 177 is selectively connected to the bias electrode 104 using a switch (not shown) located within the power supply line 162, so that the current source 177 can supply a desired current to the bias electrode 104 during one or more stages (e.g., the ion current stage) of the voltage waveform generated by the PV waveform generator 175.

[0037]

[0044] The filter assembly 178 includes several separate filter components (i.e., separate filters 178A to 178C), each electrically connected to an output node via a power supply line 164. The filter assembly 178 may also include one common filter electrically connected to an output node via a power supply line 164. The power supply lines 160 to 164 include conductors, including combinations of coaxial cables such as a rigid coaxial cable and a flexible coaxial cable connected in series, insulated high-voltage corona-resistant hookup wires, bare wires, metal rods, electrical connectors, and any combination of the above.

[0038]

[0045] The system controller 126, also referred to herein as the processing chamber controller, includes a central processing unit (CPU) 133, memory 134, and support circuitry 135. The system controller 126 is used to control the process sequence used to process the substrate 103. The CPU is a computer processor configured for use in an industrial environment to control the processing chamber and its associated subprocessors. The memory 134 described herein is generally non-volatile memory and may include random-access memory, read-only memory, hard disk drives, or other suitable forms of local or remote digital storage. The support circuitry 135 is coupled to the CPU 133 and includes a cache, clock circuitry, input / output subsystems, power supplies, etc., and combinations thereof. Software instructions (programs) and data for instructing the processor in the CPU 133 may be coded and stored in the memory 134. The software programs (or computer instructions) readable by the CPU 133 in the system controller 126 determine which tasks are executable by the components in the plasma processing system 10.

[0039]

[0046] A program readable by the CPU 133 in the system controller 126, when executed by the CPU 133, includes code that performs tasks relating to the plasma processing scheme described herein. The program may include instructions used to control various hardware and electrical components in the plasma processing system 10 to perform various process tasks and various process sequences used to perform the method described herein. The program includes instructions used to perform one or more of the operations described herein.

[0040]

[0047] Figure 2 shows two distinct voltage waveforms established on a substrate 103 placed on the substrate receiving surface 105A of the substrate support assembly 136 of the processing chamber 100 by supplying a PV waveform to the bias electrode 104 of the processing chamber 100. The first waveform (e.g., waveform 225) is an example of an uncompensated PV waveform established on the substrate 103 during plasma processing. The second waveform (e.g., waveform 230) is an example of a compensated PV waveform established on the substrate 103 by applying a negative slope waveform to the bias electrode 104 of the processing chamber 100 during the "ion current phase" portion of the PV waveform cycle using a current source 177. Alternatively, a compensated PV waveform can be established by applying a negative voltage ramp during the ion current phase of the PV waveform generated by the PV waveform generator 175. The PV waveform cycles of waveforms 225 and 230 each have a period T p It has this period T p For example, it is typically between 2 microseconds (μs) and 10 μs, for example, 2.5 μs. The ion current phase of the PV waveform cycle is typically period T p Between approximately 50% and 95%, for example, period T p It accounts for approximately 80% to 90% of the total.

[0041]

[0048] Waveforms 225 and 230 include two main stages, namely the ion current stage and the sheath collapse stage. Both parts of waveforms 225 and 230 (e.g., the ion current stage and the sheath collapse stage) can be established alternately and / or separately on the substrate 103 during plasma processing. At the beginning of the ion current stage, the supply of the negative portion (e.g., the ion current portion) of the PV waveform supplied to the bias electrode 104 by the PV waveform generator 175 causes a voltage drop on the substrate 103, thereby forming a high-voltage sheath above the substrate 103. The high-voltage sheath allows the positive ions generated by the plasma to be accelerated toward the biased substrate 103 during the ion current stage, and thus, in the case of the RIE process, the amount and characteristics of the etching process performed on the surface of the substrate 103 during plasma processing are controlled. In some embodiments, it is desirable that the ion current stage includes a region of the PV waveform that realizes a voltage on the substrate 103 that is stable or minimally varied throughout the entire stage, as shown by waveform 230 in Figure 2. It should be noted that significant fluctuations in the voltage established on the substrate 103 during the ion current stage, as indicated by the positive slope of waveform 225, cause undesirable fluctuations in the ion energy distribution (IED) and therefore result in undesirable characteristics of the etched features formed on the substrate 103 during the RIE process.

[0042]

[0049] The impedance of the plasma sheath changes depending on the supplied PV waveform voltage. The RF matcher 172 can use one or both of the synchronization signals and / or its own internal sensors to sample the impedance at different processing stages. In one example, the synchronization signal, or characteristics determined by the input sensor 116 or output sensor 117, is used to trigger the RF matcher 172 to determine at least two different impedances at different processing stages. The RF matcher 172 then updates its matching point based on at least two different impedances.

[0043]

[0050] Figure 3 is a schematic diagram of the RF matcher 172. The RF matcher 172 includes a controller 302, an input sensor 116, an output sensor 117, a first RF filter 308, a second RF filter 310, a tuning circuit 312, an interlock 314, and a memory 316. The two RF filter circuits (e.g., the first RF filter 308 and the second RF filter 310) are located near both the input and output of the RF matcher 172. In some cases, only one RF filter may be used near the output of the RF matcher 172.

[0044]

[0051] The RF matcher 172 is connected to the RF generator 171 via a 50Ω transmission line. The RF generator 171 can supply power at frequencies between 100kHz and 200MHz. The RF generator 171 has frequency tuning capability and can adjust its own RF power frequency within a range of, for example, ±5% or ±10%. For faster response and better synchronization, the RF generator 171 transmits TTL signals directly to the input sensor 116 and output sensor 117. In some embodiments, the RF matcher 172 may be configured to receive an RF waveform from the RF generator 171, tune the RF waveform to minimize reflected power and maximize power supply efficiency, and supply the tuned RF waveform to the plasma chamber 100. Simultaneously, as described above, the PV waveform generator 175 is configured to supply a PV waveform to the processing chamber 100. Both the RF generator 171 and the PV waveform generator 175 are coupled to and synchronized by the controller 302.

[0045]

[0052] The controller 302 can operate using various communication protocols (e.g., RS-232, RS-485, USB, Ethernet, or ECAT (Ethernet for Control Automation Technology)). The controller 302 can function as a local EtherCAT master. Other components (e.g., input sensor 116, output sensor 117, motor) are EtherCAT slave devices and are controlled by the controller 302.

[0046]

[0053] The controller 302 may be coupled to the interlock 314, memory 316, tuning circuit 312, input sensor 116, output sensor 117, and system controller 126. The controller 302 includes a CPU. The controller 302 is configured to control the tuning circuit 312 to change the impedance parameters of the RF matcher 172. In one example, the tuning circuit 312 is a T-type tuning circuit. In another example, the tuning circuit 312 is a π-type tuning circuit. In yet another example, the tuning circuit 312 is an L-type tuning circuit. The tuning circuit 312 may include one or more capacitors and inductors that can be adjusted by the controller 302 to change the impedance of the RF waveform supplied to the processing chamber 100.

[0047]

[0054] The system controller 126 can communicate with the RF matcher 172, the RF generator 171, and / or other chamber components. Controller 302 can communicate with the system controller 126 using EtherCAT. Controller 302 can perform master-to-slave conversion, which enables communication with the system controller 126 (EtherCAT master). Controller 302 receives requests from the system controller 126 and provides feedback. The system controller 126 also receives forward power and reflected power information from the RF generator 171 and acquires data from all internal devices of the RF matcher 172. The RF generator 171 can also be controlled by the system controller 126 for cooperative intelligent real-time control and tuning.

[0048]

[0055] Memory 316 may be programmed for long-term or short-term storage. The memory 316 described herein is generally non-volatile memory and may include random-access memory, read-only memory, a hard disk drive, or other suitable local or remote form of digital storage. Software instructions (programs) and data for instructing the processor in the controller 302 may be coded and stored in memory 316. A software program (or computer instruction) readable by the controller 302 determines which tasks are executable by the components in the plasma processing system 10. When executed, the controller 302-readable program includes code that performs tasks relating to the plasma processing scheme described herein. The program may include instructions used to control the RF matcher 172 using the method described herein. The program includes instructions used to perform one or more of the operations described herein.

[0049]

[0056] Interlock 314 is implemented for safety purposes to control temperature switches, cable-in-place switches, and match-in-place switches, etc. If a failure occurs, interlock 314 opens, and an interlock signal is sent from the local microcontroller to both the user laptop and the system controller 126, causing the system to shut down.

[0050]

[0057] The RF matcher 172 may include a serial control port for algorithm uploading and external match control (e.g., by using external software and an application programming interface (API)). Automatic impedance tuning algorithms and pre-set variable capacitor positions are stored in memory 316. Sensor data and tuning algorithms can be accessed from an external user laptop, providing significant flexibility to the RF matcher 172. Furthermore, advanced process-related control algorithms can be deployed in real time. The RF matcher 172 can operate fully autonomously, in cooperation with the system controller 126, or manually controlled by an external user laptop.

[0051]

[0058] The output sensor 117 may include a voltage sensor and / or current sensor configured to measure the impedance or characteristics of the plasma processing system 10 described above. The input sensor 116 may include a voltage sensor and / or current sensor configured to measure characteristics of an RF waveform such as voltage, current, phase, or harmonics. In some cases, only one sensor may be used at the input of the RF matcher 172. Sensor readings may be used in feedback and feedforward algorithms for impedance matching.

[0052]

[0059] The output sensor 117 is configured to sample a first set of impedances of the plasma processing system 10 over a first period and report them to the controller 302. The output sensor 117 is also configured to sample a second set of impedances of the plasma processing system 10 over a second period and report them to the controller 302. The first period may begin after a first delay that is triggered (i.e., measured) after a first portion of the waveform pulse of the synchronization signal, or it may begin internally when the sensor detects a change in the characteristics of the PV waveform or RF waveform. The second period may begin after a second delay that is triggered concurrently with the first delay. The second delay is longer than the first delay.

[0053]

[0060] The controller 302 uses both sets of impedances to determine the first and second impedances and combines them to obtain a combined impedance. Then, based on the combined impedance parameter, the controller 302 adjusts one or more capacitors in the tuning circuit 312 to change the matching point of the RF matcher 172 so that the impedance of the generated RF waveform matches the impedance of the plasma processing system 10. After adjusting the tuning circuit 312 based on the combined impedance parameter, the controller 302 may further fine-tune the tuning circuit 312 based on the impedance of the RF waveform sampled by the input sensor 116.

[0054] Exemplary techniques for substrate processing and tuning

[0061] As illustrated with respect to Figure 3, in some embodiments, an RF matcher is used to reduce (e.g., minimize) reflected power at the designed frequency. Input and output sensors (e.g., if available), such as sensors 116, 117, may be calibrated to measure voltage and current waveforms at the designed frequency (e.g., the fundamental frequency) and operate to reduce reflected power. Certain embodiments of this disclosure relate to processing systems having one or more sensors that measure not only the fundamental frequency but also harmonics and intermodulation products, which are used to tune and improve various processing metrics.

[0055]

[0062] While reducing reflected power of the RF generator may be considered, some embodiments of the present disclosure consider other criteria for tuning during substrate processing. For example, certain embodiments provide tuning algorithms that may be developed using at least two combinations of fundamental frequency, harmonic frequency, and intermodulation frequency for improved substrate results and more precise process control. As used herein, substrate results (also referred to as “wafer processing metrics”) may refer to one or more quality parameters related to the processing of a substrate, such as the level of process variability, etching rate, and / or uniformity.

[0056]

[0063] In some embodiments, RF matching tuning in the frequency domain may be performed using selected harmonic voltage, current, phase, and / or intermodulation components. The RF matcher can be tuned to a configuration having a specific frequency domain fingerprint pattern associated with less process variability, faster etching rates, and / or better uniformity. In some embodiments of this disclosure, the waveform may be reconstructed from the harmonic components and reported to a controller for real-time plotting and use for tuning, as described in more detail herein.

[0057]

[0064] Figure 4 is a schematic diagram of a plasma processing system having two RF generators 408 and 410 (labeled "RF1" and "RF2"), and their respective RF matchers 404 (labeled "RF matcher 1") and 406 (labeled "RF matcher 2"). Each of the RF generators 408 and 410 can be implemented in the same manner as the RF generator 171 described with respect to Figure 1. Each of the RF matchers 404 and 406 can be implemented in the same manner as the RF matcher 172 described herein. As shown in the figure, in Figure 4, a sensor 402 can be coupled to the outputs of the RF matchers 404 and 406. Thus, the sensor 402 can be used to measure the intermodulation and harmonic components of the combined output of the RF matchers 404 and 406.

[0058]

[0065] The RF generators 408, 410 can generate two or more frequencies that can be synchronized with phase control. In some cases, the RF generators may operate in phase or out of phase depending on calibration to satisfy a specific processing metric. In some embodiments, another RF signal may be applied from an upper electrode in a capacitively coupled plasma reactor (e.g., the chamber lid 123) or from an upper coil in an inductively coupled plasma reactor. As shown, the sensor 402 may be located at the output of the RF matcher to measure a set of selected harmonic and intermodulation components. In some embodiments, the sensor may be coupled to an RF rod used to couple the RF generators 408, 410 to an electrode (e.g., the bias electrode 104 in Figure 1B) located with the substrate support assembly 136 within the processing area of ​​the processing chamber.

[0059]

[0066] Figure 5 is a graph 500 showing the fundamental, intermodulation, and harmonic components of a signal in the frequency domain. In some embodiments, during the calibration stage, various test substrates can be processed using signals with different harmonic and intermodulation components to identify the components that provide the best substrate processing result or metric (e.g., or at least, a wafer processing metric that satisfies a specific threshold). For example, a specific ratio of at least two intermodulation or harmonic components may be identified as providing the best substrate processing metric. When processing the substrate, a sensor (e.g., sensor 402) can be used to measure the intermodulation and harmonic components, and the configuration of the matching unit 172 (and / or other processing devices such as the PV waveform generator 175 or RF generator 171 in Figure 1B) can be adjusted according to the ratio identified during calibration. In some cases, one or more sensors within the RF matcher 172 (e.g., sensor 117 in Figure 3) can be used to measure the intermodulation and harmonic components, or one or more sensors outside the RF matcher 172 (e.g., sensor 402) can be used alternatively or additionally.

[0060]

[0067] Figure 6 is a schematic diagram of a plasma processing system having a sensor 602 connected to the output of a PV waveform generator 175, according to a particular embodiment of the present disclosure. The sensor 602 may be connected to a power supply line 164. The sensor 602 can measure intermodulation and harmonic components in the power supply line 164 based on whether the PV waveform generator 175 and / or the RF generator 171 are being controlled. For example, based on the measured harmonic and / or intermodulation components, the PV waveform (e.g., waveform 230 described in relation to Figure 2) can be reconstructed to obtain a reconstructed waveform. In some cases, the reconstructed waveform may be stored in memory. The reconstructed waveform may be reported to a controller for real-time plotting and control of the PV waveform generator 175 and / or the RF generator 171. For example, the PV waveform generator 175 can generate a PV waveform that is a rectangular wave having voltage pulse characteristics such as specific on-times and off-times (e.g., the on-times correspond to the ion current stage shown in Figure 2, and the off-times correspond to the sheath collapse stage shown in Figure 2) and / or voltage waveform shape (e.g., dV / dt). However, signals in the power supply line 164 and / or on the substrate may have different on-times and off-times than the rectangular wave generated by the PV waveform generator 175 (e.g., due to parasitic and capacitive coupling). Based on the reconstructed waveform, the output of the PV waveform generator 175 can be controlled to adjust the on-times and off-times or shape of the PV waveform generated by the PV waveform generator 175, thereby improving the metric and substrate processing results observed on the substrate.

[0061]

[0068] As described in relation to Figure 3, an RF matching sensor (e.g., sensor 116) at the input of the RF matching unit 172 can measure the fundamental frequency of the RF generator 171, which can be used to tune (e.g., reduce or minimize) the reflected power at the input of the RF matching unit 172. In some embodiments of this disclosure, an output sensor (e.g., sensor 117) can measure fundamental components, selected harmonic components, and intermodulation components, and two or more of the measured components are used to perform matching tuning (e.g., RF matching tuning in the frequency domain). The adjusted matching tuning value may differ from the original matching tuning value used to reduce the reflected power supplied at the fundamental frequency. For example, as described herein, the ratio of at least two selected harmonic components or intermodulation components may be determined during calibration to provide the best metric. The matching tuning (e.g., the capacitance of the tuning circuit 312) may be adjusted based on the determined ratio (e.g., such that the measured ratio is approximately equal to the ratio determined during calibration). The sensor used to measure intermodulation and / or harmonic components may be located within the RF matching unit 172, but the sensor may be located anywhere on the transmission line. The measured frequency domain plot can be used for advanced process control, plasma characterization, and improvement of etching rate and uniformity.

[0062]

[0069] In some embodiments, the magnitude and / or phase of one or more selected frequency and / or intermodulation / harmonic components may be used for RF matching tuning. The capacitance of one or more capacitive elements of the RF matcher 172 may be adjusted based on the selected frequency components and / or the ratio between the frequency components. Thus, the RF matcher may be used to tune to identified frequency component values ​​based on specific frequency domain fingerprint patterns related to reducing process variability, improving plasma processing and / or etching process results, increasing etching speed and / or improving uniformity. Typically, the identified frequency component values ​​are different from the fundamental frequencies provided by one or more RF sources.

[0063]

[0070] Figure 7 is a process flow diagram showing a method 700 for processing a substrate in a plasma processing system according to a particular embodiment of the present disclosure. Method 700 can be performed by a plasma processing system, such as the plasma processing system described with respect to Figures 3, 4, and 6.

[0064]

[0071] In operation 710, the plasma processing system detects the generated frequency components while executing the plasma processing recipe performed on the calibration substrate. The plasma processing system detects one or more intermodulation components or harmonic components of the signal at a node connected to the plasma chamber (for example, via one or more sensors).

[0065]

[0072] In operation 720, the plasma processing system identifies a frequency-domain configuration used to satisfy one or more substrate processing metrics. For example, plasma processing attributes realized on a processed calibration substrate may be measured in operation 710, and the collected frequency-domain data and process recipe data may be used to control subsequent substrate processes and / or stored in memory. The attributes may include one or more substrate processing metrics, such as etching rate, etching profile distortion, or etching rate uniformity, associated with the calibration substrate. In operation 720, the process results and collected process data are correlated with one or more intermodulation or harmonic component data, including one or more measurement points in the frequency domain measured during the execution of operation 710, thereby allowing variations in process results or process metrics to be correlated with one or more intermodulation or harmonic component data measured during the execution of operation 710.

[0066]

[0073] In operation 730, the plasma processing system detects one or more intermodulation components or harmonic components of the signal at a node connected to the plasma chamber (for example, via one or more sensors). For example, one or more signal processing devices may include matching circuits (for example, matching circuit 172 in Figure 3 or matching circuit 404 in Figure 4), and the node connected to the plasma chamber may be the output of the matching circuit. In some embodiments, the node connected to the plasma chamber may be outside the matching circuit.

[0067]

[0074] In operation 740, the plasma processing system uses correlation data collected during or as a result of operations 710 and 720 to control one or more signal processing devices of the plasma processing system and adjust the RF matching tuning parameters and / or PVT waveform characteristics used to process the substrate based on one or more intermodulation or harmonic components determined to achieve improved substrate processing results. The RF matching tuning parameters are adjusted according to the frequency domain configuration identified during operation 720 by analyzing one or more substrate processing metrics collected on the calibration substrate. The frequency domain configuration may be the ratio of the magnitudes of at least two intermodulation or harmonic components. One or more processing metrics may include process variability, etching rate, or uniformity associated with the substrate processing.

[0068]

[0075] In some embodiments, the plasma processing system may construct a PV waveform based on one or more detected intermodulation or harmonic components. One or more signal processing devices may be controlled based on the constructed PV waveform. One or more signal processing devices may include at least one of a PV waveform generator (e.g., PV waveform generator 175) or an RF generator (e.g., RF generator 171) that can be controlled based on the constructed PV waveform.

[0069]

[0076] In some embodiments, controlling one or more signal processing devices may include controlling at least one of the magnitude or phase of one or more output signals of one or more of the signal processing devices. One or more signal processing devices may include a first matching circuit (e.g., matching circuit 404 in Figure 4) and a second matching circuit (e.g., matching circuit 406 in Figure 4). One or more sensors may include a sensor (e.g., sensor 402 in Figure 4) coupled to the outputs of the first and second matching circuits. In some embodiments, the sensor output signal from sensor 402 may be fed back to at least one of RF generators 408 or 410 and used to adjust the output power level, output frequency, and / or phase difference of the RF signal.

[0070]

[0077] The foregoing relates to embodiments of the present disclosure, but other embodiments and further embodiments of the present disclosure can be devised without departing from its basic scope, the scope of which is determined by the appended claims.

Claims

1. A method for processing a substrate in a plasma processing system, Detecting one or more intermodulation components or harmonic components of a signal in a node connected to a plasma chamber via one or more sensors, Controlling one or more signal processing devices of the plasma processing system to process the substrate based on one or more intermodulation components or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics, A method that includes this.

2. The method according to claim 1, further comprising detecting frequency components of another substrate to identify the frequency domain configuration to satisfy one or more substrate processing metrics, wherein the one or more intermodulation components or harmonic components correspond to the frequency components.

3. The method according to claim 1, wherein the frequency domain configuration includes the ratio of the magnitudes of at least two intermodulation components or harmonic components.

4. The method according to claim 1, wherein the one or more substrate processing metrics include process variability, etching rate, or uniformity associated with the substrate processing.

5. The method according to claim 1, further comprising configuring a pulse voltage (PV) waveform based on the detected one or more intermodulation components or harmonic components, wherein the one or more signal processing devices are controlled based on the configured PV waveform.

6. The method according to claim 5, wherein the one or more signal processing devices include at least one of a PV waveform generator or a radio frequency (RF) generator controlled based on the configured PV waveform.

7. The method according to claim 1, wherein the one or more signal processing devices include a matching circuit, and the node connected to the plasma chamber includes the output of the matching circuit.

8. The method according to claim 7, wherein the node connected to the plasma chamber is located outside the matching circuit.

9. The method according to claim 1, wherein controlling the one or more signal processing devices includes controlling at least one of the magnitude or phase of the output signals of one or more of the one or more signal processing devices.

10. The one or more signal processing devices mentioned above are: First matching circuit, and Second matching circuit The method according to claim 1, wherein the one or more sensors include sensors connected to the outputs of the first matching circuit and the second matching circuit.

11. The one or more signal processing devices mentioned above are: A first generator having an output connected to the first matching circuit, and A second generator having an output connected to the second matching circuit. The method according to claim 10, wherein the sensor is configured to provide a feedback signal to at least one of the first generator or the second generator.

12. A device for processing substrates within a plasma processing system, One or more sensors configured to detect one or more intermodulation components or harmonic components of a signal in a node connected to a plasma chamber, One or more signal processing devices connected to the plasma chamber, A controller configured to control the one or more signal processing devices of the plasma processing system in order to process the substrate based on the one or more intermodulation components or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics, A device equipped with the following features.

13. The apparatus according to claim 12, wherein the frequency domain configuration includes the ratio of the magnitudes of at least two intermodulation components or harmonic components.

14. The apparatus according to claim 12, wherein the one or more substrate processing metrics include process variability, etching rate, or uniformity associated with the substrate processing.

15. The apparatus according to claim 12, wherein the controller is further configured to construct a pulse voltage (PV) waveform based on the detected one or more intermodulation components or harmonic components, and the one or more signal processing devices are controlled based on the configured PV waveform.

16. The apparatus according to claim 15, wherein the one or more signal processing devices include at least one of a PV waveform generator or a radio frequency (RF) generator configured to be controlled based on the configured PV waveform.

17. The apparatus according to claim 12, wherein the one or more signal processing devices include a matching circuit, and the node connected to the plasma chamber includes the output of the matching circuit.

18. The apparatus according to claim 17, wherein the node connected to the plasma chamber is located outside the matching circuit.

19. The apparatus according to claim 12, wherein, in order to control the one or more signal processing devices, the controller is configured to control at least one of the magnitude or phase of the output signals of one or more of the one or more signal processing devices.

20. The one or more signal processing devices mentioned above are: First matching circuit, and Second matching circuit The apparatus according to claim 12, wherein the one or more sensors include sensors connected to the outputs of the first matching circuit and the second matching circuit.

21. A plasma processing system, Plasma chamber and One or more sensors configured to detect one or more intermodulation components or harmonic components of a signal at a node connected to the plasma chamber, One or more signal processing devices connected to the plasma chamber, A controller configured to control the one or more signal processing devices of the plasma processing system in order to process a substrate based on the one or more intermodulation components or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics, A plasma processing system equipped with [the following features].

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