Interstage Darlington circuit

Abstract

Apparatus for implementing a Darlington circuit, together with an interstage matching network, i.e., between two amplifier stages, to provide power clamping is disclosed. In an exemplary embodiment, the apparatus includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, an interstage matching network, a power amplifier, and a Darlington circuit. The driver amplifier includes a driver amplifier output and is coupled between its input port and output port. The power amplifier includes a power amplifier input and is coupled between its driver amplifier output and output port. The interstage matching network is coupled between its driver amplifier output and power amplifier input. The Darlington circuit is coupled to the interstage matching network via a node coupled between its driver amplifier output and power amplifier input.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to signal communication or signal processing using electronic devices, and more specifically to employing a Darlington circuit between two amplifier stages, such as in conjunction with an interstage matching network.

BACKGROUND ART

[0002] Electronic devices include conventional computing devices such as desktop computers, notebook computers, smartphones, wearable devices like smart watches, internet servers, and the like. Electronic devices also include personal voice assistants (e.g., smart speakers), wireless access points or routers, thermostats and other automatic controllers, robotics, automotive electronic components, devices embedded in other machines such as refrigerators and industrial tools, Internet of Things (IoT) devices, medical devices, and other types of computing devices. These various electronic devices provide services related to productivity, communication, social interaction, security, health and safety, remote management, entertainment, transportation, and information dissemination. Accordingly, electronic devices play a critical role in modern society.

[0003] Many of the services provided by electronic devices in today's interconnected world depend at least in part on electronic communications. Electronic communications can include those exchanged between two or more electronic devices using wireless signals or wired signals transmitted via one or more networks such as, for example, the Internet, a Wi-Fi® network, or a cellular network. Accordingly, electronic communications can include wireless or wired transmission and wired reception. To transmit and receive communications, an electronic device may use a transceiver, such as a wireless transceiver designed for wireless communication.

[0004] Therefore, electronic communication can be achieved by propagating signals between two wireless transceivers in two different electronic devices. For example, a smartphone can use a wireless transmitter to wirelessly transmit wireless signals to a base station as part of uplink communication to support mobile services. A smartphone can use a wireless receiver to receive wireless signals transmitted from a base station via the air medium as part of downlink communication to enable mobile services. On a smartphone, mobile services may include making voice and video calls, participating in social media interactions, sending messages, watching movies, sharing videos, and searching. Other mobile services may include using map information or navigation instructions, finding friends, engaging in location-based services, sending money, and obtaining other services such as ride-hailing.

[0005] Many of these mobile services rely, at least partially, on the transmission or reception of wireless signals between two or more electronic devices. As a result, researchers, electrical engineers, and designers of electronic devices are striving to develop wireless transceivers and other wireless hardware that can effectively utilize wireless signals to provide these and other mobile services. [Overview of the Initiative]

[0006] Power clamping can protect components of wireless interface devices. In one approach, power clamping is employed on a controller die to protect a power amplifier located on a different integrated circuit die. However, the routing distance between such a power clamp on the controller die and the power amplifier on the amplifier die is sufficient to degrade the power clamping actually provided in the power amplifier to a level below the target power clamping protection threshold. To shorten this routing distance and reduce at least the mismatch between the target protection level and the protection level achieved, this document describes employing a Darlington circuit between two amplifier stages, such as in conjunction with an interstage matching network. In some cases, the interstage matching network may be coupled between a driver amplifier and a power amplifier, and the Darlington circuit can provide power clamping to protect the power amplifier. In exemplary implementations, an integrated circuit die may include an amplifier circuit having a driver amplifier that supplies power to a power amplifier. The integrated circuit die may also include a Darlington circuit that can be coupled along the signal chain between the driver amplifier and the power amplifier via a node that may be part of an interstage matching network coupled between the two amplifiers. In exemplary operation, one or more diodes and two or more transistors arranged in a Darlington configuration can clamp the voltage level at a node. A Darlington circuit can also clamp the current flowing from the output of a driver amplifier before the current "reaches" the input of a power amplifier. Thus, a Darlington circuit can provide power clamping to an amplifier circuit including a power amplifier coupled "downstream" of the driver amplifier's output. Furthermore, power clamping can be achieved while significantly reducing the routing distance between the power clamp and the power amplifier. These and other exemplary embodiments of interstage Darlington circuits are described herein.

[0007] In exemplary embodiments, an apparatus is disclosed. The apparatus includes an amplifier circuit having input and output ports. The amplifier circuit includes a driver amplifier, a power amplifier, an interstage matching network, and a Darlington circuit. The driver amplifier includes a driver amplifier output, and the driver amplifier is coupled between the input port and the output port. The power amplifier includes a power amplifier input, and the power amplifier is coupled between the driver amplifier output and the output port. The interstage matching network is coupled between the driver amplifier output and the power amplifier input. The Darlington circuit is coupled to the interstage matching network via a node coupled between the driver amplifier output and the power amplifier input.

[0008] In an exemplary embodiment, a device for clamping power in conjunction with an interstage matching network is disclosed. The device includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, a power amplifier, and an interstage matching network. The driver amplifier includes a driver amplifier input and a driver amplifier output, with the driver amplifier input coupled to the input port. The power amplifier includes a power amplifier input and a power amplifier output, with the power amplifier output coupled to the output port. The interstage matching network is coupled between the driver amplifier output and the power amplifier input. The amplifier circuit also includes means for clamping the power of a signal flowing through the interstage matching network between the driver amplifier and the power amplifier.

[0009] In exemplary embodiments, methods are disclosed for clamping power to an amplifier circuit using a Darlington circuit, or for operating a power clamp having a Darlington circuit. The method includes amplifying a signal using a driver amplifier to generate a first amplified signal. The method also includes propagating the first amplified signal through an interstage matching network. The method additionally includes, in conjunction with propagation, clamping the first amplified signal using two or more transistors coupled together in a Darlington transistor arrangement to generate an intermediate signal. The method further includes amplifying the intermediate signal using a power amplifier to generate a second amplified signal. [Brief explanation of the drawing]

[0010] [Figure 1] This figure illustrates an environment having an exemplary electronic device, which has a wireless interface device including at least one exemplary amplifier circuit having a Darlington circuit. [Figure 2] This schematic diagram illustrates an exemplary radio-frequency (RF) front-end and an exemplary transceiver, each of which may include at least one amplifier circuit having a Darlington circuit. [Figure 3] This is a schematic diagram illustrating an exemplary amplifier die, which includes an amplifier circuit having an interstage matching network coupled between a driver amplifier and a power amplifier, and a Darlington circuit coupled to the interstage matching network. [Figure 4-1] This circuit diagram illustrates an exemplary Darlington circuit that can be coupled to an interstage matching network of an amplifier circuit to provide forward-swing power clamping. [Figure 4-2] This circuit diagram illustrates an exemplary Darlington circuit that can be coupled to an interstage matching network of an amplifier circuit to provide reverse swing power clamping. [Figure 5]This is a schematic diagram illustrating an exemplary single-ended amplifier circuit having a driver amplifier, an interstage matching network, and a power amplifier, and having multiple exemplary nodes to which a Darlington circuit can be coupled to provide power clamping. [Figure 6-1] This diagram illustrates an exemplary differential amplifier circuit having a driver amplifier, an interstage matching network, and a power amplifier, and having multiple exemplary nodes to which a Darlington circuit can be coupled to provide power clamping, in conjunction with Figure 6-2. [Figure 6-2] Figure 6-1 illustrates a schematic diagram illustrating an exemplary differential amplifier circuit having a driver amplifier, an interstage matching network, and a power amplifier, and having multiple exemplary nodes to which a Darlington circuit can be coupled to provide power clamping. [Figure 7] This is a circuit diagram illustrating at least one exemplary differential Darlington circuit according to the first embodiment. [Figure 8] This is a circuit diagram illustrating at least one exemplary differential Darlington circuit according to a second embodiment. [Figure 9] This flowchart illustrates an exemplary process for clamping power from an amplifier circuit using a Darlington circuit, or for operating a power clamp having a Darlington circuit. [Modes for carrying out the invention]

[0011] Introduction and Overview To facilitate the transmission and reception of wireless signals, electronic devices may use wireless interface devices, including wireless transceivers and / or radio frequency (RF) front-ends. Wireless interface devices include various electrical and electronic components that operate on voltage and current and process signals using such voltages and currents. These components are designed to operate within specified ranges of voltage and current. If the operating conditions deviate from these specified ranges, the components may produce incorrect signaling. Furthermore, deviations from the specified operating conditions may damage the components, particularly if the operating current or voltage is higher than the corresponding specified range.

[0012] To protect circuit components such as transistors used for amplification or switching, a circuit may include a power clamp. A power clamp can prevent the power received by a component from exceeding an amount of energy that could damage the component. To do so, a power clamp may limit the voltage level or the magnitude of the current. This may include limiting voltage and current, according to a permitted but optional interpretation of the word "or" as encompassing an "inclusive or" relationship. In some cases, a power clamp may be used additionally or alternatively to provide, for example, overvoltage protection or electrostatic discharge (ESD) protection.

[0013] In certain wireless interface device environments, some control functions are separated from at least a portion of the amplifier functions. For example, a controller die can be separate from an amplifier die. A controller die can be implemented using complementary metal-oxide-semiconductor (CMOS) or silicon-on-insulator (SOI) process technology, to name a few examples. An amplifier die includes an amplifier circuit (or amplification circuit) that may include a driver amplifier and a power amplifier. Before amplification by the amplifier die, the controller die can adjust signals such as radio frequency signals (RF signals) using filters, pre-driver amplifiers, or combinations thereof.

[0014] One approach to protecting circuit components involves deploying input clamps on the controller die to meet power protection specifications for the components of the controller die and amplifier die. However, using input clamps on the controller die results in relatively extensive routing of the RF input signal. The RF input signal enters the controller die and propagates through multiple blocks or stages to adjust the signal. These blocks may include input attenuators, input clamps, input switches, pre-driver amplifiers, etc. The adjusted RF signal then leaves the controller die and travels to the amplifier die, which contains the power amplifier. This considerable routing distance presents problems for the RF signal. Firstly, the routing distance degrades the quality of the signal itself, for example, by altering the signal's phase. Secondly, the routing distance shifts the designed target power clamping protection threshold to the actual power clamping protection threshold, which may be lower than the target.

[0015] This leaves the components of an amplifier die including a power amplifier vulnerable to damage from voltages and currents higher than the specified voltages and currents. Accordingly, the power amplifier circuit may be damaged, and the die may become unusable. Dies found to be unusable during testing at a manufacturing facility result in financial losses. Furthermore, a die that is damaged after being deployed in an electronic device causes even greater harm, as consumer electronic devices such as cellular telephones may become inoperable and be returned by consumers.

[0016] To at least reduce this routing distance between the input power clamp and the power amplifier, this document describes another approach for protecting circuit components, in which the power clamp is incorporated into an integrated circuit die (or integrated circuit chip) that has a driver amplifier or a power amplifier. This amplifier die, or at least one or more transistors thereof, can be implemented using, for example, gallium arsenide (GaAs) semiconductor technology. The power clamp can be coupled to a node of the amplifier circuit of the amplifier die. In some aspects, the amplifier circuit includes a driver amplifier that feeds the power amplifier. The node may be coupled between the driver amplifier and the power amplifier.

[0017] In some cases, an interstage matching network can be coupled between the driver amplifier and the power amplifier. In at least some of such cases, the node may be associated with the interstage matching network. For example, the node may be part of a wire, a metal trace, or another conductor that forms at least a portion of the interstage matching network. Accordingly, the power clamp can be coupled to the interstage matching network between the driver amplifier and the power amplifier.

[0018] In some implementations, power clamping can be realized with a Darlington circuit. A Darlington circuit includes two or more transistors coupled together in a Darlington configuration between a node associated with an interstage matching network and a second node, such as a power distribution node of an amplifier circuit (for example, for a differential power amplifier) ​​or another node. A Darlington circuit may also include one or more diodes coupled together in series. The number of diodes connected in series can, at least partially, establish a trigger point for power clamping. Based on the trigger point, the Darlington circuit can limit the voltage level at the node or the magnitude of the current flowing through the node to the input of the power amplifier. A second Darlington circuit coupled to the node "in the opposite manner" can provide protection from reverse voltage. In other words, the first Darlington circuit can provide protection against forward signal swings, and the second Darlington circuit can provide protection against reverse signal swings.

[0019] Therefore, certain described implementations include an input power clamp located on the same die as the power amplifier, which is part of the amplifier circuit. The power clamp can be implemented with a Darlington circuit or coupled to the interstage matching network of the amplifier circuit. The Darlington circuit can provide voltage or current clamping as a power clamp in the interstage matching network of the amplifier circuit between the driver amplifier and the power amplifier. Thus, this clamping in the interstage matching network can limit the input power to the power amplifier "following" the driver amplifier and the interstage matching network from the viewpoint of signal flow or signal processing.

[0020] At least the power amplification section of the amplifier circuit can be implemented as a single-ended circuit or a differential circuit. Regarding differential power amplifiers, this document describes how an inter-stage Darlington circuit can be used to reduce the size of the available clamping voltage step. In some aspects, two different differential-based inter-stage Darlington circuits are deployed to achieve the reduced step size. Accordingly, certain described implementations can allow for finer control over the clamping voltage.

[0021] The on-die power clamping approach as described herein significantly shortens the routing distance between the power clamp and the power amplifier along the RF signal chain. This shorter routing distance is achieved without significantly increasing the size of the amplifier die. Therefore, the target power clamping protection threshold can be achieved in the power amplifier more reliably and with less signal degradation. Furthermore, by omitting or removing the power clamp from the controller die, the overall manufacturing cost is reduced.

[0022] Accordingly, the Darlington circuit can be coupled to the inter-stage matching network stage cell via at least one node, at least to provide an input clamping function to the power amplifier. An exemplary implementation of a Darlington configuration-based power clamp can provide power clamping capability to the input of the power amplifier via the inter-stage matching network. Furthermore, as the voltage at the node increases, a stronger clamping effect can be implemented (e.g., enforced or established), which provides excellent protection. Additional exemplary implementations for employing a Darlington circuit with an inter-stage matching network to provide power clamping protection are described herein.

[0023] Illustrative Examples Figure 1 illustrates an exemplary environment 100 having an electronic device 102 having a wireless interface device 120 which includes at least one exemplary amplifier circuit 130 having a Darlington circuit 138. This document describes exemplary implementations of the amplifier circuit 130, which may be part of the transceiver, radio-frequency front-end (RFFE), etc. of the device. In environment 100, the exemplary electronic device 102 communicates with a base station 104 via a wireless link 106.

[0024] In Figure 1, the electronic device 102 is depicted as a smartphone. However, the electronic device 102 can be implemented as any suitable computing device or other electronic device. Examples of devices that can be realized as the electronic device 102 include cellular base stations, broadband routers, access points, cellular phones or mobile phones, game devices, navigation devices, media devices, laptop computers, desktop computers, tablet computers, server computers, network-attached storage (NAS) devices, smart appliances, vehicle-based communication systems, Internet of Things (IoT) devices, sensors or security devices, asset trackers, fitness management devices, wearable devices such as intelligent glasses or smartwatches, wireless power devices (transmitters or receivers), and medical devices.

[0025] Base station 104 communicates with electronic device 102 via wireless link 106, which can be implemented as any suitable type of wireless link for carrying communication signals. Although base station 104 is depicted as a base station tower in a cellular radio network, it may represent or be implemented as another device, such as a satellite, terrestrial broadcasting tower, access point, peer-to-peer device, mesh network node, fiber optic interface, or another electronic device as generally described above. Thus, wireless link 106, or an extension thereof, can be connected between electronic device 102 and base station 104 in any of the various forms.

[0026] Wireless link 106 may include a downlink of data or control information communicated from base station 104 to electronic device 102. Wireless link 106 may also include an uplink of other data or control information communicated from electronic device 102 to base station 104. Wireless link 106 can be implemented using any suitable communication protocol or communication standard. Examples of such protocols and standards include fourth-generation (4) th Generation (4G), 5th generation (5 th Generation (5G), 6th generation (6 th Third Generation Partnership Project (3G) rd Examples include the LTE (Long-Term Evolution) standard of the Generation Partnership Project (3GPP®), IEEE 802.11 standards such as 802.11g, ac, ax, ad, aj, or ay standards (e.g., Wi-Fi® 6 or WiGig®), IEEE 802.16 standards (e.g., WiMAX®), Bluetooth® standards, and ultra-wideband (UWB) standards (e.g., IEEE 802.15.4). In some implementations, the wireless link 106 may be wirelessly powered, and the electronic device 102 or base station 104 may be equipped with a power supply.

[0027] As shown in several implementations, the electronic device 102 may include at least one application processor 108 and at least one computer-readable storage medium 110 (CRM110). The application processor 108 may include any type of processor, such as a central processing unit (CPU) or a multicore processor, configured to execute processor-executable instructions (e.g., code) stored in the CRM110. The CRM110 may include any preferred type of data storage medium, such as volatile memory (e.g., random-access memory, RAM), non-volatile memory (e.g., flash memory), optical media, or magnetic media (e.g., disk or tape). In the context of this disclosure, the CRM110 is implemented to store instructions 112, data 114, and other information of the electronic device 102, and therefore the CRM110 does not include transient propagating signals or carrier waves.

[0028] The electronic device 102 may also include one or more input / output ports 116 (I / O ports 116) and at least one display 118. The I / O ports 116 enable data exchange or interaction with other devices, networks, or users. The I / O ports 116 may include serial ports (e.g., Universal Serial Bus (USB®) ports), parallel ports, Ethernet ports, audio ports, infrared (IR) ports, camera or other sensor supports, etc. The display 118 may be implemented as a display screen or projection that presents graphical images provided by other components of the electronic device 102, such as a user interface (UI) associated with an operating system, program, or application. Alternatively or additionally, the display 118 may be implemented as a DisplayPort or virtual interface through which the graphical content of the electronic device 102 is communicated or presented.

[0029] The electronic device 102 further includes at least one wireless interface device 120 and at least one antenna 122. The exemplary wireless interface device 120 provides connectivity to each network and peer device via a wireless link that may be configured similarly to, or differently from, the wireless link 106. The wireless interface device 120 can facilitate communication over any preferred type of wireless network, such as a wireless local area network (LAN) (wireless LAN, WLAN), a wireless personal area network (PAN) (wireless PAN, WPAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide area network (WAN) (wireless WAN, WWAN), and / or a navigation network (e.g., the Global Positioning System (GPS) in North America, another Satellite Positioning System (SPS), or a Global Navigation Satellite System (GNSS)). In the context of exemplary environment 100, the electronic device 102 can communicate various data and control information bidirectionally with the base station 104 via the wireless interface device 120. However, the electronic device 102 can communicate directly with other peer devices, alternative wireless networks, etc. Also, as described above, the electronic device 102 can alternatively be implemented as the base station 104 or another device described herein.

[0030] As shown, the wireless interface device 120 may include at least one communications processor 124, at least one transceiver 126 (e.g., wireless transceiver 126), and at least one radio frequency front end 128 (RFFE 128). These components process data information, control information, and signals associated with communicating information for the electronic device 102 via the antenna 122. The communications processor 124 may be implemented as a modem processor, at least as part of a system-on-chip (SoC), or as a baseband radio processor (BBP) enabling a digital communications interface for data, voice, messaging, or other uses of the electronic device 102. The communications processor 124 may include a digital signal processor (DSP) or one or more signal processing blocks (not shown) for encoding and modulating data for transmission and demodulating and decoding received data. Additionally, the communication processor 124 may also manage (e.g., control or configure) the modes or operations of other components of the transceiver 126, RF front end 128, and wireless interface device 120 in order to implement various communication protocols or communication techniques.

[0031] In some cases, the application processor 108 and the communication processor 124 may be integrated into a single module or integrated circuit (IC), such as a SoC. However, the application processor 108, the communication processor 124, or any other processor may generally be operably coupled to one or more other components, such as a CRM 110 or a display 118, to enable control of various components of the electronic device 102, or other interactions with various components. For example, at least one processor 108 or 124 may use components of a wireless interface device 120 to present one or more graphical images on an implementation of the display screen of the display 118 based on one or more wireless signals transmitted or received via at least one antenna 122. Furthermore, the application processor 108 or the communication processor 124, including combinations thereof, may be implemented using digital circuits that implement the logic or functions described herein. In addition, the communication processor 124 may also include, or be associated with, a memory (not separately described), such as the same or another CRM 110, for storing data and processor executable instructions (e.g., code).

[0032] As shown, the wireless interface device 120 may include at least one amplifier circuit 130 (or amplification circuit 130) as described below. More specifically, the transceiver 126 may include at least one amplifier circuit 130-2, or the RF front-end 128 may include at least one amplifier circuit 130-1 (including, depending on the inclusive or permitted interpretation of the word “or,” both components may have at least one amplifier circuit 130). The transceiver 126 may also include circuitry and logic for filtering, switching, amplification, channelization, frequency conversion, etc. Frequency conversion functions may include frequency up-conversion or down-conversion performed through a single conversion operation (e.g., using a direct conversion architecture) or through multiple conversion operations (e.g., using a superheterodyne architecture). Generally, the transceiver 126 may include filters, switches, amplifiers, mixers, etc., for routing and adjusting signals transmitted or received via the antenna 122.

[0033] In addition to the amplifier circuit 130-2, the transceiver 126 may include an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC) (not shown in Figure 1). During operation, an ADC can convert an analog signal to a digital signal, and a DAC can convert a digital signal to an analog signal. Generally, an ADC or DAC can be implemented as part of the communication processor 124, as part of the transceiver 126, or separately from both (for example, as part of another SoC or as part of the application processor 108).

[0034] The components or circuits of the transceiver 126 may be implemented in any preferred manner, such as in a combined transceiver logic or separately as separate transmitter and receiver entities. In some cases, the transceiver 126 may be implemented using multiple or different sections to implement the transmit and receive operations, respectively (for example, using separate transmit and receive chains as depicted in Figure 2). Although not shown in Figure 1, the transceiver 126 may also include logic for performing in-phase / quadrature (I / Q) operations, such as combining, phase correction, modulation, and demodulation.

[0035] The RF front-end 128 may include one or more filters, multiple switches, or one or more amplifiers, such as an amplifier circuit 130-1, for adjusting signals received via antenna 122 or signals transmitted via antenna 122. The RF front-end 128 may also include a phase shifter (PS), a peak detector, a power meter, a gain control block, an antenna tuning circuit, an n-plexer, a balun, and the like. The configurable components of the RF front-end 128, such as a phase shifter, an automatic gain controller (AGC), or switches, may be controlled by the communication processor 124 to implement communication in various modes, communication using different frequency bands and / or carrier aggregation (CA), or communication using beamforming.

[0036] In some implementations, antenna 122 is implemented as at least one antenna array comprising multiple antenna elements. Thus, as used herein, “antenna” can refer, depending on the context or implementation, to at least one separate or independent antenna, at least one antenna array comprising multiple antenna elements, or a portion of an antenna array (e.g., antenna elements). At least one antenna 122 may also be part of a module comprising one or more other components of the RF front end 128 (e.g., amplifier circuit 130-1 or filter), or at least one antenna 122 may be a separate component.

[0037] In Figure 1, the exemplary amplifier circuit 130 is depicted as amplifier circuit 130-2 as part of the transceiver 126, as amplifier circuit 130-1 as part of the RF front end 128, and so on. However, the described implementations of the amplifier circuit 130 can generally be employed additionally or alternatively in other parts of the wireless interface device 120 or other parts of the electronic device 102. As described above, the amplifier circuit 130 can be included in electronic devices other than cellular phones, such as the base station 104. In a base station (or mobile phone), for example, the transmit or receive chain of the wireless interface device 120 and / or RF front end 128 may include the amplifier circuit 130 as described herein. Other electronic devices that may employ the amplifier circuit 130 include laptops, vehicle communication hardware, and wireless access points, as described herein.

[0038] In exemplary implementations, the amplifier circuit 130 may include at least one port 132, such as an input port 132-1 and an output port 132-2 (or, more generally, a first port 132-1 and a second port 132-2). As illustrated, the amplifier circuit 130 may include at least one driver amplifier 134, at least one power amplifier 136, at least one Darlington circuit 138, and at least one interstage matching network 140. In some cases, the driver amplifier 134 and the power amplifier 136 are coupled in series between the input port 132-1 and the output port 132-2. As shown, the driver amplifier 134 may be coupled closer to the input port 132-1 than the power amplifier 136, and the power amplifier 136 may be coupled closer to the output port 132-2 than the driver amplifier 134. Therefore, the driver amplifier 134 can be coupled between the input port 132-1 and the power amplifier 136, and the power amplifier 136 can be coupled between the driver amplifier 134 and the output port 132-2.

[0039] Furthermore, the driver amplifier 134, the interstage matching network 140, and the power amplifier 136 can be coupled in series between the input port 132-1 and the output port 132-2. As shown, the interstage matching network 140 can be coupled between the driver amplifier 134 and the power amplifier 136 to facilitate signal propagation between them. A Darlington circuit 138 can be coupled to the interstage matching network 140 to provide power clamping functionality to one or more portions, cells, or stages of the amplifier circuit 130, as described herein.

[0040] As illustrated, the signal flow can proceed from input port 132-1 to driver amplifier 134 and through driver amplifier 134. From driver amplifier 134, the first amplified signal can propagate as an intermediate signal (e.g., an interstage signal) to and through interstage matching network 140. In power amplifier 136, the first amplified signal or intermediate signal is amplified to generate a second amplified signal. The second amplified signal can be output from power amplifier 136 and moved to output port 132-2. In conjunction with interstage matching network 140, Darlington circuit 138 can clamp the power level of the intermediate signal to generate a clamped signal for protection. In such a case, power amplifier 136 can safely amplify the clamped signal.

[0041] The two amplifiers of the amplifier circuit 130 are described herein primarily in terms of the driver amplifier 134 and the power amplifier 136. However, two or more amplifiers protected by the Darlington circuit 138 may generally be referred to as the first amplifier and the second amplifier. Such other amplifiers may be or include any type of amplifier employed for any purpose, such as low-noise amplifiers, operational amplifiers, amplifiers of any given class, or combinations thereof. The first amplifier and the second amplifier may be coupled together by an interstage matching network 140.

[0042] While certain quantities of components and components of certain configurations are explicitly depicted in Figure 1 (and Figures 2-8), the illustrated circuits including the amplifier circuit 130 may include more or fewer such components, as well as other components not shown. Furthermore, components may be arranged and interconnected in different ways. Exemplary implementations of the Darlington circuit 138 and at least one node to which it is coupled are described below with reference to several figures beginning with Figure 3, Figure 4-1, and Figure 4-2. However, this document will now describe exemplary implementations of the transceiver and RF front end with reference to Figure 2.

[0043] Figure 2 is a schematic diagram illustrating an exemplary RF front-end 128 and an exemplary transceiver 126, each of which may include at least one amplifier circuit 130 having a Darlington circuit 138 (not shown in Figure 2). Figure 2 also depicts an antenna 122 and a communication processor 124. The communication processor 124 communicates one or more data signals to other components, such as the application processor 108 in Figure 1, for further processing in 224 (e.g., for application-level processing). As shown, the circuit 200 may include a first amplifier circuit 130-1, a second amplifier circuit 130-2, a third amplifier circuit 130-3, or a fourth amplifier circuit 130-4, and may include one to four such amplifier circuits. However, the circuit 200 may include different numbers of amplifiers (e.g., more or fewer amplifier circuits), may include amplifiers or other components coupled together in different ways, may include amplifiers in different positions, may include amplifiers implemented in two or more stages, or combinations thereof, etc.

[0044] As illustrated from left to right, in the exemplary implementation, antenna 122 is coupled to RF front-end 128, and RF front-end 128 is coupled to transceiver 126. Transceiver 126 is coupled to communication processor 124. The exemplary RF front-end 128 includes at least one signal propagation path 222. The at least one signal propagation path 222 may include at least one amplifier circuit 130, such as amplifier circuits 130-1 and 130-3. The exemplary wireless transceiver 126 includes at least one receive chain 202 (or receive path 202) and at least one transmit chain 252 (or transmit path 252). Although only one RF front-end 128, one transceiver 126, and one communication processor 124 are shown in circuit 200, electronic device 102, or wireless interface device 120 of electronic device 102, may include multiple instances of any or all of such components. Furthermore, while only certain components are explicitly depicted in Figure 2 and shown coupled together in a specific manner, the transceiver 126 or RF front-end 128 may include other unillustrated components (e.g., switches or buffers), more or fewer components, different arrangements of coupled components, and so on.

[0045] In some implementations, the RF front-end 128 couples the antenna 122 to the transceiver 126 via a signal propagation path 222. During operation, the signal propagation path 222 carries the signal between the antenna 122 and the transceiver 126. During or as part of signal propagation, the signal propagation path 222 modulates the propagated signal using an amplifier circuit 130-1 or amplifier circuit 130-3, etc. This allows the RF front-end 128 to couple the wireless signal 220 from the antenna 122 to the transceiver 126 as part of its receiving operation. The RF front-end 128 also allows the transmit signal to be coupled from the transceiver 126 to the antenna 122 as part of its transmitting operation to emit the wireless signal 220. Although not explicitly shown in Figure 2, the RF front-end 128 or the signal propagation path 222 of the RF front-end 128 may include one or more other components, such as an amplifier or another amplifier circuit (e.g., a driver amplifier, a power amplifier, or a low-noise amplifier), a filter, an n-plexer, a phase shifter, a diplexer, one or more switches, etc.

[0046] In some implementations, the transceiver 126 may include at least one receiving chain 202, at least one transmitting chain 252, or at least one receiving chain 202 and at least one transmitting chain 252. From left to right, the receiving chain 202 may include a low-noise amplifier 204 (LNA 204), a filter 206, a mixer 208 for frequency down-conversion, and an ADC 210. The transmitting chain 252 may include a power amplifier 254 (PA 254), a filter 256, a mixer 258 for frequency up-conversion, and a DAC 260. However, the receiving chain 202 or the transmitting chain 252 may include other components electrically or electromagnetically located at any point along the depicted receiving and transmitting chains, such as additional amplifiers or filters (e.g., baseband frequency filters, intermediate frequency filters, or radio frequency filters), multiple mixers, one or more buffers, or at least one local oscillator.

[0047] The receiving chain 202 is coupled between the RF front-end 128's signal propagation path 222 and the communication processor 124, for example, via a low-noise amplifier 204 and an ADC 210, respectively. The transmitting chain 252 is coupled between the signal propagation path 222 and the communication processor 124, for example, via a power amplifier 254 and a DAC 260, respectively. The transceiver 126 may also include at least one phase-locked loop 232 (PLL 232) coupled to the mixer 208 or mixer 258. For example, the transceiver 126 may include one PLL 232 per transmit / receive chain pair, one PLL 232 per transmit chain and one PLL 232 per receive chain, multiple PLL 232s per chain, and so on.

[0048] As shown along the signal propagation direction of a particular exemplary implementation of the receiving chain 202, the antenna 122 is coupled to a low-noise amplifier 204 via the signal propagation path 222 and its amplifier circuit 130-3. The low-noise amplifier 204 is coupled to a filter 206. The filter 206 is coupled to a mixer 208, which is coupled to an ADC 210. The ADC 210 is then coupled to a communication processor 124. As shown along the signal propagation direction of a particular exemplary implementation of the transmitting chain 252, the communication processor 124 is coupled to a DAC 260, which is coupled to a mixer 258. The mixer 258 is coupled to a filter 256, which is coupled to a power amplifier 254. The power amplifier 254 is coupled to the antenna 122 via the signal propagation path 222 using the amplifier circuit 130-1 of the signal propagation path 222. Although only one receive chain 202 and one transmit chain 252 are explicitly shown, the electronic device 102 or the transceiver 126 of the electronic device 102 may include multiple instances of either or both of its components. Although the ADC 210 and DAC 260 are illustrated as being separately coupled to the communication processor 124, the ADC 210 and DAC 260 may share a bus or other mechanism for communicating with the processor 124. Furthermore, the ADC 210 or DAC 260 may be part of the communication processor 124 instead of the transceiver 126, as illustrated, or they may be separate from the transceiver 126 and the communication processor 124.

[0049] As part of an exemplary signal reception operation, an amplifier circuit 130-3 in the signal propagation path 222 amplifies the received signal and transfers the amplified signal to a low-noise amplifier 204. The low-noise amplifier 204 receives the amplified signal from the RF front-end 128 and provides another amplified signal to a filter 206 based on the received signal. The filter 206 filters the other amplified signal and provides the filtered signal to a mixer 208. The mixer 208 performs a frequency conversion operation on the filtered signal to downconvert it from one frequency to a lower frequency (for example, from radio frequency (RF) to intermediate frequency (IF), or from RF or IF to baseband frequency (BBF)). The mixer 208 may use at least one PLL 232 to perform frequency downconversion in a single conversion step or through multiple conversion steps. The mixer 208 may provide the downconverted signal to an ADC 210 for conversion and transfer as a digital signal to the communication processor 124.

[0050] As part of an exemplary signal transmission operation, mixer 258 accepts an analog signal from DAC 260 at BBF (or an analog IF signal if the signal has already been upconverted once by another mixer (not shown)). Mixer 258 upconverts the analog signal to a higher frequency, such as the RF frequency, and generates an RF signal using the signal generated by PLL 232 to have a target combined frequency. Mixer 258 provides the RF or other upconverted signal to filter 256. Filter 256 filters the RF signal and provides the filtered signal to power amplifier 254. Thus, after filtering by filter 256, power amplifier 254 amplifies the filtered signal and provides the amplified signal to signal propagation path 222 for signal conditioning. The RF front end 128 can, for example, use amplifier circuit 130-1 in signal propagation path 222 to provide the further amplified signal to antenna 122 to emit as wireless signal 220.

[0051] As described herein, exemplary implementations of the amplifier circuit 130 may be employed in any one or more of the exemplary amplifier circuits 130-1, 130-2, 130-3, or 130-4 within the transceiver 126 or the RF front-end 128, or at other signal amplification locations in the electronic device 102 (not shown in Figure 2). In some cases, if the first amplifier circuit 130-1 of the RF front-end 128 includes a driver amplifier 134 (for example, in Figures 1 and 3), a power amplifier 136, an interstage matching network 140, and a Darlington circuit 138, the transceiver 126 may omit the power amplifier 254 or amplifier circuit 130-2, or "substitute" a driver amplifier or pre-driver amplifier for them. Additionally or alternatively, the second amplifier circuit 130-2 may include a driver amplifier, a Darlington circuit 138, and an interstage matching network 140 (none of which are explicitly shown in Figure 2), in conjunction with the illustrated power amplifier 254 (for example, as part of the second amplifier circuit 130-2).

[0052] In some cases, the third amplifier circuit 130-3 of the RF front-end 128 includes two or more amplifiers in conjunction with the interstage matching network 140 and the Darlington circuit 138 (as shown, for example, in Figures 1 and 3). At least one of these two or more amplifiers may be implemented as a low-noise amplifier for receiving signal processing. Additionally or alternatively, the fourth amplifier circuit 130-4 may include a driver amplifier, the interstage matching network 140, and the Darlington circuit 138 in conjunction with the illustrated low-noise amplifier 204 (none of which are explicitly shown in Figure 2), for example, as part of the fourth amplifier circuit 130-4. Furthermore, the fourth amplifier circuit 130-4 may instead include multiple low-noise amplifiers in conjunction with the interstage matching network 140 and the Darlington circuit 138, which provides a clamping function for the propagating signal. Generally, the amplifier circuit 130 having the Darlington circuit 138 can be located anywhere in the transceiver 126, the RF front end 128, another part of the wireless interface device 120, or another part of the electronic device 102.

[0053] However, circuit 200 illustrates only a few examples of the transceiver 126 and / or RF front-end 128. In some cases, the various components illustrated in the illustration using separate outline blocks or circuit elements may be manufactured or packaged in different distinct ways. For example, one physical module may include components of the RF front-end 128 and some components of the transceiver 126, and another physical module may combine the communication processor 124 with the remaining components of the transceiver 126. Furthermore, in some cases, the antenna 122 may be packaged together with at least some components of the RF front-end 128 (e.g., together with the amplifier circuit 130 and at least one filter) or together with components of the transceiver 126. While a particular amplifier in Figure 2 is depicted as an amplifier circuit 130 that may include a Darlington circuit 138 (not shown in Figure 2) that clamps power in conjunction with an interstage matching network 140 as described herein, any one or more of such amplifier circuits may instead be implemented as amplifier circuits that clamp voltage or current without the Darlington circuit 138 or in a different manner.

[0054] In additional or alternative implementations, one or more components may be physically or logically "shifted" to different parts of the wireless interface device 120 compared to the illustrated circuit 200, and / or incorporated into different modules. For example, a low-noise amplifier 204 or a power amplifier 254 may be deployed in the RF front end 128, for example, by being at least part of amplifier circuit 130-3 or amplifier circuit 130-1, respectively. An example of amplifier circuit 130-1 or 130-2 having a power amplifier 136 (or power amplifier 254) is described below with reference to Figure 3.

[0055] Figure 3 is a schematic diagram 300 illustrating an exemplary amplifier die 304, which includes an amplifier circuit 130 having an interstage matching network 140 coupled between a driver amplifier 134 and a power amplifier 136, and a Darlington circuit 138 coupled to the interstage matching network 140. As illustrated, schematic diagram 300 includes a controller die 302 and an amplifier die 304. The controller die 302 and the amplifier die 304 can be coupled together in series between a communication processor 124 (e.g., in Figures 1 and 2) and an antenna 122 (e.g., in Figures 1 and 2). More generally, two separate integrated circuit dies or chips may be referred to as the first die and the second die.

[0056] In the exemplary operation, the input of the controller die 302 receives a signal from the communication processor 124. Although not shown in Figure 3, other components (e.g., mixers, filters, or DACs) may be coupled between the communication processor 124 and the input of the controller die 302. The controller die 302 can generate a tuned signal 318 as part of the signal control process. The output of the controller die 302 provides the tuned signal 318, which is coupled to the input of the amplifier die 304. Although not shown, there may be one or more components coupled between the output of the controller die 302 and the input of the amplifier die 304.

[0057] An amplifier die 304, which includes at least one amplifier, amplifies the tuned signal 318 to produce an amplified signal 328. After amplification, the amplifier die 304 provides the amplified signal 328 at its output. The amplified signal 328 can be forwarded to the antenna 122. Although not shown in Figure 3, other components (e.g., mode switches, filters, another amplifier, or a front-end module (FEM)) can be coupled between the output of the amplifier die 304 and the antenna 122.

[0058] As shown in the figure, the controller die 302 includes at least one attenuator 312 (ATT312), at least one pre-driver amplifier 314 (PDA314), and at least one output-matching network 316 (OMN316). The attenuator 312, the pre-driver amplifier 314, and the output-matching network 316 are coupled together in series between the input and output of the controller die 302. However, the controller die 302 may include more, fewer, or different components. Furthermore, the depicted components and other components may be arranged or coupled together in the same or different manner as the depicted components and other components are arranged and coupled together.

[0059] In one approach (not shown), a power clamp can be coupled between the attenuator 312 and the pre-driver amplifier 314. Such a power clamp can limit the power input to downstream components such as the power amplifier 136. However, as described above, the relatively long signal path between the pre-driver amplifier 314 on the controller die 302 and the power amplifier 136 on the amplifier die 304 introduces signaling problems. These problems include signal degradation and failure to achieve the target power clamping protection threshold in the power amplifier 136.

[0060] In exemplary implementation embodiments, to at least partially mitigate these problems, this document describes incorporating at least one Darlington circuit 138 as at least part of at least one power clamp 310 in the interstage matching network 140 on the amplifier die 304. The Darlington circuit 138 can provide power clamping for the integrated circuit die with respect to the power of the signal supplied to the input of the power amplifier 136, for example. In addition to the amplifier circuit 130, the amplifier die 304 may include an input-matching network 322 (IMN322) and an output-matching network 326 (OMN326). The input-matching network 322, the amplifier circuit 130, and the output-matching network 326 can be coupled together in series between the input and output of the amplifier die 304.

[0061] As shown, the input matching network 322 may be coupled between the input of the amplifier die 304 and the amplifier circuit 130 (e.g., via input port 132-1 of the amplifier circuit 130). The output matching network 326 may be coupled between the amplifier circuit 130 (e.g., via output port 130-2 of the amplifier circuit 132) and the output of the amplifier die 304. The amplifier circuit 130 may be coupled between the input matching network 322 and the output matching network 326 in a series connection between the input and output of the amplifier die 304. However, the amplifier die 304 may contain more, fewer, or different components. Furthermore, the depicted components and other components may be arranged or coupled together in the same or different ways compared to how the depicted components and other components are arranged and coupled together.

[0062] As illustrated, the amplifier circuit 130 includes at least one driver amplifier 134 (DA134), at least one power amplifier 136 (PA136), and at least one interstage matching network 140 (ISMN140). The driver amplifier 134 includes a driver amplifier input and a driver amplifier output. The power amplifier 136 includes a power amplifier input and a power amplifier output. In some cases, the driver amplifier 134, the interstage matching network 140, and the power amplifier 136 are coupled together in series between the input port 132-1 and the output port 132-2 of the amplifier circuit 130. As shown, the driver amplifier 134 can be coupled closer to the input port 132-1 than the power amplifier 136, and the power amplifier 136 can be coupled closer to the output port 132-2 than the driver amplifier 134. Therefore, the driver amplifier 134 can be coupled between the input port 132-1 and the power amplifier 136, and the power amplifier 136 can be coupled between the driver amplifier 134 and the output port 132-2.

[0063] The interstage matching network 140 can be coupled between two stages, for example, a first stage corresponding to the driver amplifier 134 and a second stage corresponding to the power amplifier 136. Thus, the driver amplifier 134 can be coupled to the input port 132-1 of the amplifier circuit 130 via the driver amplifier input and to the interstage matching network 140 via the driver amplifier output. The power amplifier 136 can be coupled to the interstage matching network 140 via the power amplifier input and to the output port 132-2 of the amplifier circuit 130 via the power amplifier output.

[0064] The Darlington circuit 138 may be coupled to the interstage matching network 140 to provide power clamping functionality to one or more parts, cells, stages, or components of the amplifier die 304, including the amplifier circuit 130. For example, as at least part of a power clamp 310, the Darlington circuit 138 can provide power protection to downstream components, including the input of the power amplifier 136. The Darlington circuit 138 may be coupled, for example, to a wire, trace, or other electrical path between the driver amplifier 134 and the power amplifier 136; to a node coupled between two or more components of the interstage matching network 140 (e.g., between a capacitor and an inductor, or between two capacitors); to a node or electrical path that propagates a signal from the output of the driver amplifier 134 to the input of the power amplifier 136; or to some combination thereof. Exemplary couplings between the Darlington circuit 138 and the interstage matching network 140 are described below with reference to Figures 4-1 to 8.

[0065] As illustrated, the signal flow can proceed as signal 330 from input port 132-1 to driver amplifier 134. Signal 330 can be realized as an input signal, a tuned signal, a pre-amplified signal, a combination thereof, etc. Based on amplifying signal 330, driver amplifier 134 generates a first amplified signal 332-1. From driver amplifier 134, the first amplified signal 332-1 can propagate through interstage matching network 140 as an intermediate signal 334 (e.g., as an interstage signal 334). Interstage matching network 140 can couple the intermediate signal 334 to the input of power amplifier 136, and power amplifier 136 generates a second amplified signal 332-2 based on the intermediate signal 334. The second amplified signal 332-2 output from power amplifier 136 can go to output port 132-2 of amplifier circuit 130 and then to output matching network 326. The output matching network 326 can couple the second amplified signal 332-2 as amplified signal 328 to the output of the amplifier die 304.

[0066] Signals such as signal 330, the first amplified signal 332-1, the intermediate signal 334, the second amplified signal 332-2, or the amplified signal 328 may differ in terms of average power, frequency, phase, position or location within the circuit, single-ended vs. differential, and combinations thereof. However, one or more of these signals may constitute the same signal in terms of being a transmitted signal propagating along the transmission chain toward the antenna, having the same modulation, carrying the same information in the signal, and combinations thereof.

[0067] For clarity, the Darlington circuit 138 is illustrated in Figure 3 as being coupled to the left side of the interstage matching network 140. As depicted in Figure 3, the left side of the interstage matching network 140 is closer to the input than to the output. Nevertheless, the Darlington circuit 138 can be coupled to any part of the interstage matching network 140, or to any one or more nodes of the interstage matching network 140. Such part or node(s) may instead be closer to the power amplifier 136, or at least closer to the central part of the interstage matching network 140, to give a few examples.

[0068] The two amplifiers of amplifier circuit 130 are described herein primarily in terms of the driver amplifier 134 and the power amplifier 136. However, two or more amplifiers, including at least one amplifier protected by the Darlington circuit 138, may generally be referred to as the first amplifier and the second amplifier. Such other amplifiers may be or include any type of amplifier employed for any purpose, such as low-noise amplifiers, operational amplifiers, amplifiers of any given class, or combinations thereof.

[0069] Figure 4-1 is a schematic diagram 400-1 illustrating an exemplary Darlington circuit 138 that can be coupled to an interstage matching network 140 of an amplifier circuit 130 (for example, Figures 1 and 3) to provide forward-swing power clamping. The Darlington circuit 138 includes at least two nodes that can be used to couple the Darlington circuit 138 to a larger circuit, such as via the interstage matching network 140. These at least two nodes include a first node 402-1 and a second node 402-2. The exemplary circuit connections are described below with reference to Figures 4-1 and 4-2, and further with reference to Figures 5, 6-1, and 6-2. An exemplary alternative Darlington circuit is described below with reference to Figures 7 and 8.

[0070] In exemplary implementations, the Darlington circuit 138 includes two or more transistors 404 coupled together in a Darlington transistor arrangement or Darlington configuration 408. For example, the channel terminal of a first transistor (e.g., the left-hand transistor as depicted in Figure 4) may be coupled to the control terminal of a second transistor (e.g., the right-hand transistor as depicted in Figure 4). Furthermore, another channel terminal of the first transistor may be coupled to the channel terminal of the second transistor. The set of transistors coupled together in a Darlington transistor arrangement may have two transistors (e.g., a Darlington pair) or more transistors, as shown. Generally, a Darlington configuration 408 of multiple transistors allows a first current amplified by the first transistor to be amplified again as a second current by the second transistor. Thus, the total current gain can be greater than the current gain of the individual transistors.

[0071] Several transistors are described herein and illustrated in the relevant figures, which are incorporated herein by reference. These transistors may be realized in different forms or as different transistor types. Exemplary transistor types include field-effect transistors (FETs), junction FETs (JFETs), metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), insulated-gate bipolar transistors (IGBTs), heterojunction bipolar transistors (HBTs), and combinations thereof. Manufacturers may produce FETs as n-channel or p-channel transistor types, and BJTs as NPN or PNP transistor types. For example, a heterojunction bipolar transistor (HBT) type can be considered a form or subset of a bipolar junction transistor (BJT) type. While certain transistors are depicted as HBTs in the diagram, one or more of these transistors may be implemented as other types of transistors, such as BJTs, FETs, etc.

[0072] Each transistor may include at least one control terminal and one or more channel terminals. In an FET, the control terminal may correspond to the gate terminal, and the channel terminal may correspond to the source terminal or the drain terminal. In a BJT (including HBT), the control terminal may correspond to the base terminal, and the channel terminal may correspond to the emitter terminal or the collector terminal. In some circuit configurations, the source terminal of an FET may be analogous to the emitter terminal of a BJT. Similarly, the drain terminal of an FET may be analogous to the collector terminal of a BJT.

[0073] In the exemplary Darlington configuration 408, the emitter terminal (or source terminal) of the first transistor can be coupled to the base terminal (or gate terminal) of the second transistor. The base terminal (or gate terminal) of the first transistor can act as the base terminal (or gate terminal) of the Darlington transistor arrangement and function as its input. The emitter terminal (or source terminal) of the second transistor can act as the emitter terminal (or source terminal) of the Darlington transistor arrangement and provide the output current for the Darlington configuration 408.

[0074] Continuing to refer to Figure 4-1, two or more diodes 406 can be coupled together in series between the first node 402-1 and the base terminal (or gate terminal) of the Darlington configuration 408 of two or more transistors 404. The number of these two or more diodes 406 can at least partially set the voltage level that triggers the protection by the Darlington circuit 138. For example, depending on the material or process technology, multiplying the number of diodes by the voltage drop that turns on each diode can establish the voltage level that turns on two or more transistors 404 of the Darlington configuration 408. Thus, a power clamp 310 implemented using a Darlington circuit 138 as described herein (e.g., in Figure 3) can be designed to provide protection at different power level thresholds. This can at least partially be achieved by deploying different numbers of trigger diodes for two or more diodes 406 to establish the clamping voltage implemented by the Darlington circuit 138.

[0075] At least one diode 412 and at least one resistor 414 are shown coupled in series between the base terminal (or gate terminal) of the Darlington configuration 408 and the second node 402-2. The resistance value of resistor 414 can also set, at least partially, the trigger voltage at which clamping protection begins. Generally, as the resistance value of resistor 414 increases, the trigger voltage at which clamping begins decreases. Another diode 416 is shown coupled between the first node 402-1 of the Darlington circuit 138 and a terminal of the Darlington configuration 408, such as the collector terminal (or drain terminal). For example, diode 416 may be omitted while the Darlington circuit 138 maintains satisfactory instantaneous performance. However, in at least some circuit configurations, the presence of diode 416 can keep the voltage swing on the Darlington transistor arrangement lower, which can protect the Darlington configuration 408 and extend its operating life.

[0076] Components depicted as part of the Darlington circuit 138 in Figures 4-1 and 4-2, other than at least two transistors 404, may be omitted from the Darlington circuit 138 or may be coupled to the Darlington configuration 408 while remaining separate from the Darlington circuit 138. Furthermore, certain components are depicted or described as having a specific quantity such as singular, plural, many, one, two, three, etc. However, each of these components may have a different quantity. As a mere example, a series of diodes 406 connected in series may be implemented using a single diode instead.

[0077] In exemplary implementations, the Darlington circuit 138 can be coupled to or incorporated into the amplifier circuit 130 in different ways, and into different nodes of the circuit, as described herein, for example. To couple the Darlington circuit 138 into the circuit, the first node 402-1 may be connected to one node of the circuit, and the second node 402-2 may be connected to another node of the circuit.

[0078] To clamp the signal from a forward-swing perspective, the first node 402-1 can be coupled to an interstage matching network node 430 (ISMN node 430). The interstage matching network node 430 may be part of an interstage matching network 140 (e.g., Figures 1, 3, 5, 6-1, and 6-2). The second node 402-2 can be coupled to a distribution node 432. The distribution node 432 can be implemented, for example, as a supply voltage node (e.g., of a power rail) or as a ground node (e.g., of a ground plane). Using an NPN BJT (or n-channel FET), the distribution node 432 can be implemented using a ground node (not shown in Figure 4-1). However, the two exemplary distribution node types (e.g., supply voltage node versus ground node) may be interchanged, for example, when transistor or diode doping is swapped, or when the direction in which the depicted components are coupled is swapped with respect to voltage potential.

[0079] An exemplary instance of an amplifier circuit including an exemplary interstage matching network node 430 is described below with reference to Figures 5, 6-1, and 6-2. However, different power clamping configurations for the Darlington circuit 138 are then described with reference to Figure 4-2.

[0080] Figure 4-2 is a schematic diagram 400-2 illustrating an exemplary Darlington circuit 138 that can be coupled to an interstage matching network 140 of an amplifier circuit 130 (for example, in Figures 1 and 3) to provide reverse swing power clamping. In exemplary implementations, the Darlington circuit 138 can be coupled to or incorporated into the amplifier circuit 130 in different ways and to different nodes of the circuit, for example, as described herein. To couple the Darlington circuit 138 into the circuit, a first node 402-1 may be connected to one node of the circuit, and a second node 402-2 may be connected to another node of the circuit.

[0081] To clamp the signal from a reverse swing perspective, the first node 402-1 can be coupled to a distribution node 432. The second node 402-2 can be coupled to an interstage matching network node 430, which may be part of an interstage matching network 140 (e.g., Figures 1, 3, 5, 6-1, and 6-2). The distribution node 432 can be implemented, for example, as a supply voltage node (e.g., of a power rail) or as a ground node (e.g., of a ground plane). In an NPN BJT (or n-channel FET), the distribution node 432 can be implemented using a ground node. However, the two exemplary distribution node types (e.g., supply voltage node versus ground node) may be interchanged, for example, when transistor or diode doping is swapped, or when the direction in which the depicted components are coupled is swapped with respect to voltage potential.

[0082] Figure 5 is a schematic diagram illustrating an exemplary single-ended amplifier circuit 130 having a driver amplifier 134, an interstage matching network 140, and a power amplifier 136. The single-ended amplifier circuit 130 has several exemplary nodes to which a Darlington circuit 138 can be coupled to provide power clamping. Figure 5 depicts an integrated circuit die 502, which includes several inputs or outputs that can be realized by pins, pads, or other electrical contact nodes for coupling signaling to or from the integrated circuit die 502. Examples of such inputs and outputs depicted in Figure 5 include Rf.in, Rf.out, Vcc1, Vcc2, etc.

[0083] In an exemplary implementation, the interstage matching network 140 can be implemented using a T-network. As shown, the T-network of the interstage matching network 140 includes a first capacitor coupled between the driver amplifier output and the power amplifier input, and a second capacitor coupled between the driver amplifier output and the power amplifier input. Along one electrical path, the first capacitor is coupled in series with the second capacitor between the output of the driver amplifier 134 and the input of the power amplifier 136. The T-network also includes an inductor coupled between the interstage matching network node 430 and a distribution node 432, such as a grounding node. The interstage matching network node 430 may be coupled, for example, between the first capacitor and the second capacitor.

[0084] However, the T-network can be implemented in other ways. For example, two capacitors can be swapped with two inductors along the "top" of the T-network, and inductors can be swapped with capacitors along the "columns" of the T-network. Furthermore, more or different components can be incorporated into the T-network. Additionally or alternatively, the interstage matching network 140 can be implemented using a Pi network. A Pi network can include any number of components, including reactance components such as inductors (one or more) and capacitors (one or more). The interstage matching network 140 can also be implemented using different networks, two or more networks, different components, different couplings between components, any combination thereof, and so on.

[0085] As illustrated, for the sake of illustration, the forward-swinging Darlington circuit configuration 138-F and the reverse-swinging Darlington circuit configuration 138-R are coupled to the same node, which is the interstage matching network node 430. However, these two Darlington circuits may be coupled to different nodes of the interstage matching network 140. The forward-swinging Darlington circuit configuration 138-F is coupled to the interstage matching network node 430 via the first node 402-1 of this Darlington circuit. The forward-swinging Darlington circuit configuration 138-F is coupled to the distribution node 432 via the second node 402-2 of this Darlington circuit. Thus, the forward-swinging Darlington circuit configuration 138-F corresponds to the exemplary Darlington circuit 138 in Figure 4-1.

[0086] The reverse swing Darlington circuit configuration 138-R is coupled to the interstage matching network node 430 via the second node 402-2 of this Darlington circuit. The reverse swing Darlington circuit configuration 138-R is coupled to the distribution node 432 via the first node 402-1 of this Darlington circuit. Thus, the reverse swing Darlington circuit configuration 138-R corresponds to the exemplary Darlington circuit 138 in Figure 4-2. The two Darlington circuits are coupled to the interstage matching network node 430, which is located between two components at the "top" of the T-network, although the interstage matching network node 430 to which the Darlington circuits are coupled may be in different circuit locations. The two Darlington circuits may also be coupled to different interstage matching network nodes.

[0087] In exemplary operation, a forward-swinging Darlington circuit configuration 138-F can clamp the "positive" voltage level of the intermediate signal 334 at the interstage-matched network node 430. A reverse-swinging Darlington circuit configuration 138-R can clamp the "negative" voltage level of the intermediate signal 334 at the interstage-matched network node 430. Thus, the input to the power amplifier 136 can be protected from voltage or current levels that could damage circuit components, such as one or more parts of the transistors of the power amplifier 136. The Darlington circuits can clamp forward or reverse voltage swings at the interstage-matched network node 430 in response to voltage levels based at least in part on the number of diodes in the multiple diodes 406 of each Darlington circuit 138 (as shown, for example, in Figures 4-1 and 4-2). Additionally or alternatively, the Darlington circuits 138 can increase their clamping effect on the voltage at the interstage-matched network node 430 as the voltage at the node increases.

[0088] Figures 6-1 and 6-2 together illustrate Figure 600 illustrating an exemplary differential amplifier circuit 130 having a driver amplifier 134, an interstage matching network 140, and a power amplifier 136. The exemplary differential amplifier circuit 130 also includes several exemplary nodes to which a Darlington circuit 138 can be coupled to provide power clamping. As shown in block diagram 600 (upper left corner of Figure 6-1), Figure 6-1 depicts the “left” portion of the circuit as circuit 600-1, and Figure 6-2 depicts the “right” portion of the circuit as circuit 600-2. The circled letters “A”, “B”, “C”, and “D” indicate four electrical connection points between the circuit portions in Figures 6-1 and 6-2. Figures 6-1 and 6-2 together illustrate an integrated circuit die 602 including several inputs or outputs that can be realized by pins, pads, or other electrical contact nodes for coupling signaling to or from the integrated circuit die 602. Examples of such inputs and outputs, as illustrated in Figures 6-1 and 6-2, include Rf.in, Int_P, Int_M, Rf.out_P, RF.out_M, Vcc1, Vcc2, etc.

[0089] In an exemplary implementation, the driver amplifier 134 is single-ended and can generate a first amplified signal 332-1, which is also single-ended. The interstage matching network 140 converts the single-ended amplified signal 332-1 to a differential intermediate signal 334. The differential intermediate signal 334 includes a positive intermediate signal 334P and a negative intermediate signal 334M. The interstage matching network 140 may include a balun, such as a transformer, to perform the single-ended to differential signal conversion. In the illustrated example, the interstage matching network 140 is implemented using a T-network, which includes two capacitors for each of the positive and negative signal paths along the "top" of the T-network, and an inductor along the "column" of the T-network. The capacitors in the portion of the interstage matching network 140 shown in Figure 6-1 can act as capacitors for both the positive and negative signal paths, considering that the intermediate signal 334 is single-ended on that side of the transformer. At least one inductor of the transformer can be used as part of the T-network for interstage matching.

[0090] The positive intermediate signal 334P is coupled to the input of the positive transistor T_P of the differential power amplifier 136. The positive transistor T_P amplifies the positive intermediate signal 334P to generate a positive second amplified signal 332-2P. This positive second amplified signal 332-2P can be transferred to the positive output (Rf.out_P). The negative intermediate signal 334M is coupled to the input of the negative transistor T_M of the differential power amplifier 136. The negative transistor T_M amplifies the negative intermediate signal 334M to generate a negative second amplified signal 332-2M. This negative second amplified signal 332-2M can be transferred to the negative output (Rf.out_M).

[0091] As shown in Figures 6-1 and 6-2, the "B" and "C" connection points can correspond to a positive interstage node (Int_P) and a negative interstage node (Int_M), respectively. These nodes can correspond to a positive interstage matched network node 430P and a negative interstage matched network node 430M, respectively. In some embodiments, each of the positive interstage matched network node 430P and the negative interstage matched network node 430M can be coupled to two different Darlington circuits for a total of four Darlington circuits across two interstage matched network nodes. Each pair of Darlington circuits can be coupled to an interstage matched network node 430, as in the example in Figure 5. Thus, each interstage matched network node 430 can be coupled to a forward-swinging Darlington circuit configuration (e.g., forward-swinging Darlington circuit configuration 138-F in Figure 5) and a reverse-swinging Darlington circuit configuration (e.g., reverse-swinging Darlington circuit configuration 138-R in Figure 5).

[0092] However, in other embodiments, the number of Darlington circuits can be reduced by 50 percent (50%) by coupling each of the two Darlington circuits to the respective positive interstage matching network node 430P and the negative interstage matching network node 430M. These embodiments will be described below with continued reference to Figures 6-2. Each interstage matching network node 430 is coupled to two Darlington circuits in different (e.g., opposite) ways with respect to the first node 402-1 and the second node 402-2. For example, each differential interstage matching network node 430P or 430M may be coupled to one Darlington circuit 138 via its first node 402-1 and to another Darlington circuit 138 via its second node 402-2.

[0093] Referring also to Figures 4-1 and 4-2, in some cases, one node of the Darlington circuit 138 (e.g., the first node 402-1) is coupled to the collector terminal (or drain terminal of the FET) of the Darlington configuration 408. Another node of the Darlington circuit 138 (e.g., the second node 402-2) is coupled to the emitter terminal (or source terminal of the FET) of the Darlington configuration 408.

[0094] With respect to the positive interstage matching network node 430P, the positive Darlington circuit 138P (in Figure 6-2) is coupled to it via its first node 402-1. On the other hand, the negative Darlington circuit 138M (in Figure 6-2) is coupled to the positive interstage matching network node 430P via its second node 402-2. Thus, the positive Darlington circuit 138P can be protected from forward signal swing at the positive intermediate node Int_P, and the negative Darlington circuit 138M can be protected from reverse signal swing at the positive intermediate node Int_P.

[0095] With respect to the negative interstage matching network node 430M, the positive Darlington circuit 138P is coupled to it via its second node 402-2. On the other hand, the negative Darlington circuit 138M is coupled to the negative interstage matching network node 430M via its first node 402-1. Thus, the positive Darlington circuit 138P can be protected from reverse signal swing at the negative intermediate node Int_M, and the negative Darlington circuit 138M can be protected from forward signal swing at the negative intermediate node Int_M.

[0096] In this way, the two differential intermediate nodes Int_P and Int_M can be protected from forward and reverse signal swings using two Darlington circuits instead of four. As shown, each Darlington circuit 138 having a differential implementation configuration of the interstage matching network 140 can be coupled to two interstage matching network nodes 430P and 430M instead of coupling to the interstage matching network node 430 and the distribution node 432 (for example, as shown in Figure 5 for a single-ended implementation configuration of the interstage matching network 140). A positive Darlington circuit 138P can be coupled to the positive interstage matching network node 430P via its first node 402-1 and to the negative interstage matching network node 430M via its second node 402-2. A negative Darlington circuit 138M is coupled to two interstage matching network nodes in the opposite manner. Therefore, the negative Darlington circuit 138M can be coupled to the positive interstage matching network node 430P via its second node 402-2 and to the negative interstage matching network node 430M via its first node 402-1.

[0097] Although the two Darlington circuits are shown coupled to specific nodes of the exemplary differential interstage matching network 140 in Figures 6-1 and 6-2, each Darlington circuit 138 may be coupled to a different node of the differential amplifier circuit 130, including a different node of the differential interstage matching network 140. Furthermore, as described above with respect to the single-ended implementation of the interstage matching network 140 in Figure 5, the interstage matching network 140 may be implemented using a Pi network, with different components, with more or fewer components, etc.

[0098] Darlington circuits 138, including those for differential environments, can be implemented differently from the exemplary circuits in Figures 4-1 and 4-2. Next, with reference to Figures 7 and 8, two exemplary differential Darlington circuit implementations are described. By employing these two different differential Darlington circuit implementations, it is possible to select finer voltage steps for the range of trigger voltages available for power clamping to be effective. For example, the first and second differential Darlington circuit implementations described below have a voltage shift of 0.6 volts (V) between them (e.g., exemplary gallium arsenide (GaAs) HBT technology). Thus, a relatively finer clamping voltage step of 0.3 volts can be achieved to support a given product or design specification.

[0099] Figure 7 is a circuit diagram 700 illustrating at least one exemplary differential Darlington circuit 138D-1 according to a first embodiment. Figure 8 is a circuit diagram 800 illustrating at least one exemplary differential Darlington circuit 138D-2 according to a second embodiment. In exemplary implementations, each differential Darlington circuit 138D includes a positive set 404P of transistors coupled in a Darlington transistor configuration and a negative set 404M of transistors coupled in another Darlington transistor configuration. Each differential Darlington circuit 138D also includes a positive set 406P of diodes and a negative set 406M of diodes. Each differential Darlington circuit 138D further includes a positive series connection of a positive diode 412P and a positive resistor 414P, and a negative series connection of a negative diode 412M and a negative resistor 414M.

[0100] As shown in Figures 7 and 8, each differential Darlington circuit 138D can be coupled to a positive intermediate node Int_P, such as the positive interstage matching network node 430P of the differential interstage matching network 140 (for example, in Figures 6-1 and 6-2). Similarly, each differential Darlington circuit 138D can be coupled to a negative intermediate node Int_M, such as the negative interstage matching network node 430M of the differential interstage matching network 140 (for example, in Figures 6-1 and 6-2). The positive set 404P of transistors coupled in a positive Darlington transistor configuration and the negative set 404M of transistors coupled in a negative Darlington transistor configuration can be cross-coupled to each other as shown in 702. For example, the emitter terminal (or source terminal) of the positive set 404P of transistors in the first, i.e., positive Darlington configuration, can be coupled to the collector terminal (or drain terminal) of the negative set 404M of transistors in the second, i.e., negative Darlington configuration, at the negative interstage matching network node 430M. Similarly, the emitter terminal (or source terminal) of the negative set 404M of the negative Darlington configuration transistor can be coupled to the collector terminal (or drain terminal) of the positive set 404P of the positive Darlington configuration transistor at the positive interstage matching network node 430P.

[0101] The differential Darlington circuits 138D-1 and 138D-2 differ from each other in at least one embodiment. The first differential Darlington circuit 138D-1 in Figure 7 couples the series connection of diode 412 and resistor 414 to a ground node, which is a type of power distribution node as described above. However, the emitter terminal (or source terminal) of the positive Darlington and negative Darlington configurations is not coupled to the ground node, as shown in 704. The second differential Darlington circuit 138D-2 in Figure 8 does not couple the series connection of diode 412 and resistor 414 to the ground node. Instead, the emitter terminal (or source terminal) of the positive Darlington and negative Darlington configurations is coupled to the series connection of diode 412 and resistor 414, as shown in 804.

[0102] This different coupling results in the first differential Darlington circuit 138D-1 and the second differential Darlington circuit 138D-2 having trigger voltages that differ by 0.6V, at least in part. For example, in one exemplary circuit design, if there are three diodes in the set of diodes 406, the first differential Darlington circuit 138D-1 will trigger at 2.4 volts, while the second differential Darlington circuit 138D-2 will trigger at 3.0 volts. By selecting from the exemplary first differential Darlington circuit 138D-1 and the second differential Darlington circuit 138D-2, which have trigger voltages that differ by 0.6 volts, a step size of 0.3 volts for power clamp triggering can be implemented. This allows for finer control over the trigger voltage to meet given design specifications.

[0103] Figure 9 is a flowchart illustrating an exemplary process 900 for clamping power to an amplifier circuit by a Darlington circuit, or for operating a power clamp having a Darlington circuit. Process 900 includes four blocks 902-908 that specify the operations that can be performed for the method. However, the operations are not necessarily limited to the order shown in the figure or the order described herein, as they may be performed in an alternative order or in a manner that overlaps completely or partially. Also, more, fewer, and / or different operations may be performed to perform each process or an alternative process.

[0104] In exemplary implementations, the operation represented by the illustrated block of each process may be performed by an electronic device such as the electronic device 102 in Figure 1 or its wireless interface device 120. More specifically, the operation of each process may be performed by an integrated circuit die (e.g., the amplifier die 304 in Figure 3, the die 502 in Figure 5, or the die 602 in Figures 6-1 and 6-2) or by an amplifier circuit 130 including a first amplifier and a second amplifier. Part of the description herein focuses particularly on amplifiers and power clamps operating in single-ended signaling or differential signaling, but the principles described with respect to one (e.g., corresponding to devices, circuits, techniques, and processes) may also be applicable to the other. In other words, the principles described are generally applicable to differential signaling and single-ended signaling environments.

[0105] In block 902, a driver amplifier is used to amplify the signal in order to generate a first amplified signal. For example, amplifier circuit 130 can amplify signal 330 using driver amplifier 134 to generate a first amplified signal 332-1. For example, the common-emitter configuration (or common-source configuration of FETs) transistor of driver amplifier 134 can amplify the signal to be transmitted.

[0106] In block 904, the first amplified signal is propagated through the interstage matching network. For example, the amplifier circuit 130 can propagate the first amplified signal 332-1 through the interstage matching network 140. In some cases, the interstage matching network 140 may include a T network or a Pi network and may operate in single-ended or differential signaling mode.

[0107] In block 906, the first amplified signal is clamped to generate an intermediate signal using two or more transistors coupled together in a Darlington transistor configuration, in conjunction with propagation. For example, amplifier circuit 130 may clamp the first amplified signal 332-1 in conjunction with signal propagation using two or more transistors 404 coupled together in a Darlington transistor configuration (e.g., Darlington configuration 408) to generate an intermediate signal 334. To do so, one or more of the forward-swinging Darlington circuit configuration 138-F, the reverse-swinging Darlington circuit configuration 138-R, the positive Darlington circuit 138P, the negative Darlington circuit 138M, the first differential Darlington circuit 138D-1, or the second differential Darlington circuit 138D-2 may clamp the intermediate signal 334 to generate a clamped signal with a reduced voltage or current.

[0108] In block 908, the intermediate signal is amplified using a power amplifier to generate a second amplified signal. For example, amplifier circuit 130 can amplify the intermediate signal 334 using power amplifier 136 to generate a second amplified signal 332-2. Thus, using the power of the intermediate signal 334 clamped by at least one Darlington circuit 138, power amplifier 136 can safely amplify the intermediate signal 334 clamped using at least one transistor without damaging at least one transistor.

[0109] Examples of implementation methods This section describes some exemplary implementations and / or exemplary configurations related to the apparatus and / or processes presented above.

[0110] Exemplary example 1: A device comprising an amplifier circuit including an input port and an output port, wherein the amplifier circuit is A driver amplifier including a driver amplifier output, coupled between an input port and an output port, A power amplifier including a power amplifier input, coupled between the driver amplifier output and the output port, An interstage matching network coupled between the driver amplifier output and the power amplifier input, A Darlington circuit coupled to an interstage matching network via a node coupled between the driver amplifier output and the power amplifier input, Device.

[0111] Exemplary example 2: Further comprising an integrated circuit die with an amplifier circuit, The apparatus according to Exemplary Embodiment 1, wherein the Darlington circuit is configured to provide power clamping for a signal propagating from the driver amplifier output to the power amplifier input.

[0112] Exemplary Embodiment 3: The apparatus according to Exemplary Embodiment 1 or 2, wherein the node is coupled between the channel terminal of the driver amplifier transistor and the control terminal of the power amplifier transistor.

[0113] Exemplary Embodiment 4: An interstage matching network, comprising a T-network, according to any one of Exemplary Embodiments 1 to 3.

[0114] Exemplary embodiment 5: The T network is, A first capacitor coupled between the driver amplifier output and the power amplifier input, A second capacitor coupled between the driver amplifier output and the power amplifier input, The apparatus according to exemplary embodiment 4, comprising an inductor coupled between an interstage matching network node and a distribution node, wherein the interstage matching network node is coupled between a first capacitor and a second capacitor.

[0115] Exemplary Embodiment 6: The apparatus according to any one of Exemplary Embodiments 1 to 3, wherein the interstage matched network includes a Pi network.

[0116] Exemplary Embodiment 7: The apparatus according to any one of Exemplary Embodiments 1 to 6, wherein the Darlington circuit is coupled between a node and a distribution node.

[0117] Exemplary Embodiment 8: The apparatus according to Exemplary Embodiment 7, wherein the distribution node includes a grounding node.

[0118] Exemplary example 9: The Darlington circuit is, Two or more transistors coupled together in a Darlington transistor configuration having a control terminal and a first channel terminal, The system comprises one or more diodes coupled between the control terminal and the first channel terminal, The apparatus according to any one of the exemplary embodiments 1 to 8, wherein the first channel terminal is coupled to a node.

[0119] Exemplary embodiment 10: Two or more transistors include a first transistor and a second transistor, The channel terminal of the first transistor is coupled to the control terminal of the second transistor. The control terminal of the first transistor corresponds to the control terminal in a Darlington transistor configuration. The first channel terminal of the second transistor corresponds to the first channel terminal of the Darlington transistor configuration. The apparatus according to exemplary embodiment 9, wherein the second channel terminal of the second transistor corresponds to the second channel terminal of a Darlington transistor arrangement.

[0120] Exemplary embodiment 11: One or more diodes comprise a plurality of diodes coupled together in series between the control terminal and the first channel terminal. The apparatus according to exemplary embodiment 9 or 10, wherein the Darlington circuit is configured to clamp the voltage at a node in response to a voltage level that is at least partially based on the number of diodes among a plurality of diodes.

[0121] Exemplary Embodiment 12: The apparatus according to Exemplary Embodiment 11, wherein the Darlington circuit is configured to increase the clamping effect on the voltage at the node as the voltage at the node increases.

[0122] Exemplary embodiment 13: The Darlington circuit comprises a first Darlington circuit of the amplifier circuit, and the Darlington transistor arrangement comprises a first Darlington transistor arrangement. The amplifier circuit includes a second Darlington circuit. The second Darlington circuit is, In a second Darlington transistor configuration having a control terminal, a first channel terminal, and a second channel terminal, two or more transistors are coupled together, The device comprises one or more diodes coupled between the control terminal of the second Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement, The apparatus according to any one of the exemplary embodiments 9 to 12, wherein the second channel terminal of the second Darlington transistor arrangement is coupled to a node.

[0123] Exemplary embodiment 14: The first Darlington transistor configuration includes a second channel terminal, The second channel terminal of the first Darlington transistor configuration is coupled to the power distribution node. The apparatus according to exemplary embodiment 13, wherein the first channel terminal of the second Darlington transistor arrangement is coupled to a power distribution node.

[0124] Exemplary Embodiment 15: The apparatus according to Exemplary Embodiment 14, wherein the distribution node includes a grounding node.

[0125] Exemplary embodiment 16: The first Darlington transistor configuration includes a second channel terminal, The second channel terminal of the first Darlington transistor configuration is coupled to the first channel terminal of the second Darlington transistor configuration. The apparatus according to exemplary embodiment 13, wherein the first channel terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

[0126] Exemplary embodiment 17: The power amplifier comprises a differential power amplifier including a positive transistor and a negative transistor. The first channel terminal of the first Darlington transistor configuration and the second channel terminal of the second Darlington transistor configuration correspond to positive interstage matching network nodes coupled to positive transistors. The apparatus according to exemplary embodiment 16, wherein the second channel terminal of the first Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement correspond to a negative interstage matching network node coupled to a negative transistor.

[0127] Exemplary embodiment 18: The control terminal of the first Darlington transistor configuration is coupled to the power distribution node. The apparatus according to exemplary embodiment 16 or 17, wherein the control terminal of the second Darlington transistor arrangement is coupled to a power distribution node.

[0128] Exemplary embodiment 19: The control terminal of the first Darlington transistor configuration is coupled to the second channel terminal of the first Darlington transistor configuration. The apparatus according to exemplary embodiment 16 or 17, wherein the control terminal of the second Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

[0129] Exemplary embodiment 20: The apparatus is, The apparatus according to any one of the exemplary embodiments 1 to 19, further comprising a radio frequency front end including an amplifier circuit.

[0130] Exemplary embodiment 21: A device comprising an amplifier circuit including an input port and an output port, wherein the amplifier circuit is A driver amplifier including a driver amplifier input and a driver amplifier output, wherein the driver amplifier input is coupled to an input port, A power amplifier including a power amplifier input and a power amplifier output, wherein the power amplifier output is coupled to an output port, An interstage matching network coupled between the driver amplifier output and the power amplifier input, An apparatus comprising means for clamping the power of a signal flowing through an interstage matching network between a driver amplifier and a power amplifier.

[0131] Exemplary embodiment 22: To generate the first amplified signal, a driver amplifier is used to amplify the signal, The first amplified signal is propagated through the interstage matching network, In conjunction with propagation, the first amplified signal is clamped to generate an intermediate signal using two or more transistors coupled together in a Darlington transistor configuration. To generate a second amplified signal, a power amplifier is used to amplify the intermediate signal, Methods that include...

[0132] Exemplary embodiment 23: Clamping is The method according to exemplary embodiment 22, comprising clamping the power of a first amplified signal to generate an intermediate signal using a plurality of diodes that establish a clamping voltage based on the number of diodes, wherein the plurality of diodes are coupled together in series between the channel terminal and the control terminal of a Darlington transistor arrangement.

[0133] Exemplary embodiment 24: The Darlington transistor configuration comprises a first Darlington transistor configuration, To clamp, To protect against forward signal swing, a first Darlington transistor configuration is used to clamp the first amplified signal in order to generate an intermediate signal. The method according to exemplary embodiment 22 or 23, comprising clamping the first amplified signal to generate an intermediate signal using a second Darlington transistor arrangement to protect against reverse signal swing.

[0134] conclusion As used herein, the terms “coupled,” “coupled,” or “coupled” refer to a relationship between two or more components that are operably communicating with each other to implement any function or realize any capability described herein. Coupling can be achieved using physical lines, such as metal traces or metal wires, or electromagnetic coupling, such as transformers. Coupling can include direct coupling or indirect coupling. Direct coupling refers to connecting discrete circuit elements through the same node without any intervening elements. Indirect coupling refers to connecting discrete circuit elements through one or more other devices or other discrete circuit elements, including two or more different nodes.

[0135] The term “port” (including, for example, “first port” or “amplifier port”) represents at least one electrical connection point at or near an input or output of a component, or between two or more components (e.g., active or passive circuit elements or components). A port may be visually depicted in a drawing as a single point (or circle), but a port can represent an interconnected portion of a physical circuit or network where the physical circuit or network has at least substantially the same potential in or along that portion. In other words, a single-ended port can represent at least one point (e.g., a node) of several points along a conductive medium (e.g., a wire or trace) present between electrically connected components. In some cases, “port” can represent an input or output of a component such as a matched network, an amplifier circuit, or a portion thereof, or at least one corresponding node. Similarly, “terminal” or “node” can represent one or more points having at least substantially the same potential, and terminal is associated with an input or output of a component.

[0136] The terms “first,” “second,” “third,” and other numerical indicators are used herein to identify or distinguish similar or analogous items within a given context, such as a particular implementation, a single drawing, a given component, or a claim. Thus, an item “first” in one context may differ from an item “first” in another. For example, an item identified as “first amplifier” in one context may be identified as “second amplifier” in another. Similarly, “first port” or “first transistor” in one claim may be described as “second port” or “third transistor” in different claims, respectively.

[0137] Unless the context indicates otherwise, the use of the word “or” herein may be considered an “inclusive or” use, or a term that permits the inclusion or application of one or more items associated by the word “or” (for example, the phrase “A or B” may be interpreted as permitting only “A”, only “B”, or both “A” and “B”). Also, as used herein, any phrase referring to “at least one of” the list of items refers to any combination of those items, including a single member. For example, “at least one of a, b, or c” may include a, b, c, ab, ac, bc, and abc, as well as any combination having multiple identical elements (for example, aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other order of a, b, and c). Furthermore, the items shown in the attached drawings and the terms considered herein may represent one or more items or terms, and therefore may be interchangeably referred to as one or more forms of the items and terms herein.

[0138] While the implementation modes for realizing interstage Darlington circuits have been described using language specific to certain features and / or methods, the subject matter of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as exemplary implementation modes for realizing interstage Darlington circuits.

Claims

1. A device comprising an amplifier circuit including an input port and an output port, wherein the amplifier circuit is A driver amplifier including a driver amplifier output, coupled between the input port and the output port, A power amplifier including a power amplifier input, coupled between the driver amplifier output and the output port, An interstage matching network coupled between the driver amplifier output and the power amplifier input, The system comprises a Darlington circuit coupled to the interstage matching network via a node coupled between the driver amplifier output and the power amplifier input, Device.

2. The integrated circuit die further comprises the aforementioned amplifier circuit, The apparatus according to claim 1, wherein the Darlington circuit is configured to provide power clamping for a signal propagating from the driver amplifier output to the power amplifier input.

3. The apparatus according to claim 1, wherein the node is coupled between the channel terminal of the transistor of the driver amplifier and the control terminal of the transistor of the power amplifier.

4. The apparatus according to claim 1, wherein the interstage matching network includes a T-network.

5. The aforementioned T network is A first capacitor coupled between the driver amplifier output and the power amplifier input, A second capacitor coupled between the driver amplifier output and the power amplifier input, The apparatus according to claim 4, comprising an inductor coupled between an interstage matching network node and a power distribution node, wherein the interstage matching network node is coupled between the first capacitor and the second capacitor.

6. The apparatus according to claim 1, wherein the interstage matching network includes a Pi network.

7. The apparatus according to claim 1, wherein the Darlington circuit is coupled between the node and the power distribution node.

8. The apparatus according to claim 7, wherein the distribution node includes a grounding node.

9. The aforementioned Darlington circuit is, Two or more transistors coupled together in a Darlington transistor configuration having a control terminal and a first channel terminal, The system comprises one or more diodes coupled between the control terminal and the first channel terminal, The apparatus according to claim 1, wherein the first channel terminal is coupled to the node.

10. The two or more transistors include a first transistor and a second transistor, The channel terminal of the first transistor is coupled to the control terminal of the second transistor. The control terminal of the first transistor corresponds to the control terminal of the Darlington transistor arrangement, The first channel terminal of the second transistor corresponds to the first channel terminal of the Darlington transistor arrangement, The apparatus according to claim 9, wherein the second channel terminal of the second transistor corresponds to the second channel terminal of the Darlington transistor arrangement.

11. The one or more diodes include a plurality of diodes coupled together in series between the control terminal and the first channel terminal. The apparatus according to claim 9, wherein the Darlington circuit is configured to clamp the voltage at the node in response to a voltage level that is at least partially based on the number of diodes among the plurality of diodes.

12. The apparatus according to claim 11, wherein the Darlington circuit is configured to increase the clamping effect on the voltage at the node as the voltage at the node increases.

13. The Darlington circuit comprises a first Darlington circuit of the amplifier circuit, and the Darlington transistor arrangement comprises a first Darlington transistor arrangement. The aforementioned amplifier circuit includes a second Darlington circuit, The second Darlington circuit described above is In a second Darlington transistor configuration having a control terminal, a first channel terminal, and a second channel terminal, two or more transistors are coupled together, The device comprises one or more diodes coupled between the control terminal of the second Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement, The apparatus according to claim 9, wherein the second channel terminal of the second Darlington transistor arrangement is coupled to the node.

14. The first Darlington transistor configuration comprises a second channel terminal, The second channel terminal of the first Darlington transistor configuration is coupled to a power distribution node. The apparatus according to claim 13, wherein the first channel terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

15. The apparatus according to claim 14, wherein the distribution node includes a grounding node.

16. The first Darlington transistor configuration comprises a second channel terminal, The second channel terminal of the first Darlington transistor configuration is coupled to the first channel terminal of the second Darlington transistor configuration. The apparatus according to claim 13, wherein the first channel terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

17. The power amplifier comprises a differential power amplifier including a positive transistor and a negative transistor. The first channel terminal of the first Darlington transistor configuration and the second channel terminal of the second Darlington transistor configuration correspond to the positive interstage matching network node coupled to the positive transistor, The apparatus according to claim 16, wherein the second channel terminal of the first Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement correspond to a negative interstage matching network node coupled to the negative transistor.

18. The control terminal of the first Darlington transistor arrangement is connected to the power distribution node, The apparatus according to claim 16, wherein the control terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

19. The control terminal of the first Darlington transistor configuration is coupled to the second channel terminal of the first Darlington transistor configuration. The apparatus according to claim 16, wherein the control terminal of the second Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

20. The aforementioned device is The apparatus according to claim 1, further comprising a radio frequency front end including the amplifier circuit.

21. A device comprising an amplifier circuit including an input port and an output port, wherein the amplifier circuit is A driver amplifier including a driver amplifier input and a driver amplifier output, which is coupled to the input port of the driver amplifier, A power amplifier including a power amplifier input and a power amplifier output, wherein the power amplifier is coupled to the output port, An interstage matching network coupled between the driver amplifier output and the power amplifier input, The system includes means for clamping the power of the signal flowing through the interstage matching network between the driver amplifier and the power amplifier. Device.

22. To generate the first amplified signal, a driver amplifier is used to amplify the signal, The first amplified signal is propagated through an interstage matching network, In conjunction with the propagation, the first amplified signal is clamped to generate an intermediate signal using two or more transistors coupled together in a Darlington transistor configuration. This includes amplifying the intermediate signal using a power amplifier to generate a second amplified signal, method.

23. The clamping mentioned above is The method according to claim 22, comprising clamping the power of the first amplified signal to generate the intermediate signal using the plurality of diodes to establish a clamping voltage based on the number of diodes, wherein the plurality of diodes are coupled together in series between the channel terminal and the control terminal of the Darlington transistor arrangement.

24. The Darlington transistor arrangement comprises a first Darlington transistor arrangement, The clamping mentioned above is To protect against forward signal swing, the first Darlington transistor arrangement is used to clamp the first amplified signal in order to generate the intermediate signal. The method according to claim 22, comprising clamping the first amplified signal to generate the intermediate signal using a second Darlington transistor arrangement to protect against reverse signal swing.

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