Random access memory and method for manufacturing the same
Patent Information
- Application Number
- JP2026517945
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-19
- Filing Date
- 2024-09-14
- Publication Date
- 2026-10-14
Smart Images

Figure 2026534242000001_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the field of memory technology, and specifically, to a random access memory and a manufacturing method thereof.
BACKGROUND ART
[0002] As a novel memory, random access memory has significant advantages over conventional flash memory in terms of read-write speed and device reliability. Currently, the general industry integration solution generally first fabricates the bottom vias and the memory cells in the array region having the memory cells, then fabricates the bottom vias in the non-memory region (logic region), and subsequently fabricates the top metal layer common to the memory region (array region) and the non-memory region (logic region). Therefore, in the prior art, the bottom vias in the memory region (array region) and the bottom vias in the non-memory region (logic region) need to be formed in a two-step process using separate masks respectively, which increases the manufacturing cost. In addition, a magnetic random access memory is generally composed of a three-layer basic cell consisting of a ferromagnetic layer, an insulating tunnel layer and a fixed layer. When the magnetic moment directions of the ferromagnetic layer and the fixed layer are opposite, the memory device exhibits a high resistance state Rap; when the magnetic moment directions of the two layers are the same, the memory device exhibits a low resistance state Rp, which is used for storing information such as "1" and "0". As can be seen, the stored information of the magnetic random access memory is interfered under the influence of an external magnetic field.
[0003] Accordingly, a new random access memory is highly desired.
SUMMARY OF THE INVENTION
PROBLEMS TO BE SOLVED BY THE INVENTION
[0004] A main objective of the present disclosure is to provide a random access memory for solving the problem of high manufacturing cost of random access memories in the prior art.
MEANS FOR SOLVING THE PROBLEMS
[0005] To achieve the above objectives, one aspect of the present disclosure provides a random access memory comprising: a base substrate having a first conductive passage and a second conductive passage provided at intervals from each other, wherein both the first and second conductive passages extend from a first surface of the base substrate to the base substrate; a storage cell located on the first surface and in contact with the first conductive passage; a first insulating medium layer located on the first surface and covering the sidewall of the storage cell; a stop layer located on the side of the first insulating medium layer away from the storage cell; and a first metal layer located on the side of the base substrate having the storage cell and in contact with the side of the storage cell away from the base substrate.
[0006] Furthermore, the stop layer is a metal layer or a metal oxide layer.
[0007] Furthermore, the material of the stop layer includes at least a magnetic material.
[0008] Furthermore, the random access memory further includes a second insulating medium layer located away from the first insulating medium layer of the stop layer, so that the stop layer is located between the first insulating medium layer and the second insulating medium layer.
[0009] Furthermore, the memory cell has a first projection on its first surface, the first insulating medium layer has a second projection on its first surface, the stop layer has a third projection on its first surface, and the second projection is located between the first and third projections.
[0010] Furthermore, random access memory is one of the following types: magnetic random memory, phase-change random memory, resistive random-access memory, and ferroelectric memory.
[0011] According to another aspect of the present disclosure, a method for manufacturing a random access memory is provided, comprising the steps of providing a base substrate, the base substrate having a first conductive passage and a second conductive passage that are spaced apart from each other, and both the first and second conductive passages extending from a first surface of the base substrate to the base substrate; forming a storage cell on the first surface so as to be in contact with the first conductive passage; forming a first insulating medium layer on the first surface so as to cover the sidewalls of the storage cell; forming a stop layer on the side of the first insulating medium layer away from the storage cell; and forming a first metal layer on the side of the base substrate having the storage cell so as to be in contact with the side of the storage cell away from the base substrate.
[0012] Furthermore, the steps for forming the first insulating medium layer and the stop layer include: depositing a first insulating material layer on one side of a base substrate having a first surface so as to cover the first surface, the side wall of the storage cell, and the second surface which is the surface away from the first surface of the storage cell; depositing a stop material layer on the side of the first insulating material layer away from the first surface so as to cover the first insulating material layer; and removing the portion of the first insulating material layer other than the portion of the first insulating material layer that covers the side wall, and the portion of the first insulating material layer other than the side away from the storage cell, so that the remaining first insulating material layer forms a first insulating medium layer located between the storage cell and the stop layer, and the remaining stop material layer forms a stop layer.
[0013] Furthermore, the steps for forming the first insulating medium layer and the stop layer include: depositing a first insulating material layer on one side of a base substrate having a first surface so as to cover the first surface, the side wall of the storage cell, and the second surface which is the surface away from the first surface of the storage cell; removing at least a portion of the first insulating material layer other than the first insulating material layer covering the side wall to expose the second surface and a portion of the first surface, and so that the remaining first insulating material layer forms the first insulating medium layer; depositing a stop material layer on the side of the first insulating medium layer away from the first surface so as to cover the exposed second surface, the exposed first surface, and the first insulating medium layer; and removing at least a portion of the stop material layer other than the stop material layer covering the first insulating medium layer using an etching process so that the remaining stop material layer forms the stop layer.
[0014] Furthermore, prior to the step of forming the first metal layer, the manufacturing method further includes the step of forming the second insulating medium layer on the side of the stop layer away from the first insulating medium layer such that the stop layer is located between the first insulating medium layer and the second insulating medium layer. [Effects of the Invention]
[0015] By applying the technical solution of this disclosure, a random access memory is provided, comprising a base substrate, a storage cell, a first insulating medium layer, a stop layer, and a first metal layer, wherein the base substrate has a first conductive passage and a second conductive passage provided at intervals, and both the first and second conductive passages extend from a first surface of the base substrate to the base substrate, and so the first and second conductive passages can be formed by etching once using the same photomask, the storage cell is the core cell in the random access memory, the first insulating medium layer and the stop layer not only play a role in preventing damage to the storage cell, but the first insulating medium layer and the stop layer can also serve as isolation layers between the first metal layer and the storage cell, thereby preventing the first metal layer from contacting the sidewall of the storage cell, thereby further saving the top electrode photomask required when forming the first metal layer, and further reducing the manufacturing cost of the random access memory. [Brief explanation of the drawing]
[0016] The specification and drawings, which constitute part of this disclosure, are provided to give further understanding of this disclosure, and the schematic embodiments and descriptions thereof are used to interpret this disclosure and are not intended to unduly limit this disclosure. [Figure 1] A schematic diagram of the cross-sectional structure of one embodiment of the random access memory according to this disclosure is shown. [Figure 2] A schematic diagram of the cross-sectional structure of the base substrate provided in the method for manufacturing a random access memory according to the embodiments of this disclosure is shown. [Figure 3] Figure 2 shows a schematic diagram of the cross-sectional structure in which a memory film is formed on the base substrate. [Figure 4] Figure 3 shows a schematic diagram of the cross-sectional structure in which a first insulating material layer is formed after etching the memory film shown in Figure 3 to form a memory cell. [Figure 5] Figure 4 shows a schematic diagram of the cross-sectional structure in which the stop material layer is formed after etching the first insulating material layer shown in Figure 4. [Figure 6]A schematic diagram of a cross-sectional structure after etching the stop material layer shown in Figure 5 and then forming the first protective layer is presented. [Figure 7] A schematic diagram of a cross-sectional structure for forming a stop material layer on the first insulating material layer shown in Figure 4 is presented. [Figure 8] A schematic diagram of a cross-sectional structure after sequentially etching the stop material layer and the first insulating material layer of the structure shown in Figure 7 and then forming the second protective layer is presented. [Figure 9] A schematic diagram of a cross-sectional structure after sequentially etching the stop material layer and the first insulating material layer of the structure shown in Figure 7 and then forming the second insulating material layer is presented. [Figure 10] A schematic diagram of a cross-sectional structure after etching the second insulating material layer shown in Figure 9 and then forming the third protective layer is presented. [Figure 11] A schematic diagram of a cross-sectional structure for forming a medium film layer on the second protective layer shown in Figure 8 is presented. [Figure 12] A schematic diagram of a cross-sectional structure after etching the medium film layer and the second protective layer of the structure shown in Figure 11 and then forming the first metal layer is presented. [Description of Reference Signs]
[0017] 10... Base substrate, 101... First metal wiring layer, 102... Second metal wiring layer, 20... First conductive path, 30... Second conductive path, 40... Memory cell, 401... Memory film, 50... First insulating medium layer, 501... First insulating material layer, 60... Stop layer, 601... Stop material layer, 70... First protective layer, 80... Second protective layer, 90... Second insulating medium layer, 901... Second insulating material layer, 100... Third protective layer, 110... Medium film layer, 120... First metal layer. [Modes for Carrying Out the Invention]
[0018] Note that the embodiments of the present disclosure and the features of the embodiments may be combined with each other in the case of no conflict. Hereinafter, the present disclosure will be described in combination with the embodiments with reference to the accompanying drawings.
[0019] To enable those skilled in the art to better understand the solutions of this disclosure, the technical solutions in the embodiments of this disclosure are described below clearly and completely with reference to the drawings in the embodiments of this disclosure. Clearly, the embodiments described are only a selection of the embodiments of this disclosure, not all of them. Any other embodiments that a person skilled in the art could derive from the embodiments of this disclosure without creative effort should all fall within the scope of this disclosure.
[0020] Furthermore, terms such as “First” and “Second” in the specification, claims, and drawings of this disclosure are for distinguishing similar objects and do not need to be used to describe a specific order or priority. It should be understood that the data used in this manner may be interchangeable in appropriate circumstances to facilitate the embodiments of this disclosure described herein. Moreover, the terms “includes” and “having,” and any variations thereof, are intended to include non-exclusively, for example, a process, method, system, product, or apparatus that includes a series of steps or cells, and may include other steps or cells that are not explicitly listed or that are specific to these processes, methods, products, or apparatus.
[0021] As described in the background, in existing technologies, the bottom vias of the memory area (array area) and the bottom vias of the non-memory area (logic area) must be formed in a two-step process using separate masks, thereby increasing manufacturing costs. Furthermore, magnetic random access memory typically consists of a three-layer basic cell comprising a ferromagnetic layer, an insulating tunnel layer, and a stationary layer. When the magnetic moment directions of the ferromagnetic layer and the stationary layer are opposite, the memory device exhibits a high-resistance state Rap, and when the magnetic moment directions of both layers are the same, it exhibits a low-resistance state Rp, which is used to store information such as "1" or "0". As can be seen from this, the storage of information in such magnetic random access memory is interfered with under the influence of an external magnetic field. This disclosure provides a random access memory and a method for manufacturing the same in order to solve the above technical problems.
[0022] According to one aspect of the present disclosure, a random access memory is provided, as shown in Figure 1, the random access memory having a first conductive passage 20 and a second conductive passage 30 provided at a distance from each other, and the first conductive passage 20 and the second conductive passage 30 both extend from a first surface of the base substrate 10 to the base substrate 10, a storage cell 40 located on the first surface and in contact with the first conductive passage 20, a first insulating medium layer 50 located on the first surface and covering the side wall of the storage cell 40, a stop layer 60 located on the side of the first insulating medium layer 50 away from the storage cell 40, and a first metal layer 120 located on the side of the base substrate 10 having the storage cell 40 and in contact with the side of the storage cell 40 away from the base substrate 10.
[0023] Furthermore, the base substrate 10 of the random access memory further includes a plurality of metal wiring layers. For example, the base substrate 10 may include a first metal wiring layer 101 and a second metal wiring layer 102, both of which extend from the back surface of the base substrate 10 to the base substrate 10, with the first metal wiring layer 101 in contact with the first conductive passage 20 and the second metal wiring layer 102 in contact with the second conductive passage 30, the back surface of which is the surface facing the first surface. Optionally, the first metal wiring layer 101 and the second metal wiring layer 102 may be copper wiring layers.
[0024] Specifically, in the direction perpendicular to the first surface, as shown in Figure 1, the heights of the first conductive passage 20 and the second conductive passage 30 on the base substrate 10 may be the same.
[0025] Specifically, the first conductive passage 20 and the second conductive passage 30 may be metal passages, and the metal materials used as the first conductive passage 20 and the second conductive passage 30 may include, but are not limited to, one or more of tungsten (W), copper (Cu), tantalum nitride (TAN), and titanium nitride (TIN).
[0026] Specifically, the random access memory may contain multiple memory cells 40. Furthermore, since the memory cells 40 in the random access memory are in contact with the first conductive passage 20, if the random access memory contains multiple memory cells 40, then the random access memory also contains multiple first conductive passages 20, and each of the multiple first conductive passages 20 corresponds one-to-one with each of the multiple memory cells 40. In the random access memory described above, the area corresponding to the multiple first conductive passages 20 and the multiple memory cells 40 is the array area, the area corresponding to the second conductive passage 30 is the logic area, and the array area is provided adjacent to the logic area.
[0027] Specifically, the material of the first insulating medium layer 50 and the material of the stop layer 60 may contain, but are not limited to, any one or more of silicon nitride, silicon oxide, silicon carbonitride, and aluminum oxide. That is, optionally, the stop layer 60 may further be a metal oxide layer.
[0028] In some cases, when the stop layer 60 is located on the side of the first insulating medium layer 50 away from the storage cell 40, the entire first insulating medium layer 50 in some arbitrary embodiments can be located between the stop layer 60 and the storage cell 40, as shown in Figure 1. In other arbitrary embodiments, the first insulating medium layer 50 can include a second portion located between the stop layer 60 and the base substrate 10, in addition to a first portion located between the stop layer 60 and the storage cell 40, and the first and second portions are connected together.
[0029] In some optional embodiments, if the first metal layer 120 is located on the side of the base substrate 10 that has the memory cell 40, the first metal layer 120 is in contact not only with the side of the memory cell 40 away from the base substrate 10, but also with the second conductive passage 30.
[0030] Specifically, the first metal layer 120 may be a metal layer, and the material of the first metal layer 120 may include, but is not limited to, one or a combination of several types of metal material layers such as copper, aluminum, tungsten, and silver.
[0031] In the above embodiment, the base substrate 10 of the random access memory of the present disclosure has a first conductive passage 20 and a second conductive passage 30 that are spaced apart, and both the first conductive passage 20 and the second conductive passage 30 extend from the first surface of the base substrate 10 to the base substrate 10. Therefore, the first conductive passage 20 and the second conductive passage 30 can be formed by etching once using the same photomask. The storage cell 40 is the core cell in the random access memory, and the first insulating medium layer 50 and the stop layer 60 not only prevent damage to the storage cell 40, but the first insulating medium layer 50 and the stop layer 60 can also serve as isolation layers between the first metal layer 120 and the storage cell 40. As a result, the first metal layer 120 does not come into contact with the sidewall of the storage cell 40, further saving the top electrode photomask required when forming the first metal layer 120 and further reducing the manufacturing cost of the random access memory.
[0032] In some optional embodiments, the material of the stop layer 60 of the random access memory described herein may be a metallic material, i.e., the stop layer 60 may be a metallic layer, in order to have a better etching stop effect for the stop layer 60. Exemplarily, the material of the stop layer 60 may include, but is not limited to, one or more metallic materials such as titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), and tungsten (W).
[0033] In some optional embodiments, if the stop layer 60 is a metallic layer, the material of the stop layer 60 may also include a magnetic material in order to give the stop layer 60 the function of shielding from external magnetic fields. Exemplarily, the magnetic material may be a ferromagnetic material, and furthermore, the ferromagnetic material may include, but is not limited to, one or more of nickel-iron alloys (NiFe), cobalt-iron alloys (CoFe), and vanadium-iron alloys (FeV).
[0034] Furthermore, in some optional embodiments of this disclosure, if the stop layer 60 also has the function of shielding from an external magnetic field, the material of the stop layer 60 may further be a soft magnetic material. Furthermore, the soft magnetic material may include, but is not limited to, iron-silicon alloys and soft ferrites.
[0035] In some arbitrary embodiments, the random access memory may further include a second insulating medium layer (not shown), the second insulating medium layer being located on the side away from the first insulating medium layer 50 such that the stop layer 60 is located between the first insulating medium layer 50 and the second insulating medium layer.
[0036] Specifically, the material of the second insulating medium layer may include, but is not limited to, silicon nitride and aluminum oxide. When the stop layer 60 of the random access memory is a ferromagnetic material, the second insulating medium layer is used to prevent the magnetic shielding effect of the ferromagnetic material from being weakened or canceled out by the first metal layer 120 of the random access memory, thereby preventing the loss of the magnetic shielding function of the stop layer 60.
[0037] In some arbitrary embodiments, as shown in Figure 1, the storage cell 40 has a first projection on the first surface, the first insulating medium layer 50 has a second projection on the first surface, and the stop layer 60 has a third projection on the first surface, with the second projection located between the first and third projections.
[0038] As can be seen from this, the first insulating medium layer 50 is located only between the stop layer 60 and the memory cell 40, and the first insulating medium layer 50 covers the sidewall of the memory cell 40, and the stop layer 60 covers the side of the first insulating medium layer 50 away from the memory cell 40, more specifically, in a direction perpendicular to the first surface, the height of the stop layer 60 is equal to the vertical height between the first surface and the second surface, of which the first surface is one side surface of the base substrate 10 having the memory cell 40, and the second surface is the side of the memory cell 40 away from the base substrate 10. Exemplarily, if the material of the stop layer 60 of the random access memory of the present disclosure is a ferromagnetic material, the stop layer 60 can shield from the external magnetic field around the sidewall of the memory cell 40, and therefore the random access memory of the embodiment has a better magnetic shielding effect.
[0039] In some arbitrary embodiments, the random access memory is one of the following: magnetic random memory, phase-change random memory, resistive random-access memory, and ferroelectric memory.
[0040] Exemplary, if the random access memory is a magnetic random memory, the storage cell 40 of the random access memory may be a magnetic tunnel junction, in some arbitrary embodiments thereof, the magnetic tunnel junction may include a first ferromagnetic layer, a tunnel barrier layer and a second ferromagnetic layer sequentially stacked, the second ferromagnetic layer in contact with the first metal layer 120 and the first ferromagnetic layer in contact with the first conductive passage 20 in the base substrate 10. Optionally, in some other embodiments where the random access memory is a magnetic random memory, the magnetic tunnel junction in the random access memory may further include an upper electrode layer and a lower electrode layer, the upper electrode layer located away from the tunnel barrier layer of the second ferromagnetic layer and the lower electrode layer located away from the tunnel barrier layer of the first ferromagnetic layer. Furthermore, the material of the upper electrode layer and the lower electrode layer may include, but is not limited to, one or more of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN) and tungsten (W).
[0041] Another aspect of the present disclosure provides a method for manufacturing a random access memory, the manufacturing method comprising the steps of: providing a base substrate 10, the base substrate 10 having a first conductive passage 20 and a second conductive passage 30 spaced apart as shown in Figure 2, and both the first conductive passage 20 and the second conductive passage 30 extending from a first surface of the base substrate 10 to the base substrate 10; forming a storage cell on the first surface so as to be in contact with the first conductive passage 20; forming a first insulating medium layer on the first surface so as to cover the sidewalls of the storage cell; forming a stop layer on the side of the first insulating medium layer away from the storage cell; and forming a first metal layer on the side of the base substrate 10 having the storage cell so as to be in contact with the side of the storage cell away from the base substrate 10.
[0042] Specifically, the base substrate 10 may further include a first metal wiring layer 101 connected to a first conductive passage 20 and a second metal wiring layer 102 connected to a second conductive passage 30.
[0043] Among these, the step of forming the base substrate 10 includes first providing a substrate, then forming a first hole structure and a second hole structure on the substrate using a mask blank structure, wherein the mask blank structure has a first hollow region and a second hollow region, the first hollow region corresponding to the first hole structure and the second hollow region corresponding to the second hole structure, so that both formed first hole structures and second hole structures extend from the same surface of the substrate to the substrate, and then filling the first hole structure and second hole structure with a conductive material to form a first conductive passage 20 corresponding to the first hole structure and a second conductive passage 30 corresponding to the second hole structure, thereby making the substrate having the first conductive passage 20 and the second conductive passage 30 the base substrate 10 for forming the random access memory of this disclosure.
[0044] When forming a random access memory using the manufacturing method described above, only one photomask is required to form the first conductive passage 20 and the second conductive passage 30 in the base substrate 10, thereby reducing manufacturing costs. Furthermore, after forming a storage cell on the first surface of the base substrate 10, a first insulating medium layer and a stop layer are sequentially formed on the sidewalls of the storage cell, preventing damage to the storage cell. In addition, the first insulating medium layer and the stop layer can also be used as isolation layers between the first metal layer and the storage cell, preventing the first metal layer from contacting the sidewalls of the storage cell. This further reduces the number of top electrode photomasks required when forming the first metal layer, thereby further reducing the manufacturing cost of the random access memory.
[0045] The following describes in more detail exemplary embodiments of the methods for manufacturing memory structures provided in this disclosure. However, these exemplary embodiments can be carried out in several different forms and should not be construed as being limited to the embodiments described herein. Please understand that these embodiments are provided in order to provide a thorough and complete disclosure of this disclosure and to fully convey the concepts of these exemplary embodiments to those skilled in the art.
[0046] In some arbitrary embodiments, the step of forming the memory cell 40 may include first depositing a multilayer memory film 401 on a first surface as shown in Figure 3, and then removing the multilayer memory film 401 other than the one covering the first conductive passage 20 using photolithography and etching as shown in Figure 4, to expose a portion of the first surface and the second conductive passage 30, so that the remaining multilayer memory film 401 covering the first conductive passage 20 forms the memory cell 40. In some arbitrary embodiments, the film layers corresponding to the multilayer memory film 401 of the memory cell 40 may be a first ferromagnetic layer, a tunnel barrier layer, and a second ferromagnetic layer, and in some other arbitrary embodiments, the film layers corresponding to the multilayer memory film 401 of the memory cell 40 may be a lower electrode layer, a first ferromagnetic layer, a tunnel barrier layer, a second ferromagnetic layer, and an upper electrode layer.
[0047] In some optional embodiments, the step of forming the memory cell 40 may further include depositing a hard mask layer covering the multilayer memory film 401 on the side of the multilayer memory film 401 away from the base substrate 10, and in the process of removing the multilayer memory film 401 other than the multilayer memory film 401 covering the first conductive passage 20 using photolithography and etching, the hard mask layer is used as an etching sacrificial layer to prevent etching of the portion of the multilayer memory film 401 in contact with the first conductive passage 20, and further removing the hard mask layer so that the remaining multilayer memory film 401 forms the memory cell 40. Optionally, the material of the hard mask layer may include, but is not limited to, metallic tantalum, tantalum nitride, titanium, titanium nitride, silicon oxide, silicon nitride, and combinations thereof.
[0048] In some arbitrary embodiments, the steps of forming the first insulating medium layer 50 and the stop layer 60 include, as shown in Figure 4, depositing the first insulating material layer 501 on one side of the base substrate 10 having the first surface so as to cover the first surface, the side wall of the storage cell 40, and the second surface which is the surface of the storage cell 40 away from the first surface, and, as shown in Figure 5, depositing the first insulating material layer 501 on the side of the first insulating material layer 501 away from the first surface so as to cover the first insulating material layer 501 The process includes the steps of depositing a stop material layer 601, and removing the first insulating material layer 501 located in a portion other than the first insulating material layer covering the side wall, and the stop material layer 601 located in a portion of the first insulating material layer 501 other than the side away from the storage cell 40, so that the remaining first insulating material layer 501 forms the first insulating medium layer 50 located between the storage cell 40 and the stop layer 60, and the remaining stop material layer 601 forms the stop layer 60.
[0049] In some other optional embodiments, in order to prevent damage to the stop layer 60 in a subsequent etching process, a first protective layer 70 may also be formed on one side of the base substrate 10 having the first surface, as shown in Figure 6, after the step of forming the first insulating medium layer 50 and the stop layer 60, so as to cover the exposed surface of the first surface, the exposed surface of the first insulating medium layer 50, the exposed surface of the stop layer 60 and the second surface, the second surface being the surface of the memory cell 40 away from the base substrate 10.
[0050] In this embodiment, the first insulating material layer 501 and the stop material layer 601 are formed by sequential deposition. Therefore, the stop material layer 601 covers the first insulating material layer 501. Thus, when removing the first insulating material layer 501 that covers the portion other than the memory cell 40 and the stop material layer 601 located on the portion of the first insulating material layer 501 that is not separated from the memory cell 40 using the same etching process, the first insulating medium layer 50 after etching may include a first portion and a second portion, of which the first portion is located between the stop layer 60 and the memory cell 40, and the second portion is located between the stop layer 60 and the base substrate 10. In the direction perpendicular to the first surface, the height of the stop layer 60 in this embodiment is smaller than the vertical distance between the first surface and the second surface.
[0051] In some other arbitrary embodiments, the steps of forming the first insulating medium layer 50 and the stop layer 60 include, as shown in Figure 4, depositing the first insulating material layer 501 on the first surface so as to cover the first surface, the side wall of the storage cell 40, and the second surface which is the surface of the storage cell 40 away from the first surface, and removing at least a portion of the first insulating material layer 501 other than the first insulating material layer 501 covering the side wall to expose the second surface and a portion of the first surface, and removing the remaining first insulating material layer 501 The process may include the steps of: forming the first insulating medium layer 50; depositing a stop material layer 601 on the side of the first insulating medium layer 50 away from the first surface so as to cover the exposed second surface, the exposed first surface, and the first insulating medium layer 50, as shown in Figure 7; and removing at least a portion of the stop material layer 601 that covers the portion other than the first insulating medium layer 50 using an etching process so that the remaining stop material layer 601 forms the stop layer 60.
[0052] In some other optional embodiments, in order to prevent the stop layer 60 from being damaged in a subsequent etching process, after the step of forming the stop layer 60, a second protective layer 80 may also be formed on one side of the base substrate 10 having the first surface, so as shown in Figure 8, that it covers the exposed surface of the first surface, the exposed surface of the first insulating medium layer 50, the exposed surface of the stop layer 60 and the second surface, the second surface being the surface of the memory cell 40 away from the base substrate 10.
[0053] In this embodiment, the stop material layer 601 is formed by deposition after the first insulating medium layer 50 is formed by etching. Therefore, the stop material layer 601 covers the exposed surface of the first surface and the side of the first insulating medium layer 50 away from the storage cell 40. Furthermore, after removing the stop material layer 601 located on parts of the first insulating medium layer 50 other than the side away from the storage cell 40 using the etching process to form the stop layer 60, it can be understood that the first insulating medium layer 50 is located only between the storage cell 40 and the stop layer 60. In a direction perpendicular to the first surface, the height of the stop layer 60 in this embodiment is equal to the vertical distance between the first surface and the second surface, and it can be understood that the second surface is the surface of the storage cell 40 away from the base substrate 10.
[0054] Optionally, in this disclosure, after the step of removing the first insulating material layer 501 and / or stop material layer 601 using an etching process, the excess first insulating material layer 501 and / or stop material layer 601 located on the second surface may be removed by chemical mechanical polishing to expose the second surface.
[0055] In some optional embodiments, prior to the step of forming the first metal layer 120, the manufacturing method may further include the step of forming the second insulating medium layer 90 on the side of the stop layer 60 away from the first insulating medium layer 50 so that the stop layer 60 is located between the first insulating medium layer 50 and the second insulating medium layer 90.
[0056] Specifically, a second insulating material layer 901 is deposited on one side of a base substrate 10 having a first surface, and as shown in Figure 9, an etching process is used to remove the second insulating material layer 901 covering the portion other than the stop layer 60, so that the remaining portion of the second insulating material layer 901 forms the second insulating medium layer 90. At this time, since the stop layer 60 is located between the second insulating medium layer 90 and the first insulating medium layer 50, exposure of the stop layer 60 located on the side of the first insulating medium layer 50 away from the storage cell 40 is avoided.
[0057] In some other optional embodiments, in order to prevent damage to the second insulating medium layer 90 in a subsequent etching process, a third protective layer 100 may also be formed on one side of the base substrate 10 having the first surface, as shown in Figure 10, so as to cover the exposed surface of the first surface, the exposed surface of the first insulating medium layer 50, the exposed surface of the stop layer 60, the exposed surface of the second insulating medium layer 90, and the second surface, where the second surface is the surface of the memory cell 40 away from the base substrate 10.
[0058] Furthermore, after the step of forming the first protective layer 70, the second protective layer 80, or the third protective layer 100, as shown in Figure 11, a medium film layer 110 can be deposited on the side of the first protective layer 70, the second protective layer 80, or the third protective layer 100 that is away from the base substrate 10, so as to cover the first protective layer 70, the second protective layer 80, or the third protective layer 100; further, the medium film layer 110 and the first protective layer 70 can be removed using photolithography and etching processes so that at least the second conductive passage 30 and the second surface are exposed; and further, as shown in Figure 12, a conductive material can be deposited on one side of the base substrate 10 having the memory cell 40 to produce a first metal layer 120 that can connect the memory cell 40 and the second conductive passage 30. Alternatively, the media film layer 110 and the second protective layer 80 can be removed using photolithography and etching processes so that at least the second conductive passage 30 and the second surface are exposed, and a conductive material can be deposited on one side of the base substrate 10 having the memory cell 40 to produce a first metal layer 120 that can connect the memory cell 40 and the second conductive passage 30, or the media film layer 110 and the third protective layer 100 can be removed using photolithography and etching processes so that at least the second conductive passage 30 and the second surface are exposed, and a conductive material can be deposited on one side of the base substrate 10 having the memory cell 40 to produce a first metal layer 120 that can connect the memory cell 40 and the second conductive passage 30.
[0059] Optionally, in the step of depositing a conductive material to form the first metal layer 120, the side of the first metal layer 120 that is separated from the base substrate 10 can be planarized using chemical mechanical polishing. Optionally, the materials of the first protective layer 70, the second protective layer 80, and the third protective layer 100 may include, but are not limited to, one or more of silicon nitride and aluminum oxide.
[0060] As can be seen from the above description, the above embodiments of this disclosure achieve the following technical effects.
[0061] The random access memory of this disclosure includes a base substrate, a memory cell, a first insulating medium layer, a stop layer, and a first metal layer, wherein the base substrate has spaced-apart first conductive passages and second conductive passages, and both the first and second conductive passages extend from the first surface of the base substrate to the base substrate, so that the first and second conductive passages can be formed by etching in a single step using the same photomask, the memory cell serves as the core cell in the random access memory, the first insulating medium layer and the stop layer not only serve to prevent damage to the memory cell, but the first insulating medium layer and the stop layer can also serve as isolation layers between the first metal layer and the memory cell, thereby preventing the first metal layer from contacting the sidewall of the memory cell, thereby further saving the top electrode photomask required when forming the first metal layer and further reducing the manufacturing cost of the random access memory.
[0062] The foregoing description is merely a preferred embodiment of the Disclosure and does not limit the Disclosure, and various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the Disclosure shall be within the scope of protection of the Disclosure.
Claims
1. A base substrate having a first conductive passage and a second conductive passage provided at intervals, wherein both the first conductive passage and the second conductive passage extend from the first surface of the base substrate to the base substrate, A memory cell located on the first surface and in contact with the first conductive passage, A first insulating medium layer located on the first surface and covering the side wall of the storage cell, A stop layer located on the side of the first insulating medium layer away from the storage cell, A first metal layer is located on the side of the base substrate having the storage cell and is in contact with the side of the storage cell away from the base substrate, Random access memory.
2. The stop layer is a metal layer or a metal oxide layer. The random access memory according to claim 1.
3. The material of the stop layer includes at least a magnetic material. The random access memory according to claim 2.
4. The aforementioned random access memory further, In order to position the stop layer between the first insulating medium layer and the second insulating medium layer, the second insulating medium layer is located on the side of the stop layer away from the first insulating medium layer, The random access memory according to claim 3.
5. The memory cell has a first projection on the first surface, the first insulating medium layer has a second projection on the first surface, the stop layer has a third projection on the first surface, and the second projection is located between the first projection and the third projection. A random access memory according to any one of claims 1 to 4.
6. The random access memory is one of the following: magnetic random memory, phase-change random memory, resistive random-access memory, and ferroelectric memory. The random access memory according to claim 5.
7. A step of providing a base substrate, wherein the base substrate has a first conductive passage and a second conductive passage provided at intervals from each other, and both the first conductive passage and the second conductive passage extend from a first surface of the base substrate to the base substrate, The steps include forming a memory cell on the first surface so as to be in contact with the first conductive passage, The steps include forming a first insulating medium layer on the first surface so as to cover the side wall of the memory cell, The steps include forming a stop layer on the side of the first insulating medium layer that is away from the storage cell, The step of forming a first metal layer on the side of the base substrate having the storage cell so as to be in contact with the side of the storage cell away from the base substrate, A method for manufacturing random access memory.
8. The step of forming the first insulating medium layer and the stop layer is: The steps include depositing a first insulating material layer on one side of the base substrate having the first surface so as to cover the first surface, the side wall of the storage cell, and the second surface which is the surface of the storage cell that is away from the first surface, The steps include: depositing a stop material layer on the side of the first insulating material layer away from the first surface so as to cover the first insulating material layer; The step of removing the first insulating material layer located in a portion other than the first insulating material layer covering the side wall, and the stop material layer located in a portion of the first insulating material layer other than the side away from the storage cell, so that the remaining first insulating material layer forms the first insulating medium layer located between the storage cell and the stop layer, and the remaining stop material layer forms the stop layer, The manufacturing method according to claim 7.
9. The step of forming the first insulating medium layer and the stop layer is: The steps include depositing a first insulating material layer on one side of the base substrate having the first surface so as to cover the first surface, the side wall of the storage cell, and the second surface which is the surface of the storage cell that is away from the first surface, The steps include: removing at least a portion of the first insulating material layer other than the first insulating material layer covering the side wall to expose the second surface and a portion of the first surface, and having the remaining first insulating material layer form the first insulating medium layer; The steps include depositing a stop material layer on the side of the first insulating medium layer away from the first surface so as to cover the exposed second surface, the exposed first surface, and the first insulating medium layer, The step includes removing at least a portion of the stop material layer other than the stop material layer covering the first insulating medium layer using an etching process so that the remaining stop material layer forms the stop layer, The manufacturing method according to claim 7.
10. Before the step of forming the first metal layer, The step of forming the second insulating medium layer on the side of the stop layer away from the first insulating medium layer so that the stop layer is located between the first insulating medium layer and the second insulating medium layer, The manufacturing method according to any one of claims 7 to 9.