Semiconductor and Electronic Devices
Patent Information
- Application Number
- JP2020143839
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-12-13
- Filing Date
- 2020-08-27
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2040-08-27
AI Technical Summary
The challenge in implementing high voltage nanoribbon transistors is the limitation imposed by ribbon-to-ribbon spacing, which restricts the ability to increase gate dielectric thickness and maintain standard pitch alignment, affecting voltage drop and transistor performance.
The introduction of extended drain regions in nanoribbon transistors, where the drain extension is doped to control voltage drop and resistance, allowing for higher voltages without increasing gate dielectric thickness, and optionally incorporating dummy gate structures to maintain standard pitch alignment.
This approach enables the fabrication of high voltage nanoribbon transistors with improved voltage handling capabilities while maintaining standard pitch alignment, enhancing transistor performance and flexibility in design.
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Abstract
Citation Information
Patent Citations
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