Phase change memory device and method for manufacturing the same

Abstract

To provide a phase change memory device and a method for fabricating the same.SOLUTION: A phase change memory may be provided that includes an electrode, a first layer located on the electrode, and a second layer located on the first layer, where the first layer includes a locally formed phase change material region.SELECTED DRAWING: Figure 2A

Description

[Technical field]

[0001] The present invention relates to a phase change memory (PRAM or PCRAM) device and a method for manufacturing the same, and more particularly to a phase change memory cell structure using a phase change material region formed by material bonding of at least two layers located on an electrode, a phase change memory device using the same, and a method for manufacturing the same. [Background technology]

[0002] Phase change memory (PRAM) is a memory element that utilizes the change in the phase of a specific material. That is, when a specific material changes from an amorphous state to a crystalline state, a change in resistance occurs, and this change in resistance has meaning as memory data. At this time, the phase change of the material is determined by temperature and time.

[0003] That is, if a material is heated for a certain period of time between the crystallization temperature, which is a relatively low temperature, and the melting point, and then gradually cooled, the material will be crystallized. At this time, the crystallized material will maintain a low resistance state, which is a state in which data "0" is stored. On the other hand, if the material is heated to a temperature above the melting point and then rapidly cooled, the material will become amorphous. At this time, this means that a high resistance state will be maintained, which is a state in which data "1" is stored.

[0004] In the operation mechanism of such phase change memory, the set state inducing a crystalline state is performed at a relatively low temperature and does not require a large current amount. However, the reset state inducing an amorphous state requires a high current amount. Therefore, in order to manufacture memory devices with high integration density, efforts are needed to reduce the amount of current required for resetting during the reset operation. Summary of the Invention [Problem to be solved by the invention]

[0005] The present invention aims to provide a phase change memory (PRAM) device and a method for manufacturing the same, which utilizes a phase change material region formed through material bonding constituting each material layer and requires a low reset current of 60 μA or less.

[0006] Another object of the present invention is to provide a phase change memory device and a manufacturing method thereof that can be manufactured at low process costs regardless of pattern size by eliminating a bottom electrode contact (BEC) structure and not requiring expensive processes for nm-level patterns.

[0007] Another object of the present invention is to provide a phase change memory device and a method for manufacturing the same, which can achieve low power consumption through low operating current without a lower electrode contact component by forming a nanoscale filament-shaped phase change material region by itself within the element through material bonding of two material layers.

[0008] In addition, the problem to be solved by the present invention is to provide a phase change memory device and a manufacturing method thereof that is simpler than the existing phase change memory (PRAM) manufacturing process, does not require expensive processes such as E-beam lithography or ArF immersion, uses materials compatible with existing semiconductors, and is consistent with current semiconductor processing.

[0009] The problems to be solved by the present invention are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0010] In one embodiment of the present invention, a phase change memory (PRAM) may be provided that includes an electrode, a first layer located on the electrode, and a second layer located on the first layer, the first layer including a locally formed phase change material region.

[0011] Here, the phase change memory may further include an upper electrode located on the second layer.

[0012] The phase change material region is also formed by a combination of the material of the first layer and the material of the second layer.

[0013] The material of the first layer also contains Si, and the material of the second layer also contains Te.

[0014] The material of the first layer may also contain a Group 14 element, and the material of the second layer may also contain a Group 15 or Group 16 element.

[0015] The second layer also functions as a top electrode.

[0016] The phase change material region also has a nanoscale filament shape.

[0017] The phase change material region is formed by providing material of the second layer to the first layer in response to a voltage applied to the second layer.

[0018] In another embodiment of the present invention, a phase change memory may be provided that includes an electrode, a first layer positioned on the electrode, and a second layer positioned on the first layer, the first layer including locally formed nanofilaments, the nanofilaments having phase change material properties.

[0019] In yet another embodiment of the present invention, there may be provided a method for manufacturing a phase change memory, the method including forming an electrode, forming a first layer on the electrode, forming a second layer on the first layer, and forming a phase change material region locally in the first layer by applying a voltage to the second layer. Effect of the Invention

[0020] According to the present invention, a phase change memory (PRAM) device and a manufacturing method thereof may be provided that utilizes a phase change material region formed through material bonding constituting each material layer and requires a low reset current of 60 μA or less.

[0021] In addition, the present invention provides a phase change memory device and a manufacturing method thereof that does not require a bottom electrode contact (BEC) structure, does not require expensive processes for nm-level patterns, has a low reset current regardless of the pattern size, and can be manufactured at low process costs.

[0022] In addition, the present invention provides a phase change memory device and a method for manufacturing the same that can achieve low power consumption through low operating current without a lower electrode contact component by forming a phase change material region in a nanoscale filament shape within the element through material bonding of two material layers.

[0023] In addition, the present invention provides a phase change memory device and a manufacturing method thereof that is simpler than the existing phase change memory (PRAM) manufacturing process, does not require expensive processes such as E-beam lithography or ArF immersion, and uses materials compatible with conventional semiconductors, making it possible to provide a phase change memory device and a manufacturing method thereof that are consistent with current semiconductor processing.

[0024] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief description of the drawings]

[0025] [Figure 1] FIG. 1 is a diagram for explaining a conventional phase change memory (PRAM) structure.

[0026] [Figure 2A] 1A to 1C are diagrams for explaining the structure, manufacturing method, and operation principle of a phase change memory (PRAM) according to an embodiment of the present invention.

[0027] [Figure 2B] 1A to 1C are diagrams for explaining the structure, manufacturing method, and operation principle of a phase change memory (PRAM) according to an embodiment of the present invention.

[0028] [Diagram 3] 1 is an exemplary diagram illustrating a structure and an operation principle of a phase-change memory (PRAM) according to an embodiment of the present invention;

[0029] [Figure 4] 4 is a graph showing experimental results showing a reset current of a phase-change memory (PRAM) device according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings in order to enable those skilled in the art to easily carry out the present invention. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

[0031] The terms used in the present specification are intended to describe the present embodiment and are not intended to limit the present invention. In the present specification, the singular form includes the plural form unless otherwise specified in the text.

[0032] As used in this specification, "comprises" and "comprising" do not exclude the presence or addition of one or more other components, steps, operations and / or elements to a referenced component, step, operation and / or element.

[0033] In addition, in the description of the present invention, if it is determined that a detailed description of related publicly known techniques may make the gist of the present invention unclear, the detailed description will be omitted.

[0034] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The configuration and effects of the present invention will be clearly understood through the following detailed description.

[0035] FIG. 1 is a diagram for explaining a structure of a conventional phase change memory (PRAM).

[0036] Generally, in a phase change memory (PRAM) device, when a current is applied through a lower electrode, the temperature of the phase change material layer is changed by the Joule heat generated thereby, and the applied current is appropriately changed to change the crystal structure of the phase change material layer to a crystalline state or an amorphous state. That is, a phase change occurs between a crystalline state (set state) having low resistance and an amorphous state (reset state) having high resistance due to the Joule heat, and by sensing the current flowing through the phase change film in a write mode and a read mode, it is possible to determine whether the information stored in the phase change memory cell is data in a set state (0) or data in a reset state (1).

[0037] Referring to Fig. 1, a phase change material layer made of a phase change material is present under a top electrode (TE), and the phase change material may be a chalcogen compound such as Ge-Sb-Te (GST). According to the conventional structure as shown in Fig. 1, in a phase change memory (PRAM) device, the size of the bottom electrode (BE) acting as a heater for heating a phase change material such as GST is very important, and in the set / reset process of the phase change memory (PRAM), the amount of current generated in the reset process determines the lifetime, sensing margin, and shrinkage of the device.

[0038] However, in such a conventional structure, current is injected through a small electrode such as a BEC, and the heat generated there is used to reset, but in order to generate high heat, the size of the electrode must be extremely small, so fine patterning of 40 nm or less is required, which requires expensive processes such as E-beam lithography and ArF immersion, resulting in huge process costs. In addition, such a conventional phase change memory (PRAM) structure requires the use of a high reset current of several hundred μA or more due to its characteristic of melting the inside by passing a reset current.

[0039] Therefore, a new phase-change memory (PRAM) structure is required that can reduce process costs compared to conventional structures by having a low reset current without forming an electrode structure such as a conventional BEC.

[0040] 2A and 2B are diagrams illustrating a structure, a manufacturing method, and an operation principle of a phase-change memory (PRAM) according to an embodiment of the present invention.

[0041] 2A, the phase change memory element structure also includes a bottom electrode 210, a first layer 220 located on the bottom electrode 210, a second layer 230 located on the first layer 220, and a top electrode 240 located on the second layer 230. Here, as an example, the second layer 230 may function as the top electrode without the top electrode 240 disposed on the second layer 230.

[0042] A method for manufacturing such a phase change memory element also includes the steps of forming a lower electrode 210, forming a first layer 220 on the lower electrode 210, forming a second layer 230 on the first layer 220, forming an upper electrode 240 on the second layer 230 (this step may be optional), and forming a phase change material region 250 locally in the first layer 220 by applying a voltage to the upper electrode 240 or the second layer 230.

[0043] Here, when a large voltage of, for example, 5 to 10V is applied to the second layer 230 via the upper electrode 240 or the second layer 230, the material constituting the second layer 230 is lowered to the first layer 220 by the electric field and provided to the first layer 220, thereby forming a phase change material region 250 locally in the first layer 220, and the phase change material region 250 may be composed of a combination of the material of the first layer 220 and the material of the second layer 230. That is, the material of the second layer 230 permeates the first layer 220 by the application of a voltage, forming the phase change material region 250 as a local combination region, and the crystalline phase of the phase change material region 250 thus formed changes without changing its shape, so that the phase change material region 250 can operate to have phase change material properties.

[0044] Such phase change material region 250 has a nanoscale filament morphology, and the filaments thus formed have phase change properties and can operate at very low currents due to the naturally forming very thin nanoscale sized filaments.

[0045] For example, the material of the second layer 230 is Te (tellurium), and the material of the first layer 220 is Si (silicon), and thus, the nanofilaments formed in the phase change material region 250 may have phase change material properties by selecting and combining the materials of the two layers. The material of the second layer 230 may be, for example, any one of group 15 elements such as P, As, Sb, or group 16 elements including chalcogen elements such as Te, S, or Se, or a combination thereof, and the material of the first layer 220 may be, for example, any one of group 14 elements such as Si, Ge, or a combination thereof, or a material with low thermal conductivity. In this case, since the thermal conductivity of the first layer 220 and the second layer 230 in which the phase change material region 250 is formed is lower than that of general metals, there is an advantage that no additional process for preventing heat conduction is required.

[0046] Also, referring to FIG. 2B, for operation of a phase change memory (PRAM) device according to an embodiment of the present invention, the nanofilaments formed in the phase change material region 250 have phase change material characteristics between a crystalline state (set state) having low resistance and an amorphous state (reset state) having high resistance, and unlike conventional structures, does not require a separate electrode like a BEC and has the advantage of being able to operate with a very low reset current regardless of the device size.

[0047] FIG. 3 is an exemplary diagram illustrating the structure and operation principle of a phase-change memory (PRAM) according to an embodiment of the present invention.

[0048] FIG. 3 is a diagram illustrating an example of the structure of FIG. 2, showing a structure including a lower electrode 310, a first layer 320 made of Si located on the lower electrode 310, a second layer 330 made of Te located on the first layer 320, and an upper electrode 340 located on the second layer 330.

[0049] Here, the phase change material region locally formed in the first layer 320 contains a combination of the material of the first layer 320 and the material of the second layer 330, for example, SiTe. x Nanofilaments 350 may be formed in a compound form, such as a chalcogenide compound form.

[0050] First, a voltage is applied to the second layer 330, thereby forming locally thin nanoscale-sized nanofilaments 350 in the first layer 320. After the formation, the nanofilaments have phase change material properties between a crystalline state (set state) and an amorphous state (reset state), and thus can function as a phase change memory element.

[0051] FIG. 4 is a graph illustrating an experimental result showing a reset current of a phase-change memory (PRAM) device according to an embodiment of the present invention.

[0052] The phase change memory (PRAM) structure shown in Figure 3 is 5x5μm 2 As a result of an experiment with an element size of μm, a low reset current of 62 μA was obtained as shown in Fig. 4. Normally, in such an element size of μm, a reset current of 10 A or more is required according to a conventional PC (phase change) RAM element structure, but the structure according to the present invention can operate with a reset current of 60 μA level, which is about 200 times lower than the operating current in a conventional phase change memory (PRAM) structure having a 50 nm size BEC.

[0053] In addition, the characteristics of such an element are similar to those of a phase change memory (PRAM) having a BEC of about 7 to 8 nm level according to a conventional phase change memory (PRAM) structure. However, according to the memory element structure of the present invention, expensive processes such as E-beam lithography and ArF immersion are not required, and a phase change memory device that is consistent with current semiconductor processes can be manufactured using materials compatible with conventional semiconductors, and the manufacturing cost and process complexity can be significantly reduced compared to conventional structures and methods.

[0054] The embodiments disclosed in the specification of the present invention are merely examples, and the present invention is not limited thereto. The scope of the present invention should be interpreted by the claims, and all technologies within the scope equivalent thereto should be interpreted as being included in the scope of the present invention. [Industrial Applicability]

[0055] The phase change memory device and the manufacturing method thereof according to the present invention can be effectively applied to, for example, mobile device related technical fields. [Explanation of symbols]

[0056] 210,310 Lower electrode 220,320 1st layer 230,330 2nd layer 240,340 Upper electrode 250 Phase Change Materials Area 350 Nanofilament

Claims

1. An electrode; a first layer overlying the electrode; a second layer located on the first layer, the first layer includes a locally formed phase change material region; the material of the first layer includes a Group 14 element, and the material of the second layer includes a Group 15 or Group 16 element; the phase-change material region is formed by a combination of the material of the first layer and the material of the second layer; A phase change memory, wherein the second layer does not include the phase change material region.

2. The phase change memory of claim 1 further comprising a top electrode located on the second layer.

3. The phase change memory of claim 1 , wherein the material of the first layer comprises Si and the material of the second layer comprises Te.

4. The phase change memory of claim 1 , wherein the second layer functions as a top electrode.

5. The phase change memory of claim 1 , wherein the phase change material region has a nanoscale filament morphology.

6. An electrode; a first layer overlying the electrode; a second layer located on the first layer, the first layer includes locally formed nanofilaments, the nanofilaments having phase change material properties; the material of the first layer includes a Group 14 element, and the material of the second layer includes a Group 15 or Group 16 element; the nanofilament having phase change material properties is formed by a combination of the material of the first layer and the material of the second layer; A phase change memory, wherein the second layer does not have phase change material properties.

7. forming an electrode; forming a first layer over the electrode; forming a second layer on the first layer; forming a phase change material region locally in the first layer by a voltage applied to the second layer; the material of the first layer includes a Group 14 element, and the material of the second layer includes a Group 15 or Group 16 element; the phase-change material region is formed by a combination of the material of the first layer and the material of the second layer; The method of manufacturing a phase change memory, wherein the second layer does not include the phase change material region.

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