Simulation device, method for creating thermal equivalent circuit, and data structure
Patent Information
- Application Number
- JP2021152306
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-17
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2041-09-17
Smart Images

Figure 0007631156000001 
Figure 0007631156000002 
Figure 0007631156000003
Abstract
Description
[Technical field]
[0001] An embodiment of the present invention relates to a simulation device, a method for creating a thermal equivalent circuit, and a data structure. [Background technology]
[0002] In the development of a semiconductor device, it is necessary to verify the change over time in the thermal characteristics of the designed semiconductor device. This verification is performed, for example, by using a simulation device. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Patent No. 6573809 Summary of the Invention [Problem to be solved by the invention]
[0004] An object of the present invention is to provide a simulation device, a method for creating a thermal equivalent circuit, and a data structure that are useful for verifying changes over time in the thermal characteristics of a semiconductor device. [Means for solving the problem]
[0005] The simulation device of the embodiment includes a storage device that stores data related to a thermal equivalent circuit of a semiconductor device, and an estimation device that estimates a change over time in thermal characteristics of the semiconductor device using the data. The thermal equivalent circuit includes a first thermal equivalent circuit corresponding to a portion of a lower surface side of the semiconductor device, and a second thermal equivalent circuit connected to the first thermal equivalent circuit and corresponding to a portion of a upper surface side of the semiconductor device. [Brief description of the drawings]
[0006] [Figure 1] 1 is a block diagram showing an example of a hardware configuration of a memory system according to an embodiment. [Diagram 2] FIG. 1 is a cross-sectional view showing an example of a semiconductor device. [Diagram 3] FIG. 2 is a circuit diagram showing an example of a heat equivalent circuit according to the embodiment. [Figure 4] 11A and 11B are diagrams showing changes over time in thermal characteristics of a semiconductor device estimated using a simulation device according to an embodiment. [Diagram 5] 13 is a diagram showing changes over time in thermal characteristics of a semiconductor device calculated by thermal fluid analysis using the finite element method. [Figure 6] 13A and 13B are diagrams showing changes over time in other thermal characteristics of a semiconductor device estimated using the simulation device according to the embodiment. [Figure 7] 13A and 13B are diagrams showing changes over time in other thermal characteristics of the semiconductor device calculated by thermal fluid analysis using the finite element method. [Figure 8] 13A and 13B are diagrams showing changes over time in thermal characteristics of a semiconductor device in a heat dissipation state and a heat insulation state estimated using a simulation device of a comparative example. [Figure 9] 4 is a flowchart showing the steps of a first method for creating a heat equivalent circuit according to the embodiment. [Figure 10] 6 is a flowchart showing the steps of a second method for creating a thermal equivalent circuit according to the embodiment. [Figure 11] FIG. 4 is a diagram showing a data structure of a thermal equivalent circuit used in the simulation device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0007] Hereinafter, an embodiment will be described with reference to the drawings.
[0008] FIG. 1 is a block diagram showing an example of a hardware configuration of a simulation device 1 according to an embodiment.
[0009] The simulation device 1 estimates the change over time of the thermal characteristics (transient thermal response) of the designed semiconductor device by calculation. The simulation device 1 may estimate the electrical characteristics of the designed semiconductor device by calculation in addition to the change over time of the thermal characteristics of the designed semiconductor device.
[0010] As shown in FIG. 1, the simulation device 1 includes an input device 10, a storage device 20, an estimation device 30, and an output device 40.
[0011] The input device 10 is a device used for inputting the type of semiconductor device, values of thermal parameters of the semiconductor device, etc. The input device 10 includes, for example, a keyboard 11 and a mouse 12. The type of semiconductor device is, for example, an integrated circuit device having a MOSFET as a basic element, or an integrated circuit device having a diode as a basic element. The thermal parameters are, for example, the temperature of the atmosphere in which the semiconductor device is used (environmental temperature) and the power consumption of the semiconductor device.
[0012] The storage device 20 stores data, programs, etc. in a readable manner. In the present embodiment, data 21 relating to a thermal equivalent circuit of the semiconductor device (hereinafter referred to as thermal circuit data) and data 22 relating to the numerical values of thermal parameters inputted from the input device 10 (hereinafter referred to as numerical data) are readably stored in the storage device 20.
[0013] When estimating the change over time in thermal characteristics and electrical characteristics of a semiconductor device, the storage device 20 readably stores data relating to the electrical equivalent circuit of the semiconductor device in addition to the thermal circuit data.
[0014] The storage device 20 includes, for example, a magnetic storage device or a semiconductor storage device. The magnetic storage device is, for example, a hard disk device. The semiconductor storage device is, for example, a nonvolatile semiconductor device. The nonvolatile semiconductor device is, for example, a solid state drive (SSD) equipped with a NAND type flash memory. Instead of the SSD, a PRAM (Phase change Random Access Memory) device, a ReRAM (Resistive Random Access Memory) device, or a FeRAM (Ferroelectric Random Access Memory) device can also be used.
[0015] The estimation device 30 is a device that estimates the change over time of the thermal characteristics of a semiconductor device by simulation (calculation). The estimation device 30 includes a calculator 31 that performs the above calculation. The calculator 31 includes, for example, a CPU (central processing unit). The calculator 31 estimates the change over time of the thermal characteristics of the designed semiconductor device by calculation using the thermal circuit data 21, the numerical data 22, and a program (shown) required for the simulation that are read out from the storage device 20.
[0016] A program required for the simulation (simulation program) is readably stored in the simulation device 1. For example, the simulation program is readably stored in the storage device 20.
[0017] Furthermore, in the case where the estimation device 30 includes a storage device (not shown), the simulation program may be readably stored in the storage device.
[0018] Furthermore, the program may be readably stored in an external storage device connectable to the simulation device 1 .
[0019] The simulation program is, for example, a SPICE (Simulation Program with Integrated Circuit Emphasis) program. The simulation program is provided, for example, via the Internet.
[0020] The output device 40 is a device that outputs in a visually viewable form the change over time (simulation result) of the thermal characteristic of the semiconductor device estimated by the estimation device 30. The output device 40 includes, for example, a display 41 and a printer 42.
[0021] The output device 40 does not have to be included as a part of the simulation apparatus 1. In this case, when the simulation results are output, an output device connectable to the simulation apparatus 1 is prepared.
[0022] Next, a description will be given of an example of a semiconductor device that is a target of the simulation device 1. Fig. 2 is a cross-sectional view showing an example of the semiconductor device 2.
[0023] The semiconductor device 2 includes a first frame 51, a semiconductor chip 52, a second frame 53, and a molded resin 54. The semiconductor chip 52 is sealed by the first frame 51, the second frame 53, and the molded resin 54. The semiconductor chip 52 includes, for example, an in-vehicle semiconductor device and a power semiconductor device. An example of an in-vehicle semiconductor device is an in-vehicle MOSFET. An example of a power semiconductor device is a power diode. The material of the first frame 51 and the second frame 53 is, for example, copper.
[0024] FIG. 3 is a circuit diagram showing an example of a heat equivalent circuit 3 according to the embodiment of the semiconductor device 2. As shown in FIG.
[0025] The heat equivalent circuit 3 includes a first Cauer-type heat equivalent circuit 61 and a second Cauer-type heat equivalent circuit 62 connected thereto.
[0026] The first thermal equivalent circuit 61 represents a thermal equivalent circuit corresponding to a lower surface portion of the semiconductor device 2. In the example of Fig. 2, the lower surface portion of the semiconductor device 2 includes the lower surface of the semiconductor chip 52, the first frame 51 below the lower surface of the semiconductor chip 52, and the mold resin 54 in contact with the first frame 51.
[0027] The first thermal equivalent circuit 61 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4.
[0028] The left terminal of the first resistor R1 is connected to the terminal Tj. A current corresponding to the power consumption of the semiconductor device 2 is input to the terminal Tj. Reference numeral 60 in FIG. 3 indicates a current source of a current corresponding to the power consumption. The right terminal of the fourth resistor R4 is connected to the terminal Tc1. A voltage corresponding to the surface temperature (case temperature) of the lower surface of the first frame 51 is applied to the terminal Tc1.
[0029] As shown in FIG. 3, a second resistor R2 and a third resistor R3 are connected in series between the first resistor R1 and the fourth resistor R4.
[0030] The first resistor R1 corresponds to the thermal resistance of the lower surface side of the semiconductor chip 52. The second resistor R2 corresponds to the thermal resistance of the first frame 51 under the lower surface of the semiconductor chip 52. The third resistor R3 corresponds to the thermal resistance of the molded resin 54 in contact with the first frame 51. Moreover, the fourth resistor R4 corresponds to an adjustment thermal resistance for increasing the impedance between the terminal Tc1 and the terminal Ta when there is no flow of heat through the lower surface of the semiconductor device 2.
[0031] The left terminal of the first resistor R1 is connected to the upper terminal of the first capacitor C1. The connection node between the first resistor R1 and the second resistor R2 is connected to the upper terminal of the second capacitor C2. The connection node between the second resistor R2 and the third resistor R3 is connected to the upper terminal of the third capacitor C3. The connection node between the third resistor R3 and the fourth resistor R4 is connected to the upper terminal of the fourth capacitor C4.
[0032] The lower terminal of the first capacitor C1, the lower terminal of the second capacitor C2, the lower terminal of the third capacitor C3, and the lower terminal of the fourth capacitor C4 are connected to a terminal Ta. A voltage corresponding to the temperature of the atmosphere around the semiconductor device 2 (ambient environment temperature) is applied to the terminal Ta.
[0033] The first capacitor C1 corresponds to the heat capacity of the bottom surface of the semiconductor chip 52. The second capacitor C2 corresponds to the heat capacity of the first frame 51 under the bottom surface of the semiconductor chip 52. The third capacitor C3 corresponds to the heat capacity of the molded resin 54 in contact with the first frame 51. The fourth capacitor C4 is an adjustment heat capacity for increasing the impedance between the terminal Tc1 and the terminal Ta when there is no flow of heat through the bottom surface of the semiconductor device 2.
[0034] The second thermal equivalent circuit 62 represents a thermal equivalent circuit corresponding to the upper surface side portion of the semiconductor device 2. In the example of Fig. 2, the upper surface side portion of the semiconductor device 2 includes the upper surface of the semiconductor chip 52, the second frame 53 on the upper surface of the semiconductor chip 52, and the molding resin 54 on the second frame 53.
[0035] The second thermal equivalent circuit 62 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8.
[0036] The left terminal of the fifth resistor R5 is connected to the terminal Tj. The right terminal of the eighth resistor R8 is connected to the terminal Tc2. A voltage corresponding to the surface temperature of the upper surface of the molded resin 54 (case temperature) is applied to the terminal Tc2.
[0037] As shown in FIG. 3, a sixth resistor R6 and a seventh resistor R7 are connected in series between the fifth resistor R5 and the eighth resistor R8.
[0038] The left terminal of the fifth resistor R5 is connected to the upper terminal of the fifth capacitor C5. The connection node between the fifth resistor R5 and the sixth resistor R6 is connected to the upper terminal of the sixth capacitor C6. The connection node between the sixth resistor R6 and the seventh resistor R7 is connected to the upper terminal of the seventh capacitor C7. The connection node between the seventh resistor R7 and the eighth resistor R8 is connected to the upper terminal of the eighth capacitor C8.
[0039] In addition, the lower terminal of the fifth capacitor C5, the lower terminal of the sixth capacitor C6, the lower terminal of the seventh capacitor C7 and the lower terminal of the eighth capacitor C8 are connected to the terminal Ta.
[0040] The fifth resistor R5 corresponds to the thermal resistance of the upper surface side portion of the semiconductor chip 52. The sixth resistor R6 corresponds to the thermal resistance of the second frame 53 on the upper surface of the semiconductor chip 52. The seventh resistor R7 corresponds to the thermal resistance of the molded resin 54 on the second frame 53. The eighth resistor R8 is an adjustment thermal resistor for increasing the impedance between the terminal Tc2 and the terminal Ta when there is no flow of heat through the upper surface of the semiconductor device 2.
[0041] The fifth capacitor C5 corresponds to the heat capacity of the top surface of the semiconductor chip 52. The sixth capacitor C6 corresponds to the heat capacity of the second frame 53 on the top surface of the semiconductor chip 52. The seventh capacitor C7 corresponds to the heat capacity of the molding resin 54 on the second frame 53. The eighth capacitor C8 is an adjustment heat capacity for increasing the impedance between the terminal Tc2 and the terminal Ta when there is no flow of heat through the top surface of the semiconductor device 2.
[0042] The numbers of resistors and capacitors constituting the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 depend on the structure of the semiconductor device to be simulated. In general, the more complex the structure, the greater the numbers of resistors and capacitors.
[0043] FIG. 4 is a diagram showing the change over time (simulation result) of the thermal characteristics of the semiconductor device 2 estimated using the simulation device 1. In FIG.
[0044] Curve a shows the change over time in thermal characteristics when heat is dissipated from the bottom surface of the semiconductor device 2, out of the bottom surface and the top surface of the semiconductor device 2. The bottom surface of the semiconductor device 2 is the bottom surface of the first frame 51. The top surface of the semiconductor device 2 is the top surface of the molded resin 54. Hereinafter, heat dissipation from the bottom surface of the semiconductor device 2 will be referred to as bottom surface heat dissipation.
[0045] A curve b indicates the change over time in thermal characteristics when heat is dissipated from the top surface of the semiconductor device 2. Hereinafter, heat dissipation from the top surface of the semiconductor device 2 will be referred to as top surface heat dissipation.
[0046] A curve c shows the change over time in thermal characteristics when heat is dissipated from both the bottom and top surfaces of the semiconductor device 2. Hereinafter, heat dissipation from both the bottom and top surfaces of the semiconductor device 2 will be referred to as double-sided heat dissipation.
[0047] 5 is a diagram showing the change over time (analysis result) of the thermal characteristics of the semiconductor device 2 calculated by thermal fluid analysis. The thermal fluid analysis can be performed using, for example, the finite element method, the finite volume method, or the finite difference method. The change over time of the thermal characteristics shown in FIG. 5 is called transient thermal impedance or transient thermal response. It is also possible to obtain the same change over time of the thermal characteristics shown in FIG. 5 by actual measurement.
[0048] Curve a' shows the change over time in thermal characteristics of the semiconductor device 2 with bottom heat dissipation, curve b' shows the change over time in thermal characteristics of the semiconductor device 2 with top heat dissipation, and curve c' shows the change over time in thermal characteristics of the semiconductor device 2 with double-sided heat dissipation.
[0049] 4 and 5 reveal the following. In the case of bottom-side heat dissipation, curve a of the simulation results approximately matches curve a' of the analysis results. In the case of top-side heat dissipation, curve b of the simulation results approximately matches curve b' of the analysis results. In the case of double-sided heat dissipation, curve c of the simulation results approximately matches curve c' of the analysis results. From this, it can be said that in any of the cases of bottom-side heat dissipation, top-side heat dissipation, and double-sided heat dissipation, the simulation apparatus 1 has the estimation accuracy required to estimate the change over time in the thermal characteristics of the designed semiconductor device.
[0050] In this way, since the simulation device 1 can accurately estimate the change over time in the thermal characteristics of heat dissipation in one-dimensional and two-dimensional directions, it can be said that the simulation device 1 is useful for verifying the change over time in the thermal characteristics of a semiconductor device.
[0051] Using the simulation device 1, it is possible to verify the change in thermal characteristics over time for any combination of the change in thermal characteristics over time for bottom-side heat dissipation, the change in thermal characteristics over time for top-side heat dissipation, and the change in thermal characteristics over time for double-sided heat dissipation.
[0052] According to this embodiment, there is no need to prepare a dedicated simulation device for estimating the change over time of the thermal characteristics of bottom surface heat dissipation, a dedicated simulation device for estimating the change over time of the thermal characteristics of top surface heat dissipation, and a dedicated simulation device for estimating the change over time of the thermal characteristics of double-sided heat dissipation, which makes it possible to reduce the cost required for the simulation devices.
[0053] FIG. 6 is a diagram showing changes over time (simulation results) of other thermal characteristics of the semiconductor device 2 estimated using the simulation device 1. In FIG.
[0054] 6, curve d shows the change over time in the thermal characteristics of the semiconductor device 2 in a state where heat flows in and out from the bottom and top surfaces (heat dissipation state), while curve e shows the change over time in the thermal characteristics of the semiconductor device 2 in a state where heat does not flow in and out from the bottom and top surfaces (heat insulation state).
[0055] FIG. 7 shows the changes over time (analysis results) of other thermal characteristics of the semiconductor device 2 calculated by thermal fluid analysis using FEM. In FIG. 7, curve d' indicates the change over time in the thermal characteristics of the semiconductor device 2 in the heat dissipation state, and curve e' indicates the change over time in the thermal characteristics of the semiconductor device 2 in the heat insulation state.
[0056] 6 and 7 reveal the following. In the case of the heat dissipation state, the curve d of the simulation result is approximately consistent with the curve d' of the analysis result. In the case of the heat insulation state, the curve e of the simulation result is approximately consistent with the curve e' of the analysis result. From this, it can be said that in both the case of the heat dissipation state and the case of the heat insulation state, the simulation device 1 has the estimation accuracy required to estimate the change over time in the thermal characteristics of the designed semiconductor device.
[0057] In this way, since the simulation device 1 can accurately estimate the change over time of the thermal characteristics in the heat dissipation state and in the case of adiabatic heat dissipation, it can be said that the simulation device 1 is useful for verifying the change over time of the thermal characteristics of a semiconductor device.
[0058] FIG. 8 is a diagram showing the change over time (simulation result) of the thermal characteristics of the semiconductor device 2 in the heat dissipation state and the heat insulation state estimated using a simulation device of the comparative example.
[0059] The simulation device of the comparative example differs from the simulation device of this embodiment in that the simulation device uses thermal circuit data of a thermal equivalent circuit in which the fourth resistor R4, the fourth capacitor C4, the eighth resistor R8 and the eighth capacitor C8 (final stage thermal resistance and heat capacity) are omitted from the thermal equivalent circuit 3 shown in FIG. 3.
[0060] 8, curve d'' shows the change over time in the thermal characteristics of the semiconductor device 2 in the heat dissipation state. Curve e'' shows the change over time in the thermal characteristics of the semiconductor device 2 in the heat insulation state.
[0061] The following can be seen from Figures 7 and 8. In the case of the heat dissipation state, the curve d'' of the simulation result is almost the same as the curve d' of the analysis result. However, in the case of the adiabatic state, the curve e'' of the simulation result does not match the curve e' of the analysis result.
[0062] In the embodiment, the reason why the simulation results and the analysis results in the case of the adiabatic state substantially match is believed to be as follows.
[0063] In this embodiment, the impedance between the terminal Tc1 and the terminal Ta becomes high during a transient state by adding the fourth resistor R4, the fourth capacitor C4, the eighth resistor R8, and the eighth capacitor C8. The fourth resistor R4 and the fourth capacitor C4 do not affect the impedance between the terminal Tc1 and the terminal Ta during a steady state. Moreover, the eighth resistor R8 and the eighth capacitor C8 do not affect the impedance between the terminal Tc2 and the terminal Ta during a steady state.
[0064] The value of one of the fourth resistor R4 and the eighth resistor R8 may be approximately zero. In this case, one of the fourth resistor R4 and the eighth resistor R8 can be omitted. However, if the fourth resistor R4 is omitted, the first heat equivalent circuit 61 is no longer a Cauer type. Also, if the eighth resistor R8 is omitted, the second heat equivalent circuit 62 is no longer a Cauer type.
[0065] FIG. 9 is a flowchart showing the steps of a first method for creating the heat equivalent circuit 3.
[0066] First, the change over time in the thermal characteristics of a semiconductor device 2 with bottom-side heat dissipation (hereinafter referred to as the first change over time in the thermal characteristics), the change over time in the thermal characteristics of a semiconductor device 2 with top-side heat dissipation (hereinafter referred to as the second change over time in the thermal characteristics), and the change over time in the thermal characteristics of a semiconductor device 2 with double-sided heat dissipation (hereinafter referred to as the third change over time in the thermal characteristics) are obtained (step S1).
[0067] The changes over time of the first to third thermal properties are obtained by simulation or actual measurement. It is also possible to obtain some of the changes over time of the first to third thermal properties by actual measurement, and obtain the changes over time of the remaining thermal properties by simulation. When the changes over time of the thermal properties are obtained by actual measurement, it is preferable to remove the influence of the measurement environment from the actual measurement results.
[0068] Next, a first heat equivalent circuit 61 and a second heat equivalent circuit 62 connected thereto are created (step S2). If there is no need to reproduce the change over time in the thermal characteristics of the adiabatic state, the resistors R4 and R8 and the capacitors C4 and C8 are not necessary.
[0069] Next, proceed to a step (step S3) of determining the values of the resistors R1 to R4 and the capacitors C1 to C4 of the first heat equivalent circuit 61, and the resistance values of the resistors R5 to R8 and the capacitance values of the capacitors C5 to C8 of the second heat equivalent circuit 62. If there is no need to reproduce the change over time in the thermal characteristics of the adiabatic state, the resistance values of the resistors R1 to R3, the capacitance values of the capacitors C1 to C3, the resistance values of the resistors R5 to R7 and the capacitance values of the capacitors C5 to C8 are determined.
[0070] Step S2 is performed as follows: The values of the resistors R1 to R8 and the capacitors C1 to C9 are determined so that a first difference between the change over time of the thermal characteristic of the lower surface side portion of the semiconductor device 2 and the change over time of the first thermal characteristic calculated using the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 falls within a predetermined first range, a second difference between the change over time of the thermal characteristic of the upper surface side portion of the semiconductor device 2 and the change over time of the second thermal characteristic calculated using the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 falls within a predetermined second range, and a third difference between the change over time of the thermal characteristic of the lower surface side and the upper surface side portion of the semiconductor device 2 and the change over time of the third thermal characteristic calculated using the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 falls within a predetermined third range.
[0071] The first range, the second range, and the third range are determined according to the thermal characteristics (specifications) required for the semiconductor device 2. Moreover, it is preferable to determine the values of the resistors R1 to R8 and the capacitors C1 to C9 so that the first difference value is close to the lower limit of the first range, the second difference value is close to the lower limit of the second range, and the third difference value is close to the lower limit of the second range.
[0072] 10 is a flow chart showing the procedure of the second creation method of the thermal equivalent circuit 3. In the second creation method, the change over time of the second thermal characteristic (top surface heat dissipation characteristic) is not used. The second creation method is used, for example, when it is not necessary to create a thermal equivalent circuit that can reproduce the top surface heat dissipation characteristic.
[0073] First, the change over time of the first thermal characteristic and the change over time of the third thermal characteristic are obtained (step S1a).
[0074] Next, a heat equivalent circuit including a first heat equivalent circuit 61 and a second heat equivalent circuit 62 connected thereto is created (step S2a).
[0075] Next, the values of resistors R1 to R8 and capacitors C1 to C9 are determined so that a first difference between the change over time of the thermal characteristics of the lower surface portion of the semiconductor device 2 calculated using the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 and the change over time of the first thermal characteristic falls within a predetermined first range, and a third difference between the change over time of the thermal characteristics of the lower surface and upper surface portions of the semiconductor device 2 calculated using the first thermal equivalent circuit 61 and the second thermal equivalent circuit 62 and the change over time of a third thermal characteristic falls within a predetermined third range.
[0076] FIG. 11 is a diagram showing the data structure 4 of the thermal equivalent circuit 3 used in the simulation device 1. As shown in FIG. As described above, the thermal equivalent circuit 3 includes a first thermal equivalent circuit 61 corresponding to a portion on the upper surface side of the semiconductor device 2, and a second thermal equivalent circuit 62 connected to the first thermal equivalent circuit 61 and corresponding to a portion on the lower surface side of the semiconductor device 2. The data structure 4 includes first circuit data D1 related to the first thermal equivalent circuit 61 and second circuit data D2 related to the second thermal equivalent circuit 62.
[0077] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]
[0078] 1...simulation device, 2...semiconductor device, 3...thermal equivalent circuit, 4...data structure, 10...input device, 11...keyboard, 12...mouse, 20...storage device, 21...thermal circuit data, 22...numerical data, 30...estimation device, 31...calculator, 40...output device, 41...display, 42...printer, 51...first frame, 52...semiconductor chip, 53...second frame, 54...molding resin, 60...current source, 61...first thermal equivalent circuit, 62...second thermal equivalent circuit, R1 to R8...resistors, C1 to C8...capacitors, D1...first circuit data, D2...second circuit data.
Claims
1. a first step of acquiring a change over time of a first thermal characteristic of the semiconductor device when heat is dissipated from a bottom surface of the semiconductor device, a change over time of a second thermal characteristic of the semiconductor device when heat is dissipated from a top surface of the semiconductor device, and a change over time of a third thermal characteristic of the semiconductor device when heat is dissipated from both the bottom surface and the top surface of the semiconductor device; a second step of creating a first thermal equivalent circuit, the first thermal equivalent circuit including a plurality of first resistors and a plurality of first capacitors, and corresponding to the bottom surface of the semiconductor device, and a second thermal equivalent circuit, the second thermal equivalent circuit including a plurality of second resistors and a plurality of second capacitors, connected to the first thermal equivalent circuit, and corresponding to the top surface of the semiconductor device; a difference between a change over time in the thermal characteristic of the semiconductor device calculated using the first thermal equivalent circuit and the second thermal equivalent circuit when heat is dissipated from the bottom surface of the semiconductor device and a change over time in the first thermal characteristic falls within a predetermined range; a difference between a change over time in the thermal characteristic of the semiconductor device calculated using the first thermal equivalent circuit and the second thermal equivalent circuit when heat is dissipated from the top surface of the semiconductor device and a change over time in the second thermal characteristic falls within a predetermined range, and a third step of determining resistance values of the plurality of first resistors, capacitance values of the plurality of first capacitors, resistance values of the plurality of second resistors, and capacitance values of the plurality of second capacitors so that a difference between a change over time in a thermal characteristic of the semiconductor device calculated using the first thermal equivalent circuit and the second thermal equivalent circuit when heat is dissipated from the bottom surface and the top surface of the semiconductor device and a change over time in the third thermal characteristic falls within a predetermined range; A method for creating a thermal equivalent circuit comprising:
2. 2. The method for creating a thermal equivalent circuit according to claim 1, wherein in the first step, acquisition of the change over time of the second thermal characteristic is omitted.
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