Overlap joint flex circuit board interconnect

Abstract

For example, an interconnect for flex circuit boards for use in a quantum computing system is provided. In one example, the interconnect may include a first flex circuit board having a first side and a second side opposite the first side. The interconnect may include a second flex circuit board having a third side and a fourth side opposite the third side. The first flex circuit board and the second flex circuit board are physically coupled at an overlap joint where a portion of the second side of the first flex circuit board overlaps a portion of the third side of the flex circuit board. The interconnect may include a signal pad structure disposed at the overlap joint that electrically couples a first via of the first flex circuit board and a second via of the second flex circuit board.

Description

[Technical field]

[0001] Claiming priority This application claims the benefit of priority to U.S. Provisional Application No. 63 / 079,274, filed September 16, 2020, and entitled “Overlap Joint Flex Circuit Board Interconnection,” which is incorporated herein by reference.

[0002] The present disclosure relates generally to interconnects, for example for classical or quantum computing systems. [Background technology]

[0003] Quantum computing is a computational method that exploits quantum effects such as superposition of basis states and entanglement to perform certain calculations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits such as "1" or "0", quantum computing systems can manipulate information using quantum bits ("qubits"). A qubit can refer to a quantum device that allows for the superposition of multiple states, e.g., data in both "0" and "1" states, and / or the superposition of data itself in multiple states. According to conventional terminology, the superposition of "0" and "1" states in a quantum system can be represented, for example, as a|0〉+b|1〉. The "0" and "1" states of a digital computer are analogous to the |0〉 and |1〉 basis states of a qubit, respectively. Summary of the Invention [Means for solving the problem]

[0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the description that follows, or may be learned from the description, or may be learned by practice of the embodiments.

[0005] One exemplary aspect of the present disclosure is directed to an interconnect for connecting multiple flex circuit boards. The interconnect may include a first flex circuit board having a first side and a second side opposite the first side. The interconnect may include a second flex circuit board having a third side and a fourth side opposite the third side. The first flex circuit board and the second flex circuit board are physically coupled at an overlap joint where a portion of the second side of the first flex circuit board overlaps a portion of the third side of the flex circuit board. The interconnect may include a signal pad structure disposed at the overlap joint that electrically couples a first via of the first flex circuit board and a second via of the second flex circuit board.

[0006] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the relevant principles.

[0007] A detailed discussion of the embodiments, directed to those skilled in the art, is set forth in the specification, which refers to the accompanying drawings. [Brief description of the drawings]

[0008] [Figure 1] 1A-1C illustrate examples of flex circuit board interconnections according to exemplary aspects of the present disclosure. [Diagram 2] FIG. 2 illustrates a top view of an exemplary flex circuit interconnect according to an exemplary aspect of the present disclosure. [Diagram 3] FIG. 2 illustrates an exemplary solder arrangement of an exemplary interconnect according to an exemplary aspect of the present disclosure. [Figure 4] 1 is a flow diagram of an example method for generating interconnects according to an example aspect of the present disclosure. [Diagram 5] FIG. 1 illustrates a quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 6]FIG. 1 illustrates a quantum computing system according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Exemplary aspects of the present disclosure are directed to making and using specialized overlap joint interconnects that can connect various types of circuit boards, including, but not limited to, flexible and semi-flexible circuit boards used in conventional computing systems, quantum computing systems, and other types of electronic devices (such as automobiles, aircraft, satellites, medical equipment, smartphones, wearable devices, etc.). A circuit board generally refers to a material with printed circuits or integrated circuits used to connect electronic components and devices. A flex circuit board can include a circuit board that provides, in whole or in part, at least some structural flexibility.

[0010] Flex circuits may be used in a variety of electronic devices, for example, where flexibility and space savings are difficult or impossible to achieve with rigid circuit boards. Although flex circuits may have advantages over rigid circuit boards, connections of flex circuits may be problematic. For example, the inherent flexibility of flex circuits increases the risk of damage from movement and loss of structural support during handling and use. Furthermore, repairing or replacing a damaged flex circuit board can be inconvenient and costly. Thus, the present disclosure describes new and improved methods of making and using overlap joints that interconnect flex circuit boards.

[0011] According to an exemplary aspect of the present disclosure, an overlap interconnect for interconnecting multiple circuit boards, such as flex circuit boards, may include, for example, a first flex circuit board having a first side and a second side opposite the first side. The interconnect may include a second flex circuit board having a third side and a fourth side opposite the third side. The first flex circuit board and the second flex circuit board may be physically coupled to one another at an overlap joint where a portion of the second side of the first flex circuit board overlaps a portion of the third side of the flex circuit board.

[0012] The first flex circuit board may include a first signal line, a first dielectric layer, and a first via. The first via may extend through the first dielectric layer from at least the first signal line to a second side of the first flex circuit board. The second flex circuit board may include a second signal line, a second dielectric layer, and a second via. The second via may extend through the second dielectric layer from at least the second signal line to a third side of the second flex circuit board. The interconnect further includes a signal pad structure disposed at an overlap joint between the second side of the first flex circuit board and the third side of the second flex circuit board and electrically coupled to the first via and the second via.

[0013] Exemplary aspects of the present disclosure are also directed to methods of fabricating wiring structures for interconnecting various types of circuit boards, for example, in computing systems, quantum computing systems, and various kinds of electronic devices (such as automobiles, aircraft, satellites, medical devices, smartphones, wearable devices, etc.) The method may include, for example, obtaining a first circuit board, obtaining a second circuit board, aligning the first circuit board and the second circuit board such that a signal pad structure is disposed at an overlap joint between a second side of the first circuit board and a third side of the second circuit board, and coupling at least a first via in the first flex circuit board and a second via in the second flex circuit board at the signal pad structure.

[0014] Aspects of the present disclosure provide many technical effects and advantages. For example, various examples of interconnects described in this disclosure provide reinforcement and increased durability when interconnecting flex circuit boards that may bend, bend, and twist to fit into a final assembly. For example, the flex circuit board interconnects described herein protect against and reduce the likelihood of damage during installation, deployment, use, and maintenance of various types of conventional computing systems, quantum computing systems, consumer devices, industrial equipment, aerospace equipment, and the like. Thus, these new and improved flex circuit board interconnects provide improved reliability and resiliency compared to conventional interconnects, thereby reducing damage, repairs, replacements, downtime, and costs associated with various types of systems, devices, and equipment that use flex circuit boards.

[0015] As used herein, a "flex circuit board" refers to a substrate that includes at least one substantially planar substrate (e.g., a layered substrate) or other support on which one or more signal lines are formed or otherwise disposed and that is flexible in at least one plane. Flexibility refers to the ability to deform without breaking. For example, a rectangular flex circuit board may be flexible along the largest surface of the rectangular flex circuit board. A rectangular flex circuit board may be flexible and / or rigid along at least a portion of its edges. Flexibility may be achieved as a property of the material from which the flex circuit board and / or layers of the flex circuit board are formed (e.g., metals such as copper, copper alloys, niobium, aluminum, dielectric materials, non-metals, polymers, rubbers, etc.), by hinges and / or segmentation of the flex circuit board (e.g., hinges and / or segmentation of rigid portions), and / or in any other suitable manner. The substrate may be strictly planar (e.g., having a substantially linear cross-section across its length and width) and / or may be approximately planar in the sense that in at least one cross-section the substrate is curved, wrinkled, or otherwise non-linear, but overall represents a shape having a depth that is significantly less (e.g., less than about 10%) than its length and width.

[0016] As used herein, the terms "about" or "approximately" when used in conjunction with a stated numerical value are intended to refer to within 10% of the stated numerical value.

[0017] Exemplary embodiments of the present disclosure will now be discussed in more detail with reference to the drawings. Aspects of the present disclosure will be discussed with reference to flex circuit board interconnects in quantum computing systems for purposes of illustration and discussion. Those skilled in the art will appreciate, using the disclosure provided herein, that the interconnects may be used in other applications without departing from the scope of the present disclosure.

[0018] FIG. 1 illustrates a cross-sectional view of an exemplary overlap joint flex-flex interconnect 100 according to an exemplary embodiment of the present disclosure. The overlap joint interconnect 100 may be used to interconnect multiple flex circuit boards. The overlap joint interconnect 100 may be created between a first flex circuit board 110 and a second flex circuit board 120. The first flex circuit board 110 may include a ground layer 112, a dielectric layer 114, and / or a signal line 116. Similarly, the second flex circuit board 120 may include a ground layer 122, a dielectric layer 124, and / or a signal line 126. The first flex circuit board 110 and the second flex circuit board 120 may include the same and / or different materials.

[0019] The first flex circuit board 110 may include at least one via 118 extending through the dielectric layer 114 from the signal line 116 to a second side of the first flex circuit board (e.g., the side having the ground layer 112). For example, the via 118 may be the same material (e.g., a superconducting material) as the signal line 116 and / or may be a different material. The via 118 may be surrounded by a gap 119. For example, the gap 119 may be circular on the surface having the ground layer 112. In some embodiments, such as shown in FIG. 1, the via 118 may extend through both dielectric layers 114. For example, the via 118 may be a so-called "through via" that extends from a first surface of the first flex circuit board 110 to a second surface of the first flex circuit board 110. Additionally and / or alternatively, the via 118 may be a so-called "blind via" that extends from the signal line 116 to only one side of the first flex circuit board 110 (eg, to the signal pad 132).

[0020] The second flex circuit board 120 may further include at least one via 128 extending through the dielectric layer 124 from the signal line 126 to a second side of the second flex circuit board (e.g., the side having the ground layer 122). For example, the via 128 may be the same material as the signal line 126 (e.g., a superconducting material) and / or a different material. The via 128 may be surrounded by a gap 129. For example, the gap 129 may be circular on the surface having the ground layer 122. In some embodiments, the via 128 may extend through both dielectric layers 124. In some embodiments, such as shown in FIG. 1, the via 128 may extend through both dielectric layers 124. For example, the via 128 may be a so-called "through via" that extends from a first surface of the second flex circuit board 120 to a second surface of the second flex circuit board 120. Additionally and / or alternatively, the via 128 may be a so-called "blind via" that extends from the signal line 126 to only one side of the second flex circuit board 120 (eg, to the signal pad 132).

[0021] Overlap Joint The flex-flex interconnect 100 may include an overlap joint 130. For example, the overlap joint 130 may be formed at the overlap of the first flex circuit board 110 and the second flex circuit board 120. In some embodiments, the first flex circuit board 120 and the second flex circuit board 120 may overlap by about 3 mm to about 7 mm.

[0022] The overlap joint 130 may include at least a signal pad 132. The signal pad 132 can be configured to couple the signal line 116 (e.g., by via 118) of the first flex circuit board 110 to the signal line 126 (e.g., by via 128) of the second flex circuit board 120. The signal pad 132 can facilitate signal transmission between the first flex circuit board 110 and the second flex circuit board 120. Additionally, the overlap joint 130 may include one or more ground pads 134. The ground pad 134 can couple the ground layer 112 of the first flex circuit board 110 to the combined ground layer 122 of the second flex circuit board 122. For example, the ground pad 134 can place the ground layers 112 and 122 in electrical communication. One or more gaps 136 may be provided between the signal pads 132 and the ground pads 134 to separate the signal pads 132 from the ground pads 134. In some embodiments, the signal pads 132, the ground pads 134, and / or the gaps 136 may be designed for impedance matching of the transmit signal.

[0023] FIG. 2 illustrates a diagram showing a top view of an exemplary flex circuit board 200 used for an overlap joint interconnection according to an exemplary embodiment of the present disclosure. The flex circuit board 200 may include a ground layer 112, a signal line 116, a via 118, a circular signal pad 132, and a ground pad 134 surrounding the circular signal pad 132. The top view shows a series of signal lines 116, vias 118, and a circular signal pad 132, all surrounded by the ground layer 112. The circular signal pad 132 may have a circular structure. The via 118 may be connected to the signal line 116 such that a signal passing through the signal line 116 can propagate through the via 118. More specifically, the exposed signal pad 132 and the ground pad 134 may be coupled to a mirror-matched pair of a second flex circuit board to form an overlap interconnection. More specifically, the first flex circuit board may mirror the second flex circuit board.

[0024] 3 illustrates a close-up view of an exemplary via 118 associated with a signal line 116 of a flex circuit board 300 used for an overlap joint interconnection according to an exemplary embodiment of the present disclosure. As illustrated, the flex circuit board 300 includes a ground layer 112, a signal line 116, a via 118, a circular signal pad 132, and a ground pad 134 disposed at least partially around the circular signal pad 134. A gap 136 is formed between the circular signal pad 132 and the ground layer 112. Solder 302 can be used to bond the ground pads 134 to one another and match the ground pads of the flex circuit board to interconnect with the flex circuit board 300 in the overlap joint interconnection. Similarly, solder 304 can be used to bond the circular signal pad 132 to a matching signal pad of the flex circuit board to interconnect with the flex circuit board 300 in the overlap joint.

[0025] 4 illustrates a flow diagram of an exemplary method 400 for generating interconnects according to examples of the present disclosure. While FIG. 4 illustrates, by way of example, steps performed in a particular order for purposes of illustration and discussion, the methods of the present disclosure are not limited to the order or arrangement specifically depicted. Thus, various steps of method 400 may be omitted, rearranged, combined, and / or adapted in various ways without departing from the scope of the present disclosure.

[0026] At 402, a first flex circuit board is obtained. For example, the first flex circuit board may include first and second ground layers, first and second dielectric layers, and / or a signal line. In some examples, the first flex circuit board may include at least one via extending from the signal line through the dielectric layers (e.g., to a second side of the first flex circuit board). For example, the via may be the same material (e.g., a superconducting material) as the signal line and / or a different material.

[0027] At 404, a second flex circuit board is obtained. For example, the second flex circuit board may each include first and second ground layers, first and second dielectric layers, and / or a signal line. In some examples, the second flex circuit board may include at least one via extending from the signal line through the dielectric layer (e.g., to a second side of the second flex circuit board). For example, the via may be the same material (e.g., a superconducting material) as the signal line and / or a different material.

[0028] At 406, the first flex circuit board and the second flex circuit board are aligned such that the signal pad structures are disposed at the overlap joint. In one example, a side or edge of the first flex circuit board is aligned with a side or edge of the second flex circuit board such that the signal pad structures face each other, e.g., symmetrically or substantially symmetrically, from opposite sides. In some examples, a heated assembly jig may be used, for example, to align the first flex circuit board with the second flex circuit board and perform various steps of assembling the flex circuit overlap joint.

[0029] In some examples, the first flex circuit board and the second flex circuit board are laterally aligned and converge or overlap one another based on the alignment forming an overlap between the signal pad structures of the different flex circuit boards. In some examples, an exposed via of the first flex circuit board contacts an exposed via of the second flex circuit board.

[0030] At 408, the first via and the second via are coupled to each other at the overlap joint by a signal pad structure. In one example, the first and second vias are coupled by solder. The solder connection can create a connection between the first via and the second via. Further, the ground layer of the first flex circuit board can be coupled to the ground layer of the second flex circuit board by coupling ground pads. In one example, the ground pads are coupled via a solder connection.

[0031] 5 shows a block diagram of an exemplary quantum computing system according to an example of the present disclosure. Quantum computing system 500 is an example of a system implemented as a classical or quantum computer program on one or more classical or quantum computing devices at one or more locations where the systems, components, and techniques described in the present disclosure can be implemented. Quantum computing system 500 is an example that can be used to implement aspects of the present disclosure. Those skilled in the art will appreciate that other quantum computing structures or systems can be used using the examples provided herein without departing from the scope of the present disclosure.

[0032] Quantum computing system 500 includes quantum hardware 502 in data communication with one or more classical processors 504. For example, quantum hardware 502 can represent and / or manipulate information using qubits. Qubits may be or include any suitable quantum device that allows for a superposition of multiple states, such as data in both "0" and "1" states. By way of example, a qubit may be or include a unit of a superconducting material, such as a superconducting material that achieves superconductivity at a temperature below about 10 mK.

[0033] Quantum hardware 502 may include components for performing quantum computations. For example, quantum hardware 502 may include a quantum system 510, a controller 512, and a readout device (e.g., readout resonator 514). Quantum system 510 may include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystems may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0034] The classical processor 504 may be a binary processor, such as a processor that operates on data represented as a plurality of bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0V) and a high voltage (e.g., 5V) at a reference point, such as a memory cell, a circuit node, or the like. The low voltage may be associated with a "0" state, and the high voltage may be associated with a "1" state. The classical processor 504 may be configured to control the quantum hardware 502, in addition to any other suitable functions of the classical processor 504. For example, the classical processor 504 may be coupled (e.g., by a signal line) to the quantum hardware 502 and / or configured to send control signals to perform quantum operations using the quantum hardware 502. As an example, the classical processor 504 may be configured (e.g., by a controller 512) to send control signals that implement quantum gate operations in the quantum hardware 502. Additionally and / or alternatively, classical processor 504 can be configured (e.g., by a readout device such as readout resonator 514) to send control signals that cause quantum hardware 502 to perform quantum state measurements and / or provide quantum state measurements to classical processor 504. For example, classical processor 504 can receive measurements of quantum system 510 that are interpretable by classical processor 504.

[0035] There may be a variety of types of multi-level quantum subsystems utilized by quantum computing system 500. For example, in some cases it may be convenient to include one or more readout devices (e.g., readout resonators 514) attached to one or more superconducting qubits, e.g., transmons, flux, gmons, xmons, or other qubits.

[0036] A quantum circuit can be constructed and applied to a register of qubits included in the quantum system 510 via multiple signal lines (e.g., signal lines 116, 126 in FIG. 1 ) coupled to one or more controllers 512. An exemplary controller 512 operating on the register of qubits can be used to implement a quantum logic gate or a circuit of quantum logic gates, such as a Hadamard gate, a controlled NOT (CNOT) gate, a controlled phase gate, a T-gate, a multi-qubit quantum gate, a coupler quantum gate, etc. The one or more controllers 512 can be configured to operate on the quantum system 510 through one or more respective control parameters (e.g., one or more physical control parameters 506). For example, in some implementations, the multilevel quantum subsystem can be a superconducting qubit, and the controller 512 can be configured to provide control pulses to the control lines (e.g., signal lines 116, 126 in FIG. 1 ) to generate a magnetic field to tune the frequency of the qubit.

[0037] The quantum hardware 502 may further include a readout device (e.g., a readout resonator 514). Measurement results 508 obtained via the measurement device may be provided to the classical processor 504 for processing and analysis. In some examples, the quantum hardware 502 may include a quantum circuit, and the controller 512 and readout device may implement one or more quantum logic gates that operate on the quantum system 510 via physical control parameters (e.g., microwave pulses) sent via wires included in the quantum hardware 502. Further examples of controllers include arbitrary waveform generators from which DACs create signals.

[0038] The readout device (e.g., readout resonator 514) can be configured to perform a quantum measurement on the quantum system 510 and send the measurement result 508 to the classical processor 504 (e.g., over signal lines 116, 126 in FIG. 1). Additionally, the quantum hardware 502 can be configured to receive data from the classical processor 504 (e.g., over signal lines 116, 126 in FIG. 1) specifying values ​​of the physical control parameters 506. The quantum hardware 502 can use the received values ​​of the physical control parameters 506 to update the operation of the controller 512 and the readout device (e.g., readout resonator 514) on the quantum system 510. For example, the quantum hardware 502 can receive data specifying new values ​​representing voltage strengths of one or more DACs included in the controller 512 and can update the operation of the DACs on the quantum system 510 accordingly. The classical processor 504 can be configured to initialize the quantum system 510 to an initial quantum state, for example, by sending data specifying an initial set of parameters 506 to the quantum hardware 502.

[0039] A readout device (e.g., readout resonator 514) can utilize the difference in impedance between the |0〉 and |1〉 states of an element of quantum system 510, such as a qubit, to measure the state of the element (e.g., a qubit). For example, the resonant frequency of readout resonator 514 can take different values ​​when the qubit is in state |0〉 or state |1〉 due to the nonlinearity of the qubit. Thus, microwave pulses reflected from the readout device (e.g., readout resonator 514) carry amplitude and phase shifts that depend on the qubit state. In some examples, a Purcell filter can be used with the readout device (e.g., readout resonator 514) to prevent microwave propagation at the qubit frequency.

[0040] The quantum computing system 500 includes a controller 512. The controller 512 can operate the quantum hardware 502. For example, the controller 512 can include a waveform generator configured to generate control pulses according to exemplary aspects of the present disclosure.

[0041] In some examples, the controller 512 may include a data processor and associated memory. The memory may include a computer program having instructions that, when executed by the data processor, cause the data processor to perform one or more operations, such as applying control signals to the qubits and / or tunable couplers.

[0042] The quantum hardware 502, such as, but not limited to, the quantum system 510, the controller 512, the readout device 514, and / or any other suitable components of the quantum hardware 502, may be disposed within a cryogenic cooling system (not shown). Additionally and / or alternatively, the classical processor 504 may be disposed outside of the cryogenic cooling system. For example, the cryogenic cooling system may be configured to cool the quantum hardware 502. Additionally and / or alternatively, the classical processor 504 is not cooled by a cryogenic cooling system. For example, the classical processor 504 may operate at a temperature near room temperature (e.g., about 300 Kelvin) and / or at a temperature of about 100 Kelvin, while the quantum hardware 502 may operate at a temperature near absolute zero (e.g., less than about 1 Kelvin) that may require cooling by a cryogenic cooling system to operate effectively.

[0043] The quantum computing system 500 may include signal lines (not shown). The signal lines may couple the classical processor 504 to the quantum hardware 502. For example, the classical processor 504 and the quantum hardware 502 may engage in signal communication, such as transmitting parameters 506 and / or measurement results 508 and / or any other suitable signals, such that the classical processor 504 may be coupled to the quantum hardware 502 by signal lines. For example, the signal lines may be or include any suitable physical communication coupling (e.g., one or more wires) configured to couple the quantum hardware 502 and the classical processor 504. In general, the signal lines may include physical connections to enable faster and / or more robust communication between the quantum hardware 502 and the classical processor 504. Additionally, the signal lines may be at least partially disposed within a cryogenic cooling system, for example, to provide coupling to the quantum hardware 502.

[0044] FIG. 6 illustrates an exemplary quantum computing system 600 according to an exemplary embodiment of the present disclosure. The quantum computing system 600 may include one or more classical processors 602 and quantum hardware 604 including one or more qubits. The quantum computing system 600 may include a chamber mount 608 configured to support the quantum hardware 604 and a vacuum chamber configured to receive the chamber mount 608 and place the quantum hardware 604 in a vacuum. The vacuum chamber can form a cooling gradient from an end of the vacuum chamber (e.g., cap 607) to the quantum hardware 604. For example, the vacuum chamber can form a cooling gradient from a first temperature, such as room temperature (e.g., about 300 Kelvin), to a second temperature, such as absolute zero or near absolute zero (e.g., about 20 milliKelvin), such as providing the quantum hardware 604 with a temperature at which the qubits experience superconductivity. In some embodiments, the cooling gradient can be formed by multiple cooling stages in which the temperature is gradually increased and / or decreased. As an example, the cooling stages can be stages of a stepwise cryogenic cooling system, such as a dilution refrigerator.

[0045] The quantum computing system 600 can include one or more signal lines between the classical processor 602 and the quantum hardware 604. According to an exemplary embodiment of the present disclosure, the quantum computing system 600 can include one or more flex circuit boards 606 including one or more signal lines. The flex circuit board 606 can be configured to transmit signals by one or more signal lines through a vacuum chamber to couple the one or more classical processors 602 to the quantum hardware 604. The flex circuit board 606 can include multiple signal lines and can provide significantly improved signal line density in addition to providing improved isolation, reduced thermal conductivity, and / or improved scalability. For example, the inclusion of a flex circuit board 606 according to an exemplary embodiment of the present disclosure to couple the classical processor 602 to the quantum hardware 604 can provide an infrastructure to reliably scale to the increasing number of qubits achieved in current quantum computing systems and / or anticipated in future quantum computing systems and / or future quantum computing systems.

[0046] In some embodiments, some or all of the flex circuit board 606 may include at least one ground layer. The ground layer may form an outer surface of the flex circuit board 606, such as an outer surface along the largest surface. In some embodiments, the flex circuit board 606 may include two ground layers, such as two parallel, spaced apart ground layers. For example, the two ground layers may form both largest outer surfaces of the flex circuit board 606. The ground layer functions as an electrical insulation layer to isolate signal lines on one side of the ground layer from interfering signals on the other side of the ground layer (e.g., from signal lines on other layers, other substrates, the environment, etc.). For example, the ground layer may be coupled to ground and / or other suitable ground.

[0047] The ground layer may be or include any suitable electrically conductive material. In some embodiments, the ground layer may be or include a superconducting ground layer including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, such as less than about 20 milliKelvin. By way of example, the ground layer may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the ground layer may be or include a material having high signal transmission performance characteristics, such as low resistance, low reflectivity, low distortion, such that the signal is not substantially altered by passing through the signal line. By way of example, the ground layer may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the ground layer may be or include a material having desirable thermal properties, such as suitably high and / or low heat transfer, such as copper, copper alloys, thin superconducting materials, and the like.

[0048] In some embodiments, the flex circuit board 606 may include at least one dielectric layer. The dielectric layer may be or include any suitable dielectric material, such as a dielectric polymer. In some embodiments, the dielectric layer may be or include a flexible dielectric material. As an example, the dielectric layer may be or include a polyimide. At least a portion of the dielectric layer may be formed on or otherwise disposed proximate to at least a portion of an inner surface of a ground layer. For example, in some embodiments, an inner surface of the ground layer may be combined with an outer surface of a dielectric layer. Additionally, in some embodiments, the inner surfaces of two dielectric layers may be combined with a signal line disposed between them.

[0049] The flex circuit board 606 may include one or more signal lines. The one or more signal lines may be disposed on a surface (e.g., an inner surface) of at least one dielectric layer. As an example, in some implementations, the one or more signal lines may be disposed between opposing inner surfaces of two dielectric layers. The signal lines may be or include any suitable conductive material. In some embodiments, the signal lines may be or include superconducting signal lines including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, such as less than about 20 milliKelvin. By way of example, the signal lines may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the signal lines may be or include materials having high signal transmission performance characteristics. By way of example, the signal lines may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the signal wires may be or include materials having desirable thermal properties, such as, for example, copper, copper alloys, thin superconducting materials, etc.

[0050] In some embodiments, the flex circuit board 606 may include one or more vias. For example, the vias may extend through the ground layer, the dielectric layer, and / or the signal lines. The vias serve to improve isolation of the signal lines. In some embodiments, the vias may be plated with a via plate that extends along the via. In some embodiments, the via plate may be or include a conductive material, such as copper.

[0051] For example, in some embodiments, quantum computing system 600 may include quantum hardware 604 in data communication with one or more classical processors 602. For example, quantum hardware 604 may represent and / or manipulate information using qubits. A qubit may be or include any suitable quantum device that allows for a superposition of multiple states, e.g., both "0" and "1" states. By way of example, a qubit may be or include a unit of a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, such as less than about 20 milliKelvin. In some embodiments, quantum computing system 600 may include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0052] Classical processor 602 may be a binary processor, such as a processor that operates on data represented as a plurality of bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0V) and a high voltage (e.g., 5V) at a reference point, such as a memory cell, a circuit node, or the like. The low voltage may be associated with a "0" state, and the high voltage may be associated with a "1" state. Classical processor 602 may be configured to control quantum hardware 604 in addition to any other suitable functions of classical processor 602. For example, classical processor 602 may be coupled to quantum hardware 604 (e.g., by signal lines included in flex circuit board 606 according to an exemplary embodiment of the present disclosure) and / or configured to send control signals to perform quantum operations using quantum hardware 604. As an example, classical processor 602 may be configured to send control signals (e.g., by a controller) to perform quantum gate operations in quantum hardware 604. Additionally and / or alternatively, classical processor 602 can be configured to send control signals (e.g., by a readout device) that cause quantum hardware 604 to perform quantum state measurements and / or provide quantum state measurements to classical processor 602. For example, classical processor 602 can receive measurements of the quantum system that can be interpreted by classical processor 602.

[0053] According to an exemplary aspect of the present disclosure, the quantum computing system 600 may include one or more flex circuit boards 606 including one or more signal lines. The classical processor 602 may be coupled to at least one first flex circuit board. For example, the classical processor 602 may be coupled to the first flex circuit board 614 by a classical flex interconnect 632. The classical flex interconnect 632 may transfer from a classical signal transmission medium (e.g., a coaxial cable) 612 to the first flex circuit board 614.

[0054] As an example, the classical flex interconnect 632 may be or may include a compression interposer. The compression interposer may include an array (e.g., a two-dimensional array) of spring pads. A connector receiving a signal from the classical processor 602, such as via one or more coaxial cables 612 (e.g., one coaxial cable 612 per signal line), may be compressed against the compression interposer to form a signal communication between the spring pad and the connector (e.g., a coaxial cable). Each of the spring pads may be coupled to a signal line on the first flex circuit board 614 and may transmit a signal from the classical processor 602 (e.g., a coaxial cable) to the signal line. The compression interposer may enable connection of a signal transmission medium 612 having a relatively low spatial density, such as a coaxial cable, which may occupy a relatively large amount of space per cable, to a signal transmission medium having a relatively high spatial density, such as a signal line embedded in the first flex circuit board 614 provided according to an exemplary embodiment of the present disclosure. Additionally, compressive interposers can provide high isolation between signal lines and / or low reflectivity along the signal lines, suitable for quantum computing applications.

[0055] In some embodiments, the first flex circuit board 614 may be or include a first flex circuit board material in the ground layer and / or signal lines. The first flex circuit board material may be selected to provide high signal transfer performance characteristics. By way of example, the first flex circuit board material may be or include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the first flex circuit board 614 may include copper signal lines and / or ground layers to provide high signal transfer performance characteristics.

[0056] The first flex circuit board 614 can pass through an airtight seal 652 disposed at an end (e.g., entrance) of a vacuum chamber, such as the cap 607. For example, a flex circuit board (e.g., the first flex circuit board 614) can be configured to pass through the airtight seal 652 such that a first portion of the flex circuit board (e.g., the first flex circuit board 614) is disposed within the vacuum chamber and a second portion of the flex circuit board (e.g., the first flex circuit board 614) is disposed outside the vacuum chamber, while the airtight seal 652 forms a vacuum seal for the vacuum chamber. The airtight seal 652 can allow the first flex circuit board 614 to enter the vacuum chamber without (e.g., substantially) breaking the vacuum created by the vacuum chamber. As an example, the airtight seal 652 can include a mating seal for each first flex circuit board 614. The mating seal can receive the first flex circuit board 614 and form a vacuum seal with a surface of the first flex circuit board 614. Additionally, the hermetic seal 652 may include one or more seal slots configured to receive the mating seal and / or the first flex circuit board 614. For example, the mating seal may form a vacuum seal with the seal slot while allowing the first flex circuit board 614 to pass through the seal slot and into the vacuum chamber. In this manner, the flex circuit board 606 may enter the vacuum chamber without experiencing signal disruption due to circuit board breakage, as the board may enter the vacuum chamber continuously. In some embodiments, the hermetic seal 652 may include a fastening system that secures the mating seal to the seal slot and / or forms a vacuum seal, such as, for example, screws, bolts, seal rings, O-rings, etc. In some embodiments, the hermetic seal 652 may form a vacuum seal without the need for adhesive materials (e.g., glue, resin, etc.), such that, for example, residual adhesive materials do not contaminate the flex circuit board 606.

[0057] The first flex circuit board 614 can be coupled to at least one second flex circuit board 616. The first flex circuit board 614 can be coupled to the second flex circuit board 616 by at least one flex-flex interconnect 634. For example, the flex-flex interconnect 634 can couple (structurally and / or electrically) a ground layer, a dielectric layer, and / or a signal line of the first flex circuit board 614 to the second flex circuit board 616. By way of example, the flex-flex interconnect 634 can be formed by soldering, welding, and / or fusing components of the first flex circuit board 614 to the second flex circuit board 616. The flex-flex interconnect 634 can be or include any suitable interconnection of the two flex circuit boards 606, such as a butt joint, an overlap joint, and / or any other suitable interconnection. For example, an exemplary flex-flex interconnect that may be employed in accordance with exemplary aspects of the present disclosure is illustrated in FIG.

[0058] The second flex circuit board 616 may have a different material composition than at least the first flex circuit board 614. In some embodiments, the second flex circuit board 616 may be or include a second flex circuit board material in the ground layer and / or signal lines. The second flex circuit board material may be selected to provide high signal transfer performance characteristics and / or reduced thermal conductivity. By way of example, the second flex circuit board material may be or include a copper alloy and / or other suitable material having desirable thermal properties. For example, the second flex circuit board 616 may include a copper alloy signal line and / or ground layer to reduce thermal conductivity from the top of the vacuum chamber (e.g., the first circuit board 614) and / or to dissipate heat generated in subsequent components such as the surface mounted attenuator 654.

[0059] In some embodiments, the second flex circuit board 616 can be coupled to at least one surface mount attenuator board 618. For example, the second flex circuit board 616 can be coupled to the surface mount attenuator board 618 by at least one flex-flex interconnect 636. For example, the flex-flex interconnect 636 can couple (structurally and / or electrically) a ground layer, a dielectric layer, and / or a signal line of the second flex circuit board 616 to the surface mount attenuator board 618. By way of example, the flex-flex interconnect 636 can be formed by soldering, welding, and / or fusing components of the second flex circuit board 616 to the surface mount attenuator board 618. The flex-flex interconnect 636 can be or include any suitable interconnection of the two flex circuit boards 606, such as a butt joint, an overlap joint, and / or any other suitable interconnection. For example, an exemplary flex-flex interconnect that may be employed in accordance with exemplary aspects of the present disclosure is illustrated in FIG.

[0060] The surface mount attenuator substrate 618 may be a flexible printed circuit board. In some embodiments, the surface mount attenuator substrate 618 may be or include surface mount attenuator substrate material in the ground layer and / or signal lines. The surface mount attenuator substrate material may be selected to provide high signal transfer performance characteristics. By way of example, the surface mount attenuator substrate material may be or include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the surface mount attenuator substrate may include copper signal lines and / or ground layers to provide high signal transfer performance characteristics.

[0061] The surface mount attenuator substrate 618 may include one or more surface mount attenuators 654. The surface mount attenuators 654 may be configured to attenuate or block thermal photon interference. In some embodiments, the surface mount attenuator substrate 618 and / or the surface mount attenuators 654 may be disposed at a sufficiently low temperature such that the surface mount attenuators 654 do not generate thermal photons. In some embodiments, the surface mount attenuators 654 may be disposed within an isolation plate. The isolation plate may be configured to isolate the one or more surface mount attenuators. The isolation plate may be attached to the surface mount attenuator substrate 618. In some embodiments, the isolation plate may be attached to a ground layer and / or grounded. The isolation plate may include one or more cavities configured to isolate a first surface mount attenuator from a second surface mount attenuator. For example, the cavity may surround the first surface mount attenuator in the direction of the second surface mount attenuator to block crosstalk between the attenuators.

[0062] The quantum computing system 600 may include at least one third flex circuit board 620. For example, the surface mount attenuator substrate 618 may be coupled to the third flex circuit board 620 by at least one flex-flex interconnect 638. For example, the flex-flex interconnect 638 may couple (structurally and / or electrically) a ground layer, a dielectric layer, and / or a signal line of the surface mount attenuator substrate 618 to the third flex circuit board 620. By way of example, the flex-flex interconnect 638 may be formed by soldering, welding, and / or fusing components of the surface mount attenuator substrate 618 to the third flex circuit board 620. The flex-flex interconnect 638 may be or include any suitable interconnection of the two flex circuit boards 606, such as a butt joint, an overlap joint, and / or any other suitable interconnection. For example, an exemplary flex-flex interconnect that may be employed in accordance with exemplary aspects of the present disclosure is illustrated in FIG.

[0063] The third flex circuit board 620 can be placed at a point within the vacuum chamber where the cooling gradient is cold enough for some materials to exhibit superconductivity. For example, at least a portion of the third flex circuit board 620 can have a temperature below about 3 Kelvin.

[0064] In some embodiments, the third flex circuit board 620 may be or include the material of the third flex circuit board in the ground layer and / or signal lines. The material of the third flex circuit board 620 may be selected to be superconducting at a temperature at which at least a portion of the third flex circuit board 620 experiences superconductivity. By way of example, the material of the third flex circuit board 620 may be or include niobium, tin, aluminum, and / or other suitable superconducting materials. For example, the third flex circuit board 620 may include copper plated niobium signal lines and / or ground layers to provide superconductivity. For example, copper plating on a copper plated niobium substrate may be useful for interfacing with superconducting niobium that may provide improved signal transfer characteristics. In some embodiments, the copper plated niobium substrate may be formed by first applying a layer of niobium, then a thin layer of copper to prevent oxide formation, then a thicker layer of copper.

[0065] In some embodiments, the third flex circuit board 620 may be coupled to at least one fourth flex circuit board 622. The third flex circuit board 620 may be coupled to the fourth flex circuit board 622 by at least one flex-flex interconnect 640. For example, the flex-flex interconnect 640 may couple (structurally and / or electrically) a ground layer, a dielectric layer, and / or a signal line of the third flex circuit board 620 to the fourth flex circuit board 622. By way of example, the flex-flex interconnect 640 may be formed by soldering, welding, and / or fusing components of the third flex circuit board 620 to the fourth flex circuit board 622. The flex-flex interconnect 640 may be or include any suitable interconnection of the two flex circuit boards 606, such as a butt joint, an overlap joint, and / or any other suitable interconnection. For example, an exemplary flex-flex interconnect that may be employed in accordance with exemplary aspects of the present disclosure is illustrated in FIG.

[0066] A fourth flex circuit board 622 can couple the third flex circuit board 620 to the quantum hardware 604. For example, a connector 642 on an end of the fourth flex circuit board 622 can be attached to a port in signal communication with the quantum hardware 604. By way of example, the connector can be a T-junction connector, such as a T-junction connector including a superconducting material (e.g., tin). Additionally and / or alternatively, the connector 642 can be a planar spring array.

[0067] In some embodiments, the fourth flex circuit board 622 may be or include a fourth flex circuit board material for the ground layer and / or signal lines. The fourth flex circuit board 622 material may be selected to provide high signal transmission performance characteristics. By way of example, the fourth flex circuit board 622 material may be or include copper, brass, gold, and / or other suitable materials having high signal transmission performance characteristics. For example, the fourth flex circuit board 622 may include copper signal lines and / or ground layers to provide high signal transmission performance characteristics. Additionally and / or alternatively, the fourth flex circuit board 622 material may be selected to be superconducting at a temperature experienced by at least a portion of the fourth flex circuit board 622. By way of example, the fourth flex circuit board 622 material may be or include niobium, tin, aluminum, and / or other suitable superconducting materials.

[0068] In some embodiments, the fourth flex circuit board 622 may be or include a filter 656, such as an XYZ and / or IR filter 656. For example, the filter 656 may be configured to reduce the effects of noise, thermal photons, and / or other potential interference sources. As an example, the filter 656 may include a cavity in the fourth flex circuit board 622 filled with a filter material, such as a particulate suspension, to provide XYZ / IR filtering. In some examples, the filter material may provide less attenuation for signals at a first frequency and more attenuation for signals at a second, higher frequency. For example, some filter materials provide substantially monotonically increasing attenuation with increasing signal frequency for at least a portion of a target frequency band. In some embodiments, aspects of the filter material may be configured for low-pass and / or band-pass operation.

[0069] In some embodiments, the filter 656 can be bounded by one or more boundaries of a cavity (e.g., a cavity in a dielectric material) in the fourth flex circuit board 622. For example, the cavity in the fourth flex circuit board 622 can be filled with a filter material (e.g., a magnetically loaded polymer). In some embodiments, the cavity can be filled (e.g., partially or completely) with the filter material via an access in the fourth flex circuit board 622 if the filter material is in any pourable, injectable, and / or moldable state (e.g., flowing particles, soft / plasticized material, gel, slurry, paste, foam, uncured thermoset, softened / molten thermoplastic, etc.). In some embodiments, the cavity can be filled with the filter material in a substantially solid state (e.g., by pressing into the cavity, etc.).

[0070] In one example, the control pulses may be transmitted over one or more signal lines (e.g., signal lines 116, 126). For example, the control pulses may be transmitted by one or more classical processors coupled to the signal lines. The control pulses may be or include classical (e.g., binary) computer-readable signal data, such as a voltage signal, and / or a signal implementable by a quantum computing device.

[0071] In one example, a control pulse is sent via a signal line to one or more quantum computing devices. For example, the control pulse may be sent by the signal line through multiple cryogenic cooling stages. For example, the signal line carrying the control pulse may be gradually cooled through multiple cryogenic cooling stages from a classical processor (e.g., at room temperature and / or a temperature of about 100 Kelvin) to a quantum computing device (e.g., at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, such as less than about 20 milliKelvin).

[0072] In one example, the control pulses may be applied to perform at least one quantum operation based at least in part on the control pulses. As an example, in some embodiments, the quantum operation may be or may include obtaining a state measurement of the quantum computing device. For example, the control pulses may instruct the quantum computing device to measure a quantum state and / or to decompose the quantum state into a basis state representation. Further, the measured quantum state may be transmitted (e.g., by a signal line) to a classical processor.

[0073] As another example, in some embodiments, the quantum operation may be or may include performing at least one quantum gate operation by and / or in a quantum computing device. For example, a control pulse may represent a microwave pulse applied to a quantum computing device (e.g., a qubit) to perform a quantum gating operation. Exemplary quantum gating operations include, but are not limited to, a Hadamard gate, a controlled NOT (CNOT) gate, a controlled phase gate, a T-gate, a multi-qubit quantum gate, a coupler quantum gate, and the like.

[0074] The implementations of the digital and / or quantum subject matter, and digital function operations and quantum operations described in this specification may be implemented in digital electronic circuitry, suitable quantum circuitry, including the structures disclosed herein and their structural equivalents, or, more generally, in quantum computing systems in tangibly implemented digital and / or quantum computer software or firmware, digital and / or quantum computer hardware, or one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0075] Implementations of the digital and / or quantum subject matter described in this disclosure may be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded in a tangible, non-transitory storage medium for execution by or to control the operation of a data processing apparatus. The digital and / or quantum computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or one or more combinations thereof. Alternatively or additionally, the program instructions may be encoded in an artificially generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information that is generated to encode the digital and / or quantum information for transmission to a suitable receiving device for execution by a data processing apparatus.

[0076] The terms quantum information and quantum data refer to information or data carried by, held in, or stored in a quantum system, with the smallest important system being a qubit, i.e., a system that defines a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be adequately approximated as a two-level system in the corresponding context. Such quantum systems may include, for example, multi-level systems having more than two levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis states are identified with the ground state and the first excited state, but it is understood that other setups are possible in which the computational states are identified with higher-level excited states (e.g., qudits).

[0077] The term "data processing apparatus" generally refers to digital and / or quantum data processing hardware and includes any kind of apparatus, device, and machine for processing digital and / or quantum data, including, by way of example, a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or a plurality of digital and quantum processors or computers, and combinations thereof. The apparatus may also be or further include special-purpose logic circuits, such as, for example, an FPGA (field programmable gate array), or an ASIC (application specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus designed to simulate or generate information about a particular quantum system. In particular, a quantum simulator is a special-purpose quantum computer that does not have the capability to perform universal quantum computations. In addition to the hardware, the apparatus may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code constituting a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0078] A digital computer program, which may also be referred to or described as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted, or declarative or procedural, and may be deployed in any form, such as as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted, or declarative or procedural, and may be converted to a suitable quantum programming language or written in a quantum programming language such as Quantum Computation Language (QCL), Quipper, Cirq, etc.

[0079] A digital and / or quantum computer program may correspond to a file in a file system, but this is not necessarily the case. A program may be stored in part of a file that holds other programs or data. For example, it may be stored in one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple coordinated files, e.g., files that store one or more modules, subprograms, or portions of code. A digital and / or quantum computer program may be deployed to be executed on one digital or one quantum computer, or on multiple digital and / or quantum computers located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems such as qubits. In general, a digital data communication network cannot transmit quantum data, but a quantum data communication network can transmit both quantum data and digital data.

[0080] The processes and logic flows described herein may, as appropriate, be performed by one or more programmable digital and / or quantum computers executing one or more digital and / or quantum computer programs operating on one or more digital and / or quantum processors to perform functions by manipulating input digital and quantum data and generating outputs. The processes and logic flows may also be performed by, and an apparatus may be implemented as, special purpose logic circuitry, such as an FPGA or ASIC, or a quantum simulator, or a combination of special purpose logic circuitry or a quantum simulator and one or more programmed digital and / or quantum computers.

[0081] A system of one or more digital and / or quantum computers or processors being "configured" or "operable" to perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that, when in operation, causes the system to perform the operation or action. A system of one or more digital and / or quantum computer programs being configured to perform a particular operation or action means that the program or programs contain instructions that, when executed by a digital and / or quantum data processing device, cause such device to perform an operation or action. A quantum computer can receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.

[0082] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program may be based on a general-purpose or dedicated digital and / or quantum microprocessor or both, or on any other kind of central digital and / or quantum processing unit. In general, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from a read-only memory, a random access memory, or a quantum system suitable for transmitting quantum data, such as photons, or a combination thereof.

[0083] Some exemplary elements of a digital and / or quantum computer are a central processing unit for executing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory may be supplemented or incorporated by dedicated logic circuitry or a quantum simulator. In general, a digital and / or quantum computer also includes one or more mass storage devices for storing digital and / or quantum data, e.g., magnetic, magneto-optical, optical disks, or quantum systems suitable for storing quantum information, or is operatively coupled to receive digital and / or quantum data, or to transmit digital and / or quantum data, or both. However, a digital and / or quantum computer need not include such devices.

[0084] Digital and / or quantum computer readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, e.g., semiconductor memory devices such as EPROM, EEPROM, and flash memory devices, magnetic disks (such as internal hard disks and removable disks), magneto-optical disks, CD-ROM and DVD-ROM disks, quantum systems such as trapped atoms and electrons, etc. Quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, e.g., light-matter interfacing where light is used for transmission and matter is used to store and preserve the quantum properties of the quantum data, such as superposition and quantum coherence.

[0085] Control of the various systems described in this specification, or portions thereof, may be implemented in a digital and / or quantum computer program product stored on one or more non-transitory machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. Each of the systems described herein, or portions thereof, may be implemented as an apparatus, method, or electronic system that may include one or more digital and / or quantum processing devices and memory for storing executable instructions for performing the operations described in this specification.

[0086] Although the present disclosure includes many example implementation details, these should not be construed as limitations on the scope of the claims, but rather as descriptions of features that may be specific to a particular implementation. Certain features described in the examples of the present disclosure in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, although features may be described above as acting in a particular combination, and may even be initially claimed as such, one or more features from a claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0087] Similarly, although operations are shown in the figures in a particular order, this should not be understood as requiring that such operations be performed in the particular order or sequential order shown, or that all of the operations shown be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above implementations should not be understood as requiring such separation in all implementations, and it should be understood that the program components and systems described may generally be integrated into a single software product or packaged into multiple software products.

[0088] Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. [Explanation of symbols]

[0089] 100 overlap joint interconnect 110 First flex circuit board 112, 122 ground layer 114, 124 Dielectric layer 116, 126 signal lines 118, 128 Via 119, 129 gap 120 Second flex circuit board 132 Signal Pad 134 Ground Pad 200, 300 flex circuit board 302, 304 solder 400 ways 500, 600 Quantum Computing System 502, 604 Quantum Hardware 504, 602 Classical Processors 506 Physical Control Parameters 508 Measurement results 510 Quantum Systems 512 Control device 514 Readout resonator 606 flex circuit board 607 Cap 608 Chamber Mount 612 Classical signal transmission media (coaxial cable) 614 First flex circuit board 616 Second flex circuit board 618 Surface Mount Attenuator Board 620 3rd flex circuit board 622 4th flex circuit board 632 Classic Flex Interconnects 634, 636, 638, 640 Flex-Flex Interconnects 642 Connector 652 Airtight Seal 654 Surface Mount Attenuator

Claims

1. 1. An interconnect for connecting a plurality of flex circuit boards, comprising: a first flex circuit board having a first side and a second side opposite the first side; a second flex circuit board having a third side and a fourth side opposite the third side; Equipped with the first flex circuit board and the second flex circuit board are physically coupled to one another at an overlap joint where a portion of the second side of the first flex circuit board overlaps a portion of the third side of the second flex circuit board; The first flex circuit board comprises: A first signal line; A first dielectric layer; a first via extending through the first dielectric layer from at least the first signal line to the second side of the first flex circuit board; Including, The second flex circuit board comprises: A second signal line; A second dielectric layer; and a second via extending through the second dielectric layer from at least the second signal line to the third side of the second flex circuit board; Including, the interconnect further includes a signal pad structure disposed at the overlap joint between the second side of the first flex circuit board and the third side of the second flex circuit board and electrically coupled to the first via and the second via; the first signal line and the second signal line include a superconducting material that achieves superconductivity at a temperature less than 3 Kelvin; Interconnect.

2. 2. The interconnect of claim 1, further comprising: a first signal pad of the first flex circuit board electrically coupled to the first via; a second signal pad of the second flex circuit board electrically coupled to the second via; and solder electrically and physically coupling the first signal pad to the second signal pad.

3. The interconnect of claim 2 , wherein the first signal pad and the second signal pad have a circular configuration.

4. The interconnect of claim 1 , wherein the first via does not extend to the first side.

5. The interconnect of claim 1 , wherein the first via extends from the second side to the first side.

6. The interconnect of claim 1 , wherein the second via does not extend to the fourth side.

7. The interconnect of claim 1 , wherein the second via extends from the fourth side to the third side.

8. 2. The interconnect of claim 1, wherein the first flex circuit board includes a first ground layer and a second ground layer, and the second flex circuit board includes a third ground layer and a fourth ground layer, the second ground layer being coupled to the third ground layer by one or more solder connections.

9. The interconnect of claim 1 , wherein the second flex circuit board is stacked symmetrically with the first flex circuit board.

10. The interconnect of claim 2 , wherein the interconnect comprises one or more ground pads disposed at least partially around the first signal pad.

11. 1. A method for manufacturing a flex circuit board interconnect, comprising: obtaining a first flex circuit board, the first flex circuit board having a first side and a second side, the first flex circuit board comprising a first signal line and a first via extending from at least the first signal line through a first dielectric to a second side of the first flex circuit board; obtaining a second flex circuit board, the second flex circuit board having a third side and a fourth side, the second flex circuit board comprising a second signal line and a second via extending from at least the second signal line through a second dielectric to a third side of the second flex circuit board; aligning the first flex circuit board and the second flex circuit board such that a signal pad structure is disposed at an overlap joint between the second side of the first flex circuit board and the third side of the second flex circuit board; coupling at least the first via and at least the second via in the signal pad structure; Including, The method, wherein the first signal wire and the second signal wire comprise a superconducting material that achieves superconductivity at a temperature less than 3 Kelvin.

12. 12. The method of claim 11, wherein coupling at least the first via and the second via in the signal pad structure comprises coupling the first via and the second via using solder.

13. The method of claim 11 , wherein the first via does not extend to the first side.

14. The method of claim 11 , wherein the first via extends from the second side to the first side.

15. The method of claim 11 , wherein the second via does not extend to the fourth side.

16. The method of claim 11 , wherein the second via extends from the fourth side to the third side.

17. The method of claim 11 , further comprising coupling a ground layer of the first flex circuit board to a ground layer of the second flex circuit board via a solder connection.

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