Multilayer Ceramic Capacitors

Abstract

Provided is a laminated ceramic capacitor having a long high-temperature load life and superior reliability. This laminated ceramic capacitor comprises: an element part that has a first main surface and second main surface opposing each other in the thickness direction, a first side surface and second side surface opposing each other in the width direction, and a first end surface and second end surface opposing each other in the length direction, the element part including a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated in the thickness direction; and a pair of external electrodes that are respectively provided on the first end surface and second end surface and that are electrically connected to the plurality of internal electrode layers. The dielectric ceramic layer includes crystal particles formed by a perovskite oxide containing an A site element and a B site element. The dielectric ceramic layer contains, as crystal particles, {100}-particles having a {100}-plane of a perovskite structure observed when a cross section of the dielectric ceramic layer is observed using a scanning transmission electron microscope (S-TEM). When subjected to composition analysis with energy-dispersive X-ray spectroscopy (EDX), the {100}-particles have, at one or more atomic positions inside the particles, an atomic distribution region in which the difference (Δc=cmax-c) from the maximum concentration (cmax) of the concentration (c) of the A site element or B site element is 2 atm% or lower, and the area (SΔc≤2%) of the atomic distribution region is 0.050 nm2 or lower.

Description

[Technical field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] As electronic devices such as mobile phones become smaller and CPU speeds increase, the demand for multilayer ceramic capacitors (MLCCs) is increasing. Multilayer ceramic capacitors have a structure in which dielectric ceramic layers and internal electrode layers are alternately stacked, and due to the thinned high-permittivity dielectric ceramic layers, they have a large capacitance despite their small size. There are known multilayer ceramic capacitors made of various materials, but those that use barium titanate (BaTiO3)-based compounds for the dielectric ceramic layers and base metals such as nickel (Ni) for the internal electrode layers are widely used because they are inexpensive and exhibit high performance.

[0003] In order to realize miniaturization and high capacitance of multilayer ceramic capacitors, it is important to make the dielectric ceramic layers thinner. However, as the dielectric ceramic layers are made thinner, the insulation resistance life between the internal electrode layers is shortened, which leads to a decrease in reliability. To address this issue, a technology has been proposed that adds additives such as rare earth elements (RE) and magnesium (Mg) to the dielectric ceramic layers made of BaTiO3-based compounds to extend the insulation resistance life and improve reliability.

[0004] For example, Patent Document 1 discloses a dielectric ceramic composition that contains a main component represented by a specific composition formula, which comprises barium titanate, at least one selected from europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, erbium oxide, thulium oxide, and ytterbium oxide, barium zirconate, magnesium oxide, and manganese oxide (claim 1 of Patent Document 1). It also describes that by applying the ceramic composition to a dielectric ceramic layer of a multilayer ceramic capacitor whose internal electrodes are made of nickel or a nickel alloy, a capacitor can be obtained that has a high product of insulation resistance and capacitance (CR product), high dielectric strength, and excellent weather resistance such as high temperature load and humidity load when used at high electric field strength (claim 4 and

[0007] of Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 3334607 Summary of the Invention [Problem to be solved by the invention]

[0006] Thus, it has been proposed to improve the reliability of multilayer ceramic capacitors by adding additives such as rare earth elements (RE) to the dielectric ceramic layers. Although such conventional methods have been effective to a certain extent, there is still room for improvement.

[0007] The present inventors have conducted intensive research in view of these problems, and as a result, in a multilayer ceramic capacitor including a dielectric ceramic layer containing a perovskite type oxide as a main component and an internal electrode layer, the inventors have found that by focusing on a distribution region occupied by atoms contained in the perovskite type oxide and controlling this distribution region, it is possible to extend the high temperature load life of the dielectric ceramic layer, and as a result, it is possible to improve the reliability of the multilayer ceramic capacitor.

[0008] The present invention has been completed based on these findings, and an object of the present invention is to provide a multilayer ceramic capacitor which has a long high-temperature load life and excellent reliability. [Means for solving the problem]

[0009] The present invention encompasses the following aspects. In this specification, the expression "to" includes both ends of the expression. In other words, "X to Y" is synonymous with "X or more and Y or less."

[0010] According to one aspect of the present invention, a piezoelectric vibrator includes a first main surface and a second main surface facing each other in a thickness direction, a first side surface and a second side surface facing each other in a width direction, and a first end surface and a second end surface facing each other in a length direction, a multilayer ceramic capacitor comprising: a body portion including a plurality of dielectric ceramic layers and a plurality of internal electrode layers stacked in the thickness direction; and a pair of external electrodes provided on the first end face and the second end face, respectively, and connected to the plurality of internal electrode layers, the dielectric ceramic layer includes crystal grains composed of a perovskite oxide including an A-site element and a B-site element; the dielectric ceramic layer contains {100} grains as crystal grains in which {100} faces of a perovskite structure are observed when a cross section of the dielectric ceramic layer is observed using a scanning transmission electron microscope (S-TEM); When the composition of the {100} grains is analyzed by energy dispersive X-ray spectroscopy (EDX) in the cross section, the {100} grains have a maximum concentration (c max ) from (Δc=c max -c) has an atomic distribution region of 2 atm% or less, and the area of ​​the atomic distribution region (S Δc≦2% ) is 0.050 nm 2 The following multilayer ceramic capacitor is provided: Effect of the Invention

[0011] According to the present invention, there is provided a multilayer ceramic capacitor having a long high-temperature load life and excellent reliability. [Brief description of the drawings]

[0012] [Figure 1] FIG. 2 is a perspective view showing the outer shape of the multilayer ceramic capacitor. [Diagram 2] 1 is a cross-sectional view that illustrates a schematic internal structure of a multilayer ceramic capacitor. [Diagram 3] 1 is a cross-sectional view that illustrates a schematic internal structure of a multilayer ceramic capacitor. [Figure 4] The unit cell of a perovskite-type oxide crystal is shown. [Diagram 5] This shows a HAADF image of a cross section of a dielectric ceramic layer. [Figure 6] This shows a HAADF image of a cross section of a dielectric ceramic layer. [Figure 7] 1 is a graph showing positional variations in Ba concentration and Ti concentration in a {100} particle cross section. [Figure 8] 13 is a graph showing the positional variation of the Ba concentration difference for one grid. [Figure 9] 13 is a graph showing the positional variation of the Ti concentration difference for one grid. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] A specific embodiment of the present invention (hereinafter, referred to as the present embodiment) will be described. Note that the present invention is not limited to the following embodiment, and various modifications are possible within the scope of the present invention.

[0014] (1) Multilayer ceramic capacitors The multilayer ceramic capacitor of this embodiment has a first main surface and a second main surface opposed to each other in the thickness direction, a first side surface and a second side surface opposed to each other in the width direction, and a first end surface and a second end surface opposed to each other in the length direction, and includes a body portion including a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated in the thickness direction, and a pair of external electrodes provided on the first end surface and the second end surface, respectively, and connected to the plurality of internal electrode layers. In this multilayer ceramic capacitor, the dielectric ceramic layers include crystal grains composed of perovskite oxides including A-site elements and B-site elements. When a cross section of the dielectric ceramic layer is observed using a scanning transmission electron microscope (S-TEM), the dielectric ceramic layer includes, as crystal grains, {100} grains in which {100} planes of a perovskite structure are observed. Furthermore, when a composition analysis of the {100} grains is performed on the cross section using an energy dispersive X-ray analysis (EDX) method, the {100} grains have a maximum concentration (c max ) from (Δc=c max -c) has an atomic distribution region of 2 atm% or less, and the area of ​​this atomic distribution region (S Δc≦2% ) is 0.050 nm 2 The following is the result.

[0015] One embodiment of the multilayer ceramic capacitor will be described with reference to Figs. 1 to 3. Fig. 1 is a perspective view showing the external shape of the multilayer ceramic capacitor. Figs. 2 and 3 are cross-sectional views showing the internal structure of the multilayer ceramic capacitor. The multilayer ceramic capacitor (100) comprises an element body (6) including a plurality of laminated dielectric ceramic layers (2) and a plurality of internal electrode layers (4), and a pair of external electrodes (8a, 8b) provided on both end faces (14a, 14b) of the element body (6). The multilayer ceramic capacitor (100) and the element body (6) have a substantially rectangular parallelepiped shape. The term "substantially rectangular parallelepiped" includes not only rectangular parallelepipeds but also rectangular parallelepipeds with rounded corners and / or edges. The multilayer ceramic capacitor (100) and the element part (6) have a first main surface (10a) and a second main surface (10b) facing in a thickness direction T, a first side surface (12a) and a second side surface (12b) facing in a width direction W, and a first end surface (14a) and a second end surface (14b) facing in a length direction L. Here, the thickness direction T refers to the direction in which the multiple dielectric ceramic layers (2) and the multiple internal electrode layers (4) are stacked. The length direction L refers to the direction perpendicular to the end surfaces (14a, 14b) on which the external electrodes (8a, 8b) are provided. The width direction W is a direction perpendicular to the thickness direction T and the length direction L. A surface including the thickness direction T and the width direction W is defined as a WT surface, a surface including the width direction W and the length direction L is defined as an LW surface, and a surface including the length direction L and the thickness direction T is defined as an LT surface.

[0016] The external electrodes (8a, 8b) are composed of a first external electrode (8a) provided on the first end surface (14a) and a second external electrode (8b) provided on the second end surface (14b). The first external electrode (8a) may extend not only to the first end surface (14a) but also to parts of the first main surface (10a), the second main surface (10b), the first side surface (12a), and the second side surface (12b). The second external electrode (8b) may extend not only to the second end surface (14b) but also to parts of the first main surface (10a), the second main surface (10b), the first side surface (12a), and the second side surface (12b). However, the first external electrode (8a) and the second external electrode (8b) are not in contact with each other and are electrically separated from each other.

[0017] The internal electrode layer (4) is composed of a plurality of first internal electrode layers (4a) and a plurality of second internal electrode layers (4b). The first internal electrode layer (4a) extends to a first end face (14a) and is electrically connected to a first external electrode (8a) at that point. The second internal electrode layer (4b) extends to a second end face (14b) and is electrically connected to a second external electrode (8b) at that point. The first internal electrode layer (4a) and the second internal electrode layer (4b), which face each other across the dielectric ceramic layer (2), are not electrically connected. Therefore, when a voltage is applied between the first internal electrode layer (4a) and the second internal electrode layer (4b) via the external electrodes (8a, 8b), electric charges are accumulated. The accumulated electric charges generate electrostatic capacitance, which causes the function of a capacitive element to be realized.

[0018] The dimensions of the multilayer ceramic capacitor 100 are not particularly limited, but are preferably such that the length L is 0.2 mm to 1.2 mm, the width W is 0.1 mm to 0.7 mm, and the stacking direction T is 0.1 mm to 0.7 mm.

[0019] <Dielectric ceramic layer> The dielectric ceramic layer includes crystal grains. These crystal grains are the particles (main crystal grains) that are the main component of the dielectric ceramic layer, and are composed of perovskite oxides that include A-site elements and B-site elements. That is, the dielectric ceramic layer is a sintered polycrystalline body that includes perovskite oxides as the main component. Perovskite oxides have a composition represented by the general formula: ABO3, and have a crystal structure similar to a cubic crystal, such as a cubic crystal, a tetragonal crystal, an orthorhombic crystal, and a rhombohedral crystal, at room temperature. Also, the atoms of the A-site elements (hereinafter, "A-site atoms") and the atoms of the B-site elements (hereinafter, "B-site atoms") are ionized and occupy the A-site and B-site of the perovskite structure, respectively. Examples of the A-site elements include elements with a relatively large ion size, such as barium (Ba), calcium (Ca), and strontium (Sr), and examples of the B-site elements include elements with a relatively small ion size, such as titanium (Ti), zirconium (Zr), and hafnium (Hf).

[0020] The crystal structure of perovskite oxide is shown in Fig. 4. Ti 4+ The ionized B-site atoms (hereafter referred to as "B-site ions") occupy the body-center positions of the unit cell, and six oxygen ions (O 2- ) and Ba 2+ Ionized A-site atoms (hereinafter referred to as "A-site ions") such as these occupy the eight corners of the unit cell. Displacement of the positively charged A-site ions and / or B-site ions generates dielectric polarization, which results in paraelectric or ferroelectric properties at room temperature. In this specification, ionized atoms (ions) may be simply referred to as "atoms."

[0021] The combination of the A-site elements and the B-site elements is not particularly limited as long as the perovskite structure is maintained. Each of the A-site elements and the B-site elements may contain only one type of element or may contain a combination of multiple elements. Furthermore, the content of the perovskite oxide in the dielectric ceramic layer may be 50 mass% or more, 60 mass% or more, 70 mass% or more, 80 mass% or more, or 90 mass% or more.

[0022] Preferably, the A-site element includes barium (Ba) and the B-site element includes titanium (Ti). That is, the perovskite oxide may be a barium titanate (BaTiO3)-based compound. BaTiO3 has a large spontaneous polarization at room temperature. Therefore, it is a ferroelectric material that exhibits a high dielectric constant. Therefore, by using a BaTiO3-based compound as the main component, it is possible to further increase the capacitance of the capacitor. Note that the BaTiO3-based compound includes not only BaTiO3 but also BaTiO3 in which a part of Ba in BaTiO3 is replaced with other A-site elements such as Sr and / or Ca, or Ba in BaTiO3 is replaced with other B-site elements such as Zr and / or Hf. However, the proportion of Ba in the A-site elements is preferably 70% or more, more preferably 80% or more, and even more preferably 90% or more, in terms of molar ratio. The proportion of Ti in the B-site elements is preferably 70% or more, more preferably 80% or more, and even more preferably 90% or more, in terms of molar ratio. The A-site elements do not have to include any components other than Ba ​​and inevitable impurity elements, and the B-site elements do not have to include any components other than Ti and inevitable impurity elements. Here, inevitable impurities are components that are inevitably mixed in during the manufacturing process.

[0023] The dielectric ceramic layer may contain other components as additive components other than the main components. The additive components include, but are not limited to, rare earth elements (RE), manganese (Mn), magnesium (Mg), silicon (Si), aluminum (Al), and vanadium (V). The rare earth elements (RE) are a general term for elements that constitute a group consisting of scandium (Sc) with atomic number 21, yttrium (Y) with atomic number 39, and lanthanum (La) with atomic number 57 to lutetium (Lu) with atomic number 71 in the periodic table. As the rare earth element (RE), one or more elements selected from the group consisting of yttrium (Y), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu) are preferred, with dysprosium (Dy) being particularly preferred. The form of the added component is not limited. It is sufficient that it is contained in either the crystal grains, the grain boundaries, or the triple points. When contained in the crystal grains, it may occupy the A site of the perovskite oxide (ABO3), it may occupy the B site, or it may occupy both sites simultaneously.

[0024] In the multilayer ceramic capacitor of this embodiment, the dielectric ceramic layer contains {100} grains as crystal grains. Here, the {100} grains are crystal grains in which the {100} plane of the perovskite structure is observed in at least a part of the cross section of the dielectric ceramic layer when observed using a scanning transmission electron microscope (S-TEM). That is, some or all of the crystal grains are {100} grains. In addition, in the {100} grains, the {100} plane may be observed in at least a part of the region. The cross section is a plane including the thickness direction, that is, the lamination direction of the dielectric ceramic layer and the internal electrode layer. The cross section can also be said to be a plane whose perpendicular line is perpendicular to the thickness direction, for example, the LT plane or the WT plane. Furthermore, the {100} plane is a crystal lattice plane represented by Miller indices, and includes six planes: the (100) plane, the (010) plane, the (001) plane, the (-100) plane, the (0-10) plane, and the (00-1) plane.

[0025] A scanning transmission electron microscope (S-TEM) is a device that scans a focused micro-probe over a sample and converts the transmitted electrons into a brightness signal to observe the microstructure. Recent advances in equipment have improved the spatial resolution to 50 pm or less, and the detection sensitivity has also become capable of capturing single-atom levels. In S-TEM, various images can be observed using electrons scattered from a sample. Among these images, an annular dark-field (ADF) image is obtained by detecting electrons with a scattering angle larger than the convergence angle of the incident probe using a circular detector. Among ADF images, an image with a particularly large scattering angle is a high-angle annular dark-field (HAADF) image. Since the intensity of the HAADF depends on the atomic number Z, the HAADF image has excellent element identification ability. Therefore, by analyzing the HAADF image in particular, the position information of elements can be evaluated with high precision.

[0026] The presence or absence and the ratio of {100} grains can be examined by obtaining ADF images, HAADF images and / or electron beam diffraction patterns for the central parts of the crystal grains constituting the dielectric ceramic layer and analyzing them. Specifically, an ADF image or HAADF image for the central part of a specific grain is obtained by the nano beam electron diffraction (NBD) method during S-TEM observation. If the {100} plane based on the arrangement of atoms constituting the perovskite oxide is observed in this image, the grain can be determined to be a {100} grain. Alternatively, an electron beam diffraction pattern can be obtained by the NBD method, and if only a periodic pattern based on the {100} plane is present in this electron beam diffraction pattern, the grain can be determined to be a {100} grain.

[0027] S-TEM observation is performed on a cross section including the thickness direction of the dielectric ceramic layer. More specifically, it is preferable to observe a region located at the center of the length direction (L direction) of the dielectric ceramic layer and at the center of a surface (WT surface) including the width direction (W direction) and thickness direction (T direction). Observation may be performed on a region with a field of view of 10 μm×10 μm or a region including 200 crystal grains. S-TEM observation is performed by fixing the microscope axis in a direction approximately perpendicular to the cross section of the dielectric ceramic layer and tilting the cross section of the dielectric ceramic layer within a range of ±5° in this state. Grains whose {100} planes are observed within this range (±5°) of tilt angle are defined as {100} grains. In short, grains whose {100} planes are exposed within a range of ±5° with respect to the perpendicular axis of the cross section of the dielectric ceramic layer are {100} grains.

[0028] The {100} grains will be described in more detail based on actual measurement results. FIG. 5 shows an example of a cross-sectional HAADF image of a {100} grain contained in the dielectric ceramic layer of the multilayer ceramic capacitor of this embodiment. This multilayer ceramic capacitor uses barium titanate (BaTiO3) for the dielectric ceramic layer. In FIG. 5, bright spots based on Ba and bright spots based on Ti are observed, and each of these bright spots forms a lattice-like atomic (ion) arrangement. The Ba bright spots also have a higher brightness than the Ti bright spots. This is because the atomic weight of Ba is larger than that of Ti.

[0029] In the multilayer ceramic capacitor of this embodiment, the {100} grain in the above-mentioned cross section has an atomic distribution region at one or more atomic positions within the grain, and the area (S Δc≦2% ) is 0.050 nm 2 Here, the atomic distribution region is a measure of the spread of the atomic position distribution centered on a lattice point. Specifically, it is a single region that exists within a unit cell centered on one lattice point in an ADF image or HAADF image, and in which the atomic concentration difference (Δc) of the A-site element or B-site element corresponding to this lattice point is 2 atm% or less. Here, the atomic concentration difference (Δc) is the maximum value (c) of the atomic concentration (c) of this element (A-site element or B-site element) within this unit cell. max ) from (c max -c).

[0030] In an ideal crystal, at absolute zero, atoms or ions exist only at the lattice points that they should occupy. However, at temperatures above absolute zero, phonons are generated, and atoms or ions undergo thermal vibration (lattice vibration) around the lattice points. In addition, in real crystals, defects such as lattice defects may occur, which may cause atoms to be positioned away from the lattice points. This is because the crystal field changes due to the defects. This causes the distribution of atomic positions to expand. In other words, when focusing on a unit cell centered on a certain lattice point, the concentration of atoms that should occupy this lattice point is maximum at the lattice point and decreases as it moves away from the lattice point. Therefore, if the size of the atomic distribution area can be quantitatively estimated, the expansion of the distribution of atomic positions can be evaluated.

[0031] The area of ​​the atomic distribution region (S Δc≦2% ) can extend the high-temperature load life of the multilayer ceramic capacitor, and as a result, it is possible to improve reliability. Although the details of the mechanism are unknown, it is speculated as follows. In other words, in real crystals, there are many lattice defects such as oxygen vacancies and atomic defects. In particular, since multilayer ceramic capacitors are manufactured by firing in a reducing atmosphere, it is believed that there are many oxygen vacancies in the dielectric ceramic layers contained therein. And it is believed that these oxygen vacancies are the cause of shortening the high-temperature load life of multilayer ceramic capacitors. In addition, if there are many lattice defects such as oxygen vacancies, it is believed that the position distribution of elements is expanded by causing lattice distortion, and as a result, the area of ​​the atomic distribution region is increased. In contrast, if the area of ​​the atomic distribution region is small, there will be fewer lattice defects and the high-temperature load life will be longer. The smaller the area of ​​the atomic distribution region, the more preferable it is. The area is 0.045 nm 2 Less than 0.040 nm is preferable. 2 Less than 0.035 nm is more preferable. 2 More preferably, 0.030 nm or less. 2 Particularly preferred is 0.023 nm or less. 2 The most preferable value is 0.001 nm or less. The lower limit is not particularly limited. For example, the area is 0.001 nm 2 That's all.

[0032] Atomic distribution region (S Δc≦2% ) will be described in more detail based on actual measurement results. FIG. 5 shows an example of a cross-sectional HAADF image of a {100} particle contained in the dielectric ceramic layer of the multilayer ceramic capacitor of this embodiment. FIG. 6 shows a cross-sectional HAADF image of a multilayer ceramic capacitor obtained by the conventional technology. Here, both the multilayer ceramic capacitors of this embodiment and the conventional technology use barium titanate (BaTiO3) in the dielectric ceramic layer. In both FIG. 5 and FIG. 6, bright spots based on Ba and bright spots based on Ti are observed, and these bright spots each form a lattice-like atomic (ion) arrangement. However, the bright spot size is small in the {100} particle of this embodiment, while the bright spot size is large in the {100} particle of the conventional technology. This is because in the {100} particle of this embodiment, the atomic distribution region of ionized Ba and Ti is concentrated near the lattice point, while in the {100} particle of the conventional technology, the lattice of Ba and Ti is distorted, and the atomic distribution region is expanded.

[0033] Next, the area of ​​the atomic distribution region (S Δc≦2% ) measurement method will be explained. Figure 7 shows the positional variation of Ba and Ti concentrations in a {100} particle cross section. This shows the atomic concentration obtained by composition analysis performed along a straight line on the {100} particle cross section by energy dispersive X-ray spectroscopy (EDX), as a function of position (distance). The Ba and Ti concentrations vary periodically. Also, reflecting the positions of Ba and Ti in the crystal, the Ti concentration is minimum at the position where the Ba concentration is maximum (peak), and the Ti concentration is maximum at the position where the Ba concentration is minimum.

[0034] Figure 8 shows the Ba concentration (c) in Figure 7 at the maximum (c max ) is taken as the origin, and the difference in Ba concentration (Δc=c max8 is a graph of Ba atom distribution region (Δc) for one lattice. In the {100} particle of this embodiment, the positional variation of the Ba concentration difference is sharp. In other words, the Ba concentration rapidly decreases as one moves away from the origin. In contrast, the Ba concentration difference is broad in the {100} particle of the prior art. This tendency reflects the size of the bright spot in the HAADF image. Therefore, in the graph of FIG. 8, the distance from the origin to the position where the Ba concentration difference (Δc) is 2 atm% is found, and the area of ​​a circle with the radius of this distance is calculated, and this can be used as the area of ​​the Ba atom distribution region (S Δc≦2% ) can be regarded as

[0035] Specifically, in the graph of FIG. 8, a line where the Ba concentration difference (Δc) is 2 atm% is drawn horizontally on the horizontal axis. Then, the distances from the vertical axis to the two points (points a and b) where this line intersects with the graph of the Ba concentration difference are read, and a and d b Then, the area of ​​the atomic distribution region (S Δc≦2% ) can be obtained.

[0036]

number

[0037] Preferably, in the above-mentioned cross section, i.e., in the cross section including the thickness direction of the dielectric ceramic layer, the number ratio of the {100} grains in the crystal grains is 4% or more. By increasing the ratio of the {100} grains, the dielectric constant of the dielectric ceramic layer can be increased. Although the details of the mechanism are unclear, it is believed that the orientation state of the crystal grains contained in the dielectric ceramic layer may be related. That is, in the crystals of the perovskite oxide that constitute the crystal grains, all six faces such as the (100) face that constitute the {100} face in the cubic crystal structure are equivalent. From this, when the number ratio of the {100} grains is estimated using the concept of solid angles when the crystal grains are randomly oriented, the ratio is only about 1.5%. Therefore, it can be said that a dielectric ceramic layer with a number ratio of the {100} grains of 4% or more has oriented crystal grains, and the ratio of the {100} grains is higher than that of a random orientation. It is believed that the C-axis orientation of BaTiO3 perpendicular to the internal electrodes increases the dielectric constant.

[0038] The higher the number ratio of {100} particles, the more preferable. The number ratio is preferably 10% or more, more preferably 15% or more, and even more preferably 20% or more. There is no particular upper limit to the number ratio.

[0039] Preferably, the {100} particle has an atomically ordered region in the above-mentioned cross section, and the average area ratio of the atomically ordered region is 10% or more in the cross section of the {100} particle. Here, the atomically ordered region refers to a region in which the atomic arrangement of the perovskite oxide, i.e., the regular arrangement of the A-site atoms and the B-site atoms, is observed in S-TEM observation. In the {100} particle, there is a region in which the {100} plane is observed in the center, i.e., the atomically ordered region, while there may be a non-atomically ordered region in which the {100} plane is not observed around it. Specifically, the {100} plane may be observed in the center, and the {100} plane may not be observed in the outer periphery. In the atomically ordered region, the regular arrangement of the A-site atoms and the B-site atoms constituting the perovskite oxide is observed, whereas in the non-atomically ordered region, the regular arrangement is not observed. This is because the lattice distortion of the A-site atoms and the B-site atoms constituting the perovskite oxide is particularly large in the non-atomically ordered region, which shows structural irregularity.

[0040] By increasing the proportion of the atomically ordered regions, the crystal distortion is reduced, and the reliability of the multilayer ceramic capacitor can be improved. The average area proportion of the atomically ordered regions is more preferably 20% or more, further preferably 30% or more, and particularly preferably 40% or more. There is no particular upper limit to the average area proportion. However, it is typically 50% or less.

[0041] The area ratio of the atomically ordered regions can be determined by the S-TEM observation described above. That is, for each {100} particle, an ADF image or HAADF image of the entire particle is obtained by the NBD method, and the region in which the atomic arrangement is observed in these images (atomic ordered regions) is determined. Then, the area ratio of the atomically ordered regions in the particle cross section is calculated, and the average value is taken as the average area ratio.

[0042] The thickness of the dielectric ceramic layer is preferably 1.0 μm or less, and more preferably 0.4 μm or less. By thinning the dielectric ceramic layer, it is possible to increase the capacitance of the multilayer ceramic capacitor. However, if the dielectric ceramic layer is made too thin, it becomes difficult to suppress the deterioration of the insulating properties. The thickness of the dielectric ceramic layer is typically 0.15 μm or more.

[0043] <Internal electrode layer> The internal electrode layer includes a conductive metal. As the conductive metal, known electrode materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing these may be used. However, from the viewpoint of cost reduction, base metals such as Ni and Cu are preferred, and Ni is particularly preferred. The internal electrode layer may include other components other than the conductive metal. As the other components, ceramic components acting as co-materials can be mentioned. As the ceramic components, perovskite oxides such as BaTiO3-based compounds included in the dielectric ceramic layer can be mentioned.

[0044] The thickness of the internal electrode layer is preferably 0.20 μm or more and 0.80 μm or less. By making the thickness of the internal electrode layer 0.20 μm or more, defects such as electrode discontinuity are suppressed. Furthermore, by making the thickness 0.80 μm or less, it is possible to suppress a decrease in the proportion of the dielectric ceramic layer in the capacitor and the resulting decrease in capacity. Furthermore, the number of layers of the internal electrode layer is preferably 15 to 700.

[0045] <External electrode> A known structure can be adopted as the external electrode. For example, the laminated structure may be composed of an underlayer, a first plating layer, and a second plating layer from the end face side of the multilayer ceramic capacitor. The underlayer contains metal such as nickel (Ni) or copper (Cu). It may also contain ceramic powder as a common material in addition to the metal. The first plating layer is, for example, a nickel (Ni) plating layer. The second plating layer is, for example, a tin (Sn) plating layer. A conductive resin layer may also be provided between the underlayer and the first plating layer. The conductive resin layer is a layer containing conductive metal particles such as copper (Cu), silver (Ag), and nickel (Ni), and a resin. The external electrode is not limited in its form as long as it is electrically connected to the internal electrode layer and functions as an external input / output terminal.

[0046] (2) Manufacturing method of multilayer ceramic capacitors The multilayer ceramic capacitor of the present embodiment is not limited in its manufacturing method as long as it satisfies the above-mentioned requirements. However, it is preferably manufactured by the following method. The preferred manufacturing method includes the following steps: a step of preparing a green sheet containing at least a dielectric material (green sheet preparation step), a step of applying a conductive paste to the surface of the green sheet to obtain a green sheet on which an internal electrode pattern is formed (electrode pattern formation step), a step of laminating and pressing a plurality of green sheets to obtain a laminated block (lamination step), a step of cutting the obtained laminated block to obtain a laminated chip (cutting step), a step of performing a binder removal process and a firing process on the obtained laminated chip to obtain an element part (firing step), and a step of forming an external electrode on the obtained element part (external electrode formation step). In addition, during the firing step, the laminated chip is subjected to a firing process while applying a pressure of 75 to 100 MPa in the thickness direction. Details of each step will be described below.

[0047] <Green sheet manufacturing process> In the green sheet preparation step, a green sheet containing at least a dielectric material is prepared. The green sheet is a precursor of the dielectric ceramic layer of the capacitor, and contains the main component material and the additive component material of the dielectric ceramic layer. The preparation of the green sheet may be performed by a known method, and is not particularly limited. The main component material is mixed with the additive component material to prepare a dielectric material, a binder and a solvent are added to and mixed with the obtained dielectric material to form a slurry, and the obtained slurry is molded into a green sheet.

[0048] As the main component raw material, powder of perovskite type oxide (ABO3) such as BaTiO3-based compound can be used. The perovskite type oxide powder may be synthesized by a known method such as a solid-phase reaction method, a hydrothermal synthesis method, or an alkoxide method. As the additive component raw material, known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides, and / or chelate compounds of additive components (RE, Mn, Mg, Si, Al, V, etc.) may be used.

[0049] The raw material mixing may be performed by a known method, for example, by wet mixing and grinding the weighed main component raw material and the additive component raw material together with grinding media and pure water using a ball mill. When the wet mixing is performed, the resulting mixture may be dried. The slurry may also be performed by a known method, and an organic binder and an organic solvent may be mixed into the dielectric raw material. As the organic binder, a known binder such as a polyvinyl butyryl binder may be used. As the organic solvent, a known solvent such as toluene or ethanol may be used. If necessary, an additive such as a plasticizer may be added to the slurry. Furthermore, the green sheet may be formed by a known method such as a doctor blade method or a lip method.

[0050] <Electrode pattern formation process> In the electrode pattern forming process, a conductive paste is applied to the surface of a green sheet to produce a green sheet with an internal electrode pattern. The internal electrode pattern becomes an internal electrode layer after firing. The conductive metal contained in the conductive paste may be a conductive material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or an alloy containing these. A ceramic component that acts as a co-material may also be added to the conductive paste. The main component raw material of the dielectric ceramic layer may be used as the ceramic component. The conductive paste may be applied by a known method such as screen printing or gravure printing.

[0051] <Lamination process> In the lamination process, a plurality of green sheets are laminated and pressed to produce a laminated block. At this time, green sheets on which an internal electrode pattern is formed are used, but some green sheets on which an internal electrode pattern is not formed may also be used. The lamination and pressing may be performed by a known method.

[0052] <Cutting process> In the cutting step, the obtained laminated block is cut to produce laminated chips. The cutting may be performed so that chips of a predetermined size are obtained and at least a part of the internal electrode pattern is exposed on an end face of the laminated chip.

[0053] <Firing process> In the firing process, the obtained laminated chip is subjected to a binder removal process and a firing process to produce an element part. The green sheet and the internal electrode pattern are co-sintered by the firing process to become a dielectric ceramic layer and an internal electrode layer, respectively. The conditions for the binder removal process may be determined according to the type of organic binder contained in the green sheet and the internal electrode pattern. The firing process may be performed at a temperature at which the laminated chip is sufficiently densified. For example, the firing process may be performed under conditions of a temperature of 1200°C to 1300°C and a holding time of 0 minutes to 30 minutes. Furthermore, the firing process is performed in an atmosphere in which the perovskite oxide, which is the main component, is not reduced and the oxidation of the conductive metal is suppressed. For example, the firing process may be performed under conditions of an oxygen partial pressure of 10 -10 ~10 -12 The firing process may be performed in a N2-H2-H2O gas flow at 100 MPa. Annealing may be performed after firing.

[0054] In the manufacturing method of this embodiment, a dielectric material with a relatively high degree of crystallinity, for example BaTiO3 with a c-axis / a-axis ratio of 1.0085 or more, is used as the main component raw material. In the firing process, the laminated chip is held at a predetermined temperature for a predetermined time, and after the firing process, pressure is applied in the thickness direction by annealing. In this way, by annealing at a predetermined temperature while applying pressure in the lamination direction, stress is applied to the crystal grains with a relatively high degree of crystallinity, and the crystal grains are rearranged due to this stress, and the orientation progresses. The holding temperature is preferably 800°C or more and 1000°C or less, and the holding time (pressure application time) is preferably 30 minutes or more and 120 minutes or less. The applied pressure is preferably 1 MPa or more and 120 MPa or less. If the applied pressure is less than 1 MPa, the stress is insufficient, and the rearrangement of the crystal grains is insufficient. Therefore, in the finally obtained laminated ceramic capacitor, the ratio of {100} particles in the dielectric ceramic layer cannot be increased. On the other hand, if it exceeds 120 MPa, the applied pressure becomes too large, and there is a risk of defects such as cracking and chipping of the laminated chip.

[0055] <External electrode formation process> In the external electrode formation step, external electrodes are formed on the obtained element part. The external electrodes may be formed by a known method. For example, a conductive paste containing a metal such as silver (Ag), copper (Cu) and / or nickel (Ni) may be applied and baked on the end faces of the element part where the internal electrodes are pulled out and exposed. Alternatively, a method may be used in which a conductive paste is applied to both end faces of the laminated chip before firing, and then a firing process is performed. Furthermore, the formed electrodes may be used as a base layer, and a plating film such as nickel (Ni) or tin (Sn) may be formed thereon. Through the formation of the external electrodes in this manner, a laminated ceramic capacitor is manufactured. EXAMPLES

[0056] The present invention will be described in more detail with reference to the following examples and comparative examples, but the present invention is not limited to the following examples.

[0057] (1) Fabrication of multilayer ceramic capacitors [Comparative Examples 1 to 14 and Examples 1 to 7] The main ingredient is Ba m TiO3 powder was prepared. Here, m is the A / B molar ratio of the perovskite oxide (ABO3), i.e., the Ba / Ti molar ratio. m The TiO3 powder used had a particle size D50 of 140 nm, a perovskite structure with a c-axis / a-axis ratio of 1.0090 and m of 1.005. m The TiO3 powder was weighed and wet mixed in a ball mill to break down agglomerates.

[0058] In addition to the main component raw materials, the raw materials of the additive components (Dy, Mg, Mn, Si, Al, V) were weighed out. The additive component raw materials used were dysprosium oxide (Dy2O3), magnesium carbonate (MgCO3), manganese carbonate (MnCO3), silicon oxide (SiO2), aluminum oxide (Al2O3), and vanadium oxide (V2O5). The amounts were weighed out so that, relative to 100 molar parts of Ti in the main component, the amounts were 1.0 molar part of Dy, 0.03 molar part of Mg, 0.1 molar part of Mn, 0.8 molar part of Si, 0.08 molar part of Al, and 0.08 molar part of V.

[0059] Next, the additive component raw material was added to the main component raw material, and the mixture was wet-mixed using a ball mill, then dried and heat-treated to obtain a dielectric raw material. A polyvinyl butyral binder and ethanol, an organic solvent, were added to the obtained dielectric raw material, and the mixture was wet-mixed using a ball mill for a predetermined time to produce a slurry. The slurry was formed into a sheet to produce a green sheet for a dielectric ceramic layer.

[0060] Next, a conductive paste mainly composed of Ni was screen-printed on the surface of the obtained green sheet to form a pattern of a conductive paste layer that would become an internal electrode layer. After that, a plurality of green sheets on which the conductive paste layer was formed were laminated, and green sheets on which the conductive paste layer was not formed were placed above and below them, and the whole was pressed together to produce a laminated block. The obtained laminated block was then cut with a dicing saw to form a laminated chip. The lamination was performed so that the ends from which the conductive paste layer was drawn out were staggered. The cutting was also performed so that the conductive paste layer was exposed on the side surface.

[0061] A side margin green sheet (side margin green body) was attached to both sides of the cut laminated chip where the conductive paste layer was exposed. The side margin green sheet was prepared in the same manner as the dielectric ceramic layer green sheet.

[0062] The laminated chip with the side margin green body attached was placed in a N2-H2O-H2 gas flow with an oxygen partial pressure of 1.8×10 -9 ~8.7×10 -10 MPa, heating rate 20℃ / sec, maximum temperature 1260℃×0.5 hours. After firing, oxygen partial pressure 1.0×10 -12 ~10 -15 The laminate was annealed while being pressurized in the lamination direction in an atmosphere of 800 to 1000° C. and MPa to obtain a laminated ceramic capacitor body.

[0063] A conductive paste mainly composed of copper (Cu) was applied to the end face from which the internal electrode layer was drawn out of the green body obtained by firing. Then, the applied conductive paste was baked at 900 °C to form an underlayer of the external electrode. Further, Ni plating and Sn plating were performed in this order on the surface layer of the underlayer by wet plating. In this way, a multilayer ceramic capacitor was manufactured.

[0064] The manufactured multilayer ceramic capacitor had a length L dimension of 0.4 mm, a width direction W dimension of 0.2 mm, and a thickness direction T dimension of 0.2 mm. Also, the thickness of the dielectric layer in the inner layer part was 0.5 μm, the thickness of the internal electrode layer was 0.4 μm, and the number of dielectric ceramic layers was 150.

[0065] (2) Evaluation Regarding the obtained multilayer ceramic capacitor, evaluations of various characteristics were performed as follows.

[0066] <Dielectric characteristics> The capacitance C of the multilayer ceramic capacitor was measured using an automatic bridge type measuring machine. The measurement was performed under the conditions of a temperature of 25 °C, an effective voltage of 0.5 Vrms, and a frequency of 1 kHz. Then, using the capacitance C, the relative permittivity (ε r ) of the dielectric ceramic layer was obtained. Also, based on the value of the relative permittivity of Comparative Example 1, the ratio to it was obtained as the relative permittivity ratio (ε r ratio).

[0067] <High-temperature load life> A high-accelerated life test (HALT) was performed on the multilayer ceramic capacitor to obtain the mean time to failure (MTTF). In the high-accelerated life test, a high-temperature load was applied to the multilayer ceramic capacitor under the conditions of 150 °C and 6.3 V. Then, the time when the insulation resistance became 10 kΩ or less was determined as a failure, and the mean time to failure (MTTF) was calculated. The number of measurements was 10. Also, based on the value of the mean time to failure of Comparative Example 1, the ratio to it was obtained as the MTTF ratio.

[0068] <S-TEM observation> The cross section of the dielectric ceramic layer of the multilayer ceramic capacitor was observed using a scanning transmission electron microscope (S-TEM). For the S-TEM observation, a thin film was processed by the focused ion beam (FIB) method to prepare an observation sample. Specifically, a thin slice sample with a thickness of 100 nm or less and a surface (WT surface) including the width direction and thickness direction was taken out from the center of the length direction (L direction) of the multilayer ceramic capacitor. The thickness of this thin slice sample was smaller than the radius of the crystal grain contained in the sample. Then, the center of each crystal grain was observed with a scanning transmission electron microscope (S-TEM) at a spatial resolution of 100 pm or less for 200 crystal grains in the thin slice sample, and analyzed by the nanobeam electron diffraction (NBD) method. The S-TEM observation was performed under the following conditions.

[0069] Then, when the sample was tilted within a range of ±5°, particles in which the {100} plane was observed were determined to be {100} particles, and the number of such particles was counted. For each {100} particle, the entire particle was observed using S-TEM to determine the area in which the atomic arrangement was observed, and the area ratio of the atomic arrangement area was calculated. The average area ratio of the atomic arrangement area was then determined as the average area ratio. An example of a HAADF image of an area in which the atomic arrangement of a {100} particle is observed is shown in Figure 5.

[0070] In addition, the Ba and Ti concentrations in the {100} particle cross section were determined as a function of distance (positional variation) in the obtained HAADF image using an EDX device attached to the S-TEM, and graphed. An example of the graph obtained is shown in Figure 7. In the figure, point A is a location where the positional variation of the Ba concentration is relatively sharp, and point B is a location where it is relatively broad. In the figure, point C is a location where the positional variation of the Ti concentration is relatively sharp, and point D is a location where it is relatively broad. It is believed that the lattice distortion is small in locations where the positional variation is sharp, whereas the lattice distortion is large in locations where the positional variation is broad. Next, the respective concentration differences of Ba and Ti (Δc = c maxThe distance function (positional variation) of the above-mentioned parameter (c) was calculated and graphed. The graphs obtained are shown in Figures 8 and 9. For comparison, the results obtained for BaTiO3 produced by conventional technology are also shown in Figures 8 and 9.

[0071] From the obtained graph, the areas of the Ba atom distribution region and the Ti atom distribution region (S Δc≦2% Specifically, a line was drawn horizontally on the horizontal axis where the difference in Ba concentration (Δc) was 2 atm%. Then, the distance from the vertical axis to the two points (points a and b) where this line intersected the graph of the difference in Ba concentration was read, and d a and d b Then, the area of ​​the atomic distribution region (S Δc≦2% The area of ​​the atomic distribution region was calculated for all detected {100} particles, and the average value was calculated for the 10 smallest areas.

[0072]

number

[0073] (3) Evaluation results The pressing conditions during firing and the properties of the dielectric ceramic layers for Comparative Examples 1 to 14 and Examples 1 to 7 are summarized in Table 1 below. Δc≦2% The area of ​​the Ti atom distribution region is almost the same as that of Ba.

[0074] The higher the pressure applied during the firing process in the manufacture of multilayer ceramic capacitors and the longer the application time, the larger the area of ​​the atomic distribution region (S Δc≦2% ) has become smaller, and the high temperature load life (MTTF) has become longer accordingly. Δc≦2% is 0.050 nm 2 In the following Examples 1 to 7, the MTTF is 44 hours or more, and the S Δc≦2% is 0.023 nm 2 In Example 18 below, the MTTF was 82 hours.

[0075] In addition, the higher the applied pressure and the longer the applied time, the larger the proportion of {100} grains becomes, and the dielectric constant (ε r ) was high. In particular, in Examples 1 to 7 in which the proportion of the number of {100} particles was 17% or more, the relative dielectric constant was 3520 or more.

[0076] In contrast to this, in Comparative Examples 1 to 14, the relative dielectric constant was 3540 at most, and the MTTF remained at 37 hours or less.

[0077] [Table 1]

Claims

1. a first main surface and a second main surface facing each other in a thickness direction, a first side surface and a second side surface facing each other in a width direction, and a first end surface and a second end surface facing each other in a length direction; a multilayer ceramic capacitor comprising: a body portion including a plurality of dielectric ceramic layers and a plurality of internal electrode layers stacked in the thickness direction; and a pair of external electrodes provided on the first end face and the second end face, respectively, and connected to the plurality of internal electrode layers, the dielectric ceramic layer includes crystal grains composed of a perovskite oxide including an A-site element and a B-site element; the dielectric ceramic layer contains {100} grains as crystal grains in which {100} faces of a perovskite structure are observed when a cross section of the dielectric ceramic layer is observed using a scanning transmission electron microscope (S-TEM); When the composition of the {100} grain is analyzed by energy dispersive X-ray spectroscopy (EDX) in the cross section, the {100} grain has a maximum concentration (c ｍａｘ ) from the difference (Δc = c ｍａｘ -c) has an atomic distribution region of 2 atm % or less, and the area (S Δｃ≦２％ ) is 0.050 nm ２ Below is a multilayer ceramic capacitor.

2. The area of ​​the atomic distribution region (S Δｃ≦２％ ) is 0.023 nm ２ 2. The multilayer ceramic capacitor according to claim 1, wherein:

3. 2. The multilayer ceramic capacitor according to claim 1, wherein a ratio of {100} grains to the number of said crystal grains in said cross section is 4% or more.

4. A multilayer ceramic capacitor as described in claim 2, wherein in the cross section, the number ratio of {100} grains among the crystal grains is 4% or more.

5. 2. The multilayer ceramic capacitor according to claim 1, wherein in the cross section, the {100} grains have atomic arrangement regions in which an atomic arrangement of a perovskite oxide is observed, and an average area ratio of the atomic arrangement regions in the {100} grain cross section is 10% or more.

6. A multilayer ceramic capacitor as described in claim 2, wherein, in the cross section, the {100} grains have atomic arrangement regions in which the atomic arrangement of a perovskite-type oxide is observed, and the average area ratio of the atomic arrangement regions in the cross section of the {100} grains is 10% or more.

7. A multilayer ceramic capacitor as described in claim 3, wherein, in the cross section, the {100} grains have atomic arrangement regions in which the atomic arrangement of a perovskite-type oxide is observed, and the average area ratio of the atomic arrangement regions in the cross section of the {100} grains is 10% or more.

8. A multilayer ceramic capacitor as described in claim 4, wherein, in the cross section, the {100} grains have atomic arrangement regions in which the atomic arrangement of a perovskite-type oxide is observed, and the average area ratio of the atomic arrangement regions in the {100} grain cross section is 10% or more.

9. 9. The multilayer ceramic capacitor according to claim 1, wherein the A-site element includes barium (Ba) and the B-site element includes titanium (Ti).

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