Light emitting diode device and method for fabricating same

Abstract

SOLUTION: There are provided a light emitting diode device that is mainly used for high voltage and high current density conditions, and in which a first electrode and a second electrode face the front side, the back side of a first conductive layer is connected to the front side of a substrate, the first conductive layer is connected to the front side of the substrate, and the area of the first conductive layer contacting the back side of a first type semiconductor layer is greater than 1.5% of the area of the first type semiconductor layer, and an insulating layer extending from a recessed portion covers the back side of a second conductive layer, and an integrally connected connecting portion is provided between the second conductive layer of one light emitting diode unit in any two adjacent light emitting diode units and the first conductive layer of the other light emitting diode unit, and the plurality of light emitting diode units share the same support and a heat dissipation substrate, and a manufacturing method thereof.EFFECT: The reliability of a light emitting diode unit is improved and the problem of too short life of the light emitting diode unit at high current density is avoided or mitigated.SELECTED DRAWING: Figure 17

Description

[Technical field]

[0001] The present invention relates to the field of semiconductor technology, and more particularly to a light emitting diode device and fabrication technique thereof that can be used in a high pressure environment. [Background technology]

[0002] High-wattage, high-brightness light-emitting diodes (LEDs) have become increasingly important in the current market due to the demand for high-brightness lighting devices. In the case of horizontally structured LEDs using sapphire as a substrate, the heat dissipation problem of sapphire and the current crowding effect mean that there is a high risk of the chip overheating and being destroyed when operated at high current densities, so the horizontal structure cannot be adopted for high-wattage LEDs. On the other hand, for vertically structured LEDs, the substrate can be replaced with a material with high heat dissipation and thermal conductivity (e.g., Si, CuW, etc.), and the current can be well spread without the current crowding effect in the vertical structure, so that ultra-high current densities (e.g., 2.5A / mm 2 ) can realize high wattage, high brightness LEDs. Thus, the LED market is focusing on how to achieve higher brightness by obtaining better current spreading in vertical LEDs. In addition, when applying high wattage, high brightness LEDs in a high pressure environment, there are problems such as poor reliability due to the difficulty in dissipating heat, high difficulty in wiring due to the complex electrode arrangement, and difficulty in concentrating brightness due to the difficulty in concentrating the light emitting area. Summary of the Invention [Problem to be solved by the invention]

[0003] The present invention aims to provide a thin-film light-emitting diode structure having better efficiency and higher current density in a high-pressure environment, and also having better electrical properties and higher reliability. These aims are achieved by a thin-film light-emitting diode structure and a method for its manufacture as defined in the independent claims. Proposals for extending or improving the invention are also set forth in the dependent claims, the disclosure content of which is expressly incorporated in the specification. [Means for solving the problem]

[0004] In order to meet the demand for increasing brightness in the prior art, in one aspect, the present invention provides a light-emitting diode chip comprising a semiconductor layer sequence including a first type of semiconductor layer and a second type of semiconductor layer with an intervening active layer designed for generating radiation between them.

[0005] In the semiconductor layer sequence, a first type semiconductor layer is located on the front side of the semiconductor layer sequence, the sidewalls of which are covered with an insulating layer, the semiconductor layer sequence has at least one recess extending from a back side opposite the front side of the semiconductor layer sequence through the active layer to the first type semiconductor layer, a first electrode electrically connected to the first type semiconductor layer from the first conductive layer through the recess, and a second electrode connected to the second conductive layer, the first conductive layer and the second conductive layer being electrically separated from each other by an insulating layer extending from the recess.

[0006] Both the first conductive layer and the second conductive layer are located on the back side of the semiconductor layer sequence, but the first conductive layer located on the back side of the semiconductor layer sequence does not include the first conductive layer located within the recessed portion, and the second conductive layer is in direct contact with the back side of the second semiconductor layer.

[0007] Furthermore, the device has a substrate for support and heat dissipation. The substrate has a semiconductor layer sequence. It is not a growth substrate on which the epitaxial growth occurs, but rather a separate support member, and in the above structure, there is no growth substrate on which the semiconductor layer sequence is epitaxially grown, where "absent" means that the growth substrate used for epitaxial growth has been removed or significantly thinned.

[0008] The first conductive layer is connected to the front side of the substrate, and the area of ​​the first conductive layer contacting the back side of the first type semiconductor layer is greater than 1.5% of the area of ​​the first type semiconductor layer; At least a part of the front side of the conductive layer is exposed for disposing the first electrode, and at least a part of the front side of the second conductive layer is exposed for disposing the second electrode. When the semiconductor layer sequence is removed to create a window for wire bonding, the window can be exposed by removing the semiconductor layer up to the first conductive layer due to the design with the same height, so that it is not necessary to penetrate the insulating layer or metal layer, which is relatively difficult to remove, thereby saving manufacturing time and improving technical reliability. In addition, the insulating layer extending from the recessed portion covers the rear sides of the first conductive layer and the second conductive layer, which can avoid, for example, a situation in which the ICP ion beam supports radical etching to drive the metal onto the sidewall of the semiconductor layer sequence, causing a short circuit, or a problem in which wet etching is inefficient for the metal or insulating layer. Here, the configuration "the insulating layer extending from the recessed portion covers the rear side of the second conductive layer" means that at least a part of the rear side of the second conductive layer is covered with the insulating layer, but in some cases, it is also possible that the entire rear side of the second conductive layer is covered with the insulating layer. The second conductive layer, and especially the first conductive layer, may be arranged in a vertical multi-layer configuration, and may also be arranged to cover the front side of the insulating layer. The first electrode and the second electrode face the front side. In the embodiment of the present invention, the second conductive layer is arranged to cover the entire front side of the insulating layer, and the first electrode and the second electrode in the present invention refer to the area to be electrically connected, for example, the bond pad is suitable for contacting the light-emitting diode body from the front side. The first electrode and the second electrode are made in the same plane, i.e., the windows through which the first conductive layer and the second conductive layer are exposed and used for making the electrodes are in the same plane, which contributes to the fabrication of the overall structure and allows the electrodes to be made with the same height by a simple technique. If the heights of the electrodes are not the same, the wire bonding becomes more difficult and the efficiency of the wire bonding decreases. Since the first electrode and the second electrode are located on the side portions of the semiconductor layer sequence, a situation in which the first electrode and / or the second electrode are located above the semiconductor layer sequence, which would block radiation and reduce radiation efficiency, can be avoided, and it is also convenient for the manufacture of wire bonding.The first electrode is designed for electrical connection to a front side of the first conductive layer, and the second electrode is designed for electrical connection to a front side of the second conductive layer.

[0009] The first conductive layer is connected to the heat dissipation substrate and the first type semiconductor layer, and therefore has an advantage of forming a good thermal conduction path and being able to guide heat from the first type semiconductor layer to the heat dissipation substrate. Since radiation excited by the multiple quantum wells is emitted from the first type semiconductor layer, heat is easily stored in the first type semiconductor layer, and the first conductive layer of the present invention can efficiently guide the heat from the first type semiconductor layer to the heat dissipation substrate.

[0010] In addition, since the first electrode and the second electrode simultaneously face the front side, the exposed first electrode connection layer has the same height as the second conductive layer, and the exposed first electrode connection layer and the exposed second conductive layer are located on the side portions of the semiconductor layer sequence, which is suitable for fabricating multiple series and / or parallel connected structures fabricated from the same growth substrate, and is advantageous for designing unit components of high-voltage structures.

[0011] In another modified embodiment of the present invention, the area of ​​the first conductive layer in contact with the back side of the first type semiconductor layer is set within a range of 2.3% to 2.8%, or 2.8% to less than 4%, or 4% to 6% of the area of ​​the first type semiconductor layer. Here, it is particularly preferable to set the ratio to 4% or more and 6% or less in order to realize the conduction of heat from the first type semiconductor layer.

[0012] According to the present invention, the first conductive layer and / or the second conductive layer is preferably a metallic material, since the metallic conductive material has better thermal conductivity performance than the non-metallic conductive material.

[0013] According to the present invention, the diameter of the opening of the recesses is preferably in the range of 15 μm to 32 μm, or 32 μm to 40 μm. Smaller recess opening diameters result in higher thermal resistance, and simply increasing the total area by increasing the number of recesses does not result in better thermal conduction or heat dissipation properties.

[0014] In some embodiments of the present invention, when the recesses have an opening diameter in the range of 34 μm to 36 μm, the number of recesses is preferably in the range of 20-25.

[0015] In some variations of the present invention, the thickness of the first type semiconductor layer is preferably 2 μm or more, and the depth of the recess in the first type semiconductor layer is preferably 6 μm or more, since this design places more importance on solving the heat accumulation in the first type semiconductor layer.

[0016] According to the invention, it is preferred that the thickness of the first type semiconductor layer is within 2 μm to 3 μm in order to reduce the absorption of radiation by the first type semiconductor layer.

[0017] According to the present invention, it is preferable that the insulating layer has an effect of electrically isolating the first conductive layer and the second conductive layer from each other. Here, electrically isolating does not mean that they are not electrically connected to each other at all, but means that the first conductive layer and the second conductive layer are not directly electrically connected to each other, thereby preventing a short circuit. The material that can be selected is silicon oxide, silicon nitride, aluminum nitride, aluminum oxide, or ceramic.

[0018] According to the present invention, the first conductive layer is preferably one of an ohmic contact layer, a metal reflective layer, a metal bonding layer, or a combination thereof.

[0019] According to the present invention, the second conductive layer is preferably one of a transparent conductive layer, a metal reflective layer, a metal diffusion blocking layer, or a combination thereof.

[0020] The first conductive layer has an ohmic contact layer with good electrical connection with the first type of semiconductor layer, for example Cr, Ni, Au, Li. The radiation-generating semiconductor layer sequence faces the support, and in particular a metal reflective layer is interposed or constructed between the support substrate and the semiconductor layer sequence. The metal reflective layer reflects at least a part of the electromagnetic radiation generated in the semiconductor layer sequence back into the semiconductor layer sequence. Here, the material of the metal reflective layer of the radiation-generating semiconductor layer sequence, in particular the radiation-generating epitaxial sequence, is, for example, Ag. The bonding layer mainly refers to the first conductive layer metal material with good bonding on one side in contact with the substrate, for example Au is often used. In order to improve the contact between the conductive layer and the semiconductor layer and reduce the resistance between them, a layer of ITO may be added between the conductive layer and the semiconductor layer as a TCL transparent contact layer. The conductive layer here includes a first conductive layer and a second conductive layer, and the semiconductor layer includes a first type semiconductor layer and a second conductive layer corresponding to each other in sequence, and one or two of the pairs are selected to insert a TCL transparent contact layer.

[0021] According to the present invention, the material of the second conductive layer is preferably any one of Ag, Au, Ti, Al, Cr, Pt, TiW, Ni, or a combination thereof, among which Ag is preferable. is suitable as a metal reflective material, TiW is suitable as a metal cover material to prevent metal diffusion, and Cr, Ni, and Au are suitable as ohmic contact materials.

[0022] According to the invention, the height of the semiconductor layer sequence is preferably a thin film structure of >5 μm to <7 μm, or >7 μm to >8 μm.

[0023] According to the present invention, it is preferred that the first conductive layer and the second conductive layer are at least partially integrally designed and located in the same plane, and that the exposed first conductive layer and the first electrode connection layer located on the back side of the insulating layer are fabricated by different techniques.

[0024] According to the present invention, the chip preferably has a second conductive layer, an insulating layer, and a first conductive layer, which are stacked in this order from top to bottom. Since the first conductive layer is in direct contact with the heat dissipation substrate, the heat of the insulating layer can be dissipated even from the first conductive layer.

[0025] According to the present invention, the material of the substrate is preferably Si, Cu or ceramic, and in particular, the chip adopting the ceramic substrate has excellent heat dissipation properties, so that the ceramic substrate can better dissipate heat from the first conductive layer in correspondence with the first conductive layer, and the insulating properties of the ceramic substrate are conducive to the fabrication of a series and / or parallel structure of multiple semiconductors made from the same substrate in a high voltage product, and the first conductive layer covers the entire front side of the ceramic substrate. Here, the entire front side of the substrate refers to the first conductive layer covering most of the area above the substrate, not 100%, because in the actual product, some free space may be left, for example for the processing of separation technology.

[0026] Based on the above light emitting diode chip structure, the present invention further provides a method for fabricating a light emitting diode chip, namely: a first step of producing, on a growth substrate, for example by epitaxy techniques such as MOCVD, a semiconductor layer sequence comprising a first type of semiconductor layer, an active layer and a second type of semiconductor layer, the first type of semiconductor layer, the active layer and the second type of semiconductor layer forming a pn junction with radiative properties; a second step of forming one or more recesses penetrating the second type semiconductor layer and the active layer from the back side of the second type semiconductor layer and penetrating at least the first type semiconductor layer; a third step of applying a conductive layer to the surface of the second type semiconductor layer except the recessed area, the conductive layer having a first conductive layer and a second conductive layer in the same horizontal plane, the conductive layer being not applied to the area of ​​the second type semiconductor layer close to the recessed area due to technical precision limitations, and applying an insulating layer to the conductive layer and to the bottom and sidewalls of the recessed area; a fourth step of forming a hole in the insulating layer so as to expose at least an area of ​​the first type semiconductor layer at the bottom of the recess and a portion of the first conductive layer; a fifth step of subsequently coating the bottom of the recess, the insulating layer and a portion of the first conductive layer with a first conductive layer material; a sixth step of directly connecting a heat dissipation substrate to the back side of the first conductive layer; A seventh step of removing the growth substrate; an eighth step of removing a portion of the semiconductor layer sequence from the front side of the first conductive layer until the conductive layer is exposed; and a ninth step of forming a first electrode on the first conductive layer of the exposed conductive layers and a second electrode on the second conductive layer. Incidentally, in the above fifth step, for ease of explanation, the present invention defines the ohmic contact layer in contact with the first type semiconductor layer, the metal reflective layer, and the metal bonding layer in contact with the substrate as all being the first conductive layer, and in this step, the first conductive layer material at the bottom of the recessed portion is an ohmic contact material, and the insulating layer and the exposed portion of the first conductive layer are mainly the metal bonding layer.

[0027] Compared with the current technology, the technical effect of the light emitting diode chip provided by the present invention is that the first electrode and the second electrode face the front side, the first conductive layer contacts the front side of the substrate and the back side of the first type semiconductor layer respectively, and the contact area is larger than 1.5% of the area of ​​the first type semiconductor layer, so that the heat of the semiconductor layer sequence can be dissipated as a heat source via the first conductive layer. Conduction to the plate improves the reliability of the product and, in particular, allows heat to be dissipated from the first type semiconductor layer.

[0028] In operation, current passes vertically through the semiconductor layer sequence, resulting in the uniform current distribution characteristic of a vertical light emitting diode.

[0029] In addition, since the first electrode and the second electrode face the front side and the recessed areas allow uniform distribution of current, it is easy to design multiple units in series and / or parallel, and by creating a configuration in which multiple units are connected in series and / or parallel on the same growth substrate, it is useful for designing it as a unit component of a high-voltage configuration (COB, chip-on-board market), and excellent high-voltage characteristics can be obtained.

[0030] For example, in the special application of UV LEDs used in the field of UV curing, UV light is more easily absorbed by the materials of the semiconductor layer sequence, which increases the problem of heat dissipation. However, the thermoelectric separation design of the chip structure of the present invention can effectively conduct and dissipate the heat of the first type of semiconductor layer on the light-emitting surface to the heat dissipation substrate.

[0031] According to the above LED chip structure and fabrication method, a LED device can be further designed, the LED device has a plurality of LED units, the LED units are connected in series; the semiconductor layer sequences between the light-emitting diode units are separated from one another, the series connection being taken to mean a series connection of the separated semiconductor layer sequences together, the semiconductor layer sequences having an active layer interposed between a first type of semiconductor layer and a second type of semiconductor layer and designed for generating radiation, where the first type of semiconductor layer is located on the front side of the semiconductor layer sequence; the semiconductor layer sequence is covered by an insulating layer and has one or more recesses extending from a back side of the semiconductor layer sequence opposite the front side through the active layer to the first type semiconductor layer, the first conductive layer electrically connects to the first type semiconductor layer through the recessed portion, and the second conductive layer electrically connects to the second type semiconductor layer; the first conductive layer and the second conductive layer are electrically insulated from each other by the insulating layer in the recessed portion; a first light emitting diode unit in the plurality of light emitting diode units has at least a portion of the first conductive layer exposed and a first electrode electrically connected to the exposed first conductive layer, and a last light emitting diode unit has at least a portion of the second conductive layer exposed and a second electrode electrically connected to the exposed second conductive layer, the first electrode and the second electrode are located outside the light emitting diode device, and the light emitting area can be concentrated inside the light emitting diode device and has a relatively strong light concentration degree; The first electrode and the second electrode face the front side, the back side of the first conductive layer is connected to the front side of the substrate, the area of ​​the front side of the first conductive layer in contact with the back side of the first type semiconductor layer is greater than 1.5% of the area of ​​the first type semiconductor layer 210, and the insulating layer extending from the recessed portion The edge layer covers the back side of the second conductive layer, and a connection portion is provided that integrally connects the second conductive layer of one of any two adjacent light-emitting diode units to the first conductive layer of the other light-emitting diode unit.

[0032] A plurality of light emitting diode units share the same support and heat dissipation substrate, which is a semiconductor It is not a growth substrate on which the layer sequence is epitaxially grown, but rather a separate support member, and there is no growth substrate on which the semiconductor layer sequence is epitaxially grown, where "absent" means that the growth substrate used for epitaxial growth has been removed or significantly thinned.

[0033] In some embodiments of the present invention, at least a portion of the connection portion that is integrally connected between the mutually separated semiconductor layer sequences is exposed, for example, when the second conductive layer is exposed in one light-emitting diode unit, the first conductive layer is exposed in another light-emitting diode unit, the two conductive layers are integrally connected, and the connection portion that is integrally connected between the mutually separated semiconductor layer sequences is exposed. The exposed second electrode connection layer of the first light emitting diode unit and the exposed first conductive layer of the second light emitting diode unit have the same height, and this same height mainly refers to the exposed second electrode connection layer of the first light emitting diode unit and the exposed first conductive layer of the second light emitting diode unit having the same height on the front side, and further, have the same thickness, material, and structure. When the conductive layer is patterned, it is sufficient to separate the second conductive layer of the first light emitting diode unit from the first conductive layer, and separate the first conductive layer of the second light emitting diode unit from the second conductive layer. Here, the second conductive layer of the first light emitting diode unit and the first conductive layer of the second light emitting diode unit do not refer to the conductive layer structure as a whole, but only refer to a part of the second conductive layer of the first light emitting diode unit that is close to the semiconductor layer sequence and a part of the first conductive layer of the second light emitting diode unit, and the other conductive layers are further fabricated by other techniques such as deposition to form other parts of the conductive layers, for example, metal bonding layers.

[0034] In the above embodiment, a portion of the insulating layer of all the light-emitting diode units is exposed from the front side, and at least a portion of the integrally connected connection portions is located below the portion of the insulating layer, thereby preventing the directly exposed connection portions from being destroyed, which would lead to a decrease in performance.

[0035] According to the present invention, the light-emitting diode units preferably have a similar chip structure. The similar chip structure here means that a similar semiconductor layer sequence, a first conductive layer, a second conductive layer and an insulating layer structure are fabricated by fabricating a periodic pattern. The similar chip structure here does not need to be exactly the same, and in particular, the electrode (wire bond electrode) part can be designed to have different shapes or combinations as necessary.

[0036] According to the invention, the light emitting diode units are preferably fabricated from semiconductor layer sequences which are grown together from the same growth substrate.

[0037] In some embodiments of the present invention, it is preferable that the area of ​​the first conductive layer in contact with the back side of the first type semiconductor layer is in the range of 4% or more and 6% or less of the area of ​​the first type semiconductor layer 210, which is suitable for higher heat dissipation requirements, such as solving heat dissipation problems under higher load situations.

[0038] In some embodiments of the present invention, the first conductive layer and / or the second conductive layer are preferably metallic materials, since metallic conductive materials have better thermal conductivity performance than non-metallic conductive materials.

[0039] In some embodiments of the present invention, the semiconductor layer sequence is preferably a semiconductor thin film chip having a height of 7 μm or less.

[0040] It is preferable that all the light emitting diode units have a second conductive layer, an insulating layer and a first conductive layer, which are stacked from top to bottom in this order. The first conductive layer is in direct contact with the heat dissipation substrate. Therefore, heat from the insulating layer can be dissipated even from the first conductive layer.

[0041] In some embodiments of the present invention, the material of the substrate is preferably ceramic, which, compared with metal materials, can ensure excellent heat dissipation properties and improve the reliability of the entire device due to its insulating properties.

[0042] In some embodiments of the present invention, the first conductive layers of two adjacent light emitting diode units are preferably separated by an insulating layer.

[0043] In some embodiments of the present invention, the light emitting diode device preferably has 3-6 or 7-9 light emitting diode units, because the more light emitting diode units connected in series, the more advantages the present invention has in terms of light concentration or heat dissipation compared with the conventional configuration.

[0044] The method for fabricating a light emitting diode device used in the fabrication of a high voltage light emitting device includes the following steps: a first step of producing a semiconductor layer sequence on a growth substrate, the semiconductor layer sequence comprising a first type of semiconductor layer, an active layer and a second type of semiconductor layer; a second step of forming a plurality of recesses penetrating the second type semiconductor layer and the active layer from the back side of the second type semiconductor layer and penetrating at least the first type semiconductor layer; a third step of forming a conductive layer having n pairs of first and second conductive layers on the same horizontal plane in a portion of the surface of the second type semiconductor layer other than the recessed portion, and then coating the conductive layer and the bottom and sidewalls of the recessed portion with an insulating layer; a fourth step of forming a hole in the insulating layer so that at least a partial area of ​​the first type semiconductor layer and the n number of first conductive layers at the bottom of the recessed portion is exposed; A fifth step of subsequently coating a first conductive layer material on the bottom of the recessed portion, the insulating layer, and a portion of the n first conductive layers, and providing an insulating layer between the n first conductive layers to separate them; a sixth step of directly connecting a heat dissipation substrate to the back side of the first conductive layer; A seventh step of removing the growth substrate; an eighth step of removing portions of the semiconductor layer sequence from the front side of the first type semiconductor layer such that the first conductive layer and the second conductive layer are exposed to form n mutually partitioned semiconductor layer sequences; and a ninth step of fabricating a first electrode on the exposed first conductive layer of the first semiconductor layer sequence and a second electrode on the exposed second conductive layer of the last semiconductor layer sequence.

[0045] It should be noted that when the fifth step is carried out, the order of covering the first conductive layer materials does not need to be determined as described, that is, the order can be arbitrarily adjusted according to the actual situation. Effect of the Invention

[0046] Compared with the prior art, the technical advantages of the light emitting diode chip provided by the present invention are as follows: a high-voltage light emitting diode with good heat dissipation function is provided, and a parallel-connected high-voltage light emitting diode array can be conveniently fabricated by utilizing the configuration of the light emitting diode unit designed by the present invention.

[0047] Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention may be realized and obtained by the structure particularly pointed out in the written description, claims, and appended drawings. [Brief description of the drawings]

[0048] The drawings are provided for a better understanding of the present invention, and constitute a part of the specification. They may be used to interpret the present invention together with the embodiments of the present invention, but are not intended to limit the present invention. Also, the numerical values ​​in the drawings are merely schematic and are not drawn to scale.

[0049] [Figure 1] FIG. 2 is an explanatory diagram of a structure produced by the first to third steps of Example 1. [Diagram 2] FIG. 13 is an explanatory diagram of a structure produced by a fourth step in Example 1. [Diagram 3] FIG. 13 is an explanatory diagram of a structure produced by the fifth step of the first embodiment. [Figure 4]FIG. 13 is an explanatory diagram of a structure produced by the sixth and seventh steps of Example 1. [Diagram 5] FIG. 13 is an explanatory diagram of a structure produced by the eighth and ninth steps of Example 1. [Figure 6] FIG. 2 is an explanatory top view showing the configuration of the LED according to the first embodiment. [Figure 7] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 8] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 9] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 10] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 11] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 12] 1 is a curve graph comparing aging data of the new structure of Example 1 and the old structure of the prior art. [Figure 13] FIG. 13 is an explanatory diagram showing the configuration of the first and second steps of Example 7. [Figure 14] FIG. 13 is an explanatory diagram of a structure produced by the third step of Example 7. [Figure 15] FIG. 13 is an explanatory diagram of a structure produced by the fourth step of Example 7. [Figure 16] FIG. 13 is an explanatory diagram of a structure produced by the fifth step of Example 7. [Figure 17] FIG. 13 is an explanatory diagram of a structure produced by the sixth to ninth steps of Example 7. [Figure 18] FIG. 13 is an explanatory diagram showing the configuration of an LED according to a ninth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0050] The light emitting diode chip and the fabrication method thereof of the present invention will be described in detail below in combination with the accompanying drawings. In further describing the present invention, it should be understood that the present invention is not limited to the following embodiments, since it can be modified to specific embodiments. It should also be understood that the embodiments adopted are illustrative and not limiting, since the scope of the present invention is limited only by the claims. Unless otherwise stated, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the art.

[0051] The method used for manufacturing an optoelectronic semiconductor body according to a first embodiment will be explained using illustrative cross-sectional views of the various method stages shown in Figures 1 to 5.

[0052] In the first embodiment, firstly, a manufacturing method of a light emitting diode chip designed to emit light from the front side is provided.

[0053] Referring to FIG. 1, a structure produced by the first to third steps is shown.

[0054] In a first step, a semiconductor layer sequence 200 as a light-emitting epitaxial layer is deposited on a growth substrate. 100. The semiconductor layer sequence 200 comprises a first type semiconductor layer 210, an active layer 230 and a second type semiconductor layer 220. In this embodiment, the semiconductor layer sequence 200 is essentially a light emitting pn junction, with the first type semiconductor layer 210 being an n-type semiconductor layer and the second type semiconductor layer 22 being a p-type semiconductor layer, although this order can be reversed depending on the design. The active layer 230 is a multiple quantum well that generates radiation. In a second step, a recess is excavated from the back surface of the second type semiconductor layer 220, passing through the second type semiconductor layer 220 and the active layer 230. The recess penetrates at least to the first type semiconductor layer 210, and may also penetrate into the first type semiconductor layer 210. In a third step, a patterned conductive layer is coated on the surface of the second type semiconductor layer except the recess. The conductive layer has a first conductive layer 310 and a second conductive layer 320 on the same horizontal plane, and then an insulating layer 400 is coated on the conductive layers and the bottom and sidewalls of the recess.

[0055] Referring to FIG. 2, in a fourth step, a circuit structure having a conductive path is further fabricated by removing a portion of the electrically insulating insulating material from the insulating layer 400 to open a hole, exposing at least the first type semiconductor layer 210 at the bottom of the recessed portion, and exposing at least a portion of the first conductive layer 310.

[0056] 3, in the fifth step, the bottom of the recessed area, the insulating layer 400, and some areas of the first conductive layer 310 exposed in the fourth step are continuously coated with the first conductive layer 310 material, so that the first conductive layer 310 can establish an electrical connection between the first electrode 610 and the first type semiconductor layer 210 after filling the recessed area. In this step, the melting point of the material of the first conductive layer 310 is lower than the bonding temperature, so that it has better fluidity, for example, by adopting Ni or Sn, it can reduce the holes in the corresponding areas inside the first conductive layer 310, and improve the heat dissipation and reliability of the product.

[0057] 4, in the sixth step, the heat dissipation substrate 500 is directly connected to the back side of the first conductive layer 310. This direct connection is usually achieved by using a metal bonding technique or an adhesive technique. If the bonding technique is adopted, a bonding metal is usually made on the substrate 500 and the first conductive layer 310 before the sixth step, and the bonding metal here collectively constitutes the first conductive layer 310.

[0058] In a seventh step, the growth substrate 100 is removed.

[0059] The eighth and ninth steps are described with reference to Fig. 5. In the eighth step, a part of the semiconductor layer sequence 200 is removed from the front side of the first-type semiconductor layer 210 until the first conductive layer 310 and the second conductive layer 320 are exposed. One advantage of the present technology is that the semiconductor layer sequence 200 can be directly etched to form the electrode window, so there is no need to remove materials that are difficult to remove, such as insulating materials or conductive layers, and the technology is relatively simple, efficient, and reliable.

[0060] In a ninth step, a first electrode 610 is fabricated on the exposed first conductive layer 310 and a second electrode 620 is fabricated on the exposed second conductive layer 320 .

[0061] In a second embodiment of the present invention, a light emitting diode structure is provided which is manufactured by the above technical method, and has improved reliability and simplified manufacturing process of high voltage chips.

[0062] 5, we start with a semiconductor layer sequence 200 used for radiation. The semiconductor layer sequence 200 comprises a first type semiconductor layer 210, a second type semiconductor layer 220 and an active layer 230 interposed between the first type semiconductor layer 210 and the second type semiconductor layer 220 and designed to generate radiation. 10 is adjacent to the front side of the semiconductor layer sequence 200, which is based for example on III-V or II-VI compound semiconductor materials. II-V compound semiconductor materials contain at least elements of group 3, such as Al, Ga, In, and elements of group 5, such as B, N, P, As. In particular, the term "III-V compound semiconductor materials" also includes the family of binary, ternary or quaternary compounds, which contain at least one element of group 3 and at least one element of group 5, in particular nitride and phosphide compound semiconductors. Besides such binary, ternary or quaternary compounds, one or more dopants and additional compositional moieties can be present. Materials belonging to the III-V compound semiconductor materials include for example III-nitride and III-phosphide compound semiconductor materials, such as GaN, GaAs and InGaAlP. The height of the semiconductor layer sequence 200 is from ≧5 μm to ≦7 μm, or from ≧7 μm to ≦8 μm. The height of the semiconductor layer sequence 200 is here less than 7 μm, but taking into account technical performance, the semiconductor layer sequence 200 is greater than or equal to 5 μm.

[0063] The semiconductor layer sequence 200 has at least one recessed portion covered by the insulating layer 400, and in this embodiment, the number of recessed portions is 20-25, and the recessed portions extend from the rear side opposite to the front side of the semiconductor layer sequence 200 through the active layer 230 to the first type semiconductor layer 210. The rear side of the first conductive layer 310 is connected to the front side of the substrate 500, at least a part of the front side of the first conductive layer 310 is exposed to install the first electrode 610, and at least a part of the front side of the second conductive layer 320 is exposed to install the second electrode 620, and the exposed first electrode 610 connection layer is at the same height as the second conductive layer 320, and this same height mainly refers to the upper surface being located on a horizontal plane with the same height, and this design with the same height is actually achieved by integrally designing and manufacturing the first conductive layer 310 and the second conductive layer 320 adjacent to the semiconductor layer sequence 200. Regarding the first electrode 610 connected to the first conductive layer 310 and the second electrode 620 connected to the second conductive layer 320, the first electrode 610 and the second electrode 620 face the front side, and the first electrode 610 and the second electrode 620 refer to metal electrodes for wire bonding that are mainly used for packaging.

[0064] The first conductive layer 310 penetrates the recessed portion and is electrically connected to the first type semiconductor layer 210, and the area of ​​the front side of the first conductive layer 310 in contact with the back side of the first type semiconductor layer 210 is greater than 1.5% of the area of ​​the first type semiconductor layer 210.

[0065] The first conductive layer 310 and the second conductive layer 320 are electrically insulated from each other by the insulating layer 400 at the recessed portion, and the insulating layer 400 extending from the recessed portion covers the rear side of the first conductive layer 310 and the second conductive layer 320. Covering the first conductive layer 310 with the insulating layer 400 does not mean covering the entire rear side of the first conductive layer 310, but by covering only a part of the area of ​​the first conductive layer 310, a decrease in the heat dissipation effect is prevented. The material of the insulating layer 400 is silicon oxide, silicon nitride, aluminum nitride, aluminum oxide, or ceramic, and one or both of the first conductive layer 310 and the second conductive layer 320 are metal materials.

[0066] Regarding the substrate 500 used for support and heat dissipation, the material of the substrate 500 is Si, Cu or ceramic. In particular, a chip on the substrate 500 using ceramic can dissipate heat from the first conductive layer 310 more efficiently in accordance with the first conductive layer 310 since the ceramic substrate 500 has good heat dissipation properties. In addition, the insulating properties of the ceramic substrate 500 contribute to the creation of a structure in which multiple semiconductors are connected in series to the same substrate 500 in high voltage products.

[0067] The first conductive layer 310 and the second conductive layer 320 may be made of Ag, Au, Ti, Al, Cr, Pt, a TiW alloy, Ni, or any combination thereof. Specifically, in this embodiment, the portion of the first conductive layer 310 contacting the first electrode 610 and the portion of the second conductive layer 320 contacting the second electrode 620 are Ti, Pt, Au, Cr, TiW alloys with relatively stable performance, and the material of the first conductive layer 310 used to fill the recessed portion includes reflective materials such as Al, Cr or Ag. The second conductive layer 320 located under the light emitting area has ITO, which is sequentially used to expand the current, Ag, Ni or TiW, which performs reflection on the light emitted from the light emitting area, and stable metal materials such as Ti, Pt, Au, Cr or TiW, which prevent the diffusion of the above materials.

[0068] 6, a top view of a chip embodying the structure of the present invention is provided from a bird's-eye angle to further illustrate the structure of this embodiment. In this view, a design of a number of recesses evenly distributed at the position of the light-emitting surface can be seen, which has excellent current expansion and heat dissipation properties, and the first electrode 610 and the second electrode 620 are disposed on the outside of the chip. This light-emitting diode chip structure has the advantages of simple and clear material stacking, simple manufacturing technology, and high reliability.

[0069] Please refer to FIG. 7 to FIG. 9. The aging test was performed under conditions where the junction temperature was interfered with from the outside. The conventional old structure immediately stopped emitting light under conditions of junction temperature of 125°C and current of 2000mA. Therefore, in order to impose more unfavorable aging test conditions on the new structure of the present invention, the aging test was performed on the new structure at a junction temperature of 125°C and current of 2000mA, and on the old structure at a junction temperature of 75°C and current of 1500mA. FIG. 7 shows a comparison of the luminance ΔLOP of the new structure and the old structure within 1000 hours, and the new structure has a relatively small change in luminance within 1000 hours and has excellent luminance stability. FIG. 8 shows a comparison of the change value ΔVF of the forward voltage of the new structure and the old structure within 1000 hours, where ΔVF is the difference from the initial forward voltage, and the difference between the two is small. Figure 9 shows a comparison of the leakage current ΔIR between the new and old structures after 1000 hours, where ΔIR is the difference from the initial leakage current, with the new structure having essentially no leakage current, while the old structure's leakage current gradually increases as aging progresses. By summarizing the above test data, it can be concluded that the new structure of the present invention is fundamentally more reliable than the conventional old structure under high temperature and high current density conditions.

[0070] Please refer to Figures 10 to 12. An aging test was performed under conditions where the junction temperature was interfered with from the outside. The aging test was performed on the new structure and the old structure at a junction temperature of 125°C and a current of 1500mA. Figures 10 and 11 compare the luminance ΔLOP and forward voltage change value ΔVF of the new structure and the old structure within 1000 hours, and it can be seen that the difference in the new structure within 1000 hours is relatively small, and the stability is close. Figure 12 compares the leakage current ΔIR of the new structure and the old structure within 1000 hours, and the new structure basically has no leakage current, while the old structure gradually increases as aging progresses. Taking the above test data together, it can be concluded that the new structure of the present invention is basically more reliable than the normal old structure under high temperature and medium to large current density conditions.

[0071] Example 3 is a partial modification of Example 2. In this example, the area of ​​the first conductive layer 310 in contact with the rear side of the first type semiconductor layer 210 is enlarged, and the contact area is set to 2.3% or more and 2.8% or less of the area of ​​the first type semiconductor layer 210. The thickness of the first conductive layer 310 is 0.01 to 0.1 μm, and the thickness of the first conductive layer 310 is 0.01 to 0.1 μm. The ... Different from the previous embodiment, the direct contact area of ​​the first conductive layer 310 with the first type semiconductor layer 210 is increased, which solves the heat dissipation problem of high power products, such as large chips or high voltage chips.

[0072] Example 4 is a further design of Example 3, and roughly speaking, the heat dissipation characteristics can be improved by ensuring the total contact area between the first conductive layer 310 and the first type semiconductor layer 210, but when the diameter of the opening is small, the ratio of the relatively thin first conductive layer 310 to the thermal resistance becomes nonlinear, so in order to ensure heat dissipation in this situation, the design of this actual example designs the opening of the recessed portion to be 32 μm or more and 40 μm or less. As a preferred embodiment, when the diameter of the opening of the recessed portion is 34 μm or more and 36 μm or less, the number of recessed portions is set to 20 to 25.

[0073] As in the configurations of Examples 2 to 4, in Example 5, when the thickness of the first type semiconductor layer 210 is designed to be thicker, for example, when the thickness is set to 2 μm or more, the recessed portions in the first type semiconductor layer 210 are dug to a depth of 1 μm or more, so that heat can be more suitably released from the first type semiconductor layer 210. For example, the thickness of the first type semiconductor layer 210 is 2 μm to 3 μm.

[0074] In the sixth embodiment of the present invention, the LED chips of the first to fifth embodiments are connected by wire bonding, the first electrode 610 of the first LED chip is connected to an external circuit, and the second electrode 620 of the first LED chip is connected to the first electrode 610 of the second LED chip by a gold wire, and a series of LED chips are connected in series by this method, and the second electrode 620 of the last LED chip is connected to an external circuit to form a series of LED chips. In application, the series-connected LED chips have a relatively high operating voltage because the current of the external circuit is constant. Compared with other configurations, the LED chips of this configuration can conveniently implement the design of series connection, and have obvious reliability advantages at high voltage.

[0075] In the seventh embodiment of the present invention, a relatively simple and reliable method for fabricating a light emitting diode device is disclosed. The method used to fabricate the high voltage light emitting device includes the following steps:

[0076] 13, in a first step, an epitaxial structure of a light-emitting diode device is first prepared by forming a semiconductor layer sequence 200 on a growth substrate 100. The semiconductor layer sequence 200 includes a first type semiconductor layer 210, an active layer 230, and a second type semiconductor layer 220, which constitute a semiconductor pn junction. In a second step, a number of recesses are excavated from the back side of the second type semiconductor layer 220, for example by wet etching or dry etching, penetrating the second type semiconductor layer 220 and the active layer 230, and these recesses penetrate at least to the first type semiconductor layer 210.

[0077] 14, in the third step, a conductive layer is coated on the surface of the second-type semiconductor layer 220 except the recessed portion. The conductive layer is a discrete distribution, and a suitable pattern design is made for the subsequent electrical connection. The conductive layer has n pairs of first conductive layer 310 and second conductive layer 320 on the same horizontal plane, which is 2 or more, and each pair of first conductive layer 310 and second conductive layer 320 is located in an independent semiconductor layer sequence 200 to be fabricated later. Then, an insulating layer 400 is coated on the conductive layer of each portion and the bottom and sidewall of the recessed portion.

[0078] 15, in the fourth step, a hole is formed in a part of the insulating layer 400 so that at least a part of the area of ​​the first type semiconductor layer 210 and the n number of first conductive layers 310 at the bottom of the recessed portion is exposed. The exposed part of the area of ​​the first type semiconductor layer 210 and the n number of first conductive layers 310 at the bottom of the recessed portion is used for fabricating an electrical connection window.

[0079] Referring to FIG. 16, in the fifth step, the bottom of the recessed portion, the insulating layer 400, and the n number of first A first conductive layer 310 material is subsequently coated on a portion of the conductive layer 310. The first conductive layer 310 here is mainly composed of multiple materials, which are collectively defined as the first conductive layer 310. An insulating layer 400 is provided between the n first conductive layers 310 to separate them, and the newly coated first conductive layer 310 material extends electrical connection to the first conductive layer 310 of the same height of the second conductive layer 320.

[0080] 17, in the sixth step, the heat dissipation substrate 500 is directly connected to the back side of the first conductive layer 310. The heat dissipation substrate 500 includes ceramic or metal, and the direct connection is usually made by metal bonding or adhesive technology. When the bonding technology is used, a bonding metal is usually made on the substrate 500 and the first conductive layer 310 before the sixth step, and the bonding metal here collectively constitutes the first conductive layer 310.

[0081] In the seventh step, the growth substrate 100 is removed. Removing the growth substrate 100 here involves removing the entire growth substrate 100 or significantly thinning it.

[0082] In the eighth step, a part of the semiconductor layer sequence 200 is removed from the front side of the first type semiconductor layer 210 until the first conductive layer 310 and the second conductive layer 320 are exposed to form n mutually partitioned semiconductor layer sequences 200. The design of this technique allows the relatively stable material up to the first conductive layer 310 and the second conductive layer 320 to be directly removed, so that the controllability of the technique is good.

[0083] In a ninth step, a first electrode 610 is fabricated on the exposed first conductive layer 310 of the first semiconductor layer sequence 200 and a second electrode 620 is fabricated on the exposed second conductive layer 320 of the last semiconductor layer sequence 200, the first electrode 610 and the second electrode 620 being used for connection to an external circuit.

[0084] Referring to Fig. 17, based on the configuration of the light-emitting diode device provided in the above technology, which is mainly used in high voltage equipment, in the eighth embodiment of the present invention, the light-emitting diode units in the configuration adopt a series connection, and the light-emitting diode device has 3-6 or 7-9 light-emitting diode units. To design in the form of a series connection, the semiconductor layer sequences 200 between the light-emitting diode units are partitioned from each other, and are electrically connected to each other by a series connection through a conductive layer inside the semiconductor layer sequence 200. The semiconductor layer sequence 200 has an active layer 230 interposed between a first type semiconductor layer 210 and a second type semiconductor layer 220, and designed for generating radiation. The first type semiconductor layer 210 is located on the front side of the semiconductor layer sequence 200, and the semiconductor layer sequence 200 has one or more recessed areas covered by an insulating layer 400. The recessed portion serves as a current path extending from the back side, which is opposite the front side, of the semiconductor layer sequence 200 through the active layer 230 to the first type semiconductor layer 210, and the first conductive layer 310 having conductive properties is electrically connected to the first type semiconductor layer 210 through the recessed portion, and the second conductive layer 320 having conductive properties is electrically connected to the second type semiconductor layer 220. The first conductive layer 310 and the second conductive layer 320 are electrically insulated from each other by an insulating layer 400 extending from the recessed portion, a first light-emitting diode unit of the plurality of light-emitting diode units has a first electrode 610 that is electrically connected to the exposed first conductive layer 310 by exposing at least a portion of the first conductive layer 310, and a last light-emitting diode unit has a second electrode 620 that is electrically connected to the exposed second conductive layer 320 by exposing at least a portion of the second conductive layer 320, the first electrode 610 and the second electrode 620 being located outside the light-emitting diode device, and the first electrode 610 and the second electrode 620 facing the front side.

[0085] The back side of the first conductive layer 310 is connected to the front side of the substrate 500, and the positive The area of ​​the first type semiconductor layer 210 on the front side that contacts the back side is greater than 1.5% of the area of ​​the first type semiconductor layer 210, and the insulating layer 400 extending from the recessed portion is a second conductive layer. A connection portion is provided that integrally connects the second conductive layer 320 of one of any two adjacent light-emitting diode units to the first conductive layer 310 of the other light-emitting diode unit, and the first conductive layers 310 of the two adjacent light-emitting diode units are separated by an insulating layer 400. In a portion of the light-emitting diode unit, the second conductive layer 320, the insulating layer 400, and the first conductive layer 310 are laminated in order from top to bottom.

[0086] Multiple light emitting diode units share the same supporting and heat dissipating substrate 510. In some thin-film type light emitting diode devices, the height of the semiconductor layer sequence 200 is less than 7 μm.

[0087] In this embodiment, the first conductive layer 310 and the second conductive layer 320 are either or both of a metal material, and may be provided with a current spreading material such as ITO for current spreading. At least a part of the connection part integrally connected between the mutually partitioned semiconductor layer sequences 200 is exposed, and this structure makes it convenient to fabricate the mutually partitioned semiconductor layer sequences 200 because the removal technique only needs to be performed up to the connection part, and is technically easy to control.

[0088] Referring to FIG. 18, based on the above-mentioned Example 8, in order to protect the connection portion from being directly affected by the external environment and even destroyed, the present invention proposes Example 9, in which a part of the insulating layer 400 of every LED unit is exposed from the front side, and at least a part of the connection portion connected together is located below the insulating layer 400. From the structural point of view, it is only necessary to horizontally change the position of the insulating layer 400 used as a partition in the fifth step of the manufacturing technology, and then remove the position of the semiconductor layer sequence 200 until the insulating layer 400 is exposed in the eighth step, which can be achieved.

[0089] In Examples 8 and 9, multiple light-emitting diode units are fabricated by semiconductor layer sequences 200 grown together on the same growth substrate 100, and the multiple light-emitting diode units have similar chip structures, i.e., periodic unit structures can be seen in Figures 11 and 12.

[0090] In Example 10 of the present invention, under high pressure conditions in which multiple semiconductor layer sequences 200 are connected in series, the area of ​​the first conductive layer 310 in contact with the back side of the first type semiconductor layer 210 is enlarged, and the contact area is designed to be 4% or more and 6% or less of the area of ​​the first type semiconductor layer 210.

[0091] The above is merely a preferred embodiment of the present invention, and a person having ordinary knowledge in this technical field may combine, modify or change the above-mentioned examples without violating the spirit and scope of the present invention, and these also belong to the scope of the claims of the present invention. [Explanation of symbols]

[0092] 100 Growth substrate 200 Semiconductor Layer Sequence 210 First type semiconductor layer 220 Second type semiconductor layer 230 Active layer 310 First conductive layer 320 Second conductive layer 400 Insulation Layer 500 boards 610 First electrode 620 Second electrode

Claims

1. A light emitting diode device having a plurality of light emitting diode units connected in series with each other, the semiconductor layer sequences in the light-emitting diode unit are arranged at a distance from one another, the semiconductor layer sequences having a first type of semiconductor layer, a second type of semiconductor layer, and an active layer located between the first type of semiconductor layer and the second type of semiconductor layer and designed for generating radiation, the side on which the first type of semiconductor layer is present is a front side of the semiconductor layer sequence, and the side on which the second type of semiconductor layer is present is a back side of the semiconductor layer sequence, the semiconductor layer sequence has one or more recesses covered by an insulating layer, the recesses extending from a back side opposite a front side of the semiconductor layer sequence through an active layer to the first type semiconductor layer, a first conductive layer electrically connected to the first type semiconductor layer through the recessed portion, and a second conductive layer located on the back side of the semiconductor layer sequence and electrically connected to the second type semiconductor layer; the first conductive layer and the second conductive layer are electrically separated from each other by the insulating layer extending into the recessed portion; a first light emitting diode unit in the plurality of light emitting diode units has at least a portion of the first conductive layer exposed and a first electrode electrically connected to the exposed first conductive layer, and a last light emitting diode unit has at least a portion of the second conductive layer exposed and a second electrode electrically connected to the exposed second conductive layer; the first electrode and the second electrode are located on one side of the first conductive layer and the second conductive layer adjacent to the semiconductor layer sequence, respectively, and one side of the first conductive layer of each of the light emitting diode units away from the semiconductor layer sequence is directly connected to a substrate used for supporting and dissipating heat; the insulating layer covers a back surface side of the second conductive layer, and the second conductive layer of one of any two adjacent light emitting diode units and the first conductive layer of the other light emitting diode unit are provided with a connection portion that is integrally connected, the plurality of light emitting diode units share the same substrate, and all of the light emitting diode units have the second conductive layer, the insulating layer, and the first conductive layer that are stacked in order along a direction from the first type semiconductor layer to the second type semiconductor layer, the first conductive layer is raised by the insulating layer, and a part of the surface is exposed through the insulating layer, 13. A light emitting diode device, comprising: a surface of said first conductive layer in contact with said first electrode and a surface of said second conductive layer in contact with said second electrode, said surface being flush with one another.

2. 2. The light emitting diode device according to claim 1, wherein at least a part of the connection portion connected together is exposed between the semiconductor layer sequences spaced apart from one another.

3. 2. The light-emitting diode device according to claim 1, wherein a portion of the insulating layer is exposed to the front side of all of the light-emitting diode units on one side away from the substrate, and at least a portion of the connection portions connected together are located below the portion of the insulating layer.

4. 2. The light-emitting diode device according to claim 1, wherein the light-emitting diode units have the same chip structure.

5. 2. The light emitting diode device of claim 1, wherein an area of ​​the first conductive layer in contact with the first type semiconductor layer is greater than or equal to 4% and less than or equal to 6% of an area of ​​the first type semiconductor layer.

6. 10. The light emitting diode device of claim 1, wherein the first conductive layer and / or the second conductive layer comprises a metallic material.

7. 2. The light emitting diode device of claim 1, wherein the height of the semiconductor layer sequence is less than or equal to 7 [mu]m.

8. 2. The light-emitting diode device according to claim 1, wherein the substrate is a metal heat dissipation substrate or a ceramic heat dissipation substrate.

9. 2 . The light-emitting diode device according to claim 1 , wherein the first conductive layers of two adjacent light-emitting diode units are separated by the insulating layer.

10. 10. The light emitting diode device of claim 1, wherein the first electrode and the second electrode are located outside the light emitting diode device.

11. 2. The light emitting diode device according to claim 1, wherein the light emitting diode device comprises 3 to 6, or 7 to 9, of the light emitting diode units.

12. 2. The light emitting diode device of claim 1, wherein an area of ​​the first conductive layer adjacent to the semiconductor layer sequence in contact with a side of the first type semiconductor layer adjacent to the active layer is greater than 1.5% of an area of ​​the first type semiconductor layer.

13. 1. A method for fabricating a light emitting diode device, comprising: a first step of producing a semiconductor layer sequence on a growth substrate, the semiconductor layer sequence comprising a first type of semiconductor layer, an active layer and a second type of semiconductor layer; a second step of forming a plurality of recesses penetrating the second type semiconductor layer and the active layer from a side of the second type semiconductor layer opposite the first type semiconductor layer, and penetrating at least to the first type semiconductor layer; a third step of forming a conductive layer having n pairs of first and second conductive layers on the same horizontal plane on the surface of the second type semiconductor layer except for the recessed portion, and then coating the conductive layer and the bottom and sidewall of the recessed portion with an insulating layer; a fourth step of forming a hole in the insulating layer so that at least a partial area of ​​the first type semiconductor layer and the n number of first conductive layers at the bottom of the recessed portion is exposed; a fifth step of subsequently coating a first conductive layer material on the bottom of the recessed portion, the insulating layer and the partial areas of the n number of first conductive layers, and the n number of first conductive layers are partitioned by the insulating layer; a sixth step of directly connecting a substrate used for support and heat dissipation to the first conductive layer on one side remote from the semiconductor layer sequence; a seventh step of removing the growth substrate; an eighth step of removing a portion of the semiconductor layer sequence from a side of the first type semiconductor layer opposite to the second type semiconductor layer, so that the first conductive layer and the second conductive layer are exposed to form n semiconductor layer sequences partitioned from one another, and forming a plurality of light emitting diode units connected in series, all of the light emitting diode units having the second conductive layer, the insulating layer, and the first conductive layer stacked in order along a direction from the first type semiconductor layer to the second type semiconductor layer, the first conductive layer being raised by the insulating layer and a portion of the surface being exposed through the insulating layer; a ninth step of forming a first electrode on the exposed first conductive layer of a first semiconductor layer sequence and simultaneously forming a second electrode on the exposed second conductive layer of a last semiconductor layer sequence, wherein a surface of the first conductive layer in contact with the first electrode and a surface of the second conductive layer in contact with the second electrode are at the same height; 16. A method for fabricating a light emitting diode device, comprising:

14. 14. The method of claim 13, wherein an area of ​​one side of the first conductive layer adjacent to the semiconductor layer sequence in contact with one side of the first type semiconductor layer adjacent to the active layer is greater than 1.5% of an area of ​​the first type semiconductor layer.

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