Photodiode with orthogonal layer structure

Abstract

An embodiment provides a photodiode having two electrodes and an absorption volume for absorbing photons, the absorption volume including a photon incidence region, the two electrodes configured to generate an electric field in an active region between the two electrodes upon application of a reverse voltage, the electric field extending parallel to the photon incidence region, starting at a surface of a semiconductor substrate of the photodiode, the two electrodes extending essentially in a depth direction of the semiconductor substrate perpendicular to the surface, and the photodiode comprising at least one guard structure formed in the semiconductor substrate disposed below at least one of the at least two electrodes.

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE

[0002] Embodiments of the present invention relate to photodiodes, and in particular to photodiodes having an orthogonal layer structure for a photon entrance region. Further embodiments relate to methods for fabricating photodiodes. Some embodiments relate to an orthogonal arrangement of avalanche photodiodes (APDs) in a red-sensitive silicon photomultiplier (SiPM). [Background technology]

[0002] In detection systems such as LIDAR (Light Detection and Ranging), highly sensitive photodetectors with high spectral sensitivity in the near infrared range (NIR) are required. However, in the near infrared range, the photon absorption coefficient of silicon drops significantly and a large volume is required for a suitable number of generated electron-hole pairs. To obtain high electrical gains, the diodes are operated in the reverse breakdown range, which results in the avalanche effect. The problem with conventional detectors is that in vertical structures where the absorption volume increases, the voltage required for the avalanche effect must also increase, as explained below.

[0003] Conventionally, planar avalanche photodiodes (APDs) and silicon photomultipliers (SiPMs) grown on silicon substrates have a vertical layer structure. Figure 1 illustrates the structure of a vertical avalanche photodiode.

[0004] In detail, FIG. 1a shows a vertical dopant profile progression n + -pip + [1] shows a schematic cross-section of the basic structure of an avalanche photodiode (APD). The bottom p+ region serves to improve the electrical transition to the metal rear contact. The n-doped region at the top contact edge acts as a guard structure against interference effects from the surrounding intrinsic region.

[0005] FIG. 1b illustrates diagrammatically the progression of dopant, absorption, electric field and conductor bands plotted on a vertical cross section through the central active region of the avalanche photodiode (APD) shown in FIG. 1a[2].

[0006] Diodes operate in the reverse breakdown region: upon absorption of a photon in the active region, electron-hole pairs are generated, creating an avalanche effect during operation, allowing for strong / high / large signal amplification.

[0007] In a typical planar photodiode, the electric field and the light direction run parallel. If the absorption capacity is reduced, this equates to a loss of sensitivity at longer wavelengths. This loss of sensitivity can be compensated for by a longer absorption path (= a larger space charge zone (SCR)).

[0008] To generate deep space charge zones, high operating voltages and lightly doped silicon materials are required. If amplifying photoreceivers such as avalanche photodiodes or silicon photomultipliers operating with very high internal electric field strengths are used, so-called guard structures are required to prevent undesired lateral dielectric breakdown.

[0009] As voltage increases (=deeper SCR = increased red sensitivity), these guard structures become larger and larger.

[0010] These guard structures occupy areas of the photon incident region that are unavailable for photon detection, and therefore the area efficiency of the diode (the efficiency of the diode over its total area) decreases during operation at higher voltages.

[0011] In [3], a lateral avalanche photodiode formed in an SOI layer is described, where the doping of the multiplication layer is produced by surface implantation and subsequent diffusion, which is carried out throughout the entire depth of the SOI layer. Here, the concentration of dopants is higher at the surface than in the lower part of the SOI layer. This creates a depth-dependent change in the breakdown voltage, so that avalanche photodiodes that function only to a depth of a few micrometers cannot be produced. Only after this diffusion is trench etching carried out to realize the cathode electrode. Summary of the Invention

[0012] SUMMARY OF THE PRESENT EMBODIMENTS An object of the present invention is to provide a photodiode having improved area efficiency and high sensitivity in the long wavelength region.

[0013] This object is solved by the independent claims. Advantageous further developments can be found in the dependent claims.

[0014] An embodiment provides a photodiode having two electrodes [e.g., an anode and a cathode] within an absorption volume for absorbing photons, where the absorption volume includes a photon incident region, and the two electrodes are configured to generate an electric field in an active region [e.g., the absorption volume] between the two electrodes when a reverse voltage is applied, where the electric field extends parallel to the photon incident region [e.g., the magnetic field lines of the electric field extend parallel to the photon incident region].

[0015] In an embodiment, starting from a surface of a semiconductor substrate of the photodiode, the two electrodes may extend in a depth direction of the semiconductor substrate essentially perpendicular to the surface, and the photodiode comprises at least one guard structure formed in the semiconductor substrate arranged below at least one of the at least two electrodes.

[0016] In an embodiment, the at least one guard structure may be surrounded laterally and in depth by the semiconductor substrate.

[0017] In embodiments, the lateral extension of at least one guard structure may be 2 to 5 times the lateral extension of the corresponding electrode.

[0018] In an embodiment, at least one guard structure may be spherical, cubic or rectangular, each having strongly rounded corners or edges.

[0019] In an embodiment, the semiconductor substrate is a continuous silicon semiconductor substrate.

[0020] In an embodiment, the two electrodes may extend essentially orthogonally (eg, at an angle of 90°, or at an angle of 70° to 110°) relative to the photon incident region.

[0021] In an embodiment, starting from the surface of the semiconductor substrate, the two electrodes may extend depthwise into the semiconductor substrate to a depth of at least 5 μm or more [eg, 10 μm to 30 μm].

[0022] In an embodiment, starting from the surface of the semiconductor substrate (101) of the photodiode, the two electrodes can extend essentially perpendicular to the surface in the depth direction of the semiconductor substrate 101 [e.g., at an angle of 90°, or at an angle between 70° and 110°] [e.g., if the surface extends parallel to the photon incidence region].

[0023] In an embodiment, the absorbing volume may be located between two electrodes.

[0024] In an embodiment, the layers [e.g., semiconductor layers] of the diode layer stack between the two electrodes can extend essentially orthogonal [e.g., at an angle of 90°, or at an angle of 70° to 110°] to the photon incidence region.

[0025] In an embodiment, the diode layer stack may include the following layers: -p + Doped layer, - True or p - Doped layer, -p doped layer, and -n + Doped layer.

[0026] In an embodiment, the diode layer stack may include the following layers: -n + Doped layer, - True or n - Doped layer, -n-doped layer, and -p + Doped layer.

[0027] In embodiments, the diode layer stack may also alternatively include the following layers: -n + Doped layer, -intrinsic layer, -p doped layer, -intrinsic layer, -p + Doped layer.

[0028] In embodiments, the diode layer stack may also alternatively include the following layers: -p + Doped layer, -intrinsic layer, -n-doped layer, -intrinsic layer, -n + Doped layer.

[0029] In an embodiment, the photodiode may comprise at least one guard structure disposed below (e.g. directly below) at least one of the at least two electrodes (e.g. to concentrate the electric field in a region of the absorbing volume (e.g. and to reduce it in edge regions)) [e.g. in the depth direction of the semiconductor substrate of the photodiode].

[0030] In an embodiment, the photodiode may be an avalanche photodiode or a photomultiplier tube.

[0031] A further embodiment provides a method for manufacturing a photodiode. The method includes providing a semiconductor substrate. The method further includes providing at least two electrodes (e.g., an anode and a cathode) in or on the semiconductor substrate. The method further includes providing a diode layer stack between the at least two electrodes, the layers of the diode layer stack extending essentially perpendicular (e.g., at an angle of 90° or at an angle between 70° and 110°) to a surface of the semiconductor substrate.

[0032] In an embodiment, at least two electrodes and a diode layer stack can be provided in the semiconductor substrate by starting from a surface of the semiconductor substrate, forming at least two spaced apart recesses [e.g., trenches] in the semiconductor substrate [e.g., in the depth direction of the semiconductor substrate, i.e., perpendicular to the surface of the semiconductor substrate], doping the semiconductor substrate between the at least two recesses to obtain a diode layer stack [e.g., a diode layer structure] between the at least two recesses, the layers of the diode layer stack extending essentially perpendicular [e.g., at an angle of 90°, or at an angle of 70° to 110°] to the surface of the semiconductor substrate, and providing at least two electrodes [e.g., an anode and a cathode] in the at least two recesses.

[0033] In an embodiment, starting from a surface of a semiconductor substrate of the photodiode, the two electrodes may extend in a depth direction of the semiconductor substrate essentially perpendicular to the surface, and the method further includes forming at least one guard structure below at least one of the at least two electrodes in the semiconductor substrate.

[0034] In an embodiment, the at least two electrodes, the guard structure and the diode layer stack may be provided in the semiconductor substrate by starting from a surface of the semiconductor substrate, forming at least two spaced apart recesses in the semiconductor substrate, forming a guard structure recess below one of the at least two electrodes, starting from the at least two recesses and partially starting from the guard structure recess, doping the semiconductor substrate between the at least two recesses to obtain the guard structure and the diode layer stack between the at least two recesses, the layers of the diode layer stack extending essentially perpendicular to the surface of the semiconductor substrate, and providing the at least two electrodes in the at least two recesses.

[0035] In an embodiment, the at least two recesses may be formed by etching, or by local oxidation of the semiconductor substrate and subsequent removal of the oxide, or by growth by selective deposition.

[0036] In an embodiment, the semiconductor substrate may be at least partially doped from at least two recesses.

[0037] In embodiments, the semiconductor substrate may be doped by coating with a dopant-containing layer by chemical vapor deposition or by doping from the gas phase.

[0038] In an embodiment, the at least two electrodes and the diode layer stack can be provided on a semiconductor substrate by layer-by-layer growth (e.g., epitaxy) of the at least two electrodes and layer-by-layer growth (e.g., epitaxy) and local doping of the diode layer stack.

[0039] In an embodiment, the diode layer stack may be doped by ion implantation in conjunction with photolithography.

[0040] In an embodiment, the diode layer stack may include the following layers: -p + Doped layer, - True or p - Doped layer, -p doped layer, and -n + Doped layer.

[0041] In an embodiment, the diode layer stack may include the following layers: -n + Doped layer, - True or n - Doped layer, -n-doped layer, and -p + Doped layer.

[0042] In embodiments, the diode layer stack may also alternatively include the following layers: -n + Doped layer, -intrinsic layer, -p doped layer, -intrinsic layer, -p + Doped layer.

[0043] In embodiments, the diode layer stack may also alternatively include the following layers: -p + Doped layer, -intrinsic layer, -n-doped layer, -intrinsic layer, -n + Doped layer.

[0044] In an embodiment, the at least two electrodes may be formed by providing and structuring a metallization layer and / or a highly doped layer.

[0045] In an embodiment, the method may further include forming at least one guard structure below (e.g. directly below) at least one of the at least two electrodes [e.g. to concentrate the electric field in the region of the absorbing volume (e.g. and to reduce this in edge regions or to suppress current paths / leakage currents)].

[0046] In an embodiment, the photodiode may be an avalanche photodiode or a photomultiplier tube.

[0047] A further embodiment provides an orthogonal arrangement for an avalanche photodiode (APD) and a silicon photomultiplier (SiPM) with high red sensitivity.

[0048] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. [Brief description of the drawings]

[0049] [Figure 1a] Here is a schematic diagram of the basic structure of an avalanche photodiode in cross section with a vertical dopant profile progression n+-pi-p+[1]. [Figure 1b] Diagram of the progression of dopant, absorption, electric field and conductor bands plotted on a vertical cross section through the central active region of the avalanche photodiode (APD) shown in Figure 1a[2]. [Figure 2a] 1 is a schematic cross-sectional view of a photodiode according to an embodiment of the present invention. [Figure 2b] 1 is a schematic cross-sectional view of a photodiode according to an embodiment of the present invention. [Figure 3a] FIG. 1 is a schematic cross-sectional view of a conventional avalanche photodiode. [Figure 3b] 1 is a schematic cross-sectional view of an avalanche photodiode according to an embodiment of the present invention. [Figure 4] FIG. 2 is a flow diagram of a method for manufacturing a photodiode according to an embodiment of the present invention. [Figure 5a] 2A-2C are schematic cross-sectional views of a photodiode during manufacture of the photodiode after the step of providing a semiconductor substrate; [Figure 5b] 2 is a schematic diagram of a photodiode during fabrication of the photodiode after a step of forming at least two spaced apart recesses in a semiconductor substrate; [Figure 5c]1 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after a step of doping the semiconductor substrate between the at least two recesses. [Figure 5d] 4 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after a step of providing at least two electrodes in the at least two recesses; FIG. [Figure 6a] 2 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after the steps of providing a semiconductor substrate and growing a first layer on a surface of the semiconductor substrate; [Figure 6b] 1 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after a step of local doping of the first layer; [Figure 6c] 2 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after a step of growing a second layer on the first layer; [Figure 6d] 1 is a schematic cross-sectional view of a photodiode during manufacture of the photodiode after a step of local doping of the second layer. [Figure 6e] 2 is a schematic cross-sectional view of a photodiode during fabrication of the photodiode after several layers have been grown on a semiconductor substrate and contacts have been provided on the doped regions. FIG. [Figure 7] FIG. 4 is a schematic cross-sectional view of a photodiode according to another embodiment of the present invention. [Figure 8a] 2A-2C are schematic cross-sectional views of a photodiode during manufacture of the photodiode after a step of forming an avalanche layer of the diode layer stack of the photodiode; [Figure 8b] 4 is a schematic cross-sectional view of a photodiode during fabrication of the photodiode after steps of forming a first electrode (eg, a cathode) as well as a guard structure below the first electrode. [Figure 8c] 1 is a schematic cross-sectional view of a photodiode during fabrication of the photodiode after fabrication of another layer of the diode layer stack, a second electrode, and contacts for the first and second electrodes. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0050] In the following description of embodiments of the present invention, the same or equivalent elements are provided with the same reference symbols in the drawings so that their descriptions are interchangeable.

[0051] 2a shows a schematic cross-sectional view of a photodiode 100 according to an embodiment of the present invention. The photodiode includes a semiconductor substrate 101, two electrodes 102 and 104 (e.g., an anode and a cathode) formed in the semiconductor substrate 101, and an absorption volume 112 between the electrodes 102 and 104 for absorbing photons 108, the absorption volume 112 including a photon incidence region 106 on or parallel to a surface 105 of the semiconductor substrate 101. The electrodes 102 and 104 are configured to generate an electric field 110 in an active region between the electrodes 102 and 104 (e.g., in the absorption volume 112) when a reverse voltage is applied, the electric field 110 extending parallel to the photon incidence region 106 or the surface 105 of the photodiode 100.

[0052] 2a, the electrodes 102 and 104 are disposed essentially orthogonally (e.g., at an angle of 90° or at an angle of 70° to 110°) to the photon incident region 106 or surface 105 of the photodiode 100. Thus, starting from the surface 105 of the semiconductor substrate 101 of the photodiode 100, the electrodes 102 and 104 extend essentially orthogonally to the surface 105 in the depth direction of the semiconductor substrate 101.

[0053] 2b shows a schematic cross-sectional view of a photodiode 100 according to an embodiment of the present invention. In comparison with FIG. 2a, FIG. 2b further shows an exemplary diode layer structure 128 of the photodiode 100. As seen in FIG. 2b, the layers 120, 122, 124, 126 of the diode layer structure 128 can be disposed essentially orthogonal to the photon incident region 106 or surface 105 of the photodiode 100.

[0054] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -p + doped layer 120; - True or p - doped layer 122; -p doped layer 124, and -n - Doped layer 126 .

[0055] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -n + Doped layer, - True or n - Doped layer, -n-doped layer, and -p + Doped layer.

[0056] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -n + Doped layer, -intrinsic layer, -p doped layer, -intrinsic layer, -p + Doped layer.

[0057] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -p + Doped layer, -intrinsic layer, -n-doped layer, -intrinsic layer, -n + Doped layer.

[0058] In an embodiment, the photodiode may be an avalanche photodiode or a photomultiplier tube.

[0059] Specific embodiments of the photodiode 100 are described in more detail below. FIG. 3 shows a comparison between a conventional vertical avalanche photodiode 10 and an orthogonal avalanche photodiode 100 (an avalanche photodiode with an orthogonal structure) according to an embodiment of the present invention.

[0060] In detail, Fig. 3a shows a schematic cross-sectional view of a conventional avalanche photodiode 100. As can be seen in Fig. 3a, this is a planar avalanche diode with a vertical structure in which the anode 12 and the cathode 14 are arranged vertically, and when a reverse voltage is applied, an electric field 16 is generated between the anode 12 and the cathode 14, which runs perpendicular to the photon incidence area 18 of the photodiode 10 or parallel to the absorption direction of the photons 20. Thus, the layers (p + , p- or i, p, n + ) also extend parallel to the photon entrance area 18 of the photodiode.

[0061] Meanwhile, FIG. 3b shows a cross-sectional schematic diagram of an avalanche photodiode 100 according to an embodiment of the present invention. That is, FIG. 3b shows the concept of a three-dimensional orthogonal avalanche photodiode. Starting from a recess in the substrate, a deep-reaching active region can be generated by dopants. As seen in FIG. 3b, the photodiode 100 has an orthogonal structure, and the anode 110 and the cathode 104 are arranged orthogonally, so that upon application of a reverse voltage, an electric field 110 is generated between the anode 100 and the cathode 104, which extends parallel to the photon incident region 106 of the photodiode 100 or orthogonal to the absorption direction of the photons 108. Thus, the layers (p+, p- or i, p, n+) of the diode layer structure of the photodiode also extend orthogonally to the photon incident region 406.

[0062] An embodiment of the present invention makes it possible to prevent the dependency between absorption capacity and high operating voltages, since the electric field and the light incidence (light absorption) run perpendicular to each other.

[0063] The electric field or operating voltage of the photodiode is defined by the distance between the cathode and the anode. Absorption through the depth of the active field in the silicon. With an orthogonal arrangement, the operating voltage and the absorption depth can be decoupled. The operating voltage can be adapted by the lateral dimensions.

[0064] Vertical photodiodes (see FIG. 3a) as well as orthogonal photodiodes (see FIG. 3b) require so-called guard structures 22 or 130 so that avalanche multiplication or Geiger mode breakdown occurs only in the intended area. With orthogonal photodiodes 100, these guard structures 130 can be kept small relative to the photon incidence area.

[0065] Prevention of failures in undesirable locations due to local drops in the field strength can be obtained by the following measures (guard structures): By lateral geometrical measures, such as closed cell structures (rotationally symmetric structures). · By increasing the radius to prevent field peaks. By reducing the local dopant concentration and therefore increasing the space charge zone. By suppressing the current path with an isolator layer.

[0066] The embodiment has the advantage that, in theory, an absorbing volume of any depth can be created using orthogonal structures, independent of the configuration of the electrical operating voltage.

[0067] The embodiment has the advantage that in an orthogonal photodiode (as opposed to a vertical photodiode), the guard structure can be structured such that it does not reduce the photon incidence area, for example by attaching the guard structure to the lower end of the electrode.

[0068] Embodiments of the present invention are used in cost-effective components with higher absorption and greater area efficiency to improve systems that use avalanche photodiodes or silicon photomultipliers such as: ·LIDAR technology. Highly sensitive photon spectroscopy.

[0069] 4 shows a flow diagram of a method 200 for manufacturing a photodiode. The method 200 includes a step 202 of providing a semiconductor substrate. Further, the method includes a step 204 of providing at least two electrodes in or on the semiconductor substrate. Further, the method 200 includes a step 206 of providing a diode layer stack between the at least two electrodes, the layers of the diode layer stack extending essentially perpendicular to a surface of the semiconductor substrate.

[0070] Two embodiments of the method 200 shown in FIG. 4 for manufacturing a photodiode are described in more detail below with reference to FIGS. 5 and 6, which show schematic cross-sectional views of a photodiode after different steps of the method for manufacturing the photodiode.

[0071] Figure 5a shows a schematic cross-sectional view of a photodiode during manufacture of the photodiode 100 after the step of providing a semiconductor substrate 101. The semiconductor substrate 101 may be, for example, a silicon semiconductor substrate.

[0072] FIG. 5b shows a schematic diagram of a photodiode 100 during fabrication after a step of forming at least two spaced apart recesses 103 (e.g. trenches) in the semiconductor substrate 105 starting from the surface 105 of the semiconductor substrate 101.

[0073] As can be seen in FIG. 5 b , the recess 103 in the semiconductor substrate 101 may extend in a depth direction of the semiconductor substrate 101 , i.e. perpendicular to the surface 105 of the semiconductor substrate 101 .

[0074] In an embodiment, the at least two recesses 103 may be formed by etching. Alternatively, the at least two recesses 103 can be formed by local oxidation of the semiconductor substrate and subsequent removal of the oxide, or by growth by selective deposition.

[0075] FIG. 5c shows a schematic cross-sectional view of the photodiode 100 during manufacture after a step of doping the semiconductor substrate 101 between the at least two recesses 103 to obtain a diode layer stack 128 between the at least two recesses 103.

[0076] As can be seen in FIG. 5 c , the layers 120 , 122 , 124 , 126 of the diode layer stack 128 may extend essentially perpendicular to the surface 105 of the semiconductor substrate 101 .

[0077] It should be noted here that the layers 120, 122, 124, 126 in FIG. 5c are shown by way of example only, and that the diode layer stack 128 can also be realized with a different number of layers and different layer arrangements.

[0078] In an embodiment, the semiconductor substrate 101 may be at least partially doped from at least two recesses 103 .

[0079] In an embodiment, the semiconductor substrate 101 may be doped by coating with a dopant-containing layer by chemical vapor deposition or by doping from the gas phase.

[0080] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -p + Doped layer, - True or p - Doped layer, -p doped layer, and -n + Doped layer.

[0081] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -n + Doped layer, - True or n - Doped layer, -n-doped layer, and -p + Doped layer.

[0082] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -n + Doped layer, -intrinsic layer, -p doped layer, -intrinsic layer, -p + Doped layer.

[0083] In an embodiment, the diode layer structure 128 of the photodiode 100 may include the following layers: -p + Doped layer, -intrinsic layer, -n-doped layer, -intrinsic layer, -n + Doped layer.

[0084] FIG. 5d shows a schematic cross-sectional view of a photodiode during fabrication of the photodiode 100 after a step of providing the at least two electrodes 102 and 104 in the at least two recesses.

[0085] In an embodiment, the at least two electrodes may be formed by providing and structuring a metallization layer and / or a highly doped layer.

[0086] FIG. 6 a shows a schematic cross-sectional view of a photodiode during fabrication of the photodiode 100 after the steps of providing a semiconductor substrate 101 and growing a first layer 130_1 on the surface of the semiconductor substrate 101 .

[0087] In an embodiment, the semiconductor substrate 101 may be a silicon semiconductor substrate. In an embodiment, the first layer 130_1 may be an intrinsic layer. In an embodiment, the first layer 130_1 may be a first epitaxy layer, such that the first layer 130_1 may be grown by epitaxy.

[0088] FIG. 6b shows a schematic cross-sectional view of an in-process photodiode 100 after a step of locally doping the first layer 130_1.

[0089] As can be seen in Fig. 6b, by locally doping, p + doped region 140, p-doped region 142 and n + Doped regions 140, 142 and 144, such as doped region 144, may be obtained in the first layer 130_1.

[0090] In an embodiment, the doping can be performed, for example, by ion implantation in conjunction with photolithography.

[0091] FIG. 6c shows a schematic cross-sectional view of an in-process photodiode 100 after a step of growing a second layer 130_2 on the first layer 130_1.

[0092] In an embodiment, the second layer 130_2 may be an intrinsic layer. In an embodiment, the second layer 130_2 can be grown by epitaxy, such that the second layer 130_2 can be a second epitaxy layer.

[0093] FIG. 6d shows a schematic cross-sectional view of an in-process photodiode 100 after a step of locally doping the second layer 130_2.

[0094] As can be seen in Fig. 6d, by locally doping, p +doped region 140, p-doped region 142 and n + Doped regions 140, 142 and 144, such as doped region 144, may also be obtained in the second layer 130_2.

[0095] In an embodiment, the doping may be performed by, for example, ion implantation in conjunction with photolithography.

[0096] FIG. 6e shows a schematic cross-sectional view of the photodiode 100 during fabrication after several layers 130 have been grown on the semiconductor substrate 101 and contacts 146 and 148, such as a contact 146 for an anode and a contact 148 for a cathode, have been provided on the doped regions 140 and 144.

[0097] Optionally, a guard layer 129, such as an oxide layer (eg, SiO2), may be provided on the growth layer.

[0098] In an embodiment, the photodiode may be an avalanche photodiode or a photomultiplier tube.

[0099] In an embodiment, as described above (see for example FIG. 3b), the photodiode 100 may comprise at least one guard structure 130 arranged in the depth direction of the semiconductor substrate of the photodiode 100 below at least one of the at least two electrodes, for example to concentrate the electric field in the region of the absorbing volume or to reduce the electric field in the edge regions. A detailed embodiment of a photodiode 100 having such a guard structure 130 is described in more detail below. The following description of the photodiode 100 or the guard structure 130 here is of course equally applicable to the embodiment of the photodiode 100 described above.

[0100] 7 shows a schematic cross-sectional view of a photodiode 100 according to an embodiment of the present invention. The photodiode 100 includes a semiconductor substrate 101, two electrodes 102 and 104 (e.g., an anode 102 and a cathode 104) formed in the semiconductor substrate 101, an absorption volume 112 for absorbing photons between the two electrodes 102 and 104, and a diode layer stack 128 between the two electrodes 102 and 104, with the layers 120, 122, 124 and 126 of the diode layer stack 128 in the region of the absorption volume 112 extending essentially perpendicular to the surface 105 of the semiconductor substrate 101 or the photon incidence region 106 of the photodiode 100 (lateral avalanche photodiode).

[0101] As a result, as explained in detail above, when a reverse voltage is applied between the two electrodes 102, 104, an electric field is generated between the two electrodes 102, 104 extending parallel to the photon incident region 106 of the photodiode 100 or the surface 105 of the semiconductor substrate 101.

[0102] The diode layer stack 128 is p + Doped layer 120, intrinsic or p - doped layer 122, p-doped layer 124, and n + Alternatively, it should be appreciated that the diode layer stack 128 may include a doped layer 126. + Doped layer 120, intrinsic or n - doped layer 122, n-doped layer 124, and p + It may include a doped layer.

[0103] In an embodiment, the semiconductor substrate 101 may be a continuous semiconductor substrate, such as a continuous silicon semiconductor substrate, in which the photodiode 100 may be formed in the continuous semiconductor substrate 101. Thus, in an embodiment, a silicon-on-insulator (SOI) substrate is not required, as is the case for example in [3].

[0104] In an embodiment, starting from the surface 105 of the semiconductor substrate 101, the two electrodes 102 and 104 may extend into the semiconductor substrate 101 to a depth of at least 5 μm (eg, 10 μm to 20 μm, or 10 μm to 30 μm).

[0105] Here, the two electrodes 102, 104 can be formed in two spaced apart trenches in a semiconductor substrate 101. Before filling the two trenches with an electrode material (e.g., a metallization layer or a highly doped layer), the layers 120, 124 and 126 of the diode layer stack 128 can be produced by coating the walls of the two trenches with respective dopants and diffusing them, resulting in the shape of the layers 120, 124 and 126 around the respective trenches or electrodes 102 and 104 shown in FIG.

[0106] For geometric reasons, an electric field enhancement occurs at the bottom of one of the trenches filled with a conductive material, such as the trench-forming electrode 104 (cathode) of Figure 7, thereby lowering the dielectric breakdown voltage there. The breakdown voltage can be significantly increased by a guard structure 130 (e.g., a guard structure), thereby exceeding the desired or required lateral breakdown voltage.

[0107] Thus, in an embodiment, the guard structure 130 is formed below at least one of the two electrodes 102 and 104, such as below the electrode 104 (cathode) in FIG.

[0108] In an embodiment, this guard structure 130 may be created by reducing the dopant concentration of the avalanche zone 124 and the cathode 104 at the bottom end of the trench.

[0109] Alternatively, in an embodiment, the guard structure 130 can be created by appropriately increasing the electrode radius at the bottom of the trench. This can be accomplished, for example, by a spherical extension during the trench etch. As a result, the breakdown voltage can be adjusted independently of the lateral breakdown voltage.

[0110] In an embodiment, the lateral extension of the guard structure 130 (e.g., laterally across the semiconductor substrate or parallel to the surface 105 of the semiconductor substrate) may be two to five times the lateral extension (e.g., diameter) of the corresponding trench or electrode.

[0111] In an embodiment, the lateral and / or depth extension of the guard structures 130 may be limited, for example, to 2 to 5 times the lateral extension (eg, diameter) of the corresponding trench or electrode.

[0112] In an embodiment, the guard structures 130 may be spherical, cubic, or rectangular, each with strongly rounded corners.

[0113] If the corresponding electrode (e.g., cathode) is formed as an (essentially) circular rod or a closed rotationally symmetric locus, no lateral guard structures are necessary. For example, the corresponding electrode (e.g., cathode) can be placed at the center of the cell or as a frame for the cell.

[0114] In the following, an embodiment of a method for manufacturing a photodiode 101 having such a guard structure 130 under at least one of the two electrodes is described in more detail with reference to Figures 8a to 8c, where Figures 8a to 8c show different intermediate products during the manufacturing of the photodiode 101. Here, the manufacturing of a spherical guard structure 130 is shown as an example. However, the following description is also applicable to other guard structures accordingly.

[0115] FIG. 8a shows a schematic cross-sectional view of a photodiode 100 during its manufacture after a step of forming layer 124 (avalanche layer / avalanche zone) of the diode layer stack. For this, firstly a semiconductor substrate 101, such as a silicon semiconductor substrate, is provided. A first oxide layer 150 is deposited on the surface 105 of the semiconductor substrate 101 and a first trench 103_1 is formed in the semiconductor substrate 101, for example starting from the surface 105 of the semiconductor substrate 101 in the depth direction of the semiconductor substrate (for example perpendicular to the surface 105), for example to a depth of at least 5 μm (for example 10 μm to 20 μm, or 10 μm to 30 μm). Here, the first trench 103_1 can have a lateral extension (for example a diameter) of, for example, 0.5 μm to 2 μm. The walls of the first trench 103_1 can then be covered with a dopant, such as a p-dopant, and the layer 124 (avalanche layer / zone) can be formed by diffusing the dopant, where the lateral diffusion gradient is depth independent.

[0116] FIG. 8b shows a schematic cross-sectional view of the photodiode 100 during its manufacture after a step of forming the first electrode 104 (e.g. cathode) and a guard structure 130 below the first electrode 104. For this purpose, a spherical recess 131 is etched at the bottom end of the first trench 103_1, for example by isotropic etching (e.g. isotropic spherical etching). Optionally, the first trench 103_1 can be pre-extended in the depth direction, for example by anisotropic etching (e.g. anisotropic trench depth). Subsequently, n is formed on the walls of the first trench 103_1 and the spherical recess 131. + A polysilicon layer 126, such as a polysilicon layer, can be deposited, and ions (e.g., n +ions) diffuse from the polysilicon layer 126 into the layer 124 (avalanche layer / avalanche zone) and below the layer 124 into the semiconductor substrate 101. The part of the polysilicon layer 126 deposited on the first oxide layer 150 can be structured, for example, to limit the lateral extension of the polysilicon layer 126 on the first oxide layer 150. The first trench 130_1 can be filled / closed by depositing a second oxide layer 152. The polysilicon layer 124 can now form the first electrode 104 (e.g., cathode) of the photodiode 100.

[0117] FIG. 8c shows a schematic cross-sectional view of a photodiode during manufacture of the photodiode 100 after manufacture of the layer 120 of the diode layer stack, the second electrode 102 and the contacts of the first and second electrodes 102 and 104. For this, firstly a second trench 103_2 can be formed in the semiconductor substrate 101, starting from the surface 105 of the semiconductor substrate 101, for example in the depth direction of the semiconductor substrate (for example perpendicular to the surface 105), for example to a depth of at least 5 μm (for example 10 μm to 20 μm, or 10 μm to 30 μm). Here, the second trench 103_2 can have a lateral extension (for example a diameter) of, for example, 0.5 μm to 2 μm. The walls of the second trench 103_2 can then be covered with a dopant, such as a p dopant, and the layer 120 of the diode layer stack can be covered with a dopant, such as a p dopant, for example p + The doped layer can be formed by diffusing a dopant, where the lateral diffusion gradient is independent of the depth. The second trench 103_2 is then filled with tungsten or p +The second oxide layer 152 may be filled with an electrode layer 156, such as polysilicon. The portion of the electrode layer 156 deposited on the second oxide layer 152 may be structured, for example, to limit the lateral extension of the electrode layer 156 on the second oxide layer 152. A third oxide layer 154 may then be deposited to close the second trench 103_2. Vias may be formed through the respective oxide layers 152, 154 to contact the respective electrode layers 156 and 126, and a metal layer 160 may be deposited to contact the respective electrode layers 156 and 126. The metal layer 160 may then be structured to provide contact terminals (e.g., bond terminals) 162 and 164.

[0118] An embodiment of the present invention allows the creation of orthogonal avalanche photodiodes (APDs) with depths of 10 μm or more. In an embodiment, the breakdown voltage, and therefore the APD gain, is independent of the depth. This is achieved by the following means: First, a trench etch is performed, then the trench sidewalls are coated with dopants (e.g., coating from the gas phase: CVD, epitaxy, doped oxide, etc.). The dopants are then diffused laterally to create an "avalanche layer" (indicated by reference 124 in Figures 8a-c).

[0119] Although some aspects have been described in the context of an apparatus, it is clear that these aspects also represent a description of a corresponding method, and that a block or device of the apparatus also corresponds to the respective method step or feature of a method step. Similarly, aspects described in the context of a method step also represent a description of a corresponding block or detail or function of the corresponding apparatus. Some or all of the method steps can be performed by (or using) a hardware apparatus, such as a microprocessor, a programmable computer, or an electronic circuit. In some embodiments, some or some of the most important method steps can be performed by such an apparatus.

[0120] The above-described embodiments merely exemplify the principles of the present invention. It is understood that modifications and variations of the configurations and details described herein will be apparent to those skilled in the art. Therefore, it is intended that the present invention be limited only by the scope of the appended claims, and not by the specific details presented as the description and explanation of the embodiments herein.

[0121] Reference text [1]SMSze und MKLee,Semiconductor Devices-Physics and Technology,3.Edition Ed.,John Wiley&Sons,2012

[0122] [2] SMSze und Kwok K.Ng, Physics of Semiconductor Devices, John Wiley&Sons, 2007, pp.102-114,691

[0123] [3] US2014 / 0312449A1

Claims

1. A method (200) for manufacturing a photodiode (100), comprising the steps of: Providing (202) a semiconductor substrate (101); Providing (204) at least two electrodes (102, 104) in or on the semiconductor substrate (101), starting from a surface (105) of the semiconductor substrate (101) of the photodiode (100), the two electrodes (102, 104) extending essentially perpendicularly to the surface (105) in a depth direction of the semiconductor substrate (101); providing (206) a diode layer stack (128) between the at least two electrodes (102, 104), the layers (120, 122, 124, 126) of the diode layer stack (128) extending essentially perpendicular to a surface (105) of the semiconductor substrate (101); forming at least one guard structure (130) in the semiconductor substrate (101) below at least one of the at least two electrodes (102, 104); the at least two electrodes (102, 104), the guard structure (130), and the diode layer stack; Starting from the surface (105) of the semiconductor substrate (101), forming at least two spaced apart recesses (103) in the semiconductor substrate (101); forming a guard structure recess (131) below one of the at least two electrodes (102, 104); doping the semiconductor substrate (101) between the at least two recesses (103), starting from the at least two recesses and partially starting from the guard structure recess (131), obtaining the guard structure (130) and the diode layer stack (128) between the at least two recesses (103), the layers of the diode layer stack (128) extending essentially perpendicular to the surface (105) of the semiconductor substrate (101); The method (200) is provided by providing said at least two electrodes (102, 104) in said at least two recesses (103).

2. said at least two recesses (103) are formed by etching said semiconductor substrate (101) or by local oxidation followed by removal of the oxide, 2. The method of claim 1 (200).

3. The semiconductor substrate (101) is doped by coating with a dopant-containing layer by chemical vapor deposition or by doping from the gas phase, The method (200) of any one of claims 1 to 2.

4. the diode layer stack (128) -p ＋ Doped layer, - True or p － Doped layer, -p doped layer, and -n ＋ doped layer, Alternatively, the diode layer stack (128) comprises: -n ＋ Doped layer, - True or n － Doped layer, - an n-doped layer, and -p ＋ doped layer, including a layer of The method (200) of any one of claims 1 to 3.

5. the at least two electrodes (102, 104) are formed by providing and structuring a metallization layer, or said at least two electrodes (102, 104) being formed by providing and structuring a highly doped layer; The method (200) of any one of claims 1 to 4.

6. The photodiode (100) is an avalanche photodiode or a photomultiplier tube. The method (200) of any one of claims 1 to 5.

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