Systems and methods for LED structures with increased current density - Patents.com

Abstract

The epitaxial structure for a micro light emitting diode (LED) includes a semiconductor substrate (102), an N-type conductive layer (108) on the semiconductor substrate (102), an N-type cladding layer (110) on the N-type conductive layer (108), an oxide layer (210) within the N-type cladding layer (110) and / or between the N-type conductive layer (108) and the N-type cladding layer (110), an active light emitting layer (114) on the cladding layer (110) of a first conductivity type, a P-type cladding layer (118) on the active light emitting layer (114), and a P-type conductive layer (120, 122, 124) on the P-type cladding layer (118). The oxide layer (210, 410) is formed as an oxide ring from an oxide layer precursor AlxGa1-xAs (x is 0.9 or more and less than 1) in a subsequent oxidation process. The oxidation ring effectively increases the PN junction current density and the luminous efficiency of the formed LED device.A two-step transfer fabrication process is used to form the LED device.

Description

[Technical field]

[0001] Technical Field The present disclosure relates generally to light emitting diode (LED) display devices, and more particularly to systems and fabrication methods for micro-LED semiconductor devices and structures that increase the PN junction current density of LEDs. [Background technology]

[0002] background

[0002] Display technology is becoming more and more popular in today's commercial electronic devices. These display panels are widely used in stationary large screens such as liquid crystal display televisions (LCD TVs) and organic light emitting diode televisions (OLED TVs), as well as portable electronic devices such as laptop personal computers, smartphones, tablets, and wearable electronic devices. With the recent development of mini-LED and micro-LED technologies, consumer devices and applications such as augmented reality (AR), projection, heads-up display (HUD), mobile device displays, wearable device displays, and automotive displays require LED panels with increased efficiency and resolution. For example, an AR display integrated into goggles and positioned near the wearer's eyes may have the dimensions of a fingernail while still requiring HD clarity (1280×720 pixels) or higher.

[0003]

[0003] Active matrix liquid crystal displays (LCD) and organic light emitting diode (OLED) displays combined with thin film transistor (TFT) technology are also becoming increasingly popular in today's commercial electronic devices. These displays are widely used in laptop personal computers, smart phones, and personal digital assistants. Millions of pixels work together to create an image on the display. The TFTs turn each pixel on and off individually, acting as a switch to brighten or darken the pixel, allowing convenient and efficient control of each pixel and the entire display.

[0004]

[0004] However, conventional LCD displays suffer from low light efficiency, resulting in high power consumption and limited battery operating time. Although active matrix organic light emitting diode (AMOLED) display panels generally consume less power than LCD panels, AMOLED display panels can still be large power consumers in battery-operated devices. To extend battery life, it is desirable to reduce the power consumption of display panels.

[0005]

[0005] Conventional inorganic semiconductor light emitting diodes (LEDs) have demonstrated excellent light efficiency, making active matrix LED displays more desirable for battery-operated electronic devices. Arrays of driving circuitry and light emitting diodes (LEDs) are used to control millions of pixels to display images on a display. Both monochrome and full-color display panels can be manufactured according to a wide variety of fabrication methods.

[0006]

[0006] However, integrating thousands or even millions of micro LEDs with a pixel driving circuit array is quite challenging. Various fabrication methods have been proposed. In one approach, the control circuitry is fabricated on one substrate and the LEDs are fabricated on a separate substrate. The LEDs are transferred to an intermediate substrate and the original substrate is removed. The LEDs on the intermediate substrate are then picked and placed, one or a few at a time, onto the substrate with the control circuitry. However, this fabrication process is inefficient, costly, and unreliable. In addition, there are no existing manufacturing tools for mass transfer of micro LEDs. Therefore, new tools must be developed.

[0007]

[0007] In another approach, the entire LED array with the original substrate is aligned to the control circuitry and bonded to the control circuitry using metal bonding. The substrate on which the LEDs are fabricated remains in the final product and can cause optical crosstalk. In addition, thermal mismatch between two different substrates can cause stress at the bonding interface, resulting in reliability issues. Furthermore, a multi-color display panel usually requires more LEDs and LEDs of different colors to be grown on different substrate materials compared to a monochromatic display panel, thus making the traditional manufacturing process more complex and inefficient.

[0008]

[0008] It would therefore be desirable to provide an LED structure for a display panel that addresses, among other things, one or more of the above drawbacks. Summary of the Invention [Problem to be solved by the invention]

[0009] overview

[0009] There is a need for improved LED designs that help improve or address one or more of the shortcomings of conventional display systems, such as those mentioned above. In particular, there is a need for LED device structures that can simultaneously increase light emitting efficiency, fabrication efficiency, reliability, and resolution while efficiently maintaining low power consumption. [Means for solving the problem]

[0010]

[0010] A light emitting diode (LED) is a junction luminescent device, and the main structure of an LED is a PN junction. Under forward bias, the PN junction emits visible light or infrared light. The luminous efficiency of an LED depends on the epitaxy material, ohmic contact electrodes, chip structure, geometric shape, and so on.

[0011]

[0011] A display panel displays various colors using a mixture of colors such as red, green, and blue. Each pixel of the display panel includes sub-pixels, such as a red sub-pixel, a green sub-pixel, and a blue sub-pixel. The color of a particular pixel is determined based on the superposition of colors from the sub-pixels. The image formed by the display panel is determined by the combination formed by each of the pixels.

[0012]

[0012] In some embodiments, the multicolor LED device integrates at least two micro LED structures arranged horizontally in separate areas in a pixel area on a display panel. In some embodiments, a plurality of light-emitting layers are fabricated by bonding to a stacked structure as a starting structure of the multicolor LED device. Each of the plurality of light-emitting layers is configured to emit a distinct color. The number of light-emitting layers corresponds to the number of LED structures in the pixel area of ​​the display panel. For example, if the multicolor LED device includes two subpixels, the number of stacked light-emitting layers required during the multicolor LED fabrication process is two. In another example, if the multicolor LED device includes three subpixels, the number of stacked light-emitting layers required during the multicolor LED fabrication process is three. In some embodiments, the plurality of stacked LED structures are aligned vertically coaxially. That is, the plurality of LED structures are aligned along the same common central axis.

[0013]

[0013] In some embodiments, the stacked LED structure allows light emitted from the bottom LED structure to pass through the middle LED structure and the top LED structure, and allows light emitted from the middle LED structure to pass through the top LED structure. The combination of colors of the stacked LED structure results in the final emission color of the single pixel stacked LED device.

[0014]

[0014] Pitch refers to the distance between the centers of adjacent pixels on a display panel. In some embodiments, the pitch can vary from about 40 microns, to about 20 microns, to about 10 microns, and / or preferably to about 5 microns or less. Many efforts have been made to reduce the pitch. Once the pitch specification is determined, the single pixel area is fixed.

[0015]

[0015] Compared with the conventional fabrication process of micro LED display chips that rely on inefficient pick-and-place processes, the micro LED fabrication process disclosed herein efficiently increases the light-emitting efficiency and reliability of micro LED device fabrication, simplifies the LED pixel device structure, and reduces damage to the epitaxial layers of the LED device. For example, the PN junction current density is improved by confining the current by the oxidized layer or oxidized ring at the edge. In another example, a double transfer process is used to fabricate an LED device in which light is emitted from the p-side of the LED device. In addition, the substrate for the micro LED structure does not remain in the final multi-color device, thus reducing crosstalk and misalignment.

[0016]

[0016] In addition, since each LED light emitting layer is a PN junction, in some embodiments, the relative positions of the P-type region layer and the N-type region layer in each LED light emitting layer in the stack structure, such as the top (closest to the LED's light emitting surface) and bottom (closest to the LED's supporting substrate) positions, are not consistent, which allows for flexible and efficient electrode connections in multicolor LED structures.

[0017]

[0017] The present disclosure includes, without limitation, the following exemplary embodiments.

[0018]

[0018] Some exemplary embodiments of the present disclosure include a micro light emitting diode (LED) chip structure. The micro LED chip structure includes a semiconductor substrate, an electrical contact layer on a surface of the semiconductor substrate, a first type conductive layer on the semiconductor substrate, an active light emitting layer on the first type conductive layer, and a second type conductive layer on the active light emitting layer. In some embodiments, the thickness of the second type conductive layer is less than the thickness of the first type conductive layer, and the surface of the second type conductive layer is obtained after the organic material layer is removed.

[0019]

[0019] Some exemplary embodiments of the present disclosure include a micro light emitting diode (LED) chip structure. The micro LED chip structure includes a semiconductor substrate, an electrical contact layer on a surface of the semiconductor substrate, a first type conductive layer on the semiconductor substrate, an active light emitting layer on the first type conductive layer, and a second type conductive layer on the active light emitting layer. In some embodiments, the surface of the second type conductive layer is obtained after the organic material layer is removed.

[0020] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further comprises a second type spacer layer between the active light emitting layer and the second type conductive layer. In some embodiments, the second type spacer layer is used to form a PN junction structure with the active light emitting layer and the first type conductive layer, and the second type conductive layer comprises one or more of the second type conductive transition layers.

[0021]

[0021] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the first type conductive layer is an N-type layer and the second type conductive layer is a P-type layer.

[0022]

[0022] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the semiconductor substrate is an integrated circuit (IC) substrate.

[0023]

[0023] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the electrical contact layer is a metal bonding layer, and the semiconductor substrate and the first type conductive layer are bonded together through a bonding process.

[0024]

[0024] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the second type conductive layer is a P-type GaP layer and the first type conductive layer is an N-type GaAs layer.

[0025]

[0025] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes a first type cladding layer between the first type conductive layer and the active light emitting layer.

[0026]

[0026] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes an oxide layer within the first type cladding layer.

[0027]

[0027] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes an oxide layer between the first type conductive layer and the first type cladding layer.

[0028]

[0028] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes a second type cladding layer between the second type conductive layer and the active light emitting layer.

[0029]

[0029] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes an oxide layer within the second type of cladding layer.

[0030]

[0030] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes an oxide layer between the second type conductive layer and the second type cladding layer.

[0031] In some exemplary embodiments of the micro LED chip structure, or any combination of the exemplary embodiments, the material of the oxide layer is Al. x OGa 1-x As, and x is equal to or greater than 0.9 and less than 1.

[0032]

[0032] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the material of the first type cladding layer is AlInP.

[0033] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the second type cladding layer is selected from the group consisting of AlInP, Al x Ga 1-x It includes one or more layers of InP (x is greater than 0 and less than 1), and GaInP.

[0034]

[0034] In some exemplary embodiments of the micro LED chip structure, or any combination of the exemplary embodiments, the organic material layer is an ultraviolet (UV) cured bonding layer.

[0035]

[0035] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the ratio of the thickness of the second type of conductive layer to the thickness of the first type of conductive layer is 0.025 to 100.

[0036]

[0036] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the ratio of the thickness of the second type of conductive layer to the thickness of the first type of conductive layer is 1.5 to 2.

[0037]

[0037] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the micro LED chip structure further includes a second type cladding layer between the second type conductive layer and the active light emitting layer, and the second type conductive layer includes a second type conductive transition layer.

[0038]

[0038] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the ratio of the thickness of the second type cladding layer to the thickness of the second type conductive transition layer is 0.02 to 120.

[0039]

[0039] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the ratio of the thickness of the second type cladding layer to the thickness of the second type conductive transition layer is 1 to 2.5.

[0040]

[0040] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the second type conductive layer includes, in order from the semiconductor substrate to the first type conductive layer, a lower second type conductive transition layer, a middle second type conductive transition layer, and an upper second type conductive transition layer.

[0041]

[0041] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the conductivity of the lower second type conductive transition layer is less than the conductivity of the middle second type conductive transition layer, which is less than the conductivity of the upper second type conductive transition layer.

[0042] In some exemplary embodiments of the micro LED chip structure, or any combination of exemplary embodiments, the second type cladding layer is selected from AlInP, AlInP, and Al x Ga 1-x It comprises one or more layers of InP (x is 0 or more and 1 or less).

[0043]

[0043] Some exemplary embodiments of the present disclosure include an epitaxial structure for a micro light emitting diode (LED). The epitaxial structure for a micro LED includes a semiconductor substrate, a conductive layer of a first conductivity type on the semiconductor substrate, a cladding layer of a first conductivity type on the conductive layer of the first conductivity type, a first oxide layer in the cladding layer of the first conductivity type, an active light emitting layer on the cladding layer of the first conductivity type, a cladding layer of a second conductivity type on the active light emitting layer, and a conductive layer of a second conductivity type on the cladding layer of the second conductivity type.

[0044]

[0044] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer within the cladding layer of the second conductivity type.

[0045]

[0045] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer between the cladding layer of the second conductivity type and the conductive layer of the second conductivity type.

[0046]

[0046] Some exemplary embodiments of the present disclosure include an epitaxial structure for a micro light emitting diode (LED). The epitaxial structure for a micro LED includes a semiconductor substrate, a conductive layer of a first conductivity type on the semiconductor substrate, a cladding layer of a first conductivity type on the conductive layer of the first conductivity type, a first oxide layer between the conductive layer of the first conductivity type and the cladding layer of the first conductivity type, an active light emitting layer on the cladding layer of the first conductivity type, a cladding layer of a second conductivity type on the active light emitting layer, and a conductive layer of a second conductivity type on the cladding layer of the second conductivity type.

[0047]

[0047] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer between the cladding layer of the second conductivity type and the conductive layer of the second conductivity type.

[0048]

[0048] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer within the cladding layer of the second conductivity type.

[0049]

[0049] Some exemplary embodiments of the present disclosure include an epitaxial structure for a micro light emitting diode (LED). The epitaxial structure for a micro LED includes a semiconductor substrate, a conductive layer of a first conductivity type on the semiconductor substrate, a cladding layer of a first conductivity type on the conductive layer of the first conductivity type, an active light emitting layer on the cladding layer of the first conductivity type, a cladding layer of a second conductivity type on the active light emitting layer, a first oxide layer in the cladding layer of the second conductivity type, and a conductive layer of a second conductivity type on the cladding layer of the second conductivity type.

[0050]

[0050] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer within the cladding layer of the first conductivity type.

[0051]

[0051] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer between the cladding layer of the first conductivity type and the conductive layer of the first conductivity type.

[0052]

[0052] Some exemplary embodiments of the present disclosure include an epitaxial structure for a micro light emitting diode (LED). The epitaxial structure for a micro LED includes a semiconductor substrate, a conductive layer of a first conductivity type on the semiconductor substrate, a cladding layer of a first conductivity type on the conductive layer of the first conductivity type, an active light emitting layer on the cladding layer of the first conductivity type, a cladding layer of a second conductivity type on the active light emitting layer, a conductive layer of a second conductivity type on the cladding layer of the second conductivity type, and a first oxide layer between the cladding layer of the second conductivity type and the conductive layer of the second conductivity type.

[0053]

[0053] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer between the cladding layer of the first conductivity type and the conductive layer of the first conductivity type.

[0054]

[0054] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a second oxide layer within the cladding layer of the first conductivity type.

[0055] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the oxide layer may be formed of an oxide layer precursor Al. x Ga 1-x It is formed as an oxidized ring from As, where x is 0.9 or more and less than 1.

[0056]

[0056] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the cladding layer of the first conductivity type includes one or more layers.

[0057]

[0057] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the cladding layer of the second conductivity type includes one or more layers.

[0058]

[0058] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes, between the semiconductor substrate and the conductive layer of the first conductivity type, in a direction from the semiconductor substrate to the conductive layer of the first conductivity type, a buffer layer of the first conductivity type, and an etch stop layer of the first conductivity type, in that order.

[0059]

[0059] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the epitaxial structure for micro-LEDs further includes a spacer layer of a first conductivity type located below the active light-emitting layer, and a spacer layer of a second conductivity type located above the active light-emitting layer.

[0060]

[0060] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the conductive layer of the second conductivity type includes one or more conductive transition layers.

[0061]

[0061] In some exemplary embodiments of epitaxial structures for microLEDs, or any combination of exemplary embodiments, the conductive layer of the second conductivity type includes, in order, in a direction from the semiconductor substrate to the conductive layer of the first conductivity type, a lower conductive transition layer of the second conductivity type, a middle conductive transition layer of the second conductivity type, and an upper conductive transition layer of the second conductivity type.

[0062]

[0062] In some exemplary embodiments of epitaxial structures for microLEDs, or any combination of exemplary embodiments, the lower conductive transition layer of the second conductivity type has a lesser conductivity than the intermediate conductive transition layer of the second conductivity type, and the intermediate conductive transition layer of the second conductivity type has a lesser conductivity than the upper conductive transition layer of the second conductivity type.

[0063] In some exemplary embodiments of the epitaxial structure for micro LEDs, or any combination of exemplary embodiments, the material of the first oxide layer is Al. x OGa 1-x As, and x is equal to or greater than 0.9 and less than 1.

[0064]

[0064] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the material of the cladding layer of the first conductivity type is AlInP.

[0065] In some exemplary embodiments of the epitaxial structure for micro-LEDs, or any combination of exemplary embodiments, the material of the cladding layer of the second conductivity type is AlInP, and Al x Ga 1-x It comprises one or more layers of InP (x is 0 or more and 1 or less).

[0066]

[0066] The compact design of the LED device and system disclosed herein utilizes a bonding layer and introduces an intermediate substrate, thereby reducing the complexity of the fabrication steps and increasing the overall performance-to-price ratio of the LED display system. Furthermore, the fabrication of the LED display system can reliably and efficiently form the LED structure pattern without holding an additional substrate. Therefore, the implementation of the multi-color LED display system can meet the stringent display requirements of AR and VR, head-up displays (HUD), mobile device displays, wearable device displays, high-definition miniature projectors, and automotive displays compared to using traditional LEDs.

[0067]

[0067] It should be noted that the various embodiments described above can be combined with any other embodiments described herein. The features and advantages described herein are not all-inclusive, and in particular many additional features and advantages will be apparent to those skilled in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the wording used in this specification is primarily selected for readability and instructional purposes, and may not be selected to delineate or limit the scope of the subject matter of the present invention.

[0068] BRIEF DESCRIPTION OF THE DRAWINGS

[0068] In order that the present disclosure may be more fully understood, a more particular description may be given with reference to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the accompanying drawings merely illustrate the relevant features of the present disclosure and are therefore to be considered as illustrative rather than limiting, and other useful features may be possible. [Brief description of the drawings]

[0069] [Figure 1]

[0069] FIG. 1 is a cross-sectional view of an LED structure according to some embodiments. [Figure 2A]

[0070] 1 is a cross-sectional view of an LED structure having an oxide precursor layer in an n-type cladding layer according to some embodiments. [Figure 2B]

[0071] 1 is a cross-sectional view of an LED structure having an oxide layer in an n-type cladding layer according to some embodiments. [Figure 3A]

[0072] 1 is a cross-sectional view of an LED structure having an oxide precursor layer between an n+ type contact layer and an n-type cladding layer according to some embodiments. [Figure 3B]

[0073] 1 is a cross-sectional view of an LED structure having an oxide layer between an n+ type contact layer and an n-type cladding layer according to some embodiments. [Figure 4A]

[0074] 1 is a cross-sectional view of an LED structure having an oxide precursor layer in a p-type cladding layer according to some embodiments. [Figure 4B]

[0075] 1 is a cross-sectional view of an LED structure having an oxide layer in a p-type cladding layer according to some embodiments. [Figure 5A]

[0076] FIG. 1 is a cross-sectional view of an LED structure having an oxide precursor layer between a p-type cladding layer and a p-type transition layer 120 according to some embodiments. [Figure 5B]

[0077] 2 is a cross-sectional view of an LED structure having an oxide layer between a p-type cladding layer and a p-type transition layer according to some embodiments. [Figure 6A]

[0078] 1 illustrates a fabrication process for forming an LED structure having a supporting substrate with an integrated circuit using a one-time transfer process according to some embodiments. [Figure 6B]

[0078] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a one-time transfer process according to some embodiments. [Figure 6C]

[0078] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a one-time transfer process according to some embodiments. [Figure 6D]

[0078] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a one-time transfer process according to some embodiments. [Figure 7A]

[0079] 1 illustrates a fabrication process for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7B]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7C]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7D]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7E]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7F]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7G]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 7H]

[0079] A fabrication process is illustrated for forming an LED structure having a supporting substrate with an integrated circuit using a two-step transfer process according to some embodiments. [Figure 8]

[0080] FIG. 2 is a top view of a micro-LED display panel according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0070]

[0081] According to common practice, the various features illustrated in the figures may not be drawn to scale. As such, dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some drawings may not depict all of the components of a given system, method, or device. Finally, like reference numerals may be used to denote like features throughout the specification and figures.

[0071] Detailed Description

[0082] Numerous details have been described herein to provide a thorough understanding of the example embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many of the specific details, and the claims are limited only by the features and aspects specifically described in the claims. Moreover, well-known processes, components, and materials have not been described in extensive detail so as not to unnecessarily obscure relevant aspects of the embodiments described herein.

[0072]

[0083] Embodiments consistent with this disclosure include a display panel including a substrate having an array of pixel driving circuits, an array of LEDs having the structure described below formed on the substrate, and a method of making the display panel. A display panel with high light extraction efficiency can overcome the shortcomings of conventional display systems.

[0073]

[0084] Typically, at least red, green, and blue colors are overlapped to reproduce a wide array of colors. In some cases, separate monochromatic LED structures are fabricated in different non-overlapping zones within the pixel area to include at least red, green, and blue colors within the pixel area.

[0074]

[0085] In some embodiments, the three LEDs are formed in a stacked structure, for example, starting from a base layer formed by a substrate, a green LED is directly on top of a red LED, and a blue LED is directly on top of a green LED. In some embodiments, the light emitted from the red LED can propagate through the green LED and then through the blue LED to emit from the three-color LED device. In some embodiments, the light emitted from the green LED can propagate through the blue LED to emit from the three-color LED device. In other embodiments, the colors of the monochromatic LEDs are not limited to red, green, and blue, but can be any other visible or invisible colors. In other embodiments, the order of the monochromatic LEDs from the bottom (closest to the substrate) to the top (closest to the light-emitting surface of the LEDs) is not limited to red, green, and blue.

[0075]

[0086] In some embodiments, a single pixel area on a display panel includes at least one single pixel light emitting device, such as an LED or micro LED, or an OLED, and light is emitted from the LED. The LED has a top surface and a bottom surface. In some embodiments, the diameter or width of the top surface of the LED is in the range of 1 μm to 8 μm, and the diameter or width of the bottom surface of the LED is in the range of 3 μm to 10 μm. In some embodiments, the diameter or width of the top surface of the LED is in the range of 8 μm to 25 μm, and the diameter or width of the bottom surface of the LED is in the range of 10 μm to 35 μm. In some embodiments, the height of the LED is in the range of 1 to 10 μm. In some embodiments, the height of the LED is about 1.3 μm. In some embodiments, the diameter or width of the top surface of the LED is equal to or less than the diameter or width of the bottom surface of the LED.

[0076]

[0087] In some embodiments, the display panel includes an array of single pixel LEDs. In some embodiments, the distance between the central axes of two adjacent LEDs ranges from 1 μm to 10 μm. In some embodiments, the distance between the central axes of two adjacent LEDs can vary from about 40 μm to about 20 μm, to about 10 μm, and / or to about 5 μm or less. In some embodiments, the size of the mesa and the distance between the LEDs may depend on the resolution of the display. For example, for a display panel with 5000 pixels per inch (PPI), the diameter or width of the top surface of the LED is 1.5 μm and the diameter or width of the bottom surface of the LED is 2.7 μm. In some embodiments, the distance between the nearest bottom edges of two adjacent LEDs can range from 1 μm to 10 μm. In some embodiments, the distance between the nearest bottom edges of two adjacent LEDs is 2.3 μm.

[0077]

[0088] FIG. 1 is a cross-sectional view of an LED structure 100 according to some embodiments. In some embodiments, the LED structure 100 is for forming one of three-color LED devices in a pixel area of ​​a display panel. In some embodiments, the three-color LED device includes a three-color LED structure such as reference numeral 100. Each of the three-color LED structures forms a subpixel in a single pixel area. In some embodiments, each of the three-color LED structures emits a single color, for example, blue, green, and red. In some embodiments, the colors emitted by the three-color LED structures are different and distinct. In some embodiments, the color emitted by the LED structure 100 is red.

[0078]

[0089] In some embodiments, the display panel includes a plurality of pixels, such as millions of pixels, each pixel including a set of three color LED devices. In some embodiments, the color LED devices can be micro LEDs. Micro LEDs typically have lateral dimensions of 50 microns (um) or less, and can have lateral dimensions of less than 10 um, or even only a few um.

[0079]

[0090] In some embodiments, the LED structure 100 includes a substrate 102. For convenience, "up" is used to mean away from the substrate 102 and "down" means toward the substrate 102, and other directional terms such as top, bottom, above, below, under, below, etc. should be interpreted accordingly.

[0080]

[0091] Generally, an LED color light-emitting layer includes a PN junction with a p-type region / layer and an n-type region / layer, and an active layer between the p-type region / layer and the n-type region / layer.

[0081]

[0092] In some embodiments, the substrate 102 is made of GaAs. In some embodiments, the thickness of the substrate 102 is about 350 μm. In some embodiments, the thickness of the substrate 102 is about 325 μm to 375 μm. In some embodiments, the substrate 102 is made of GaAs. 18 ~4.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0082]

[0093] Although some features are described herein using the term "layer," it should be understood that such features are not limited to a single layer, but may include multiple sublayers. In some cases, a "structure" may take the form of a "layer."

[0083]

[0094] In some embodiments, the layers of the LED structure are formed from an epitaxial process, such as metal organic chemical vapor deposition (MOCVD).

[0084]

[0095] In some embodiments, an n-type buffer layer 104 is formed above the substrate 102. The buffer layer is formed before forming subsequent layers to reduce lattice growth mismatch during the epitaxial process. In some embodiments, the n-type buffer layer 104 is formed of GaAs. In some embodiments, the n-type buffer layer 104 has a thickness of about 200 nm. In some embodiments, the n-type buffer layer 104 has a thickness of about 190 nm to 210 nm. In some embodiments, the n-type buffer layer 104 has a thickness of about 1.0×10 18 ~5.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0085]

[0096] In some embodiments, an n-type etch stop layer 106 is formed above the n-type buffer layer 104. The n-type etch stop layer 106 can be used in subsequent processes to + The n-type etch stop layer 106 prevents etching of the n-type contact layer 108 from removing the substrate 102 in a subsequent etching process. The n-type etch stop layer 106 does not react with the selective etching solution for removing GaAs. In some embodiments, the n-type etch stop layer 106 is Al 0.15 It is formed of GaInP. In some embodiments, the n-type etch stop layer 106 has a thickness of about 200 nm. In some embodiments, the n-type etch stop layer 106 has a thickness of about 190 nm to 210 nm. In some embodiments, the n-type etch stop layer 106 has a thickness of about 1.0×10 18 ~5.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0086]

[0097] In some embodiments, n + A n-type contact layer 108 is formed above the n-type etch stop layer 106. + The n-type contact layer 108 is an n-type conductive layer. In some embodiments, + The n-type contact layer 108 is formed of GaAs. +The thickness of the n-type contact layer 108 is about 5 nm to 200 nm. + The mold contact layer 108 is 1.0×10 18 ~5.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0087]

[0098] In some embodiments, the n-type cladding layer 110 is + The n-type cladding layer 110 is formed above the n-type contact layer 108. The n-type cladding layer 110 is used to supply and confine n-type carriers to the PN junction. In some embodiments, the n-type cladding layer 110 is formed of AlInP. In some embodiments, the thickness of the n-type cladding layer 110 is about 100 nm to 5 μm. In some embodiments, the n-type cladding layer 110 has a thickness of about 1.0×10 18 ~5.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0088]

[0099] In some embodiments, an n-type spacer layer 112 is formed above the n-type cladding layer 110 and below the active light emitting layer 114. The n-type spacer layer 112 is used as a barrier layer between the n-type cladding layer 110 and the active light emitting layer 114. In some embodiments, the n-type spacer layer 112 is made of Al 0.8 It is made of GaInP. In some embodiments, the n-type spacer layer 112 has a thickness of about 10 nm to 200 nm.

[0089]

[0100] In some embodiments, an active light emitting layer 114 is formed above the n-type spacer layer 112. In some embodiments, the active light emitting layer 114 is formed as a multiple quantum well structure. In some embodiments, the active light emitting layer 114 is formed of Al x InGaP (x is 0 to 0.5) and Al 0.8 It is made of alternating layers of InGaP, e.g., Al x The first layer of InGaP is Al 0.8 A first layer of InGaP is formed above the first layer of Al0.8 The second layer of InGaP is Al x A first layer of InGaP is formed on the first layer of Al x The second layer of InGaP is Al 0.8 In some embodiments, the active light emitting layer 114 is formed on a second layer of InGaP. x InGaP (x is 0 to 0.5) and Al 0.8 In some embodiments, the Al x A single layer of InGaP (x is 0 to 0.5) is about 3.5 nm. x A single layer of InGaP (x is 0 to 0.5) is about 1 to 30 nm. 0.8 A single layer of InGaP is about 6.5 nm. 0.8 A single layer of InGaP is about 1-30 nm.

[0090]

[0101] In some embodiments, the active LED light emitting layer 114 includes multiple epitaxial underlayers having different compositions. Examples of active LED light emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. Examples of active LED light emitting layers include GaN-based UV / blue / green light emitting layers, AlInGaP-based red / orange light emitting layers, and GaAs or InP-based infrared (IR) light emitting layers.

[0091]

[0102] In some embodiments, a p-type spacer layer 116 is formed above the active light emitting layer 114. The p-type spacer layer 116 is used as a barrier layer between the p-type cladding layer 118 and the active light emitting layer 114. In some embodiments, the p-type spacer layer 116 is Al 0.8 It is made of GaInP. In some embodiments, the p-type spacer layer 116 has a thickness of about 10 nm to 200 nm.

[0092]

[0103] In some embodiments, a p-type cladding layer 118 is formed above the p-type spacer layer 116. The p-type cladding layer 118 is used to supply and confine p-type carriers to the PN junction. In some embodiments, the p-type cladding layer 118 is made of AlInP, Al x Ga y InP (x varies from 1 to 0.9, y varies from 0 to 1), and Al 0.5 For example, the p-type cladding layer 118 may be formed of one or more layers of AlInP, AlInP, and AlInP from bottom to top. 0.5 In another example, the p-type cladding layer 118 is formed of three layers, from bottom to top: AlInP, Al 0.9 GaInP and Al 0.5 In yet another example, the p-type cladding layer 118 is formed of three layers of GaInP: a bottom layer of AlInP, a bottom layer of AlInP, and a bottom layer of GaInP. x Ga 1-x (From bottom to top, the composition of the layers is graded, i.e., x varies from 0 to 1.) In some examples, the p-type cladding layer 118 is formed of AlInP, and Al x Ga 1-x The p-type cladding layer 118 is periodically formed by a plurality of groups of layers of InP (x varies from 0 to 1). In some embodiments, the thickness of the p-type cladding layer 118 is about 100 nm to 5 μm. In some embodiments, the p-type cladding layer 118 is about 1.0×10 17 ~9.0×10 17 cm -3 It is doped with Mg with a carrier concentration of .

[0093]

[0104] In some embodiments, a p-type transition layer 120 is formed above the p-type cladding layer 118. In some embodiments, the p-type transition layer 120 is Al 0.17 It is formed of GaInP. In some embodiments, the p-type transition layer 120 has a thickness of about 20 nm to 100 nm. In some embodiments, the p-type transition layer 120 has a thickness of about 1.0×10 18 cm-3 Greater than 2.0×10 18 cm -3 It is doped with Mg with a carrier concentration of less than 0.1.

[0094]

[0105] In some embodiments, p + A p-type transition layer 122 is formed above the p-type transition layer 120. In some embodiments, + The type transition layer 122 is formed of GaP. In some embodiments, + The thickness of the transition layer 122 is about 10 nm to 5 μm. + The mold transition layer 122 is 2.0×10 18 ~9.0×10 18 cm -3 It is doped with Mg with a carrier concentration of p + The doping concentration of p-type transition layer 122 is higher than the doping concentration of p-type transition layer 120 .

[0095]

[0106] In some embodiments, p ++ The type transition layer 124 is + In some embodiments, the p ++ The type transition layer 124 is formed of GaP. In some embodiments, ++ The thickness of the type transition layer 124 is about 10 nm to 30 nm. ++ The transition layer 124 is 1.0×10 19 ~9.0×10 19 cm -3 It is doped with carbon with a carrier concentration of p ++ The doping concentration of the transition layer 124 is p + The doping concentration of the p-type transition layer 122 is higher than the doping concentration of the p-type transition layer 122. The gradual increase in the doping concentration can stabilize the growth of the p-type transition layer and prevent or mitigate defects and stresses formed from lattice changes.

[0096]

[0107] The p-type conductive layer is a p-type transition layer 120, + Type transition layer 122, and p ++The mold includes layers such as transition layer 124 .

[0097]

[0108] 2A is a cross-sectional view of an LED structure 200 having an oxide precursor layer 202 in the n-type cladding layer 110 according to some embodiments. In some embodiments, the LED structure 200 includes an Al x Ga 1-x The LED structure includes a layer 202 composed of As (x is 0.9 or more and less than 1). In some embodiments, the layer 202 has a thickness of about 1 nm to 100 nm. The rest of the structure of the LED structure is similar or the same as all the layers of the LED structure 100 as described in FIG. 1 . In some embodiments, the layer 202 is located within the n-type cladding layer 110, for example, between a first layer 204 within the n-type cladding layer 110 and a second layer 206 within the n-type cladding layer 110. In some embodiments, the layer 202 is used as a precursor prior to a subsequent oxidation process. ....0×10 17 ~9.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0098]

[0109] 2B is a cross-sectional view of an LED structure 208 having an oxide layer 210 in the n-type cladding layer 110 according to some embodiments. In some embodiments, the LED structure 208 includes an oxide layer 210. In some embodiments, the oxide layer 210 is Al x OGa 1-x 2A , the layer 210 is composed of ZnO, As, where x is equal to or greater than 0.9 and less than 1. The rest of the structure of the LED structure 208 is similar or the same as all the layers of the LED structure 100 as described in FIG. 1 . In some embodiments, the layer 210 is located within the n-type cladding layer 110, for example, between the first layer 204 within the n-type cladding layer 110 and the second layer 206 within the n-type cladding layer 110. In some embodiments, the oxide layer 210 is formed from an oxidation process after all the layers of the LED structure 200 as described in FIG. 2A are formed.

[0099]

[0110] In some embodiments, after all the epitaxial layers of the LED structure 200 are formed, a subsequent oxidation process is applied. In some embodiments, the oxidation process is wet oxidation. In some embodiments, the wet oxidation is performed in a wet oxygen oxidation furnace. In one example, the wet oxygen oxidation furnace is a VF3000 VCSEL furnace manufactured by Koyo Thermo Systems. In some embodiments, nitrogen gas is used as the carrier gas at a flow rate of 1 liter per minute. Oxygen is obtained from water heated to around 98° C. in the wet oxygen oxidation furnace. In some embodiments, the wet oxidation uses an ambient temperature of 380° C. to 500° C. and a time period of up to 2 hours. The oxidation is a controlled oxidation on the sidewalls of the LED structure 200. The sidewalls of layer 202 are oxidized since all other layers of the LED structure 200 are unresponsive to the oxidation process. Once the desired oxidation depth of the sidewalls of layer 202 is reached, the oxidation process is stopped. In some embodiments, the preferred oxidation depth of the sidewalls of layer 202 is approximately one-quarter the lateral diameter of layer 202. In some embodiments, the preferred oxidation depth of the sidewalls of layer 202 is approximately one-fifth the lateral diameter of layer 202. In some embodiments, the preferred oxidation depth of the sidewalls of layer 202 is approximately one-third the lateral diameter of layer 202.

[0100]

[0111] In some embodiments, after the oxidation process, Al x OGa 1-x The oxide layer 210 made of As (x is 0.9 or more and less than 1) is x Ga 1-x In one preferred embodiment, the oxide layer 210 is formed from an original layer 202 composed of AlAs (x is 0.9 or more and less than 1). x OGa 1-xIn some embodiments, AlAs (x is 0.9 or more and less than 1) is formed while the center of layer 210 remains less oxidized / or unoxidized. x Ga 1-x All other layers except for the original layer 202 composed of As (x is greater than or equal to 0.9 and less than 1) are resistant to the oxidation process and remain unoxidized.

[0101]

[0112] Non-radiative recombination of electron-hole pairs at the side of n-type cladding layer 110, especially at vacant sites, can cause additional energy loss, such as heat loss, and reduce the luminous efficiency. Introducing oxide layer 210 into n-type cladding layer 110 can reduce non-radiative recombination at the surface and increase the luminous efficiency of the LED device. Specifically, if oxidation occurs primarily at the edges of layer 210, the oxide layer formed can reduce or eliminate non-radiative recombination at the side or edge, such as at locations 212 and 214 around layer 210. The LED's main current is vertical, and there is some diffusion of current to the side of the LED as the current flows. In some embodiments, if oxidation occurs primarily at the edges of layer 210, the oxide layer formed can reduce the lateral diffusion of current to the edges and confine the current to the center of the LED device formed from LED structure 208, thus increasing the effective current density and enhancing the LED luminous efficiency. In some embodiments, the luminous efficiency is at least 20%. In some embodiments, the luminous efficiency is at least 30%. In some embodiments, the luminous efficiency is at least 40%. In some embodiments, the luminous efficiency is at least 50%. In some embodiments, the luminous efficiency is at least 60%.

[0102]

[0113] FIG. 3A illustrates a block diagram of a 3D printer according to some embodiments. + 1 is a cross-sectional view of an LED structure 300 having an oxide precursor layer 302 between the n-type contact layer 108 and the n-type cladding layer 110. In some embodiments, the LED structure 300 is an Al x Ga 1-xIn some embodiments, the layer 302 is comprised of n As (x is 0.9 or more and less than 1). In some embodiments, the thickness of the layer 302 is between about 1 nm and 100 nm. The rest of the structure of the LED structure is similar or the same as all the layers of the LED structure 100 as depicted in FIG. 1. In some embodiments, the layer 302 is comprised of n As (x is 0.9 or more and less than 1). In some embodiments, the thickness of the layer 302 is between about 1 nm and 100 nm. The rest of the structure of the LED structure is similar or the same as all the layers of the LED structure 100 as depicted in FIG. + The layer 302 is located between the n-type contact layer 108 and the n-type cladding layer 110. In some embodiments, the layer 302 is used as a precursor prior to a subsequent oxidation process. In some embodiments, the layer 302 is 1.0×10 17 ~9.0×10 18 cm -3 It is doped with Si with a carrier concentration of

[0103]

[0114] FIG. 3B illustrates a block diagram of a 3D printer according to some embodiments. + 1 is a cross-sectional view of an LED structure 308 having an oxide layer 310 between the n-type contact layer 108 and the n-type cladding layer 110. In some embodiments, the LED structure 308 includes an oxide layer 310. In some embodiments, the oxide layer 310 is Al x OGa 1-x As, where x is 0.9 or more and less than 1. The rest of the structure of the LED structure 308 is similar or the same as all the layers of the LED structure 100 as described in FIG. 1. In some embodiments, the layer 310 is composed of n + 3A , the oxide layer 310 is located between the n-type contact layer 108 and the n-type cladding layer 110. In some embodiments, the oxide layer 310 is formed from an oxidation process after all layers of the LED structure 300 as described in FIG.

[0104]

[0115] In some embodiments, after all the epitaxial layers of the LED structure 300 are formed, a subsequent oxidation process is applied. In some embodiments, the oxidation process is wet oxidation. In some embodiments, the wet oxidation is performed in a wet oxygen oxidation furnace. In one example, the wet oxygen oxidation furnace is a VF3000 VCSEL furnace manufactured by Koyo Thermo Systems Co., Ltd. In some embodiments, nitrogen gas is used as the carrier gas at a flow rate of 1 liter per minute. Oxygen is obtained from water heated to around 98° C. in the wet oxygen oxidation furnace. In some embodiments, the wet oxidation uses an ambient temperature of 380° C. to 500° C. and a time period of up to 2 hours. The oxidation is a controlled oxidation on the sidewalls of the LED structure 300. The sidewalls of layer 302 are oxidized since all other layers of the LED structure 300 are unresponsive to the oxidation process. The oxidation process is stopped when a desired oxidation depth of the sidewalls of layer 302 is reached. In some embodiments, a suitable oxidation depth of the sidewalls of layer 302 is around one-quarter of the lateral diameter of layer 302. In some embodiments, the preferred oxidation depth of the sidewalls of layer 302 is approximately one-fifth the lateral diameter of layer 302. In some embodiments, the preferred oxidation depth of the sidewalls of layer 302 is approximately one-third the lateral diameter of layer 302.

[0105]

[0116] In some embodiments, after the oxidation process, Al x OGa 1-x The oxide layer 310 is made of As (x is 0.9 or more and less than 1), and is made of Al x Ga 1-x In one preferred embodiment, the oxide layer 310 is formed from an original layer 302 composed of AlAs (x is 0.9 or more and less than 1). x OGa 1-x In some embodiments, AlAs (x is 0.9 or more and less than 1) is formed while the center of layer 310 remains less oxidized / or unoxidized. x Ga 1-xAll other layers except for the original layer 302 composed of As (x is greater than or equal to 0.9 and less than 1) are resistant to the oxidation process and remain unoxidized.

[0106]

[0117] n + Non-radiative recombination of electron-hole pairs at the side surfaces of the n-type contact layer 108 and the n-type cladding layer 110, especially defects, can cause additional energy losses, such as heat losses, and can reduce the light emission efficiency. + Introducing an oxide layer 310 between the n-type contact layer 108 and the n-type cladding layer 110 can reduce non-radiative recombination at the surface and increase the luminous efficiency of the LED device. Specifically, if the oxidation occurs primarily at the edges of layer 310, the oxide layer formed can reduce or eliminate non-radiative recombination at the sides or edges around layer 310, such as at locations 312 and 314. The LED's primary current is vertical, and there is some diffusion of current to the sides of the LED as the current flows. In some embodiments, if the oxidation occurs primarily at the edges of layer 310, the oxide layer formed can reduce the lateral diffusion of current to the edges and confine the current to the center portion of the LED device formed from LED structure 308, thus increasing the effective current density and enhancing the LED luminous efficiency. In some embodiments, the luminous efficiency is at least 20%. In some embodiments, the luminous efficiency is at least 30%. In some embodiments, the luminous efficiency is at least 40%. In some embodiments, the luminous efficiency is at least 50%. In some embodiments, the luminous efficiency is at least 60%.

[0107]

[0118] 4A is a cross-sectional view of an LED structure 400 having an oxide precursor layer 402 in the p-type cladding layer 118 according to some embodiments. In some embodiments, the LED structure 400 includes an Al x Ga 1-xThe LED structure includes a layer 402 composed of As (x is 0.9 or more and less than 1). In some embodiments, the layer 402 has a thickness of about 1 nm to 100 nm. The rest of the structure of the LED structure is similar or the same as all the layers of the LED structure 100 as described in FIG. 1 . In some embodiments, the layer 402 is located within the p-type cladding layer 118, for example, between a first layer 404 within the p-type cladding layer 118 and a second layer 406 within the p-type cladding layer 118. In some embodiments, the layer 402 is used as a precursor prior to a subsequent oxidation process. ....0×10 17 ~9.0×10 18 cm -3 It is doped with Mg with a carrier concentration of .

[0108]

[0119] 4B is a cross-sectional view of an LED structure 408 having an oxide layer 410 in the p-type cladding layer 118 according to some embodiments. In some embodiments, the LED structure 408 includes an oxide layer 410. In some embodiments, the oxide layer 410 is Al x OGa 1-x 4A , the LED structure 408 is composed of ZnO, As, where x is equal to or greater than 0.9 and less than 1. The rest of the structure of the LED structure 408 is similar or the same as all the layers of the LED structure 100 as described in FIG. 1 . In some embodiments, the layer 410 is located within the p-type cladding layer 118, for example, between a first layer 404 within the p-type cladding layer 118 and a second layer 406 within the p-type cladding layer 118. In some embodiments, the oxide layer 410 is formed from an oxidation process after all the layers of the LED structure 400 as described in FIG. 4A are formed.

[0109]

[0120] In some embodiments, after all the epitaxial layers of the LED structure 400 are formed, a subsequent oxidation process is applied. In some embodiments, the oxidation process is wet oxidation. In some embodiments, the wet oxidation is performed in a wet oxygen oxidation furnace. In one example, the wet oxygen oxidation furnace is a VF3000 VCSEL furnace manufactured by Koyo Thermo Systems Co., Ltd. In some embodiments, nitrogen gas is used as the carrier gas at a flow rate of 1 liter per minute. Oxygen is obtained from water heated to around 98° C. in the wet oxygen oxidation furnace. In some embodiments, the wet oxidation uses an ambient temperature of 380° C. to 500° C. and a time period of up to 2 hours. The oxidation is a controlled oxidation on the sidewalls of the LED structure 400. The sidewalls of layer 402 are oxidized since all other layers of the LED structure 400 are unresponsive to the oxidation process. The oxidation process is stopped when a desired oxidation depth of the sidewalls of layer 402 is reached. In some embodiments, a suitable oxidation depth of the sidewalls of layer 402 is around one-quarter of the lateral diameter of layer 402. In some embodiments, the preferred oxidation depth of the sidewalls of layer 402 is approximately one-fifth the lateral diameter of layer 402. In some embodiments, the preferred oxidation depth of the sidewalls of layer 402 is approximately one-third the lateral diameter of layer 402.

[0110]

[0121] In some embodiments, after the oxidation process, Al x OGa 1-x The oxide layer 410 is made of As (x is 0.9 or more and less than 1), and is made of Al x Ga 1-x In one preferred embodiment, the oxide layer 410 is formed from an original layer 402 composed of AlAs (x is 0.9 or more and less than 1). x OGa 1-x In some embodiments, AlAs (x is 0.9 or more and less than 1) is formed while the center of layer 410 remains less oxidized / or unoxidized. x Ga 1-xAll other layers except for the original layer 402 composed of As (x is greater than or equal to 0.9 and less than 1) are resistant to the oxidation process and remain unoxidized.

[0111]

[0122] Non-radiative recombination of electron-hole pairs at the side of the p-type cladding layer 118, especially at the defect sites, can cause additional energy loss, such as heat loss, and reduce the light emission efficiency. Introducing an oxide layer 410 in the p-type cladding layer 118 can reduce the non-radiative recombination at the surface and increase the light emission efficiency of the LED device. Specifically, if the oxidation occurs primarily at the edges of the layer 410, the formed oxide layer can reduce or eliminate the non-radiative recombination at the side or edge, such as at locations 412 and 414 around the layer 410. The LED's main current is vertical, and there is some diffusion of the current to the side of the LED as the current flows. In some embodiments, if the oxidation occurs primarily at the edges of the layer 410, the formed oxide layer can reduce the lateral diffusion of the current to the edges and confine the current to the center portion of the LED device formed from the LED structure 408, thus increasing the effective current density and enhancing the LED light emission efficiency. In some embodiments, the light emission efficiency is at least 20%. In some embodiments, the light emission efficiency is at least 30%. In some embodiments, the luminous efficiency is at least 40%. In some embodiments, the luminous efficiency is at least 50%. In some embodiments, the luminous efficiency is at least 60%.

[0112]

[0123] 5A is a cross-sectional view of an LED structure 500 having an oxide precursor layer 502 between the p-type cladding layer 118 and the p-type transition layer 120 according to some embodiments. In some embodiments, the LED structure 500 includes an Al x Ga 1-xThe LED structure includes a layer 502 composed of As (x is 0.9 or more and less than 1). In some embodiments, the thickness of the layer 502 is about 1 nm to 100 nm. The rest of the structure of the LED structure is similar or the same as all the layers of the LED structure 100 as described in FIG. 1 . In some embodiments, the layer 502 is located between the p-type cladding layer 118 and the p-type transition layer 120. In some embodiments, the layer 502 is used as a precursor before a subsequent oxidation process. In some embodiments, the layer 502 is composed of 1.0×10 17 ~9.0×10 18 cm -3 It is doped with Mg with a carrier concentration of .

[0113]

[0124] 5B is a cross-sectional view of an LED structure 508 having an oxide layer between the p-type cladding layer 118 and the p-type transition layer 120 according to some embodiments. In some embodiments, the LED structure 508 includes an oxide layer 510. In some embodiments, the oxide layer 510 is Al x OGa 1-x 5A , the layer 510 is formed from an oxidation process after all the layers of the LED structure 500 as described in FIG. 5A are formed. In some embodiments, the layer 510 is located between the p-type cladding layer 118 and the p-type transition layer 120. In some embodiments, the oxide layer 510 is formed from an oxidation process after all the layers of the LED structure 500 as described in FIG. 5A .

[0114]

[0125] In some embodiments, after all the epitaxial layers of the LED structure 500 are formed, a subsequent oxidation process is applied. In some embodiments, the oxidation process is wet oxidation. In some embodiments, the wet oxidation is performed in a wet oxygen oxidation furnace. In one example, the wet oxygen oxidation furnace is a VF3000 VCSEL furnace manufactured by Koyo Thermo Systems Co., Ltd. In some embodiments, nitrogen gas is used as the carrier gas at a flow rate of 1 liter per minute. Oxygen is obtained from water heated to around 98° C. in the wet oxygen oxidation furnace. In some embodiments, the wet oxidation uses an ambient temperature of 380° C. to 500° C. and a time period of up to 2 hours. The oxidation is a controlled oxidation on the sidewalls of the LED structure 500. The sidewalls of layer 502 are oxidized since all other layers of the LED structure 500 are unresponsive to the oxidation process. The oxidation process is stopped when a desired oxidation depth of the sidewalls of layer 502 is reached. In some embodiments, a suitable oxidation depth of the sidewalls of layer 502 is around one-quarter of the lateral diameter of layer 502. In some embodiments, the preferred oxidation depth of the sidewalls of layer 502 is approximately one-fifth the lateral diameter of layer 502. In some embodiments, the preferred oxidation depth of the sidewalls of layer 502 is approximately one-third the lateral diameter of layer 502.

[0115]

[0126] In some embodiments, after the oxidation process, Al x OGa 1-x The oxide layer 510 made of As (x is 0.9 or more and less than 1) is x Ga 1-x In one preferred embodiment, the oxide layer 510 is formed from an original layer 502 composed of AlAs (x is 0.9 or more and less than 1). x OGa 1-x In some embodiments, AlAs (x is 0.9 or more and less than 1) is formed while the center of layer 510 remains less oxidized and / or unoxidized. x Ga1-x All other layers except for the original layer 502 composed of As (x is greater than or equal to 0.9 and less than 1) are resistant to the oxidation process and remain unoxidized.

[0116]

[0127] Non-radiative recombination of electron-hole pairs at the sides of the p-type cladding layer 118 and the p-type transition layer 120, especially at the defect sites, can cause additional energy loss, such as heat loss, and reduce the light emission efficiency. Introducing an oxide layer 510 between the p-type cladding layer 118 and the p-type transition layer 120 can reduce the non-radiative recombination at the surface and increase the light emission efficiency of the LED device. Specifically, if the oxidation occurs mainly at the edges of the layer 510, the formed oxide layer can reduce or eliminate the non-radiative recombination at the sides or edges, such as at locations 512 and 514 around the layer 510. The LED's main current is vertical, and there is some diffusion of the current to the sides of the LED as the current flows. In some embodiments, if the oxidation occurs mainly at the edges of the layer 510, the formed oxide layer can reduce the lateral diffusion of the current to the edges and confine the current to the center portion of the LED device formed from the LED structure 508, thus increasing the effective current density and enhancing the LED light emission efficiency. In some embodiments, the luminous efficiency is at least 20%. In some embodiments, the luminous efficiency is at least 30%. In some embodiments, the luminous efficiency is at least 40%. In some embodiments, the luminous efficiency is at least 50%. In some embodiments, the luminous efficiency is at least 60%.

[0117]

[0128] In some other embodiments, the precursor or oxide layer is formed between the n-type cladding layer 110 and the n-type spacer layer 112. In yet some other embodiments, the precursor or oxide layer is formed between the p-type cladding layer 118 and the p-type transition layer 120.

[0118]

[0129] In some embodiments, the precursor layers or oxide layers shown in any one of Figures 2A-5B or mentioned above can be included in the LED structure in any combination. For example, the LED structure can include 1-4 layers of precursor layers or oxide layers at different locations of the LED structure as mentioned above. In another example, the LED structure can include 1-6 layers of precursor layers or oxide layers at different locations of the LED structure as mentioned above.

[0119]

[0130] In some embodiments, it is preferred to have an oxide layer formed on the n-side of the LED structure. In some processes, it is possible but difficult to introduce any arsenic-containing layer on the p-side of the LED structure that may affect the stability of the device.

[0120]

[0131] In some embodiments, the substrate 102, e.g., a GaAs substrate from which the other layers of the LED structure are grown by an epitaxial process, has good lattice matching properties with the epitaxial layers, but has some unfavorable properties as a final LED device substrate, such as poor electrical conductivity to support the circuit structure, high optical absorption for the light emitted by the LED, etc. Therefore, the original substrate 102 may be removed from the final LED structure, and a new substrate may be needed to better support the circuit structure to form the LED device.

[0121]

[0132] 6A-6D illustrate a fabrication process for forming an LED structure 612 having a support substrate 604 with integrated circuits using a one-time transfer process, according to some embodiments. In some embodiments, the initial color LED structure 602 shown in FIGS. 6A and 6C has a structure the same as or similar to any one of the LED structures described in FIGS. 1-5B, or any combination thereof. For illustrative purposes, the exemplary structure 100 described in FIG. 1 is shown in FIGS. 6A-6D as LED structure 602. Other color LED structures such as reference numbers 200, 208, 300, 308, 400, 408, 500, and 508 described in FIGS. 2A-5B, or any other LED structure embodiment described herein, can be shown in FIGS. 6A-6D as LED structure 602 in the same P to N orientation as LED structure 100.

[0122]

[0133] In some embodiments, in FIG. 6A, a metal bonding layer 606 is provided on the p-side of the LED structure 602, e.g. ++ 1, is deposited above a transition layer 124 .

[0123]

[0134] In some embodiments, in FIG. 6B, a metal bonding layer 608 is deposited on a support substrate 604 having integrated circuits. In some embodiments, the support substrate 604 is a substrate on which an array of individual drive circuits 610 is fabricated. Each drive circuit 610 is a pixel driver. In some cases, the pixel drivers are thin film transistor pixel drivers or silicon CMOS pixel drivers. In a preferred embodiment, the substrate 604 is a silicon substrate. In another embodiment, the support substrate 604 is a transparent substrate, such as a glass substrate. Other example substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. The drive circuits 610 form individual pixel drivers that control the operation of the individual color LED devices formed from the LED structure 602. The circuitry on the substrate 604 includes contacts to each individual pixel driver 610 and also includes a ground contact.

[0124]

[0135] In some embodiments, the LED structure 602 also has two types of contacts: a P-type electrode or anode (not shown in FIGS. 6A-6D ) connected to both the p-side of the LED structure 602 and the respective driving circuit 610, and an N-type electrode or cathode (not shown in FIGS. 6A-6D ) connected to both the n-side of the LED structure 602 and ground (i.e., the common electrode).

[0125]

[0136] In some embodiments, the drive circuit 610, e.g., a pixel driver, includes a number of transistors and capacitors (not shown in FIGS. 6A-6D). The transistors include a drive transistor connected to a voltage source and a control transistor configured with a gate connected to a scan signal bus line. The capacitor includes a storage capacitor used to maintain the gate voltage of the drive transistor during the time that the scan signal is setting other pixels.

[0126]

[0137] In some embodiments, in FIG. 6C, the LED structure 602 and the support substrate 604 are bonded together by bonding metal bonding layers 606 and 608. The layer of bonded metal bonding layers 606 and 608 may include an ohmic contact layer in addition to the metal bonding layer. In some embodiments, the thickness of the layer of bonded metal bonding layers 606 and 608 is about 0.1 microns to about 3 microns. In some cases, two metal layers, such as 606 and 608, are included in the metal bonding layer. One of the metal layers is deposited on the LED structure 602. The other metal bonding layer is deposited on the support substrate 604. In some embodiments, the composition of the layer of bonded metal bonding layers includes Au-Au bonding, Au-Sn bonding, Au-In bonding, Ti-Ti bonding, Cu-Cu bonding, or a mixture thereof. For example, if Au-Au bonding is selected, the two layers of Au each require a Cr coating as an adhesion layer and a Pt coating as a diffusion barrier layer. And the Pt coating is between the Au layer and the Cr layer. The Cr and Pt layers are positioned on top and bottom of the two bonded Au layers. In some embodiments, when the thicknesses of the two Au layers are approximately the same, interdiffusion of Au on both layers bonds the two layers together under high pressure and high temperature. Eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding are example techniques that may be used.

[0127]

[0138] As shown in FIG. 6C, the p-side of the LED structure 602, e.g. ++ The P-type transition layer 124 is bonded to the support substrate 604 through bonding metal layers 606 and 608. In some embodiments, a P-type electrode (not shown in FIGS. 6A-6D) is bonded to the support substrate 604 through a layer that bonds the metal bonding layers 606 and 608. ++ The P-type electrode is connected to the P-type transition layer 124. In some embodiments, the P-type electrode is connected to the drive circuit 610 through metal bonding layers 606 and 608. In some embodiments, the metal bonding layers can act as electrical contact layers.

[0128]

[0139] In some embodiments, the substrate 102 of the LED structure 602 is then removed after a bonding step, for example by a laser lift-off process or wet chemical etching, leaving the LED structure 612 shown in Figure 6D, including the support substrate 604, the bonded metal bonding layers 606 and 608, and the other layers of the LED structure 602 without the substrate 102. In some embodiments, the n-type buffer layer 104 is also removed with the substrate 102. In some embodiments, the n-type buffer layer 104 and the n-type etch stop layer 106 are also removed with the substrate 102, in the same process or a different process.

[0129]

[0140] In FIG. 6D, the n-side of the LED structure 612, e.g. + The mold contact layer 108 is the side from which light is emitted from the color LED device formed from the LED structure 612 .

[0130]

[0141] 7A-7H illustrate a fabrication process for forming an LED structure 732 having a support substrate 714 with integrated circuits using a two-step transfer process, according to some embodiments. In some embodiments, the initial color LED structure 702 has a structure the same as or similar to any one of the LED structures described in FIGS. 1-5B, or any combination thereof. For illustrative purposes, the exemplary structure 100 described in FIG. 1 is shown in FIGS. 7A-7H as LED structure 702. Other color LED structures such as reference numbers 200, 208, 300, 308, 400, 408, 500, and 508 described in FIGS. 2-5, or any other LED structure embodiment described herein, can be shown in FIGS. 7A-7H as LED structure 702 in the same P to N orientation as LED structure 100.

[0131]

[0142] In some embodiments, in FIG. 7A, an ultraviolet (UV) curable adhesive layer 706 is provided on the p-side of the LED structure 702, e.g., ++The UV curable adhesive material includes one or more polymers selected from the group consisting of bonding adhesive Micro Resist BCL-1200, SU-8, photosensitive polyimide (PSPI), PermiNex, Benzocyclobutene (BCB), and transparent plastics (resins) including spin-on glass (SOG), or any combination thereof.

[0132]

[0143] In some embodiments, in FIG. 7B, the intermediate substrate 704 and the LED collar structure 702 are bonded together by a UV-curable adhesive layer 706. In some embodiments, the intermediate substrate 704 is made of sapphire. The intermediate substrate is necessary to hold the LED structure on the substrate because the LED chip is thin and difficult to transfer. In another embodiment, the intermediate substrate 704 is a transparent substrate, for example, a glass substrate. Other substrate examples include GaAs, GaP, InP, SiC, and ZnO substrates. In some embodiments, the UV-curable adhesive layer 706 is cured by applying UV light through the intermediate substrate 704 on the UV-curable adhesive layer 706, thus forming a strong bond between the intermediate substrate 704 and the LED collar structure 702. As shown in FIG. 7B, the p-side of the LED structure 702, for example, the p-side of the LED structure 702, is cured by applying UV light through the intermediate substrate 704 on the UV-curable adhesive layer 706, thus forming a strong bond between the intermediate substrate 704 and the LED collar structure 702. ++ The transition layer 124 is bonded to the intermediate substrate 704 through a UV-curable adhesive layer 706 .

[0133]

[0144] In an alternative embodiment, a UV-curable adhesive is deposited on the intermediate substrate 704 for bonding. In some embodiments, a UV-curable adhesive is deposited on both the p-side of the LED collar structure 702 and on the surface of the intermediate substrate 704 for bonding.

[0134]

[0145] As shown in Figure 7C, in some embodiments, the substrate 102 of the LED structure 702 is then removed after a bonding step, for example by a laser lift-off process or wet chemical etching, leaving the LED structure 712 shown in Figure 7C, including the support substrate 704, the UV-curable adhesive layer 706, and the other layers of the LED structure 702 without the substrate 102. In some embodiments, the n-type buffer layer 104 is also removed with the substrate 102. In some embodiments, the n-type buffer layer 104 and the n-type etch stop layer 106 are also removed with the substrate 102, as shown in Figure 7C.

[0135]

[0146] In some embodiments, in FIG. 7D , a metal bonding layer 716 is provided on the n-side of the LED structure 712, e.g. + A metal contact layer 108 is deposited above the metal contact layer 108 .

[0136]

[0147] In some embodiments, in FIG. 7E, a metal bonding layer 718 is deposited on a support substrate 714 having integrated circuits. In some embodiments, the support substrate 714 is a substrate on which an array of individual drive circuits 710 is fabricated. Each drive circuit 710 is a pixel driver. In some cases, the pixel drivers are thin film transistor pixel drivers or silicon CMOS pixel drivers. In a preferred embodiment, the substrate 714 is a silicon substrate. In another embodiment, the support substrate 714 is a transparent substrate, such as a glass substrate. Other example substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. The drive circuits 710 form individual pixel drivers that control the operation of the individual color LED devices formed from the LED structures 712. The circuitry on the substrate 714 includes contacts to each individual pixel driver 710 and also includes a ground contact.

[0137]

[0148] In some embodiments, the LED structure 712 also has two types of contacts: a P-type electrode or anode (not shown in Figures 7A-7H) connected to both the p-side of the LED structure 712 and the respective driving circuit 710, and an N-type electrode or cathode (not shown in Figures 7A-7H) connected to both the n-side of the LED structure 712 and ground (i.e., the common electrode).

[0138]

[0149] In some embodiments, the drive circuit 710, e.g., a pixel driver, includes a number of transistors and capacitors (not shown in Figures 7A-7H). The transistors include a drive transistor connected to a voltage source and a control transistor configured with a gate connected to a scan signal bus line. The capacitor includes a storage capacitor used to maintain the gate voltage of the drive transistor during the time that the scan signal is setting other pixels.

[0139]

[0150] In some embodiments, in FIG. 7F, the LED structure 712 and the support substrate 714 are bonded together by bonding metal bonding layers 716 and 718. The layer of bonded metal bonding layers 716 and 718 may include an ohmic contact layer in addition to the metal bonding layer. In some embodiments, the thickness of the layer of bonded metal bonding layers 716 and 718 is about 0.1 microns to about 3 microns. In some cases, two metal layers, such as 716 and 718, are included in the metal bonding layer. One of the metal layers is deposited on the LED structure 712. The other metal bonding layer is deposited on the support substrate 714. In some embodiments, the composition of the layer of bonded metal bonding layers includes Au-Au bonding, Au-Sn bonding, Au-In bonding, Ti-Ti bonding, Cu-Cu bonding, or a mixture thereof. For example, if Au-Au bonding is selected, the two layers of Au each require a Cr coating as an adhesion layer and a Pt coating as a diffusion barrier layer. And the Pt coating is between the Au layer and the Cr layer. The Cr and Pt layers are positioned on the top and bottom of the two bonded Au layers. In some embodiments, when the thicknesses of the two Au layers are approximately the same, interdiffusion of Au on both layers bonds the two layers together under high pressure and high temperature. Eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding are example techniques that may be used.

[0140]

[0151] As shown in FIG. 7F, the n-side of the LED structure 712, e.g. + The P-type contact layer 108 is bonded to the support substrate 714 through bonding metal layers 716 and 718. In some embodiments, a P-type electrode (not shown in FIGS. 7A-7H) is ++ 7A-7H , an N-type electrode (not shown in FIGS. 7A-7H ) is connected to n-type transition layer 124 through a layer that bonds metal bonding layers 716 and 718 . + 7. The P-type electrode and the N-type electrode are connected to the contact layer 108. In some embodiments, the P-type electrode or the N-type electrode are connected to the drive circuit 710 through metal contact layers 716 and 718. In some embodiments, the metal contact layers can act as electrical contact layers.

[0141]

[0152] In some embodiments, in FIG. 7G , the intermediate substrate 704 of the LED structure 712 is then removed after the bonding step, for example by a laser lift-off process or wet chemical etching, leaving the LED structure 722 shown in FIG. 7G , which includes the support substrate 714, the bonded metal bonding layers 716 and 718, and the other layers of the LED structure 712 without the intermediate substrate 704.

[0142]

[0153] In some embodiments, the UV-curable adhesive layer 706 of the LED structure 722 is then removed after the intermediate substrate 704 is removed, for example by chemical etching or laser lift-off, leaving the LED structure 732 shown in FIG. 7H, which includes the support substrate 714, the layers bonding the metal bonding layers 716 and 718, and the other layers of the LED structure 722 without the UV-curable adhesive layer 706.

[0143]

[0154] In FIG. 7H, the p-side of the LED structure 732, e.g. ++ The transition layer 124 is the side from which light is emitted from the color LED device formed from the LED structure 732 .

[0144]

[0155] In some embodiments, when the p-side is the side from which light is emitted from the LED device, an electrode layer transparent to the light of the LED, such as an indium tin oxide (ITO) layer, can be deposited on top of the p-side layers of the LED (not shown in Figures 7A-7H) so that the light can still transmit through the transparent electrode. In some embodiments, the transparent electrode is a p-type electrode. In some embodiments, the material of the top electrode layer is selected from the group consisting of graphene, ITO, aluminum-doped zinc oxide (AZO), and fluorine doped tin oxide (FTO). In general, it is difficult for an ITO layer to form an ohmic contact with the n-side of the LED. The electrode layer used for the n-side of the LED is made of a metal that may not be transparent to the light emitted from the LED. Compared with the one-time transfer as depicted in FIGS. 6A-6D, the two-time transfer as depicted in FIGS. 7A-7H forms a p-side emitting LED that allows for better integration of the transparent electrode on the top of the LED device and easier fabrication.

[0145]

[0156] In some embodiments, the p-side layers include a p-type spacer layer 116, a p-type cladding layer 118, a p-type transition layer 120, + Type transition layer 122, and p ++ In some embodiments, the n-side layers include p-type layers such as the n-type transition layer 124. In some embodiments, the n-side layers include the n-type spacer layer 112, the n-type cladding layer 110, and the n-type transition layer 124. + The n-type contact layer 108 may include an n-type layer.

[0146]

[0157] In some embodiments, the thickness of the p-side layer of the LED structure 732 is less than the thickness of the n-side layer of the LED structure 732. In some embodiments, as a result of removing the UV-curable adhesive layer, the thickness of the p-side layer of the LED structure 732 is less than the thickness of the n-side layer of the LED structure 732. In some embodiments, the reduced thickness of the p-side layer of the LED can limit lateral current spreading and concentrate the current vertically in the LED, improving light emission efficiency.

[0147]

[0158] In some embodiments, the ratio of the total thickness of the p-type layers to the total thickness of the n-type layers is 0.025 to 100. In some preferred embodiments, the ratio of the total thickness of the p-type layers to the total thickness of the n-type layers is 1.5 to 2.

[0148]

[0159] In some embodiments, the p-type transition layer 120, p + Type transition layer 122, and p ++ The ratio of the thickness of the p-type conductive layer, including the p-type transition layer 124, to the thickness of the n-type conductive layer, including the n+ type contact layer 108, is 0.025 to 100. In some preferred embodiments, the p-type transition layer 120, + Type transition layer 122, and p ++ The ratio of the thickness of the p-type conductivity layer, including the type transition layer 124, to the thickness of the n-type conductivity layer, including the n+ type contact layer 108, is 1.5:2.

[0149]

[0160] In some embodiments, the thickness of the p-type cladding layer 118 is the p-type transition layer 120, + Type transition layer 122, and p ++ The ratio of the thickness of the p-type cladding layer 118 to the total thickness of one or more of the p-type transition layers 120, p-type cladding layer 118 is 0.02 to 120. In some preferred embodiments, the ratio of the thickness of the p-type cladding layer 118 to the total thickness of the p-type transition layers 120, p-type cladding layer 118 is 0.02 to 120. + Type transition layer 122, and p ++ The ratio of the total thickness of one or more of the mold transition layers 124 is 1 to 2.5.

[0150]

[0161] Various design aspects of a single- or multicolor LED device, such as layer dimensions (e.g., width, length, height, and cross-sectional area of ​​each layer), electrode dimensions, size, shape, spacing, and arrangement of two or more LED structures, two or more active light-emitting layers, bonding layers, conductive layers, other reflective layers, as well as configurations between integrated circuits, pixel drivers, and electrical connections, are selected (e.g., optimized using cost or performance functions) to obtain desired LED characteristics. LED characteristics that vary based on the above design aspects include, for example, size, materials, cost, fabrication efficiency, luminous efficiency, power consumption, directivity, luminance intensity, luminance flux, color, spectrum, and spatial radiation pattern.

[0151]

[0162] Further embodiments also include various subsets of the above embodiments, including the embodiments of Figures 1-7H, combined or otherwise rearranged in various embodiments.

[0152]

[0163] 8 is a top view of a micro LED display panel 800, according to some embodiments. The display panel 800 includes a data interface 810, a control module 820, and a pixel area 850. The data interface 810 receives data defining an image to be displayed. The origin and format of this data will vary depending on the application. The control module 820 receives the input data and converts it into a form suitable for driving pixels of the display panel. The control module 820 may include a scan controller including digital logic and / or state machines to convert from a received format to a format suitable for the pixel area 840, shift registers or other types of buffers and memories to store and transfer data, digital to analog converters and level shifters, and clock circuits.

[0153]

[0164] The pixel area 850 includes an array of mesas (not shown separately from LEDs 834 in FIG. 8 ) that contain pixels. The pixels include micro LEDs, such as single or multicolor LEDs 834 integrated with pixel drivers as described above. An array of micro lenses (not shown separately from LEDs 834 in FIG. 8 ) covers the top of the array of mesas. In this example, the display panel 800 is a color RGB display panel. It includes red, green, and blue pixels. Within each pixel, the LEDs 834 are controlled by a pixel driver. The pixels contact a supply voltage (not shown in FIG. 8 ) and ground via a ground pad 836, as well as a control signal, according to the previously described embodiment. Although not shown in FIG. 8 , an electrical connection is made between the p-type electrode of the LED 834 and the output of the drive transistor. The LED current drive signal connections (between the LED's p-type electrode and the pixel driver's output), ground connection (between the n-type electrode and system ground), supply voltage Vdd connection (between the pixel driver's source and system Vdd), and control signal connections to the pixel driver's gate are made according to various embodiments. Any of the microlens arrays disclosed herein can be implemented with the micro LED display panel 800.

[0154]

[0165] FIG. 8 is a representative diagram only. Other designs will be apparent. For example, the colors need not be red, green, and blue. Nor need they be arranged in columns or stripes. As an example, apart from the square matrix arrangement of pixels shown in FIG. 8, it is also possible to form the display panel 800 using a hexagonal matrix arrangement of pixels.

[0155]

[0166] In some applications, a fully programmable rectangular array of pixels is not necessary. The device structures described herein may also be used to form display panels of other designs with a wide variety of shapes and displays. One class of examples is specialized applications including signs and automobiles. For example, multiple pixels may be arranged in a star or spiral shape to form a display panel, and different patterns can be generated on the display panel by turning LEDs on and off. Another specialized example is automobile headlights and smart lighting, where certain pixels are grouped together to form various lighting shapes, and each group of LED pixels can be turned on and off or otherwise adjusted by an individual pixel driver.

[0156]

[0167] Even the lateral arrangement of devices within each pixel can vary. In Figure 1A, the LEDs and pixel driver are arranged vertically, i.e., each LED is located on top of its corresponding pixel drive circuit. Other arrangements are possible. For example, the pixel driver could be located "behind," "in front of," or "beside" the LEDs.

[0157]

[0168] Different types of display panels can be produced. For example, the resolution of a display panel can typically range from 8x8 to 3840x2160. Common display resolutions include QVGA with a resolution of 320x240 and an aspect ratio of 4:3, XGA with a resolution of 1024x768 and an aspect ratio of 4:3, D with a resolution of 1280x720 and an aspect ratio of 16:9, FHD with a resolution of 1920x1080 and an aspect ratio of 16:9, UHD with a resolution of 3840x2160 and an aspect ratio of 16:9, and 4K with a resolution of $326x2160. There can also be a wide variety of pixel sizes ranging from submicron or less to 10mm or more. The size of the overall display area can also vary widely, ranging from as little as tens of microns or less diagonal to hundreds of inches or more.

[0158]

[0169] Different applications have different requirements for optical brightness and viewing angle. Examples of applications include direct view display screens, home / office projectors and portable electronics such as smartphones, laptops, wearable electronics, AR and VR glasses, and retinal projection light engines. Power consumption can vary from as little as a few milliwatts for retinal projectors to as much as several kilowatts for large screen outdoor displays, projectors, and smart car headlights. In terms of frame rate, due to the fast response (nanoseconds) of inorganic LEDs, the frame rate can be as high as KHz or even MHz at low resolution.

[0159]

[0170] Further embodiments also include various subsets of the above embodiments, including those embodiments as shown in Figures 1-8, combined or otherwise rearranged in various other embodiments.

[0160]

[0171] Although the detailed description includes many details, these should not be construed as limitations on the scope of the invention, but merely as illustrations of different examples and aspects of the invention. It should be understood that the scope of the invention includes other embodiments not detailed above. For example, the techniques described above can be applied to the integration of functional devices other than LEDs with control circuitry other than pixel drivers. Examples of non-LED devices include vertical cavity surface emitting lasers (VCSELs), photodetectors, micro-electro-mechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples also include organic LED (OLED) devices. Examples of other control circuitry include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0161]

[0172] The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the embodiments described herein and variations thereof. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Thus, the present disclosure is not intended to be limited to the embodiments shown herein, but is intended to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

[0162]

[0173] Features of the present invention can be implemented in, using, or with the aid of a computer program product, such as a storage medium or computer-readable storage medium having stored therein instructions that can be used to program a processing system to perform any of the features presented herein. The storage medium can include high-speed random access memory, such as, but not limited to, DRAM, SRAM, DDR RAM, or other random access solid-state memory devices, and can include non-volatile memory, such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory optionally includes one or more storage devices located remotely from the CPU. The memory, or alternatively, the non-volatile memory device in the memory, includes a non-transitory computer-readable storage medium.

[0163]

[0174] When stored on any machine-readable medium, features of the present invention may be embodied in software and / or firmware to control the hardware of a processing system and to enable the processing system to utilize the results of the present invention and interact with other mechanisms. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments / containers.

[0164]

[0175] It will be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements are not intended to be limited by these terms. These terms are used only to distinguish one element from another.

[0165]

[0176] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the claims. When used in the description of the embodiments and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" when used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and / or "comprising" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0166]

[0177] As used herein, the term "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in accordance with a determination" or "in response to detecting" a stated precondition is true, depending on the context. Similarly, the phrase "if it is determined" or "if" or "when" may be interpreted to mean "upon determining" or "in response to determining" or "in accordance with a determination" or "upon detecting" or "in response to detecting" a stated precondition is true, depending on the context.

[0167]

[0178] The above description has been described with reference to specific embodiments for purposes of illustration. However, the above exemplary discussion is not intended to be exhaustive or to limit the scope of the claims to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments were chosen and described in order to best explain the principles of operation and practical application and thereby enable others skilled in the art to use and utilize them.

Claims

1. removing the UV curable bonding layer or etch stop layer to obtain a surface of the micro LED chip structure proximate the second type conductive layer; The micro LED chip structure comprises: A semiconductor substrate; an electrical contact layer on the semiconductor substrate; a first type conductive layer on said electrical contact layer; an active light-emitting layer on the first type conductive layer; a first-type cladding layer located between the first-type conductive layer and the active light-emitting layer; an oxide layer located within the first type cladding layer or between the first type conductive layer and the first type cladding layer; the second type conductive layer overlies the active light-emitting layer; A method for manufacturing a micro LED chip structure.

2. 2. The method for manufacturing a micro LED chip structure as claimed in claim 1 , wherein a thickness of said second type conductive layer is less than a thickness of said first type conductive layer.

3. the micro LED chip structure further comprises a second type spacer layer between the active light emitting layer and the second type conductive layer; the second type spacer layer is used to form a PN junction structure with the active light emitting layer and the first type conductive layer; 2. The method of claim 1 , wherein the second type conductive layer comprises one or more second type conductive transition layers.

4. 2. A method for manufacturing a micro LED chip structure as claimed in claim 1, wherein the first type conductive layer is an N-type layer and the second type conductive layer is a P-type layer, or the first type conductive layer is a P-type layer and the second type conductive layer is an N-type layer.

5. 2. The method of claim 1, wherein the semiconductor substrate is an integrated circuit (IC) substrate.

6. 2. The micro LED chip structure of claim 1, wherein the electrical contact layer is a metal bonding layer, and further comprising a bonding step of bonding the semiconductor substrate and the first type conductive layer together. Manufacturing method.

7. 2. The method of claim 1, wherein the micro LED chip structure further comprises a second type cladding layer between the second type conductive layer and the active light emitting layer.

8. 2. The method of claim 1 , wherein a ratio of a thickness of said second type conductive layer to a thickness of said first type conductive layer is 1.5 to 2.

9. 8. A method for manufacturing a micro LED chip structure as claimed in claim 7, wherein said second type conductive layer comprises one or more second type conductive transition layers, and a ratio of a thickness of said second type cladding layer to a total thickness of said one or more second type conductive transition layers is 1 to 2.

5.

10. the second type conductive layer comprises one or more second type conductive transition layers; the one or more second type conductive transition layers comprising: in a direction from the semiconductor substrate to the first type conductive layer, a lower second type conductive transition layer, a middle second type conductive transition layer, and an upper second type conductive transition layer; and 2. The method of claim 1 , wherein the lower second-type conductive transition layer has a lower conductivity than the middle second-type conductive transition layer, and the conductivity of the middle second-type conductive transition layer is lower than the conductivity of the upper second-type conductive transition layer.

11. forming the oxide layer through a wet oxidation process. A method for manufacturing the micro LED chip structure according to claim 1 .

12. The wet oxidation process uses heated water to generate oxygen and nitrogen gas as a carrier gas. A method for manufacturing the micro LED chip structure according to claim 11.

13. The flow rate of the carrier gas is 1 liter per minute. A method for manufacturing the micro LED chip structure according to claim 12.

14. The heating temperature of the heated water is 98°C. A method for manufacturing the micro LED chip structure according to claim 12.

15. The wet oxidation process is carried out at an ambient temperature of 380° C. to 500° C. and for a time period of up to 2 hours. A method for manufacturing the micro LED chip structure according to claim 11.

16. oxidizing the sidewalls of the oxide layer through the wet oxidation process. A method for manufacturing the micro LED chip structure according to claim 11.

17. After the wet oxidation process, the oxidation depth of the sidewall of the oxide layer is one-third of the lateral diameter of the oxide layer.

17. A method for manufacturing a micro LED chip structure according to claim 16.

18. After the wet oxidation process, the oxidation depth of the sidewall of the oxide layer is one-quarter of the lateral diameter of the oxide layer.

17. A method for manufacturing a micro LED chip structure according to claim 16.

19. After the wet oxidation process, the oxidation depth of the sidewall of the oxide layer is one-fifth of the lateral diameter of the oxide layer.

17. A method for manufacturing a micro LED chip structure according to claim 16.

Images