Semiconductor photoreceiver, receiver and optical integrated device

Abstract

To provide a semiconductor light receiver, a receiving apparatus and an optical integrated element, capable of achieving both high operating speed and high photosensitivity.SOLUTION: A semiconductor light receiver includes a first semiconductor layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer has a p-type first region, an n-type second region, and a non-conductive third region between the first region and the second region. The second semiconductor layer has a p-type fourth region with which the first electrode comes into ohmic contact, an n-type fifth region with which the second electrode comes into ohmic contact, and a non-conductive sixth region between the fourth region and the fifth region. The first region is located on a first direction side when viewed from the third region, the second region is located on a second direction side opposite to the first direction side when viewed from the third region, the fourth region is located on the first direction side when viewed from the sixth direction, the fifth region is located on the second direction side when viewed from the sixth region, and the third region overlaps with the sixth region in plan view.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to semiconductor optical receivers, receivers and integrated optical devices. [Background technology]

[0002] As the demand for computer processing power increases, there is a demand for an expansion of the data transmission and reception bandwidth. The limits of data transmission using electrical signals are approaching, and the application of optical signals is required. In order to convert optical signals into electrical signals with high efficiency, it is effective to integrate optical components in the device that processes the electrical signals in order to reduce loss. Therefore, in recent years, research and development in the field known as Si photonics, which involves constructing various optical components on a silicon (Si) substrate, has been attracting attention. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application No. 2017 / 0025562 [Patent Document 2] U.S. Patent No. 7,397,101 [Patent Document 3] JP 2017-11020 A Summary of the Invention [Problem to be solved by the invention]

[0004] Although various semiconductor photodetectors have been proposed so far for Si photonics, they are unable to achieve both high operating speed and high photosensitivity.

[0005] An object of the present disclosure is to provide a semiconductor photoreceiver, a receiver, and an optical integrated device that can achieve both a high operating speed and high light receiving sensitivity. [Means for solving the problem]

[0006] According to one embodiment of the present disclosure, a semiconductor photodetector includes a first semiconductor layer having a first refractive index and a first band gap, a second semiconductor layer having a second refractive index and a second band gap and formed on the first semiconductor layer, a first electrode, and a second electrode, the second refractive index being greater than the first refractive index and the second band gap being smaller than the first band gap, the first semiconductor layer having a first region of p-type, a second region of n-type, and a third region of non-conductivity between the first region and the second region, the first region is on a first direction side as viewed from the third region, the second region is on a second direction side opposite to the first direction as viewed from the third region, the fourth region is on the first direction side as viewed from the sixth region, the fifth region is on the second direction side as viewed from the sixth region, and the third region and the sixth region overlap in a plan view. a thickness of the fourth region and a thickness of the fifth region are equal to or less than half a thickness of the second semiconductor layer, and the fourth region and the fifth region are spaced apart from the first semiconductor layer in a thickness direction. do. Effect of the Invention

[0007] According to the present disclosure, it is possible to achieve both high operating speed and high light receiving sensitivity. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view showing a configuration of a semiconductor optical receiver according to a first reference example. [Diagram 2] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor optical receiver according to a second reference example. [Diagram 3] FIG. 2 is a top view illustrating the configuration of the semiconductor optical receiver according to the first embodiment. [Figure 4] 2 is a diagram showing a layout of a semiconductor region in the semiconductor optical receiver according to the first embodiment. FIG. [Diagram 5] 1 is a cross-sectional view illustrating a configuration of a semiconductor optical receiver according to a first embodiment. [Figure 6] 3A to 3C are diagrams illustrating distributions of guided light and an electric field in the semiconductor optical receiver according to the first embodiment. [Figure 7] FIG. 2 is a cross-sectional view showing a configuration of a semiconductor optical receiver that is a subject of a simulation. [Figure 8] 11 is a diagram showing the distribution of impurity concentrations in a simulation for the first reference example using contour lines. FIG. [Figure 9] FIG. 4 is a diagram showing the distribution of impurity concentrations in a simulation according to the first embodiment using contour lines. [Figure 10] FIG. 11 is a diagram showing the distribution of electric field intensity in a simulation for the first reference example using contour lines. [Figure 11] FIG. 4 is a diagram showing the distribution of electric field intensity in a simulation related to the first embodiment using contour lines. [Figure 12] FIG. 13 is a diagram showing the electric field intensity in a region 100 nm from the bottom surface of the Ge layer. [Figure 13] 1A to 1C are top views (part 1) illustrating a method for manufacturing a semiconductor optical receiver according to a first embodiment. [Figure 14] 5A to 5C are top views (part 2) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Figure 15] 5A to 5C are top views (part 3) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Figure 16] 4 is a top view (part 4) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 17] 5A to 5C are top views illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment; [Figure 18] 6 is a top view (part 6) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 19] 7 is a top view (part 7) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 20] 8 is a top view (part 8) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 21] 9 is a top view (part 9) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 22] 10 is a top view (part 10) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Diagram 23]11 is a top view (part 11) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 24] 12 is a top view (part 12) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Diagram 25] 13 is a top view (part 13) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 26] 14 is a top view (part 14) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 27] 15 is a top view (part 15) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. FIG. [Figure 28] 1A to 1C are cross-sectional views (part 1) illustrating a method for manufacturing the semiconductor optical receiver according to the first embodiment. [Figure 29] 5A to 5C are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 30] 5A to 5C are cross-sectional views (part 3) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 31] 4A to 4C are cross-sectional views illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment; [Diagram 32] 5A to 5C are cross-sectional views illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment; [Diagram 33] 6 is a cross-sectional view (part 6) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 34] 7 is a cross-sectional view (part 7) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 35] 8 is a cross-sectional view (part 8) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 36] 9 is a cross-sectional view (part 9) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Figure 37] 10 is a cross-sectional view showing the method for manufacturing the semiconductor optical receiver according to the first embodiment; [Figure 38] 11 is a cross-sectional view showing the method for manufacturing the semiconductor optical receiver according to the first embodiment; FIG. [Figure 39]12 is a cross-sectional view showing the method for manufacturing the semiconductor optical receiver according to the first embodiment; FIG. [Diagram 40] 13 is a cross-sectional view (part 13) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 41] 14 is a cross-sectional view (part 14) illustrating the method for manufacturing the semiconductor optical receiver according to the first embodiment. [Diagram 42] 15 is a cross-sectional view showing the method for manufacturing the semiconductor optical receiver according to the first embodiment; FIG. [Diagram 43] 6 is a cross-sectional view illustrating a configuration of a semiconductor optical receiver according to a second embodiment. [Diagram 44] FIG. 11 is a cross-sectional view illustrating a configuration of a semiconductor optical receiver according to a third embodiment. [Diagram 45] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor optical receiver according to a fourth embodiment. [Figure 46] 11A to 11C are cross-sectional views (part 1) illustrating a method for manufacturing a semiconductor optical receiver according to a fourth embodiment. [Figure 47] 13A to 13C are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor optical receiver according to the fourth embodiment. [Figure 48] FIG. 13 is a cross-sectional view illustrating a configuration of a semiconductor optical receiver according to a fifth embodiment. [Figure 49] FIG. 13 is a cross-sectional view showing a configuration of a semiconductor optical receiver according to a sixth embodiment. [Figure 50] 13A to 13C are cross-sectional views (part 1) illustrating a method for manufacturing a semiconductor optical receiver according to a sixth embodiment. [Figure 51] 13A to 13C are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor optical receiver according to the sixth embodiment. [Figure 52] 13A to 13C are cross-sectional views (part 3) illustrating the method for manufacturing the semiconductor optical receiver according to the sixth embodiment. [Diagram 53] FIG. 13 is a block diagram showing the configuration of a Si photonics coherent integrated device according to a seventh embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Among optical components, the parts that perform processes such as multiplexing / demultiplexing and modulation of light are required to have properties that do not absorb light in order to avoid excessive loss. On the other hand, the light-receiving parts that convert optical signals into electrical signals (O / E conversion) are required to have properties that absorb light. One possible material that meets these requirements is a combination of Ge for the light-receiving parts and Si for the other parts for near-infrared light with wavelengths of 1.2 μm to 1.6 μm. Near-infrared light of this wavelength is transparent to Si, but is easily absorbed by Ge.

[0010] In addition, a light receiving unit such as a photodiode (PD) has a mechanism for extracting electrons and holes generated by light absorption, i.e., photocarriers, to the outside. One example of a PD is a PIN-type PD. One example of a PIN-type PD is a homojunction PD in which a Ge layer is formed on a Si layer and two electrodes are in ohmic contact with the Ge layer.

[0011] Another example of a PIN PD is a heterojunction PD in which a Ge layer is formed on a Si layer, at least one electrode is in ohmic contact with the Si layer, and the current path includes the heterojunction interface between the Si layer and the Ge layer. In such a heterojunction PD, a valence band barrier exists at the heterojunction interface, so that the higher the light intensity, the more likely holes are to accumulate, which reduces the transport speed and the response characteristics. The reduced response characteristics can lead to a degradation of the receiver bandwidth.

[0012] (1st reference example) Here, a first reference example of the homojunction type PD will be described. Fig. 1 is a cross-sectional view showing the configuration of a semiconductor photodetector according to the first reference example.

[0013] A semiconductor photodetector 901 according to a first reference example is formed using an SOI substrate 910, and the semiconductor photodetector 901 has the SOI substrate 910. The SOI substrate 910 includes a silicon (Si) substrate 911, a Si oxide film 912, and a Si layer 920. A Ge layer 930 is formed on the Si layer 920. The Ge layer 930 has a p-type Ge region 934, an n-type Ge region 935, and a non-conductive i-type Ge region 936. The p-type Ge region 934 and the n-type Ge region 935 are formed on the upper surface of the i-type Ge region 936. A part of the i-type Ge region 936 is sandwiched between the p-type Ge region 934 and the n-type Ge region 935. In the first reference example, the depth of the p-type Ge region 934 and the n-type Ge region 935 is less than 1 / 2 the thickness of the Ge layer 930.

[0014] A Si oxide film 941 is formed so as to cover the stack of the Si layer 920 and the Ge layer 930. An opening 941P reaching the p-type Ge region 934 and an opening 941N reaching the n-type Ge region 935 are formed in the Si oxide film 941. A metal film 943P making ohmic contact with the p-type Ge region 934 through the opening 941P and a metal film 943N making ohmic contact with the n-type Ge region 935 through the opening 941N are formed on the Si oxide film 941.

[0015] The semiconductor photodetector 901 thus configured uses the Si layer 920 as an optical waveguide, and light propagating through the Si layer 920 enters the Ge layer 930 by evanescent optical coupling. Then, the guided light 991 entering the Ge layer 930 is absorbed by the Ge layer 930, and photocarriers are generated in the Ge layer 930. An electric field 992 is generated between the n-type Ge region 935 and the p-type Ge region 934, and when a reverse bias is applied through the metal film 943P and the metal film 943N such that the n-type Ge region 935 has a higher voltage than the p-type Ge region 934, the photocarriers are taken out. In FIG. 1, the thicker the electric field lines shown by the dashed lines are, the stronger the electric field 992 is.

[0016] In the first reference example, as described above, the depth of the p-type Ge region 934 and the n-type Ge region 935 is less than 1 / 2 the thickness of the Ge layer 930. Therefore, the region where the guided light 991 is strong is away from the p-type Ge region 934 and the n-type Ge region 935, and the electric field 992 in the region where the guided light 991 is strong becomes weak. This reduces the transport speed of the photocarriers, making it difficult to obtain a sufficient operating speed.

[0017] (2nd reference example) Next, a second reference example of the homojunction type PD will be described below. Fig. 2 is a cross-sectional view showing the configuration of a semiconductor photodetector according to the second reference example.

[0018] In the semiconductor photodetector 902 according to the second reference example, the depth of the p-type Ge region 934 and the n-type Ge region 935 is about 80% of the thickness of the Ge layer 930. The other configurations are similar to those of the first reference example.

[0019] In the second reference example, the region where the guided light 991 is strong is close to the p-type Ge region 934 and the n-type Ge region 935, and the electric field 992 in the region where the guided light 991 is strong is strong. Therefore, it is easy to obtain a good operating speed. On the other hand, the guided light 991 is also incident on the p-type Ge region 934 and the n-type Ge region 935, and a phenomenon called free carrier absorption occurs. Unlike light absorption that generates new photocarriers, free carrier absorption is light absorption that gives energy to already existing carriers and does not contribute to an increase in current, so-called reactive absorption. As the reactive absorption increases, the light receiving sensitivity given by the ratio of the amount of output current to the intensity of incident light decreases.

[0020] As described above, in the first reference example, it is difficult to obtain a sufficient operating speed, and in the second reference example, it is difficult to obtain a sufficient light receiving sensitivity.

[0021] Thus, there is room for improvement in the semiconductor optical receiver 901 according to the first reference example and the semiconductor optical receiver 902 according to the second reference example. The present inventors have conducted extensive research based on these findings and have come up with the following embodiments. The embodiments will be specifically described below with reference to the accompanying drawings. In the following description, the same reference numerals will be used to designate the same or corresponding elements, and the same description of those elements may be omitted.

[0022] (First embodiment) First, the first embodiment will be described. The first embodiment relates to a semiconductor photodetector including a homojunction type PD. FIG. 3 is a top view showing the configuration of the semiconductor photodetector according to the first embodiment. FIG. 4 is a diagram showing the layout of a semiconductor region in the semiconductor photodetector according to the first embodiment. FIG. 5 is a cross-sectional view showing the configuration of the semiconductor photodetector according to the first embodiment. FIG. 5 corresponds to a cross-sectional view taken along line VV in FIGS. 3 and 4.

[0023] As shown in FIGS. 3 to 5, the semiconductor optical receiver 100 according to the first embodiment is formed using an SOI substrate 110, and the semiconductor optical receiver 100 has the SOI substrate 110. The SOI substrate 110 includes a Si substrate 111, a Si oxide film 112, and a Si layer 120. The semiconductor optical receiver 100 includes a light introducing section 160 and a photoelectric conversion section 163. In the light introducing section 160, the Si layer 120 is processed into the shape of an optical waveguide. The light introducing section 160 includes a waveguide region 161 and a mode conversion section 162 in which the Si layer 120 is processed into the shape of an optical mode converter.

[0024] In the photoelectric conversion section 163, for example, the Si layer 120 is processed into a rectangular planar shape. The Si layer 120 has a p-type Si region 121, an n-type Si region 122, and a non-conductive i-type Si region 123. The p-type Si region 121 and the n-type Si region 122 are formed on the upper surface of the i-type Si region 123. The p-type Si region 121 and the n-type Si region 122 are separated from each other in a direction perpendicular to the traveling direction of light guided from the light introduction section 160 to the photoelectric conversion section 163. A part of the i-type Si region 123 is sandwiched between the p-type Si region 121 and the n-type Si region 122. The p-type Si region 121 is on the first direction side as viewed from the i-type Si region 123, and the n-type Si region 122 is on the second direction side opposite to the first direction as viewed from the i-type Si region 123. The first direction and the second direction are perpendicular to the propagation direction of light guided from the light introducing section 160 to the photoelectric conversion section 163. For example, the p-type Si region 121 is doped with boron (B) at a concentration of 0.5×10 19 cm -3 ~1.5×10 19 cm -3 For example, the n-type Si region 122 contains phosphorus (P) at a concentration of 0.5×10 19 cm -3 ~1.5×10 19 cm -3 The i-type Si region 123 is not intentionally doped with impurities, but the i-type Si region 123 contains a small amount of impurities, for example, 1×10 15 cm -3 The following concentrations of impurities may be contained: The Si layer 120 is an example of a first semiconductor layer, the p-type Si region 121 is an example of a first region, the n-type Si region 122 is an example of a second region, and the i-type Si region 123 is an example of a third region.

[0025] In the photoelectric conversion section 163, for example, a Ge layer 130 is formed on the Si layer 120. In the first embodiment, the Ge layer 130 covers the p-type Si region 121 and the n-type Si region 122. The second refractive index of the Ge layer 130 is larger than the first refractive index of the Si layer 120, and the second band gap of the Ge layer 130 is smaller than the first band gap of the Si layer 120. The Ge layer 130 has a p-type Ge region 134, an n-type Ge region 135, and a non-conductive i-type Ge region 136. The p-type Ge region 134 and the n-type Ge region 135 are formed on the upper surface of the i-type Ge region 136. The thickness of the p-type Ge region 134 and the n-type Ge region 135 is, for example, 1 / 2 or less of the thickness of the Ge layer 130. The p-type Ge region 134 and the n-type Ge region 135 are separated from the Si layer 120 in the thickness direction. The p-type Ge region 134 and the n-type Ge region 135 are separated from each other in a direction perpendicular to the traveling direction of light guided from the light introducing section 160 to the photoelectric conversion section 163. A part of the i-type Ge region 136 is sandwiched between the p-type Ge region 134 and the n-type Ge region 135. The p-type Ge region 134 is on the first direction side as viewed from the i-type Ge region 136, and the n-type Ge region 135 is on the second direction side as viewed from the i-type Ge region 136.

[0026] In plan view, a portion of the i-type Si region 123 between the p-type Si region 121 and the n-type Si region 122 overlaps with a portion of the i-type Ge region 136 between the p-type Ge region 134 and the n-type Ge region 135. In plan view, the edge on the second direction side of the p-type Si region 121 may be located closer to the first direction than the edge on the second direction side of the p-type Ge region 134, and the edge on the first direction side of the n-type Si region 122 may be located closer to the second direction than the edge on the first direction side of the n-type Ge region 135. For example, the p-type Ge region 134 is doped with boron at a concentration of 0.5×10 20 cm -3 ~1.5×10 20 cm -3 For example, the n-type Ge region 135 contains phosphorus at a concentration of 0.5×10 20 cm -3 ~1.5×10 20 cm -3 The i-type Ge region 136 is not intentionally doped with impurities, but contains a small amount of impurities, e.g., 1×1015 cm -3 The Ge layer 130 may contain impurities at the following concentrations: The Ge layer 130 is an example of a second semiconductor layer, the p-type Ge region 134 is an example of a fourth region, the n-type Ge region 135 is an example of a fifth region, and the i-type Ge region 136 is an example of a sixth region.

[0027] A Si oxide film 141 is formed so as to cover the stack of the Si layer 120 and the Ge layer 130. An opening 141P reaching the p-type Ge region 134 and an opening 141N reaching the n-type Ge region 135 are formed in the Si oxide film 141. A metal film 143P in ohmic contact with the p-type Ge region 134 through the opening 141P and a metal film 143N in ohmic contact with the n-type Ge region 135 through the opening 141N are formed on the Si oxide film 141. The metal film 143P and the metal film 143N contain, for example, aluminum (Al). The metal film 143P is an example of a first electrode, and the metal film 143N is an example of a second electrode.

[0028] Here, a description will be given of the operation and effect of the semiconductor optical receiver 100. Fig. 6 is a diagram showing the distribution of guided light and electric field in the semiconductor optical receiver 100 according to the first embodiment. Note that in Fig. 6, the thicker the electric field lines shown by the dashed lines are, the stronger the electric field is.

[0029] The semiconductor optical receiver 100 uses the Si layer 120 as an optical waveguide, and light propagating through the Si layer 120 enters the Ge layer 130 by evanescent optical coupling. Then, the guided light 191 entering the Ge layer 130 is absorbed by the Ge layer 130, and photocarriers are generated in the Ge layer 130. An electric field 192 is generated between the n-type Ge region 135 and the p-type Ge region 134. Furthermore, since the Si layer 120 has the p-type Si region 121, the i-type Si region 123, and the n-type Si region 122, an electric field 193 that contributes to the movement of photocarriers is also generated between the p-type Si region 121 and the n-type Si region 122 due to the built-in potential of the PIN structure. Therefore, in the semiconductor optical receiver 100, the electric field 192 due to the PIN structure in the Ge layer 130 functioning as a light absorbing layer is superimposed on the electric field 193 due to the PIN structure in the Si layer 120. Therefore, the semiconductor optical receiver 100 can provide a large electric field strength to the region where the intensity of the guided light 191 is high while suppressing reactive absorption, thereby achieving excellent optical receiving sensitivity and operating speed.

[0030] Furthermore, in this embodiment, the guided light mode that is tightly confined within the optical waveguide of the waveguide region 161 is expanded by the mode converter 162, improving the coupling to the Ge layer 130. Therefore, it is possible to improve the light receiving sensitivity.

[0031] Here, a simulation relating to the first reference example and the first embodiment will be described. Fig. 7 is a cross-sectional view showing the configuration of a semiconductor optical receiver that is the subject of the simulation. Fig. 8 is a diagram showing the distribution of impurity concentration in the simulation relating to the first reference example using contour lines. Fig. 9 is a diagram showing the distribution of impurity concentration in the simulation relating to the first embodiment using contour lines.

[0032] The semiconductor photodetector 100S that is the subject of this simulation has a Si layer 120S and a Ge layer 130S on the Si layer 120S. The Si layer 120S has a thickness of 200 nm, and the Ge layer 130S has a thickness of 500 nm. An Al film 143PS and an Al film 143NS are formed on the Ge layer 130S. The Si layer 120S, the Ge layer 130S, the Al film 143PS, and the Al film 143NS are covered with a Si oxide film 141S.

[0033] In the simulation of the first reference example, as shown in FIG. 8, the p-type impurity was 1×10 21 cm -3 The n-type impurity is contained at a concentration of 1×10 21 cm -3 In the simulation for the first embodiment, as shown in FIG. 9, in addition to the impurities shown in FIG. 8, a p-type impurity of 1×10 20 cm -3 The n-type impurity is contained at a concentration of 1×10 20 cm -3 It was determined that the concentration of

[0034] Then, the distribution of the electric field strength was calculated when a potential difference of 1 V was applied from the outside between the Al film 143PS and the Al film 143NS. Fig. 10 is a diagram showing the distribution of the electric field strength in the simulation related to the first reference example using contour lines. Fig. 11 is a diagram showing the distribution of the electric field strength in the simulation related to the first embodiment using contour lines.

[0035] 10 and 11, in the simulation of the first reference example, the electric field strength is high in the upper part of the Ge layer 130S, but is extremely weak in the lower part of the Ge layer 130S. In contrast, in the simulation of the first embodiment, not only is the electric field strength high in the upper part of the Ge layer 130S, but the region of high electric field strength also extends to the lower part.

[0036] FIG. 12 is a diagram showing the electric field intensity in a region 100 nm above the lower surface of the Ge layer 130S. The region 100 nm above the lower surface of the Ge layer 130S corresponds to a region where the intensity of the guided light is high. FIG. 12 shows the electric field intensity in the region indicated by the dashed line 139 in FIG. 10 and FIG. 11. The horizontal axis in FIG. 12 shows the horizontal axis position based on the center of the horizontal axis of the Ge layer 130 shown in FIG. 10 and FIG. 11. As shown in FIG. 12, in the region 100 nm above the lower surface of the Ge layer 130S, the maximum value of the electric field intensity in the simulation of the first embodiment was about twice the maximum value of the electric field intensity in the simulation of the first reference example.

[0037] From the results of this simulation, it can be seen that the transport speed of photocarriers is improved and response characteristics are improved according to the first embodiment, as compared with the first reference example. In addition, as shown in Fig. 9, since substantially no impurities are contained in the vicinity of the lower surface of the Ge layer 130S, a decrease in light receiving sensitivity caused by free carrier absorption is also suppressed.

[0038] Next, a method for manufacturing the semiconductor optical receiver 100 according to the first embodiment will be described. Fig. 13 to Fig. 27 are top views showing the method for manufacturing the semiconductor optical receiver 100 according to the first embodiment. Fig. 28 to Fig. 42 are cross-sectional views showing the method for manufacturing the semiconductor optical receiver 100 according to the first embodiment.

[0039] First, as shown in Fig. 13 and Fig. 28, an SOI substrate 110 is prepared, and an Si layer 120 is processed. For example, the thickness of the Si substrate 111 is 700µm to 800µm, the thickness of the Si oxide film 112 is 1.5µm to 2.5µm, and the thickness of the Si layer 120 is 200nm to 300nm. The Si layer 120 can be processed by electron beam (EB) lithography and inductively coupled plasma (ICP) dry etching. For example, the Si layer 120 is processed into a linear shape extending in one direction in the waveguide region 161, processed into a planar shape tapering from the waveguide region 161 to the photoelectric conversion region 163 in the mode conversion section 162, and processed into a rectangular planar shape in the photoelectric conversion section 163. For example, the width of the Si layer 120 in the light introducing section 160 is 400 nm to 600 nm in the waveguide region 161, 400 nm to 600 nm at the boundary between the waveguide region 161 and the mode conversion section 162, and 800 nm to 1100 nm at the boundary between the mode conversion section 162 and the photoelectric conversion section 163. The dimension of the Si layer 120 in the photoelectric conversion section 163 is 30 μm to 40 μm in the light traveling direction, and 5 μm to 15 μm in the direction perpendicular to the light traveling direction (direction parallel to the first direction and the second direction). FIG. 28 corresponds to a cross-sectional view taken along the line XXVIII-XXVIII in FIG. 13.

[0040] 14 and 29, a photoresist mask 151 having an opening 151P that opens a region where the p-type Si region 121 is to be formed is formed on the SOI substrate 110. The photoresist mask 151 can be formed by applying a photoresist agent, exposing it to light, and developing it. Thereafter, ions of a p-type impurity such as boron are implanted to form the p-type Si region 121 in the Si layer 120. FIG. 29 corresponds to a cross-sectional view taken along the line XXIX-XXIX in FIG.

[0041] 15 and 30, the photoresist mask 151 is removed, and a photoresist mask 152 having an opening 152N that opens a region where the n-type Si region 122 is to be formed is formed on the SOI substrate 110. The photoresist mask 152 can be formed by applying a photoresist agent, exposing it to light, and developing it. Next, the n-type Si region 122 is formed in the Si layer 120 by ion implantation of an n-type impurity such as phosphorus. The remaining part of the Si layer 120 in the photoelectric conversion section 163 is the i-type Si region 123. FIG. 30 corresponds to a cross-sectional view taken along the line XXX-XXX in FIG. 15.

[0042] Thereafter, as shown in FIG. 16 and FIG. 31, the photoresist mask 152 is removed. Then, a Si oxide film 141A is formed on the SOI substrate 110. The Si oxide film 141A can be formed by, for example, a chemical vapor deposition (CVD) method, and the thickness of the Si oxide film 141A is set to 15 nm to 25 nm. Then, annealing is performed to activate the p-type impurities and n-type impurities implanted in the Si layer 120. The annealing is performed, for example, at a temperature of 900° C. to 1100° C. for 0.5 minutes to 2 minutes. FIG. 31 corresponds to a cross-sectional view taken along the line XXXI-XXXI in FIG. 16.

[0043] 17 and 32, a photoresist mask 153 having an opening 153X that exposes a region where the Ge layer 130 is to be formed is formed on the Si oxide film 141A. The photoresist mask 153 can be formed by applying a photoresist agent, exposing it to light, and developing it. For example, the entire length of the opening 153X is 25 μm to 35 μm, and the entire width is 5 μm to 10 μm. FIG. 32 corresponds to a cross-sectional view taken along the line XXXII-XXXII in FIG. 17.

[0044] 18 and 33, the Si oxide film 141A is dry-etched to form an opening 142 in the Si oxide film 141A. Thereafter, the photoresist mask 153 is removed. FIG 33 corresponds to a cross-sectional view taken along the line XXXIII-XXXIII in FIG 18.

[0045] 19 and 34, a Ge layer 130 is formed on the Si layer 120 inside the opening 142. The Ge layer 130 can be formed by, for example, a low pressure (LP) CVD method, and has a thickness of 400 nm to 600 nm. For example, the Ge layer 130 is heteroepitaxially grown in a mesa shape. FIG. 34 corresponds to a cross-sectional view taken along line XXXIV-XXXIV in FIG. 19.

[0046] 20 and 35, a photoresist mask 154 having an opening 154P for opening a region where the p-type Ge region 134 is to be formed is formed on the Si oxide film 141A and the Ge layer 130. The photoresist mask 154 can be formed by applying a photoresist agent, exposing it to light, and developing it. Thereafter, ions of a p-type impurity such as boron are implanted to form the p-type Ge region 134 in the Ge layer 130. FIG. 35 corresponds to a cross-sectional view taken along the line XXXV-XXXV in FIG. 20.

[0047] 21 and 36, the photoresist mask 154 is removed, and a photoresist mask 155 having an opening 155N for opening a region where the n-type Ge region 135 is to be formed is formed on the Si oxide film 141A and the Ge layer 130. The photoresist mask 155 can be formed by applying a photoresist agent, exposing it to light, and developing it. Next, ions of an n-type impurity such as phosphorus are implanted to form the n-type Ge region 135 in the Ge layer 130. The remaining part of the Ge layer 130 is the i-type Ge region 136. FIG. 36 corresponds to a cross-sectional view taken along the line XXXVI-XXXVI in FIG. 21.

[0048] 22 and 37, the photoresist mask 155 is then removed, and a Si oxide film is formed on the Si oxide film 141A by, for example, a CVD method so as to cover the Ge layer 130, thereby forming the Si oxide film 141 including the Si oxide film 141A. Next, annealing is performed to activate the p-type impurities and n-type impurities implanted into the Ge layer 130. The annealing is performed at a temperature of, for example, 500° C. to 700° C. for 5 seconds to 15 seconds. FIG. 37 corresponds to a cross-sectional view taken along the line XXXVII-XXXVII in FIG. 22.

[0049] 23 and 38, a photoresist mask 156 having an opening 156P for opening a region where the opening 141P is to be formed and an opening 156N for opening a region where the opening 141N is to be formed is formed on the Si oxide film 141. The photoresist mask 156 can be formed by applying a photoresist agent, exposing it to light, and developing it. FIG. 38 corresponds to a cross-sectional view taken along the line XXXVIII-XXXVIII in FIG. 23.

[0050] 24 and 39, an opening 141P reaching the p-type Ge region 134 and an opening 141N reaching the n-type Ge region 135 are formed in the Si oxide film 141. The openings 141P and 141N can be formed by, for example, dry etching. Then, the photoresist mask 156 is removed. FIG. 39 corresponds to a cross-sectional view taken along the line XXXIX-XXXIX in FIG.

[0051] 25 and 40, a metal film 143 is formed on the Si oxide film 141 so as to fill the openings 141P and 141N. The metal film 143 is, for example, an aluminum film formed by sputtering. FIG 40 corresponds to a cross-sectional view taken along the line XL-XL in FIG 25.

[0052] 26 and 41, a photoresist mask 157 is formed to cover the region where the metal film 143P is to be formed and the region where the metal film 143N is to be formed. The photoresist mask 157 can be formed by applying a photoresist agent, exposing it to light, and developing it. Fig. 41 corresponds to a cross-sectional view taken along the line XLI-XLI in Fig. 26.

[0053] 27 and 42, the metal film 143 is dry-etched to form metal films 143P and 143N. Thereafter, the photoresist mask 157 is removed. Fig. 42 corresponds to a cross-sectional view taken along line XLII-XLII in Fig. 27.

[0054] In this manner, the semiconductor optical receiver 100 according to the first embodiment can be manufactured.

[0055] Second embodiment Next, a second embodiment will be described. The second embodiment differs from the first embodiment mainly in the configuration of the Si layer. Fig. 43 is a cross-sectional view showing the configuration of a semiconductor optical receiver according to the second embodiment. Fig. 43 corresponds to a cross-sectional view taken along line VV in Figs. 3 and 4, similar to Fig. 5.

[0056] As shown in FIG. 43, in the semiconductor optical receiver 200 according to the second embodiment, the Si layer 120 has a p-type Si region 221 instead of the p-type Si region 121, and an n-type Si region 222 instead of the n-type Si region 122. The p-type Si region 221 and the n-type Si region 222 are formed on the upper surface of the i-type Si region 123. The p-type Si region 221 and the n-type Si region 222 are separated from each other in a direction perpendicular to the traveling direction of light guided from the light introducing section 160 to the photoelectric conversion section 163. A part of the i-type Si region 123 is sandwiched between the p-type Si region 221 and the n-type Si region 222. The p-type Si region 221 is on the first direction side as viewed from the i-type Si region 123, and the n-type Si region 222 is on the second direction side as viewed from the i-type Si region 123. For example, the p-type Si region 221 contains 0.5×10 boron. 19 cm -3 ~1.5×10 19 cm-3 For example, the n-type Si region 222 contains phosphorus at a concentration of 0.5×10 19 cm -3 ~1.5×10 19 cm -3 The p-type Si region 221 is an example of a first region, the n-type Si region 222 is an example of a second region, and the i-type Si region 123 is an example of a third region.

[0057] In the semiconductor optical receiver 200, in a plan view, the p-type Si region 221 is separated from the p-type Ge region 134 in a first direction, and the n-type Si region 222 is separated from the n-type Ge region 135 in a second direction. For example, the p-type Si region 221 is located closer to the first direction than the Ge layer 130, and the n-type Si region 222 is located closer to the second direction than the Ge layer 130. Therefore, the p-type Si region 221 and the n-type Si region 222 are not covered by the Ge layer 130.

[0058] The other configuration is similar to that of the first embodiment.

[0059] The second embodiment also provides the same effects as the first embodiment. Even if the guided light 191 is distributed in the Si layer 120, the p-type Si region 221 and the n-type Si region 222 are located away from the region where the guided light 191 is strong, so that free carrier absorption in the p-type Si region 221 and the n-type Si region 222 can be easily suppressed.

[0060] Third embodiment Next, a third embodiment will be described. The third embodiment differs from the first embodiment and the like mainly in the configuration of the Si layer. Fig. 44 is a cross-sectional view showing the configuration of a semiconductor optical receiver according to the third embodiment. Fig. 44 corresponds to a cross-sectional view taken along line VV in Figs. 3 and 4, similar to Fig. 5.

[0061] As shown in FIG. 44, in the semiconductor optical receiver 300 according to the third embodiment, the Si layer 120 has a p-type Si region 321 instead of the p-type Si region 121, and an n-type Si region 322 instead of the n-type Si region 122. The p-type Si region 321 and the n-type Si region 322 are formed on the upper surface of the i-type Si region 123. The p-type Si region 321 and the n-type Si region 322 are separated from each other in a direction perpendicular to the traveling direction of light guided from the light introducing section 160 to the photoelectric conversion section 163. A part of the i-type Si region 123 is sandwiched between the p-type Si region 321 and the n-type Si region 322. The p-type Si region 321 is on the first direction side as viewed from the i-type Si region 123, and the n-type Si region 322 is on the second direction side as viewed from the i-type Si region 123. For example, the p-type Si region 321 contains 0.5×10 boron. 19 cm -3 ~1.5×10 19 cm -3 For example, the n-type Si region 322 contains phosphorus at a concentration of 0.5×10 19 cm -3 ~1.5×10 19 cm -3 The p-type Si region 321 is an example of a first region, the n-type Si region 322 is an example of a second region, and the i-type Si region 123 is an example of a third region.

[0062] In the semiconductor optical receiver 300, in a plan view, the p-type Si region 321 is disposed from the inside to the outside of the Ge layer 130, and the n-type Si region 322 is disposed from the inside to the outside of the Ge layer 130. Both the p-type Si region 321 and the n-type Si region 322 have a portion covered with the Ge layer 130 and a portion not covered with the Ge layer 130. In the directions parallel to the first direction and the second direction, the p-type Si region 321 is formed larger than the p-type Si region 121, and the n-type Si region 322 is formed larger than the n-type Si region 122.

[0063] In plan view, the distance between the edge on the second direction side of the p-type Si region 321 and the edge on the second direction side of the p-type Ge region 134 is larger than the distance between the edge on the second direction side of the p-type Si region 121 and the edge on the second direction side of the p-type Ge region 134 in the first embodiment. In plan view, the distance between the edge on the first direction side of the n-type Si region 322 and the edge on the first direction side of the n-type Ge region 135 is larger than the distance between the edge on the first direction side of the n-type Si region 122 and the edge on the first direction side of the n-type Ge region 135 in the first embodiment.

[0064] The other configuration is similar to that of the first embodiment.

[0065] The third embodiment also provides the same effects as the first embodiment. Also, like the second embodiment, free carrier absorption in the p-type Si region 321 and the n-type Si region 322 can be easily suppressed.

[0066] Depending on the application of the semiconductor photodetector, it is desirable to select the arrangement of the p-type Si region and the n-type Si region taking into consideration the improvement of the electric field strength by the p-type Si region and the n-type Si region and the suppression of free carrier absorption in the p-type Si region and the n-type Si region.

[0067] (Fourth embodiment) Next, a fourth embodiment will be described. The fourth embodiment differs from the second embodiment mainly in the configuration of the Si layer and the Ge layer. Fig. 45 is a cross-sectional view showing the configuration of a semiconductor optical receiver according to the fourth embodiment. Fig. 45, like Fig. 5, corresponds to a cross-sectional view taken along line VV in Figs. 3 and 4.

[0068] As shown in FIG. 45, in the semiconductor photodetector 400 according to the fourth embodiment, a recess 124 is formed in a portion between the p-type Si region 221 and the n-type Si region 222 of the i-type Si region 123, and a Ge layer 430 is formed to fill the recess 124 instead of the Ge layer 130. In this embodiment, the optical waveguide layer of the light introducing section 160 and the light absorption layer of the photoelectric conversion section 163 are located at the same height level in a plan view, and the guided light is directly guided to the light absorption layer. That is, the semiconductor photodetector 400 also uses a butt joint type structure. For example, the depth of the recess 124 is 80 nm to 120 nm. The thickness of the Si layer 120 is thinner in the portion where the recess 124 is formed than in the surrounding portion.

[0069] The other configuration is similar to that of the second embodiment.

[0070] The fourth embodiment also provides the same effects as the second embodiment. In addition, since the Ge layer 430 includes a portion located between the p-type Si region 221 and the n-type Si region 222 in the direction parallel to the first and second directions, it is easy to apply an electric field from the p-type Si region 221 and the n-type Si region 222 to a region where the intensity of the guided light is high. Therefore, the operating speed can be further improved.

[0071] Next, a method for manufacturing the semiconductor optical receiver 400 according to the fourth embodiment will be described. Figures 46 to 47 are cross-sectional views showing the method for manufacturing the semiconductor optical receiver 400 according to the fourth embodiment.

[0072] First, similarly to the first embodiment, the process up to the formation of the opening 142 in the Si oxide film 141A is performed. Next, the photoresist mask 153 is removed (see FIG. 33). The p-type Si region 221 can be formed by varying the position and shape of the opening 151P of the photoresist mask 151, and the n-type Si region 222 can be formed by varying the position and shape of the opening 152N of the photoresist mask 152. Thereafter, as shown in FIG. 46, the Si layer 120 is etched using the Si oxide film 141A as a mask to form the recess 124. The recess 124 can be formed by, for example, ICP dry etching.

[0073] 47, a Ge layer 430 is formed on the Si layer 120 so as to fill the recess 124. The Ge layer 430 can be formed by, for example, an LPCVD method. For example, the Ge layer 430 is heteroepitaxially grown from the recess 124 in a mesa shape.

[0074] Thereafter, similarly to the first embodiment, the processes subsequent to the formation of the Si oxide film 141 are carried out.

[0075] In this manner, the semiconductor optical receiver 400 according to the fourth embodiment can be manufactured.

[0076] Fifth embodiment Next, a fifth embodiment will be described. The fifth embodiment differs from the third embodiment mainly in the configuration of the Si layer and the Ge layer. Fig. 48 is a cross-sectional view showing the configuration of a semiconductor optical receiver according to the fifth embodiment. Fig. 48 corresponds to a cross-sectional view taken along the line VV in Figs. 3 and 4, similar to Fig. 5.

[0077] As shown in Fig. 48, in the semiconductor photodetector 500 according to the fifth embodiment, the recess 125 is formed in a portion between the p-type Si region 121 and the n-type Si region 122 of the i-type Si region 123, a portion of the p-type Si region 121 on the second direction side, and a portion of the n-type Si region 122 on the first direction side, and instead of the Ge layer 130, the Ge layer 530 is formed so as to fill the recess 125. That is, the semiconductor photodetector 500 also uses a butt joint structure as in the fourth embodiment. For example, the depth of the recess 125 is 80 nm to 120 nm. The thickness of the Si layer 120 is thinner in the portion where the recess 125 is formed than in the surrounding portion.

[0078] The other configuration is similar to that of the third embodiment.

[0079] The fifth embodiment also provides the same effects as the third embodiment. In addition, since the Ge layer 530 includes a portion located between the p-type Si region 321 and the n-type Si region 322 in the direction parallel to the first and second directions, it is easy to apply an electric field from the p-type Si region 321 and the n-type Si region 322 to a region where the intensity of the guided light is high. Therefore, the operating speed can be further improved.

[0080] Sixth embodiment Next, a sixth embodiment will be described. The sixth embodiment differs from the third embodiment in the configuration of the metal film. Fig. 49 is a cross-sectional view showing the configuration of a semiconductor optical receiver according to the sixth embodiment. Fig. 49 corresponds to a cross-sectional view taken along line VV in Figs. 3 and 4, similar to Fig. 5.

[0081] 47, in the semiconductor optical receiver 600 according to the sixth embodiment, an opening 641P reaching the p-type Si region 321 and an opening 641N reaching the n-type Si region 322 are formed in the Si oxide film 141. A metal film 643P in ohmic contact with the p-type Si region 321 through the opening 641P and a metal film 643N in ohmic contact with the n-type Si region 322 through the opening 641N are formed on the Si oxide film 141. The metal film 643P and the metal film 643N contain, for example, aluminum (Al). The metal film 643P is an example of a third electrode, and the metal film 643N is an example of a fourth electrode.

[0082] The semiconductor optical receiver 600 can be used for a receiver. In this receiver, a circuit 670 is connected to the metal film 643P and the metal film 643N, which applies a first voltage to the metal film 643P and applies a second voltage lower than the first voltage to the metal film 643N. The circuit 670 has, for example, a first inductor 671 connected between the metal film 143P and the metal film 643P, a second inductor 672 connected between the metal film 143N and the metal film 643N, and a DC power supply 673 connected between the metal film 143P and the metal film 143N. The positive electrode of the DC power supply 673 is connected to the metal film 143P, and the negative electrode is connected to the metal film 143N. The metal film 143N is grounded, and an external terminal 674 is connected to the metal film 143P.

[0083] In the circuit 670, a DC voltage (bias voltage) applied between the metal film 143P and the metal film 143N from a DC power supply 673 is also applied between the metal film 643P and the metal film 643N. In addition, a high-frequency component corresponding to a modulated signal generated by photoelectric conversion by the Ge layer 130 flows between the metal film 143P and the metal film 143N, and this modulated signal can be detected at an external terminal 674. On the other hand, since the first inductor 671 and the second inductor 672 are provided, the high-frequency component corresponding to the modulated signal does not flow between the metal film 643P and the metal film 643N. Therefore, the path of the modulated signal does not include the heterojunction interface between the Si layer 120 and the Ge layer 130. Therefore, in this embodiment, it is possible to avoid a decrease in response characteristics that occurs in a heterojunction type PD. In addition, in the structure of this embodiment, the electric field strength between the p-type Si region 321 and the n-type Si region 322 can be further strengthened, and therefore the operating speed can be further improved.

[0084] Next, a method for manufacturing the semiconductor optical receiver 600 according to the sixth embodiment will be described. Figures 50 to 52 are cross-sectional views showing the method for manufacturing the semiconductor optical receiver 600 according to the sixth embodiment.

[0085] First, similarly to the first embodiment, the process up to the formation of the Si oxide film 141 is performed (see FIG. 37). The p-type Si region 321 can be formed by varying the position and shape of the opening 151P of the photoresist mask 151, and the n-type Si region 322 can be formed by varying the position and shape of the opening 152N of the photoresist mask 152. Next, as shown in FIG. 50, a photoresist mask 656 is formed on the Si oxide film 141, the photoresist mask 656 including an opening 156P for opening a region where the opening 141P is to be formed, an opening 156N for opening a region where the opening 141N is to be formed, an opening 656P for opening a region where the opening 641P is to be formed, and an opening 656N for opening a region where the opening 641N is to be formed. The photoresist mask 656 can be formed by applying a photoresist agent, exposing it to light, and developing it.

[0086] 51, an opening 141P reaching the p-type Ge region 134, an opening 141N reaching the n-type Ge region 135, an opening 641P reaching the p-type Si region 321, and an opening 641N reaching the n-type Si region 322 are formed in the Si oxide film 141. The openings 141P, 141N, 641P, and 641N can be formed by, for example, dry etching. Then, the photoresist mask 656 is removed.

[0087] 52, a metal film 143 is formed on the Si oxide film 141 so as to fill the openings 141P, 141N, 641P, and 641N. The metal film 143 is formed, for example, by a sputtering method using an aluminum film. Thereafter, a photoresist mask 657 is formed to cover a region where the metal film 143P is to be formed, a region where the metal film 143N is to be formed, a region where the metal film 643P is to be formed, and a region where the metal film 643N is to be formed. The photoresist mask 657 can be formed by applying a photoresist agent, exposing it to light, and developing it.

[0088] Next, the metal film 143 is dry-etched to form the metal film 143P, the metal film 143N, the metal film 643P, and the metal film 643N. Thereafter, the photoresist mask 657 is removed (see FIG. 49).

[0089] In this manner, the semiconductor optical receiver 600 according to the sixth embodiment can be manufactured.

[0090] The semiconductor photodetectors according to the first to sixth embodiments are suitable for, for example, an integrated circuit in which a semiconductor device for processing an electric signal and a semiconductor photodetector are integrated on a Si substrate, and can realize high-speed optical communication. For example, they are suitable for high-speed optical communication between a central processing unit (CPU) of a computer and a memory, and for high-speed optical communication between CPUs. They are particularly promising for use in next-generation large-capacity optical interconnects. They are also promising for use in coherent communication used for long-distance large-capacity communication.

[0091] In the present disclosure, the materials of the first and second semiconductor layers are not limited to Si and Ge. For example, a Si layer may be used as the first semiconductor layer and a Si layer may be used as the second semiconductor layer. x Ge 1-x Layer (0≦x<1) or Ge 1-x Sn x A layer (0≦x<1) can be used.

[0092] Seventh embodiment Next, a seventh embodiment will be described. The seventh embodiment relates to a Si photonics coherent integrated device, which is an example of an optical integrated device including a semiconductor photodetector. Fig. 53 is a block diagram showing the configuration of a Si photonics coherent integrated device according to the seventh embodiment.

[0093] The Si photonics coherent integrated device 700 of the seventh embodiment has an input section 710 to which a local light LO is input, an input section 720 to which a signal light SI to be received is input, and an output section 730 from which a signal light SO to be transmitted is output, as shown in FIG.

[0094] The Si photonics coherent integrated device 700 includes a polarization splitter 721 connected to an input unit 720, two mixers 723A and 723B connected to the polarization splitter 721, and a polarization rotator 722 connected between the polarization splitter 721 and the mixer. The Si photonics coherent integrated device 700 further includes an optical receiver 724A that converts an optical signal output by the mixer 723A into an electric signal, and an optical receiver 724B that converts an optical signal output by the mixer 723B into an electric signal. The optical receivers 724A and 724B each include a plurality of semiconductor optical receivers having the same configuration as the semiconductor optical receiver according to any one of the first to sixth embodiments. The local light LO input to the input unit 710 is also input to the mixers 723A and 723B.

[0095] The Si photonics coherent integrated device 700 has a polarization multiplexing element 731 connected to an output unit 730, a silicon IQ modulator 733 connected to the polarization multiplexing element 731, and a polarization rotation element 732 provided in a waveguide of a Q signal output from the silicon IQ modulator 733. The local light LO input to the input unit 710 is input to the silicon IQ modulator 733.

[0096] In the optical transmission device according to the seventh embodiment, the optical receivers 724A and 724B include semiconductor optical receivers having the same configuration as the semiconductor optical receivers according to any of the first to sixth embodiments, and therefore excellent optical receiving sensitivity can be obtained.

[0097] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0098] Various aspects of the present disclosure are summarized below as appendices.

[0099] (Appendix 1) a first semiconductor layer having a first refractive index and a first band gap; a second semiconductor layer having a second refractive index and a second band gap formed on the first semiconductor layer; A first electrode; A second electrode; having The second refractive index is greater than the first refractive index, the second bandgap is smaller than the first bandgap; The first semiconductor layer is a p-type first region; a second region of n-type; a non-conductive third region between the first region and the second region; and having The second semiconductor layer is a p-type fourth region with which the first electrode is in ohmic contact; an n-type fifth region with which the second electrode is in ohmic contact; a non-conductive sixth region between the fourth region and the fifth region; having The first region is located on a first direction side as viewed from the third region, the second region is located in a second direction opposite to the first direction as viewed from the third region, the fourth region is located on the first direction side as viewed from the sixth region, the fifth region is located on the second direction side as viewed from the sixth region, A semiconductor optical receiver, wherein the third region and the sixth region overlap in a plan view. (Appendix 2) a thickness of the fourth region and a thickness of the fifth region are equal to or less than half a thickness of the second semiconductor layer; The semiconductor photodetector according to claim 1, wherein the fourth region and the fifth region are spaced apart from the first semiconductor layer in a thickness direction. (Appendix 3) 3. The semiconductor photodetector according to claim 1, wherein a recess is formed in a region of the first semiconductor layer that contacts the second semiconductor layer. (Appendix 4) In plan view, an edge of the first region on the second direction side is located closer to the first direction side than an edge of the fourth region on the second direction side; A semiconductor photodetector as described in any one of claims 1 to 3, characterized in that the edge of the second region on the first direction side is located closer to the second direction side than the edge of the fifth region on the first direction side. (Appendix 5) In plan view, The first region is spaced from the fourth region in the first direction, 5. The semiconductor optical receiver according to claim 1, wherein the second region is spaced from the fifth region in the second direction. (Appendix 6) the first semiconductor layer is a Si layer, The second semiconductor layer is Si x Ge 1-x 6. The semiconductor photodetector according to claim 1, wherein the layer is a layer (0≦x<1). (Appendix 7) the first semiconductor layer is a Si layer, The second semiconductor layer is Ge 1-x Sn x 6. The semiconductor photodetector according to claim 1, wherein the layer is a layer (0≦x<1). (Appendix 8) a photoelectric conversion portion in which the first semiconductor layer and the second semiconductor layer overlap each other in a plan view; A light introducing portion connected to the photoelectric conversion portion; having 8. The semiconductor photodetector according to claim 1, wherein the propagation direction of light guided from the light introducing portion to the photoelectric conversion portion is perpendicular to the first direction and the second direction. (Appendix 9) a third electrode in ohmic contact with the first region; a fourth electrode in ohmic contact with the second region; 9. The semiconductor photodetector according to claim 1, further comprising: (Appendix 10) A semiconductor optical receiver according to claim 9; a circuit that applies a first voltage to the third electrode and a second voltage lower than the first voltage to the fourth electrode; A receiver comprising: (Appendix 11) The circuit comprises: a first inductor connected between the first electrode and the third electrode; a second inductor connected between the second electrode and the fourth electrode; A DC power source connected between the first electrode and the second electrode; 11. The receiver according to claim 10, comprising: (Appendix 12) 10. An optical integrated device comprising the semiconductor photodetector according to any one of claims 1 to 9. [Explanation of symbols]

[0100] 100, 200, 300, 400, 500, 600: Semiconductor receiver 120:Si layer 121, 221, 321: p-type Si region 122, 222, 322: n-type Si region 123: i-type Si region 130: Ge layer 134:p-type Ge region 135:n-type Ge region 136: i-type Ge region 143P, 143N: Metal film 160: Light introduction section 163: Photoelectric conversion unit 670: Circuit

Claims

1. A first semiconductor layer having a first refractive index and a first band gap; a second semiconductor layer having a second refractive index and a second band gap formed on the first semiconductor layer; A first electrode; A second electrode; having The second refractive index is greater than the first refractive index, the second bandgap is smaller than the first bandgap; The first semiconductor layer is a p-type first region; a second region of n-type; a non-conductive third region between the first region and the second region; and having The second semiconductor layer is a p-type fourth region with which the first electrode is in ohmic contact; an n-type fifth region with which the second electrode is in ohmic contact; a sixth region between the fourth region and the fifth region that is electrically non-conductive; having The first region is located on a first direction side as viewed from the third region, the second region is located in a second direction opposite to the first direction as viewed from the third region, the fourth region is located on the first direction side as viewed from the sixth region, the fifth region is located on the second direction side as viewed from the sixth region, In a plan view, the third region and the sixth region overlap each other, a thickness of the fourth region and a thickness of the fifth region are equal to or less than half a thickness of the second semiconductor layer, The semiconductor photodetector, wherein the fourth region and the fifth region are spaced apart from the first semiconductor layer in a thickness direction.

2. In plan view, an edge of the first region on the second direction side is located closer to the first direction side than an edge of the fourth region on the second direction side; 2 . The semiconductor optical receiver according to claim 1 , wherein an edge of the second region on the first direction side is located closer to the second direction than an edge of the fifth region on the first direction side.

3. A first semiconductor layer having a first refractive index and a first band gap; a second semiconductor layer having a second refractive index and a second band gap formed on the first semiconductor layer; A first electrode; A second electrode; having The second refractive index is greater than the first refractive index, the second bandgap is smaller than the first bandgap; The first semiconductor layer is a p-type first region; a second region of n-type; a non-conductive third region between the first region and the second region; and having The second semiconductor layer is a p-type fourth region with which the first electrode is in ohmic contact; an n-type fifth region with which the second electrode is in ohmic contact; a sixth region between the fourth region and the fifth region that is electrically non-conductive; having The first region is located on a first direction side as viewed from the third region, the second region is located in a second direction opposite to the first direction as viewed from the third region, the fourth region is located on the first direction side as viewed from the sixth region, the fifth region is located on the second direction side as viewed from the sixth region, In a plan view, the third region and the sixth region overlap each other, In plan view, an edge of the first region on the second direction side is located closer to the first direction side than an edge of the fourth region on the second direction side; a first edge of the second region on the first direction side of the fifth region, the second edge being located closer to the second direction than the first edge of the fifth region on the first direction side of the fifth region;

4. 4. The semiconductor photodetector according to claim 1, wherein a recess is formed in a region of the first semiconductor layer that contacts the second semiconductor layer.

5. In plan view, The first region is spaced from the fourth region in the first direction, 5. The semiconductor optical receiver according to claim 1, wherein the second region is spaced from the fifth region in the second direction.

6. the first semiconductor layer is a Si layer, The second semiconductor layer is Si ｘ Ge １－ｘ 6. The semiconductor photodetector according to claim 1, further comprising a layer (0≦x<1).

7. the first semiconductor layer is a Si layer, The second semiconductor layer is Ge １－ｘ Sn ｘ 6. The semiconductor photodetector according to claim 1, further comprising a layer (0≦x<1).

8. a photoelectric conversion portion in which the first semiconductor layer and the second semiconductor layer overlap each other in a plan view; A light introducing portion connected to the photoelectric conversion portion; having 8. The semiconductor optical receiver according to claim 1, wherein a traveling direction of light guided from the light introducing portion to the photoelectric conversion portion is perpendicular to the first direction and the second direction.

9. a third electrode in ohmic contact with the first region; a fourth electrode in ohmic contact with the second region; 9. The semiconductor photodetector according to claim 1, further comprising:

10. A semiconductor device comprising: a first semiconductor layer having a first refractive index and a first band gap; a second semiconductor layer having a second refractive index and a second band gap formed on the first semiconductor layer; A first electrode; A second electrode; having The second refractive index is greater than the first refractive index, the second bandgap is smaller than the first bandgap; The first semiconductor layer is a p-type first region; a second region of n-type; a non-conductive third region between the first region and the second region; and having The second semiconductor layer is a p-type fourth region with which the first electrode is in ohmic contact; an n-type fifth region with which the second electrode is in ohmic contact; a sixth region between the fourth region and the fifth region that is electrically non-conductive; having The first region is located on a first direction side as viewed from the third region, the second region is located in a second direction opposite to the first direction as viewed from the third region, the fourth region is located on the first direction side as viewed from the sixth region, the fifth region is located on the second direction side as viewed from the sixth region, In a plan view, the third region and the sixth region overlap each other, a third electrode in ohmic contact with the first region; a fourth electrode in ohmic contact with the second region; A semiconductor photodetector comprising:

11. A semiconductor photodetector according to claim 9 or 10; a circuit that applies a first voltage to the third electrode and a second voltage that is lower than the first voltage to the fourth electrode; A receiver comprising:

12. The circuit comprises: a first inductor connected between the first electrode and the third electrode; a second inductor connected between the second electrode and the fourth electrode; A DC power source connected between the first electrode and the second electrode; 12. The receiver according to claim 11, further comprising:

13. An optical integrated device comprising the semiconductor photodetector according to claim 1 .

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