Detection device

Abstract

To provide a detection device capable of properly setting an exposure period.SOLUTION: A detection device includes: photodiodes; a light source for emitting light to an object to be detected; a detection circuit configured to detect detection signals output from the photodiodes; and an exposure period adjusting circuit configured to determine an exposure period of the photodiodes. A relation between an output value output from the detection circuit and the exposure period comprises a linear region and a saturated region. A gradient of the output value with respect to the exposure period in the saturated region is smaller than a gradient of the output value with respect to the exposure period in the linear region. The exposure period adjusting circuit is configured to determine the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a reference output value set in advance.SELECTED DRAWING: Figure 12

Description

[Technical field]

[0001] The present invention relates to a detection device. [Background technology]

[0002] Optical sensors capable of detecting fingerprint patterns and blood vessel patterns are known (for example, Patent Document 1). Patent Document 2 describes an EL display device capable of displaying and capturing images by forming a photosensor element in a display panel. In Patent Document 2, light from a light-emitting element is irradiated onto an object, and the reflected light is received by a photosensor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2009-32005 A [Patent Document 2] JP 2007-226045 A Summary of the Invention [Problem to be solved by the invention]

[0004] In authentication devices using optical sensors, the state of the object to be detected differs depending on, for example, the subject, the detection site, the intensity of light from the light source, etc. Therefore, the intensity of light incident on the sensor from the object to be detected differs, and the signal level detected by the sensor differs. For example, if the intensity of the light incident on the sensor is weak, it will be buried in noise, and if the intensity of the light is high, it will be saturated, and there is a possibility that the biometric information cannot be detected well. It is difficult to set optimal exposure conditions for each object to be detected, and there is a possibility that the biometric information cannot be detected well.

[0005] An object of the present invention is to provide a detection device capable of setting an exposure period favorably. [Means for solving the problem]

[0006] A detection device of one embodiment of the present invention has a plurality of photodiodes, a light source which irradiates light onto a detected object, a detection circuit which detects detection signals output from the plurality of photodiodes, and an exposure period adjustment circuit which determines an exposure period for the plurality of photodiodes, wherein the relationship between an output value output from the detection circuit and the exposure period has a linear region and a saturation region, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region, and the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a predetermined reference output value.

[0007] A detection device of one embodiment of the present invention has a plurality of photodiodes, a light source which irradiates a detected object with light, a detection circuit which detects detection signals output from the plurality of photodiodes, and an exposure period adjustment circuit which determines an exposure period for the plurality of photodiodes, wherein the relationship between an output value output from the detection circuit and the exposure period has a linear region and a saturation region, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region, and the exposure period adjustment circuit sets the exposure time of an inflection point of the output value as an optimal exposure time in the relationship between the output value output from the detection circuit and the exposure period. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing a detection device according to an embodiment. [Diagram 2] FIG. 2 is a block diagram illustrating an example of the configuration of the detection device according to the embodiment. [Diagram 3] FIG. 3 is a circuit diagram showing the detection device. [Figure 4] FIG. 4 is a circuit diagram showing a plurality of partial detection areas. [Diagram 5] FIG. 5 is a cross-sectional view showing a schematic cross-sectional configuration of the sensor unit. [Figure 6] FIG. 6 is a cross-sectional view showing a schematic cross-sectional configuration of a sensor unit of a detection device according to a first modified example. [Figure 7] FIG. 7 is a timing waveform diagram showing an example of the operation of the detection device. [Figure 8] FIG. 8 is a timing waveform diagram showing an example of operation during the readout period in FIG. [Figure 9] FIG. 9 is a graph showing a schematic relationship between the output voltage output from the detection circuit of the detection device according to the embodiment and the intensity of light incident on the finger. [Figure 10] FIG. 10 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in the detection device according to the embodiment. [Figure 11] FIG. 11 is a block diagram showing an example of the configuration of a control circuit of the detection device according to the embodiment. [Figure 12] FIG. 12 is a flowchart for explaining an example of the operation of the detection device according to the embodiment. [Figure 13] FIG. 13 is an explanatory diagram for explaining driving of the sensor unit and the light source of the detection device in steps ST11 and ST12 shown in FIG. [Figure 14] FIG. 14 is an explanatory diagram for explaining driving of a sensor unit and a light source of a detection device according to a second modified example. [Figure 15] FIG. 15 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in case 1. In FIG. [Figure 16] FIG. 16 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in Case 2. In FIG. [Figure 17] FIG. 17 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in Case 3. In FIG. [Figure 18] FIG. 18 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in Case 4. In FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiment. In addition, the components described below include those that a person skilled in the art can easily imagine and those that are substantially the same. Furthermore, the components described below can be appropriately combined. Note that the disclosure is merely an example, and those that a person skilled in the art can easily imagine appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, in order to make the explanation clearer, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment, but they are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each figure, elements similar to those described above with respect to the previous figures may be given the same reference numerals, and detailed explanations may be omitted as appropriate.

[0010] (First embodiment) Fig. 1 is a plan view showing a detection device according to the first embodiment. As shown in Fig. 1, the detection device 100 has a sensor substrate 21, a sensor unit 10, a gate line driving circuit 15, a signal line selection circuit 16, a detection circuit 48, a control circuit 122, a power supply circuit 123, a first light source substrate 51, a second light source substrate 52, a first light source 61, and a second light source 62. A plurality of first light sources 61 are provided on the first light source substrate 51. A plurality of second light sources 62 are provided on the second light source substrate 52.

[0011] The control board 121 is electrically connected to the sensor base material 21 via a flexible printed circuit board 71. The flexible printed circuit board 71 is provided with a detection circuit 48. The control board 121 is provided with a control circuit 122 and a power supply circuit 123. The control circuit 122 is, for example, an FPGA (Field Programmable Gate Array). The control circuit 122 supplies control signals to the sensor unit 10, the gate line driving circuit 15, and the signal line selection circuit 16 to control the detection operation of the sensor unit 10. The control circuit 122 also supplies control signals to the first light source 61 and the second light source 62 to control the lighting or non-lighting of the first light source 61 and the second light source 62. The power supply circuit 123 supplies voltage signals such as a sensor power supply signal VDDSNS (see FIG. 4) to the sensor unit 10, the gate line driving circuit 15, and the signal line selection circuit 16. The power supply circuit 123 also supplies a power supply voltage to the first light source 61 and the second light source 62.

[0012] The sensor substrate 21 has a detection area AA and a peripheral area GA. The detection area AA is an area in which a plurality of photodiodes PD (see FIG. 4) of the sensor unit 10 are provided. The peripheral area GA is an area between the outer periphery of the detection area AA and an end of the sensor substrate 21, in which the photodiodes PD are not provided.

[0013] The gate line driving circuit 15 and the signal line selection circuit 16 are provided in the peripheral area GA. Specifically, the gate line driving circuit 15 is provided in a region of the peripheral area GA extending along the second direction Dy. The signal line selection circuit 16 is provided in a region of the peripheral area GA extending along the first direction Dx, and is provided between the sensor unit 10 and the detection circuit 48.

[0014] The first direction Dx is a direction in a plane parallel to the sensor substrate 21. The second direction Dy is a direction in a plane parallel to the sensor substrate 21, and is a direction perpendicular to the first direction Dx. The second direction Dy may intersect with the first direction Dx without being perpendicular thereto. The third direction Dz is a direction perpendicular to the first direction Dx and the second direction Dy, and is a normal direction of the sensor substrate 21.

[0015] The multiple first light sources 61 are provided on the first light source substrate 51 and arranged along the second direction Dy. The multiple second light sources 62 are provided on the second light source substrate 52 and arranged along the second direction Dy. The first light source substrate 51 and the second light source substrate 52 are electrically connected to the control circuit 122 and the power supply circuit 123 via terminal portions 124 and 125 provided on the control board 121, respectively.

[0016] The first light sources 61 and the second light sources 62 are, for example, inorganic light emitting diodes (LEDs) or organic light emitting diodes (OLEDs). The first light sources 61 and the second light sources 62 emit first light and second light of different wavelengths, respectively.

[0017] The first light emitted from the first light source 61 is mainly reflected by the surface of the object to be detected such as the finger Fg and enters the sensor unit 10. As a result, the sensor unit 10 can detect a fingerprint by detecting the shape of the projections and recesses on the surface of the finger Fg. The second light emitted from the second light source 62 is mainly reflected inside the finger Fg or passes through the finger Fg and enters the sensor unit 10. As a result, the sensor unit 10 can detect information about a living body inside the finger Fg. The information about a living body is, for example, a pulse wave, a pulse, a blood vessel image, etc. of the finger Fg or the palm. That is, the detection device 100 may be configured as a fingerprint detection device that detects a fingerprint, or a vein detection device that detects a blood vessel pattern such as a vein.

[0018] The first light may have a wavelength of 500 nm or more and 600 nm or less, for example, about 550 nm, and the second light may have a wavelength of 780 nm or more and 950 nm or less, for example, about 850 nm. In this case, the first light is blue or green visible light, and the second light is infrared light. The sensor unit 10 can detect a fingerprint based on the first light emitted from the first light source 61. The second light emitted from the second light source 62 is reflected inside the detection object such as a finger Fg or transmitted / absorbed by the finger Fg or the like and enters the sensor unit 10. As a result, the sensor unit 10 can detect a pulse wave or a blood vessel image (blood vessel pattern) as information about the living body inside the finger Fg or the like.

[0019] Alternatively, the first light may have a wavelength of 600 nm or more and 700 nm or less, for example, about 660 nm, and the second light may have a wavelength of 780 nm or more and 900 nm or less, for example, about 850 nm. In this case, based on the first light emitted from the first light source 61 and the second light emitted from the second light source 62, the sensor unit 10 can detect information about the living body, such as a pulse wave, a pulse rate, and a blood vessel image, as well as blood oxygen saturation. In this way, since the detection device 100 has the first light source 61 and a plurality of second light sources 62, it can detect various information about the living body by performing detection based on the first light and detection based on the second light.

[0020] The arrangement of the first light source 61 and the second light source 62 shown in FIG. 1 is merely an example and can be changed as appropriate. The detection device 100 is provided with a plurality of types of light sources (the first light source 61 and the second light source 62) as the light source. However, this is not limited to this, and the light source may be of one type. For example, a plurality of first light sources 61 and a plurality of second light sources 62 may be arranged on each of the first light source substrate 51 and the second light source substrate 52. Furthermore, the number of light source substrates on which the first light source 61 and the second light source 62 are arranged may be one or three or more. Alternatively, it is sufficient that at least one or more light sources are arranged.

[0021] Fig. 2 is a block diagram showing an example of the configuration of the detection device according to the first embodiment. As shown in Fig. 2, the detection device 100 further includes a detection control unit 11 and a detection unit 40. A part or all of the functions of the detection control unit 11 are included in a control circuit 122. In addition, a part or all of the functions of the detection unit 40 other than the detection circuit 48 are included in the control circuit 122.

[0022] The sensor unit 10 has a plurality of photodiodes PD. The photodiodes PD of the sensor unit 10 are optical sensors that output an electric signal corresponding to irradiated light as a detection signal Vdet to the signal line selection circuit 16. The sensor unit 10 also performs detection according to a gate drive signal Vgcl supplied from the gate line drive circuit 15.

[0023] The detection control unit 11 is a circuit that supplies control signals to the gate line driving circuit 15, the signal line selection circuit 16, and the detection unit 40, respectively, and controls their operations. The detection control unit 11 supplies various control signals, such as a start signal STV, a clock signal CK, and a reset signal RST1, to the gate line driving circuit 15. The detection control unit 11 also supplies various control signals, such as a selection signal ASW, to the signal line selection circuit 16. The detection control unit 11 also supplies various control signals to the first light source 61 and the second light source 62, and controls the lighting and non-lighting of each of them.

[0024] The gate line driving circuit 15 is a circuit that drives multiple gate lines GCL (see FIG. 3) based on various control signals. The gate line driving circuit 15 sequentially or simultaneously selects multiple gate lines GCL and supplies a gate driving signal Vgcl to the selected gate lines GCL. In this way, the gate line driving circuit 15 selects multiple photodiodes PD connected to the gate lines GCL.

[0025] The signal line selection circuit 16 is a switch circuit that sequentially or simultaneously selects a plurality of signal lines SGL (see FIG. 3). The signal line selection circuit 16 is, for example, a multiplexer. The signal line selection circuit 16 connects the selected signal line SGL to the detection circuit 48 based on a selection signal ASW supplied from the detection control unit 11. As a result, the signal line selection circuit 16 outputs a detection signal Vdet of the photodiode PD to the detection unit 40.

[0026] The detection unit 40 includes a detection circuit 48, a signal processing unit 44, a coordinate extraction unit 45, a storage unit 46, a detection timing control unit 47, an image processing unit 49, and an output processing unit 50. Based on a control signal supplied from the detection control unit 11, the detection timing control unit 47 controls the detection circuit 48, the signal processing unit 44, the coordinate extraction unit 45, and the image processing unit 49 so that they operate in synchronization with each other.

[0027] The detection circuit 48 is, for example, an analog front-end circuit (AFE). The detection circuit 48 is a signal processing circuit having at least the functions of a detection signal amplifier 42 and an A / D converter 43. The detection signal amplifier 42 amplifies the detection signal Vdet. The A / D converter 43 converts the analog signal output from the detection signal amplifier 42 into a digital signal.

[0028] The signal processing unit 44 is a logic circuit that detects a predetermined physical quantity input to the sensor unit 10 based on an output signal from the detection circuit 48. When the finger Fg is in contact with or close to the detection surface, the signal processing unit 44 can detect unevenness on the surface of the finger Fg or the palm based on a signal from the detection circuit 48. The signal processing unit 44 can also detect information about the living body based on a signal from the detection circuit 48. The information about the living body is, for example, a blood vessel image of the finger Fg or the palm, a pulse wave, a pulse rate, a blood oxygen concentration, etc.

[0029] Furthermore, the signal processing unit 44 may acquire detection signals Vdet (information about a living body) simultaneously detected by a plurality of photodiodes PD and execute a process of averaging these. In this case, the detection unit 40 can suppress measurement errors caused by noise and relative positional deviation between the detection object such as a finger Fg and the sensor unit 10, enabling stable detection.

[0030] The storage unit 46 temporarily stores the signal calculated by the signal processing unit 44. The storage unit 46 may be, for example, a RAM (Random Access Memory), a register circuit, or the like.

[0031] The coordinate extraction unit 45 is a logic circuit that determines the detection coordinates of the unevenness of the surface of the finger, etc., when the contact or proximity of the finger is detected in the signal processing unit 44. The coordinate extraction unit 45 is also a logic circuit that determines the detection coordinates of the blood vessels of the finger Fg or the palm. The image processing unit 49 combines the detection signals Vdet output from each photodiode PD of the sensor unit 10 to generate two-dimensional information indicating the shape of the unevenness of the surface of the finger Fg, etc., and two-dimensional information indicating the shape of the blood vessels of the finger Fg or the palm. The coordinate extraction unit 45 may output the detection signal Vdet as the sensor output voltage Vo without calculating the detection coordinates. The coordinate extraction unit 45 and the image processing unit 49 may not be included in the detection unit 40.

[0032] The output processing unit 50 functions as a processing unit that performs processing based on the outputs from the multiple photodiodes PD. Specifically, the output processing unit 50 of the embodiment outputs a sensor output voltage Vo including at least pulse wave data based on at least the detection signal Vdet acquired via the signal processing unit 44. In the embodiment, the signal processing unit 44 outputs data indicating the change (amplitude) of the output of the detection signal Vdet of each photodiode PD described later, and the output processing unit 50 determines which output is adopted as the sensor output voltage Vo, but both of these may be performed by the signal processing unit 44 or the output processing unit 50. Note that the output processing unit 50 may include the detection coordinates obtained by the coordinate extraction unit 45, the two-dimensional information generated by the image processing unit 49, and the like in the sensor output voltage Vo. In addition, the function of the output processing unit 50 may be integrated into another configuration (for example, the image processing unit 49, etc.).

[0033] Next, an example of the circuit configuration of the detection device 100 will be described. Fig. 3 is a circuit diagram showing the detection device. As shown in Fig. 3, the sensor unit 10 has a plurality of partial detection areas PAA arranged in a matrix. A photodiode PD is provided in each of the partial detection areas PAA.

[0034] The gate lines GCL extend in a first direction Dx and are connected to a plurality of partial detection areas PAA arranged in the first direction Dx. The plurality of gate lines GCL(1), GCL(2), ..., GCL(8) are arranged in a second direction Dy and are each connected to a gate line driving circuit 15. In the following description, when there is no need to distinguish between the plurality of gate lines GCL(1), GCL(2), ..., GCL(8), they are simply referred to as gate lines GCL. In addition, in FIG. 3, eight gate lines GCL are shown for ease of explanation, but this is merely an example, and M gate lines GCL (M is 8 or more, for example, M=256) may be arranged.

[0035] The signal line SGL extends in the second direction Dy and is connected to the photodiodes PD of the partial detection areas PAA arranged in the second direction Dy. The signal lines SGL(1), SGL(2), ..., SGL(12) are arranged in the first direction Dx and are each connected to the signal line selection circuit 16 and the reset circuit 17. In the following description, when it is not necessary to distinguish between the signal lines SGL(1), SGL(2), ..., SGL(12), they will simply be referred to as signal lines SGL.

[0036] For ease of understanding, 12 signal lines SGL are shown, but this is merely an example, and N signal lines SGL (N is 12 or more, for example, N=252) may be arranged. In FIG. 3, the sensor unit 10 is provided between the signal line selection circuit 16 and the reset circuit 17. This is not limiting, and the signal line selection circuit 16 and the reset circuit 17 may be connected to ends of the signal lines SGL in the same direction. The effective area of ​​one sensor is, for example, substantially 50×50 um. 2 The resolution of the detection area AA is, for example, substantially 508 ppi, the number of sensors arranged in the detection area AA is, for example, 252 cells × 256 cells, and the area of ​​the detection area AA is, for example, 12.6 × 12.8 mm 2 It is said.

[0037] The gate line driving circuit 15 receives various control signals, such as a start signal STV, a clock signal CK, and a reset signal RST1, from the control circuit 122 (see FIG. 1). The gate line driving circuit 15 sequentially selects the multiple gate lines GCL(1), GCL(2), ..., GCL(8) in a time-division manner based on the various control signals. The gate line driving circuit 15 supplies a gate driving signal Vgcl to the selected gate line GCL. As a result, the gate driving signal Vgcl is supplied to the multiple first switching elements Tr connected to the gate line GCL, and the multiple partial detection areas PAA arranged in the first direction Dx are selected as detection targets.

[0038] The gate line driving circuit 15 may perform different driving for each detection mode of the fingerprint detection and a plurality of different pieces of biometric information (pulse wave, pulse, blood vessel image, blood oxygen concentration, etc.) For example, the gate line driving circuit 15 may drive a plurality of gate lines GCL in a bundle.

[0039] The signal line selection circuit 16 has a plurality of selection signal lines Lsel, a plurality of output signal lines Lout, and a third switching element TrS. The plurality of third switching elements TrS are provided corresponding to the plurality of signal lines SGL, respectively. The six signal lines SGL(1), SGL(2), ..., SGL(6) are connected to a common output signal line Lout1. The six signal lines SGL(7), SGL(8), ..., SGL(12) are connected to a common output signal line Lout2. The output signal lines Lout1, Lout2 are each connected to a detection circuit 48.

[0040] Here, the signal lines SGL(1), SGL(2), ..., SGL(6) are defined as a first signal line block, and the signal lines SGL(7), SGL(8), ..., SGL(12) are defined as a second signal line block. The multiple selection signal lines Lsel are each connected to the gate of the third switching element TrS included in one signal line block. Furthermore, one selection signal line Lsel is connected to the gate of the third switching element TrS of multiple signal line blocks.

[0041] The control circuit 122 (see FIG. 1) sequentially supplies the selection signal ASW to the selection signal line Lsel. As a result, the signal line selection circuit 16 sequentially selects the signal lines SGL in one signal line block in a time-division manner by the operation of the third switching element TrS. The signal line selection circuit 16 also selects one signal line SGL from each of the multiple signal line blocks. With this configuration, the detection device 100 can reduce the number of ICs (Integrated Circuits) including the detection circuit 48 or the number of IC terminals. The signal line selection circuit 16 may also bundle multiple signal lines SGL together and connect them to the detection circuit 48.

[0042] As shown in Fig. 3, the reset circuit 17 has a reference signal line Lvr, a reset signal line Lrst, and a fourth switching element TrR. The fourth switching element TrR is provided corresponding to the multiple signal lines SGL. The reference signal line Lvr is connected to one of the sources or drains of the multiple fourth switching elements TrR. The reset signal line Lrst is connected to the gates of the multiple fourth switching elements TrR.

[0043] The control circuit 122 supplies a reset signal RST2 to the reset signal line Lrst. This turns on the multiple fourth switching elements TrR, and the multiple signal lines SGL are electrically connected to the reference signal line Lvr. The power supply circuit 123 supplies a reference signal COM to the reference signal line Lvr. This causes the reference signal COM to be supplied to the capacitive elements Ca (see FIG. 4) included in the multiple partial detection areas PAA.

[0044] Fig. 4 is a circuit diagram showing a plurality of partial detection areas. Fig. 4 also shows the circuit configuration of a detection circuit 48. As shown in Fig. 4, the partial detection area PAA includes a photodiode PD, a capacitance element Ca, and a first switching element Tr. The capacitance element Ca is a capacitance (sensor capacitance) formed in the photodiode PD, and is equivalently connected in parallel with the photodiode PD.

[0045] 4 shows two gate lines GCL(m) and GCL(m+1) arranged in the second direction Dy among the multiple gate lines GCL. Also, two signal lines SGL(n) and SGL(n+1) arranged in the first direction Dx among the multiple signal lines SGL. The partial detection area PAA is an area surrounded by the gate lines GCL and the signal lines SGL.

[0046] The first switching element Tr is provided corresponding to the photodiode PD. The first switching element Tr is configured with a thin film transistor, and in this example, is configured with an n-channel MOS (Metal Oxide Semiconductor) type TFT (Thin Film Transistor).

[0047] The gates of the first switching elements Tr belonging to the partial detection areas PAA aligned in the first direction Dx are connected to the gate line GCL. The sources of the first switching elements Tr belonging to the partial detection areas PAA aligned in the second direction Dy are connected to the signal line SGL. The drains of the first switching elements Tr are connected to the cathodes of the photodiodes PD and the capacitance elements Ca.

[0048] A sensor power supply signal VDDSNS is supplied to the anode of the photodiode PD from the power supply circuit 123. In addition, a reference signal COM that becomes the initial potential of the signal line SGL and the capacitance element Ca is supplied from the power supply circuit 123 to the signal line SGL and the capacitance element Ca.

[0049] When light is irradiated onto the partial detection area PAA, a current corresponding to the amount of light flows through the photodiode PD, causing charge to accumulate in the capacitance element Ca. When the first switching element Tr is turned on, a current flows through the signal line SGL corresponding to the charge accumulated in the capacitance element Ca. The signal line SGL is connected to the detection circuit 48 via the third switching element TrS of the signal line selection circuit 16. This allows the detection device 100 to detect a signal corresponding to the amount of light irradiated onto the photodiode PD for each partial detection area PAA or for each block unit PAG.

[0050] In the readout period Pdet (see FIG. 7), the switch SSW of the detection circuit 48 is turned on and connected to the signal line SGL. The detection signal amplifier 42 of the detection circuit 48 converts the fluctuation of the current supplied from the signal line SGL into a fluctuation of voltage and amplifies it. A reference potential (Vref) having a fixed potential is input to the non-inverting input terminal (+) of the detection signal amplifier 42, and the signal line SGL is connected to the inverting input terminal (-). In the embodiment, a signal that is the same as the reference signal COM is input as the reference potential (Vref) voltage. The detection signal amplifier 42 also has a capacitance element Cf and a reset switch RSW. In the reset period Prst (see FIG. 6), the reset switch RSW is turned on and the charge of the capacitance element Cf is reset. In the readout period Pdet (see FIG. 6), a voltage according to the charge accumulated in the capacitance element Cf is output from the detection circuit 48 as an output voltage VAFE (output value).

[0051] Next, the configuration of the photodiode PD will be described. FIG. 5 is a cross-sectional view showing a schematic cross-sectional configuration of the sensor unit. As shown in FIG. 5, the sensor unit 10 includes a sensor substrate 21, a TFT layer 22, an insulating layer 23, a photodiode PD, and insulating layers 24a, 24b, 24c, and 25. The sensor substrate 21 is an insulating substrate, and is made of, for example, glass or a resin material. The sensor substrate 21 is not limited to a flat plate shape, and may have a curved surface. In this case, the sensor substrate 21 may be a film-shaped resin. The sensor substrate 21 has a first surface and a second surface opposite to the first surface. The TFT layer 22, the insulating layer 23, the photodiode PD, and the insulating layers 24 and 25 are laminated in this order on the first surface.

[0052] The TFT layer 22 is provided with circuits such as the gate line driving circuit 15 and the signal line selection circuit 16 described above. The TFT layer 22 is also provided with TFTs (Thin Film Transistors) such as the first switching element Tr, and various wirings such as the gate line GCL and the signal line SGL. The sensor substrate 21 and the TFT layer 22 are a driving circuit board that drives a sensor for each predetermined detection area, and are also called a backplane or array substrate.

[0053] The insulating layer 23 is an organic insulating layer, and is provided on the TFT layer 22. The insulating layer 23 is a planarizing layer that planarizes unevenness formed by the first switching element Tr formed in the TFT layer 22 and various conductive layers.

[0054] The photodiode PD is provided on the insulating layer 23. The photodiode PD has a lower electrode 35, a semiconductor layer 31, and an upper electrode 34, which are laminated in this order.

[0055] The lower electrode 35 is provided on the insulating layer 23 and is electrically connected to the first switching element Tr of the TFT layer 22 through a contact hole H1. The lower electrode 35 is the cathode of the photodiode PD and is an electrode for reading out the detection signal Vdet. The lower electrode 35 is made of a conductive material having light transmission, such as ITO (Indium Tin Oxide).

[0056] The semiconductor layer 31 is amorphous silicon (a-Si). The semiconductor layer 31 includes an i-type semiconductor layer 32a, a p-type semiconductor layer 32b, and an n-type semiconductor layer 32c. The i-type semiconductor layer 32a, the p-type semiconductor layer 32b, and the n-type semiconductor layer 32c are a specific example of a photoelectric conversion element. In FIG. 5, the n-type semiconductor layer 32c, the i-type semiconductor layer 32a, and the p-type semiconductor layer 32b are stacked in this order in the direction perpendicular to the surface of the sensor substrate 21. However, the opposite configuration, that is, the p-type semiconductor layer 32b, the i-type semiconductor layer 32a, and the n-type semiconductor layer 32c may be used. The semiconductor layer 31 may also be a photoelectric conversion element made of an organic semiconductor.

[0057] The n-type semiconductor layer 32c is an n+ region formed by doping impurities into a-Si. The p-type semiconductor layer 32b is a p+ region formed by doping impurities into a-Si. The i-type semiconductor layer 32a is, for example, a non-doped intrinsic semiconductor and has lower conductivity than the p-type semiconductor layer 32b and the n-type semiconductor layer 32c.

[0058] The upper electrode 34 is an anode of the photodiode PD and is an electrode for supplying a power supply signal VDDSNS to the photoelectric conversion layer. The upper electrode 34 is a light-transmitting conductive layer such as ITO, and a plurality of upper electrodes are provided for each photodiode PD.

[0059] An insulating layer 24a and an insulating layer 24b are provided on the insulating layer 23. The insulating layer 24a covers the periphery of the upper electrode 34, and an opening is provided at a position where the insulating layer 24a overlaps with the upper electrode 34. The connection wiring 36 is connected to the upper electrode 34 at a portion of the upper electrode 34 where the insulating layer 24a is not provided. The insulating layer 24b is provided on the insulating layer 24a, covering the upper electrode 34 and the connection wiring 36. An insulating layer 24c, which is a planarizing layer, is provided on the insulating layer 24b. An insulating layer 25 is provided on the insulating layer 24c. However, the insulating layer 25 may be omitted.

[0060] 6 is a cross-sectional view showing a schematic cross-sectional configuration of a sensor unit of a detection device according to a first modification. As shown in FIG. 5B, in a detection device 100A of the first modification, a photodiode PDA is provided on an insulating layer 23a. The insulating layer 23a is an inorganic insulating layer provided to cover the insulating layer 23, and is formed of, for example, silicon nitride (SiN). The photodiode PDA has a photoelectric conversion layer 31A, a lower electrode 35 (cathode electrode), and an upper electrode 34 (anode electrode). In a direction perpendicular to the first surface of the sensor substrate 21, the lower electrode 35, the photoelectric conversion layer 31A, and the upper electrode 34 are laminated in this order.

[0061] The photoelectric conversion layer 31A changes its characteristics (for example, voltage-current characteristics and resistance value) depending on the light irradiated thereto. An organic material is used as the material of the photoelectric conversion layer 31A. Specifically, the photoelectric conversion layer 31A is made of, for example, a low molecular weight organic material, C 60 (fullerene), PCBM (phenyl C61-butyric acid methyl ester), CuPc (copper phthalocyanine), F 16CuPc (fluorinated copper phthalocyanine), rubrene (5,6,11,12-tetraphenyltetracene), PDI (perylene derivative), etc. can be used.

[0062] The photoelectric conversion layer 31A can be formed by a vapor deposition (dry process) using these low molecular weight organic materials. In this case, the photoelectric conversion layer 31A is, for example, a laminated film of CuPc and F16CuPc, or a laminated film of rubrene and C 60 The photoelectric conversion layer 31A may be a laminated film of the above-mentioned low molecular weight organic material and the above-mentioned polymer organic material. In this case, the photoelectric conversion layer 31A is made of a material obtained by combining the above-mentioned low molecular weight organic material and the polymer organic material. As the polymer organic material, for example, P3HT (poly(3-hexylthiophene)), F8BT (F8-alt-benzothiadiazole), etc. may be used. The photoelectric conversion layer 31A may be a film in which P3HT and PCBM are mixed, or a film in which F8BT and PDI are mixed.

[0063] The lower electrode 35 and the upper electrode 34 face each other with the photoelectric conversion layer 31A interposed therebetween. The upper electrode 34 is made of a conductive material having light transmission properties, such as indium tin oxide (ITO). The lower electrode 35 is made of a metal material, such as silver (Ag) or aluminum (Al). Alternatively, the lower electrode 35 may be made of an alloy material containing at least one of these metal materials.

[0064] By controlling the film thickness of the lower electrode 35, the lower electrode 35 can be formed as a semi-transparent electrode having translucency. For example, the lower electrode 35 has a translucency of about 60% by forming it from a thin Ag film having a film thickness of 10 nm. In this case, the photodiode PDA can detect light irradiated from both sides of the sensor substrate 21, for example, light L1 irradiated from the second side and light irradiated from the first side.

[0065] 6, a protective film may be provided to cover the upper electrode 34. The protective film is a passivation film, and is provided to protect the photodiode PDA.

[0066] 6, a first switching element Tr electrically connected to the photodiode PDA is provided in the TFT layer 22. The first switching element Tr has a semiconductor layer 81, a source electrode 82, a drain electrode 83, and gate electrodes 84 and 85. The lower electrode 35 of the photodiode PDA is electrically connected to the drain electrode 83 of the first switching element Tr through a contact hole H11 provided in the insulating layers 23 and 23a.

[0067] The first switching element Tr has a so-called dual gate structure in which gate electrodes 84, 85 are provided on both the upper and lower sides of a semiconductor layer 81. However, the first switching element Tr is not limited to this, and may have a top gate structure or a bottom gate structure.

[0068] 6, the second switching element TrA and the terminal portion 72 provided in the peripheral area GA are shown in a schematic manner. The second switching element TrA is, for example, a switching element provided in the gate line driving circuit 15 (see FIG. 1). The second switching element TrA has a semiconductor layer 86, a source electrode 87, a drain electrode 88, and a gate electrode 89. The second switching element TrA has a so-called top gate structure in which the gate electrode 89 is provided on the upper side of the semiconductor layer 86. A light-shielding layer 90 is provided below the semiconductor layer 86 between the semiconductor layer 86 and the sensor substrate 21. However, the present invention is not limited thereto, and the second switching element TrA may have a bottom gate structure or a dual gate structure.

[0069] The semiconductor layer 81 of the first switching element Tr and the semiconductor layer 86 of the second switching element TrA are provided in different layers. The semiconductor layer 81 of the first switching element Tr is, for example, an oxide semiconductor. The semiconductor layer 86 of the second switching element TrA is, for example, polysilicon.

[0070] Next, an operation example of the detection device 100 of this embodiment will be described. FIG. 7 is a timing waveform diagram showing an operation example of the detection device. As shown in FIG. 7, the detection device 100 has a reset period Prst, an exposure period Pex, and a readout period Pdet. The power supply circuit 123 supplies a sensor power supply signal VDDSNS to the anode of the photodiode PD over the reset period Prst, the exposure period Pex, and the readout period Pdet. The sensor power supply signal VDDSNS is a signal that applies a reverse bias between the anode and cathode of the photodiode PD. For example, a reference signal COM of substantially 0.75V is applied to the cathode of the photodiode PD, but by applying a sensor power supply signal VDDSNS of substantially -1.25V to the anode, the anode and cathode are reverse biased at substantially 2.0V. The control circuit 122 sets the reset signal RST2 to "H" and then supplies a start signal STV and a clock signal CK to the gate line driving circuit 15, and the reset period Prst begins. In the reset period Prst, the control circuit 122 supplies the reference signal COM to the reset circuit 17 and turns on the fourth switching element TrR for supplying a reset voltage by the reset signal RST2. As a result, the reference signal COM is supplied as a reset voltage to each signal line SGL. The reference signal COM is set to, for example, 0.75 V.

[0071] In the reset period Prst, the gate line driving circuit 15 sequentially selects the gate lines GCL based on the start signal STV, the clock signal CK, and the reset signal RST1. The gate line driving circuit 15 sequentially supplies the gate lines GCL with the gate driving signals Vgcl {Vgcl(1) to Vgcl(M)}. The gate driving signal Vgcl has a pulse-like waveform having a power supply voltage VDD, which is a high-level voltage, and a power supply voltage VSS, which is a low-level voltage. In FIG. 7, M (for example, M=256) gate lines GCL are provided, and the gate driving signals Vgcl(1), ..., Vgcl(M) are sequentially supplied to each gate line GCL, and the first switching elements Tr are sequentially turned on for each row, and a reset voltage is supplied. For example, the voltage of 0.75V of the reference signal COM is supplied as the reset voltage.

[0072] As a result, in the reset period Prst, the capacitance elements Ca in all the partial detection areas PAA are sequentially electrically connected to the signal line SGL and the reference signal COM is supplied. As a result, the capacitance of the capacitance elements Ca is reset. It is also possible to reset the capacitance of some of the capacitance elements Ca in the partial detection area PAA by partially selecting the gate lines GCL and the signal lines SGL.

[0073] Examples of exposure timing include a gate line non-selection exposure control method and a constant exposure control method. In the gate line non-selection exposure control method, gate drive signals {Vgcl(1)-(M)} are sequentially supplied to all gate lines GCL connected to the photodiode PD to be detected, and a reset voltage is supplied to all photodiodes PD to be detected. After that, when all gate lines GCL connected to the photodiode PD to be detected are at a low voltage (the first switching element Tr is off), exposure starts, and exposure is performed during the exposure period Pex. When exposure ends, as described above, gate drive signals {Vgcl(1)-(M)} are sequentially supplied to the gate lines GCL connected to the photodiode PD to be detected, and reading is performed during the readout period Pdet. In the constant exposure control method, it is also possible to control exposure to be performed during the reset period Prst and readout period Pdet (constant exposure control). In this case, the exposure period Pex(1) starts after the gate drive signal Vgcl(1) is supplied to the gate lines GCL during the reset period Prst. Here, the exposure period Pex{(1)...(M)} is a period during which the photodiode PD charges the capacitance element Ca. The charge stored in the capacitance element Ca during the reset period Prst flows in the photodiode PD as a reverse current (from the cathode to the anode) due to light irradiation, and the potential difference of the capacitance element Ca decreases. Note that the actual exposure periods Pex(1), ..., Pex(M) in the partial detection area PAA corresponding to each gate line GCL have different start and end timings. The exposure periods Pex(1), ..., Pex(M) each start when the gate drive signal Vgcl changes from the high-level voltage of the power supply voltage VDD to the low-level voltage of the power supply voltage VSS during the reset period Prst. Also, the exposure periods Pex(1), ..., Pex(M) each end when the gate drive signal Vgcl changes from the power supply voltage VSS to the power supply voltage VDD during the readout period Pdet. The exposure periods Pex(1), . . . , Pex(M) have the same length.

[0074] In the gate line non-selection exposure control method, in the exposure periods Pex{(1)...(M)}, a current flows in each partial detection area PAA according to the light irradiated to the photodiode PD. As a result, a charge is accumulated in each capacitance element Ca.

[0075] Before the readout period Pdet starts, the control circuit 122 sets the reset signal RST2 to a low-level voltage. This stops the operation of the reset circuit 17. The reset signal may be set to a high-level voltage only during the reset period Prst. During the readout period Pdet, as in the reset period Prst, the gate line drive circuit 15 sequentially supplies gate drive signals Vgcl(1), ..., Vgcl(M) to the gate lines GCL.

[0076] 8, the gate line driving circuit 15 supplies a gate driving signal Vgcl(1) of a high-level voltage (power supply voltage VDD) to the gate line GCL(1) during a row readout period VR(1). The control circuit 122 sequentially supplies selection signals ASW1, ..., ASW6 to the signal line selection circuit 16 during the period when the gate driving signal Vgcl(1) is at a high-level voltage (power supply voltage VDD). As a result, the signal lines SGL of the partial detection area PAA selected by the gate driving signal Vgcl(1) are sequentially or simultaneously connected to the detection circuit 48. As a result, the detection signal Vdet is supplied to the detection circuit 48 for each partial detection area PAA.

[0077] Similarly, the gate line driving circuit 15 supplies high-level voltage gate driving signals Vgcl(2), ..., Vgcl(M-1), Vgcl(M) to the gate lines GCL(2), ..., GCL(M-1), GCL(M) during row readout periods VR(2), ..., VR(M-1), VR(M). That is, the gate line driving circuit 15 supplies the gate driving signal Vgcl to the gate line GCL during each row readout period VR(1), VR(2), ..., VR(M-1), VR(M). During each period in which each gate driving signal Vgcl is at a high level voltage, the signal line selection circuit 16 sequentially selects the signal lines SGL based on the selection signal ASW. The signal line selection circuit 16 sequentially connects each signal line SGL to one detection circuit 48. As a result, during the readout period Pdet, the detection device 100 can output the detection signals Vdet of all partial detection areas PAA to the detection circuit 48.

[0078] Fig. 8 is a timing waveform diagram showing an example of operation during the readout period in Fig. 7. Below, with reference to Fig. 8, an example of operation during a row readout period VR, which is a supply period of one gate drive signal Vgcl(j) in Fig. 7, will be described. In Fig. 7, the first gate drive signal Vgcl(1) is given the symbol of the row readout period VR, but the same applies to the other gate drive signals Vgcl(2), ..., Vgcl(M). j is any natural number from 1 to M.

[0079] As shown in FIG. 8 and FIG. 4, the output of the third switching element TrS (V out) is reset to a reference potential (Vref) voltage in advance. The reference potential (Vref) voltage is a reset voltage, for example 0.75V. Next, the gate drive signal Vgcl(j) goes high, turning on the first switching element Tr of the row, and the signal line SGL of each row goes to a voltage according to the charge stored in the capacitance (capacitor element Ca) of the partial detection area PAA. After a period t1 has elapsed since the rising edge of the gate drive signal Vgcl(j), a period t2 occurs during which the selection signal ASW(k) goes high. When the selection signal ASW(k) goes high and the third switching element TrS goes on, the output (V out ) (see FIG. 4) changes to a voltage according to the charge accumulated in the capacitance (capacitor element Ca) of the partial detection area PAA (period t3). In the example of FIG. 8, this voltage drops from the reset voltage as in period t3. After that, when the switch SSW is turned on (period t4 when the SSW signal is at a high level), the charge accumulated in the capacitance (capacitor element Ca) of the partial detection area PAA moves to the capacitance (capacitor element Cf) of the detection signal amplifier 42 of the detection circuit 48, and the output voltage of the detection signal amplifier 42 becomes a voltage according to the charge accumulated in the capacitor element Cf. At this time, the inverting input section of the detection signal amplifier 42 becomes the imaginary short potential of the operational amplifier, and therefore returns to the reference potential (Vref). The output voltage of the detection signal amplifier 42 is read out by the A / D converter 43. In the example of Fig. 8, the waveforms of the selection signals ASW(k), ASW(k+1), ... corresponding to the signal lines SGL of each column become high to sequentially turn on the third switching elements TrS, and similar operations are sequentially performed to sequentially read out the charges accumulated in the capacitances (capacitive elements Ca) of the partial detection areas PAA connected to the corresponding gate lines GCL. Note that ASW(k), ASW(k+1), ... in Fig. 8 are, for example, any of ASW1 to ASW6 in Fig. 7.

[0080] Specifically, when a period t4 occurs during which the switch SSW is on, charge moves from the capacitance (capacitor Ca) of the partial detection area PAA to the capacitance (capacitor Cf) of the detection signal amplifier 42 of the detection circuit 48. At this time, the non-inverting input (+) of the detection signal amplifier 42 is biased to a reference potential (Vref) voltage (for example, 0.75 [V]). For this reason, an imaginary short between the inputs of the detection signal amplifier 42 causes the output (V out ) also becomes the reference potential (Vref) voltage. The voltage of the capacitance element Cf becomes a voltage according to the charge accumulated in the capacitance (capacitance element Ca) of the partial detection area PAA where the third switching element TrS is turned on in response to the selection signal ASW(k). The output of the detection signal amplifier 42 becomes the output (V out ) becomes the reference potential (Vref) voltage, then becomes a voltage according to the capacitance of the capacitance element Cf, and this output voltage is read by the A / D conversion unit 43. Note that the voltage of the capacitance element Cf is, for example, the voltage between two electrodes provided in the capacitor that constitutes the capacitance element Cf.

[0081] The period t1 is, for example, 20 [μs], the period t2 is, for example, 60 [μs], the period t3 is, for example, 44.7 [μs], and the period t4 is, for example, 0.98 [μs].

[0082] 7 and 8 show an example in which the gate line driving circuit 15 selects the gate lines GCL individually, but the present invention is not limited to this. The gate line driving circuit 15 may simultaneously select a predetermined number of gate lines GCL (two or more) and sequentially supply the gate driving signal Vgcl to each of the predetermined number of gate lines GCL. The signal line selection circuit 16 may also simultaneously connect a predetermined number of signal lines SGL (two or more) to one detection circuit 48. Furthermore, the gate line driving circuit 15 may scan a plurality of gate lines GCL by thinning them out.

[0083] Next, a method for adjusting the exposure period Pex of the detection device 100 will be described. FIG. 9 is a graph showing a relationship between the output voltage output from the detection circuit of the detection device according to the embodiment and the intensity of incident light incident on the finger. FIG. 10 is a graph showing a relationship between the output voltage output from the detection circuit of the detection device according to the embodiment and the exposure period. FIG. 9 shows the relationship between the output voltage and the incident light intensity for each of different exposure periods Pex (Pex=ta, tb, tc, tbet). FIG. 10 shows the relationship between the output voltage and the exposure period for each of the minimum incident light intensity L-min and the maximum incident light intensity L-max.

[0084] As shown in FIG. 9, the output voltage VAFE increases as the incident light intensity increases in any exposure period Pex. The relationship between the incident light intensity and the output voltage VAFE differs for each exposure period Pex (Pex=ta, tb, tc, tbest). More specifically, the detection device 100 has a linear region and a saturation region in the relationship between the output voltage VAFE output from the detection circuit 48 and the incident light intensity. In the detection device 100, the slope of the output voltage VAFE relative to the incident light intensity in the saturation region is smaller than the slope of the output voltage VAFE relative to the incident light intensity in the linear region. In the optimal exposure period tbest, the output voltage VAFE does not have an inflection point between the minimum incident light intensity L-min and the maximum incident light intensity L-max, and the difference between the output voltage VAFE at the minimum incident light intensity L-min and the output voltage VAFE at the maximum incident light intensity L-max is the largest.

[0085] Similarly, as shown in Fig. 10, the output voltage VAFE increases as the exposure period Pex increases. The detection device 100 has a linear region and a saturation region in the relationship between the output voltage VAFE output from the detection circuit 48 and the exposure period Pex. At the maximum incident light intensity L-max, the slope of the output voltage VAFE with respect to the exposure period Pex in the saturation region is smaller than the slope of the output voltage VAFE with respect to the exposure period Pex in the linear region. At the minimum incident light intensity L-min, the output voltage VAFE is within the linear region from the exposure period 0 to the exposure period tc.

[0086] At the maximum incident light intensity L-max, the output voltage VAFE has an inflection point between the linear region and the saturation region. In the following description, the output voltage VAFE indicating the inflection point in the relationship between the output voltage VAFE and the exposure period Pex is defined as the reference output voltage Vb. The reference output voltage Vb is calculated by the following formula (a). Here, Vc indicates the charging voltage Vc of the capacitance element Ca. Ca indicates the capacitance value of the capacitance element Ca of the photodiode PD, and Cf indicates the capacitance value of the capacitance element Cf of the detection signal amplifier 42.

[0087] Vb = Vc × Ca / Cf (a)

[0088] 9 and 10, ideally, based on the relationship between the output voltage VAFE, the incident light intensity, and the exposure period Pex, the exposure period Pex at the inflection point of the output voltage VAFE at the maximum incident light intensity L-max can be set as the optimal exposure period tbest. However, because the relationship between the output voltage VAFE, the incident light intensity, and the exposure period Pex differs depending on the subject, the detection site, the light source, etc., the optimal exposure period tbest may differ for each object to be detected.

[0089] 11 is a block diagram showing an example of the configuration of a control circuit of a detection device according to an embodiment. As shown in FIG. 11, the control circuit 122 includes an exposure period adjustment circuit 131, a determination circuit 132, an arithmetic circuit 133, a drive circuit 135, and a memory 136.

[0090] The exposure period adjustment circuit 131 is a control circuit that determines an optimum exposure period tbest by supplying control signals to the determination circuit 132, the calculation circuit 133, the drive circuit 135, and the memory 136. The exposure period adjustment circuit 131 is, for example, an FPGA.

[0091] The determination circuit 132 is a circuit that compares the first output voltage VAFE1 and the second output voltage VAFE2 with a reference output voltage Vb to determine whether the first output voltage VAFE1 and the second output voltage VAFE2 are in a linear region or a saturated region. Alternatively, the determination circuit 132 can compare the third output voltage VAFE3 with the reference output voltage Vb to determine whether the third output voltage VAFE3 is in a linear region or a saturated region. The determination circuit 132 is, for example, a comparator circuit. The first output voltage VAFE1, the second output voltage VAFE2, and the third output voltage VAFE3 will be described later.

[0092] The calculation circuit 133 is a circuit that acquires a correction table CT prestored in a memory 136 based on information from the decision circuit 132, and calculates an optimum exposure period tbest.

[0093] The control circuit 122 executes the above-mentioned exposure period Pex with the newly set optimum exposure period tbest.

[0094] The drive circuit 135 is a circuit that drives the photodiode PD of the sensor unit 10 for a predetermined exposure period Pex based on a control signal from the exposure period adjustment circuit 131. As a result, the exposure period adjustment circuit 131 acquires the output voltage VAFE output from the detection circuit 48, and stores information about the output voltage VAFE in the memory 136 in association with information about the exposure period Pex.

[0095] As described above, the memory 136 is a circuit that stores information about the output voltage VAFE. Furthermore, the memory 136 stores information about the reference output voltage Vb, exposure period information, and correction table CT in advance. The reference output voltage Vb is a voltage value at an inflection point of the output voltage VAFE in the relationship between the output voltage VAFE and the exposure period Pex shown in FIG. 10. In other words, the reference output voltage Vb is a voltage value between the linear region and the saturation region. Furthermore, the memory 136 stores information about the first exposure period te1, the second exposure period te2, and the third exposure period te3 for driving the sensor unit 10 as exposure period information. The first exposure period te1, the second exposure period te2, and the third exposure period te3 are information about the exposure period Pex that is set in advance, for example, based on past performance. The correction table CT is information showing the relationship between Case 1 to Case 4, which will be described later, and Equations (1) to (3).

[0096] Next, a method for adjusting the exposure period Pex of the detection device 100 will be described with reference to Fig. 12 to Fig. 18. Fig. 12 is a flowchart for explaining an example of the operation of the detection device according to the embodiment.

[0097] As shown in FIG. 12, the exposure period adjustment circuit 131 drives the photodiode PD in the first exposure period te1 to detect the first output voltage VAFE1 output from the detection circuit 48 (step ST11). As described above, the first exposure period te1 is information stored in advance in the memory 136. Here, the exposure period adjustment circuit 131 scans the multiple photodiodes PD of the sensor unit 10 and selects the photodiode PD that outputs the maximum first output voltage VAFE1 in the first exposure period te1 as the detection target. Note that the photodiode PD to be detected is not limited to one, and multiple photodiodes PD may be selected. Alternatively, the photodiode PD to be detected may be one or multiple photodiodes PD set in advance.

[0098] Next, the exposure period adjustment circuit 131 drives the photodiode PD in the second exposure period te2 and detects the second output voltage VAFE2 output from the detection circuit 48 (step ST12). The second exposure period te2 is longer than the first exposure period te1, and the second output voltage VAFE2 has a voltage value greater than the first output voltage VAFE1.

[0099] Fig. 13 is an explanatory diagram for explaining the driving of the sensor unit and the light source of the detection device in steps ST11 and ST12 shown in Fig. 12. As shown in Fig. 13, in each of steps ST11 and ST12, the detection device 100 executes the above-mentioned reset period Prst, exposure period Pex{(1)...(M)}, and readout period Pdet. In the reset period Prst and readout period Pdet, the gate line driving circuit 15 sequentially scans the gate lines GCL(1) to GCL(M). The exposure period Pex (second exposure period te2) in step ST12 is set longer than the exposure period Pex (first exposure period te1) in step ST11.

[0100] In each period of step ST11 and step ST12, the light source (the first light source 61 or the second light source 62) is continuously turned on. That is, the length of the exposure period Pex is controlled by turning on and off each TFT such as the first switching element Tr and the switching element included in the gate line driving circuit 15. However, it is not limited to this, and the exposure period adjustment circuit 131 can control the turning on and off of the light source according to the exposure period Pex. In the operation of FIG. 13, the exposure period Pex is the substantial exposure period.

[0101] Fig. 14 is an explanatory diagram for explaining the driving of the sensor unit and the light source of the detection device according to the second modification. As shown in Fig. 14, in step ST11, the exposure period adjustment circuit 131 turns on (lights up) the light source only during the first exposure period te1 of the exposure period Pex, and turns off (non-lights up) the light source during periods other than the first exposure period te1. In other words, in step ST11, the exposure period Pex includes a period in which the light source is on (lights up) and a period in which the light source is off (non-lights up). In this case, the element to be detected is an element in which the entire lighting period of the light source is included in the exposure period Pex.

[0102] In step ST12, the exposure period adjustment circuit 131 turns on (lights) the light source continuously. In this manner, the exposure period adjustment circuit 131 controls the lighting and non-lighting of the light source according to the first exposure period te1 by driving each TFT such as the first switching element Tr in the same manner in steps ST11 and ST12, and can detect each output voltage VAFE in the different first exposure period te1 and second exposure period te2.

[0103] 14 shows the control of the light source in step ST11, but may be applied to the case where exposure is performed in a short exposure period Pex when detecting an object to be detected in the set optimum exposure period tbest. That is, the control circuit 122 may be driven so that there is a period in which the light source is turned on and a period in which the light source is turned off according to the optimum exposure period tbest in the exposure period Pex between the reset period Prst and the readout period Pdet shown in FIG.

[0104] Next, returning to FIG. 12, the determination circuit 132 compares the first output voltage VAFE1 and the second output voltage VAFE2 with the reference output voltage Vb (step ST13).

[0105] If the first output voltage VAFE1 is equal to or lower than the reference output voltage Vb and the second output voltage VAFE2 is equal to or lower than the reference output voltage Vb (step ST13, Yes), the determination circuit 132 determines that the first output voltage VAFE1 to the second output voltage VAFE2 are in the linear region (step ST14). In the following description, the case where the first output voltage VAFE1 to the second output voltage VAFE2 are in the linear region is referred to as "Case 1."

[0106] Fig. 15 is a graph showing a relationship between the output voltage output from the detection circuit and the exposure period in case 1. In Fig. 15, the relationship between the output voltage VAFE and the exposure period Pex is shown in a graph from the linear region to the saturation region for easy understanding. However, in steps ST11 to ST14, the exposure period adjustment circuit 131 acquires information on the two output values ​​of the first output voltage VAFE1 and the second output voltage VAFE2 acquired from the detection circuit 48 in association with information on the two exposure periods of the first exposure period te1 and the second exposure period te2.

[0107] The arithmetic circuit 133 acquires the correction information for case 1 from the correction table CT in the memory 136, and calculates the optimum exposure period tbest based on the following formula (1) (step ST15). tbest=(te2-te1)×(Vb-VAFE1) / (VAFE2-VAFE1)+te1 ··· (1)

[0108] In other words, as shown in Fig. 15, the calculation circuit 133 determines the exposure period at the intersection point of the reference output voltage Vb with a straight line connecting the first output voltage VAFE1 and the second output voltage VAFE2 in the linear region in the relationship between the output voltage VAFE and the exposure period Pex as the optimal exposure period tbest. In case 1, the optimal exposure period tbest is longer than the first exposure period te1 and the second exposure period te2. The optimal exposure period tbest of the photodiode PD is the exposure period Pex that is the substantial intersection point (inflection point) of the correlation line showing the relationship between the output voltage VAFE and the exposure period Pex in the linear region and the correlation line showing the relationship between the output voltage VAFE and the exposure period Pex in the saturation region.

[0109] As shown in FIG. 12, the exposure period adjustment circuit 131 sets the exposure period Pex to the calculated optimum exposure period tbest (step ST16).

[0110] In step ST13, if the condition that the first output voltage VAFE1 is equal to or lower than the reference output voltage Vb and the second output voltage VAFE2 is equal to or lower than the reference output voltage Vb is not met (step ST13, No), the judgment circuit 132 again compares the first output voltage VAFE1 and the second output voltage VAFE2 with the reference output voltage Vb (step ST17).

[0111] If the first output voltage VAFE1 is greater than the reference output voltage Vb and the second output voltage VAFE2 is greater than the reference output voltage Vb (step ST17, Yes), the determination circuit 132 determines that the first output voltage VAFE1 to the second output voltage VAFE2 are in the saturated region (step ST18). In the following description, the case where the first output voltage VAFE1 to the second output voltage VAFE2 are in the saturated region is referred to as "Case 2."

[0112] The arithmetic circuit 133 acquires the correction information for case 2 from the correction table CT in the memory 136. In case 2 as well, the optimum exposure period tbest is calculated based on the above formula (1) in the same manner as in step ST15.

[0113] Fig. 16 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in case 2. As shown in Fig. 16, in the relationship between the output voltage VAFE and the exposure period Pex, the arithmetic circuit 133 sets the exposure period at the intersection of the line connecting the first output voltage VAFE1 and the second output voltage VAFE2 in the saturation region with the reference output voltage Vb as the optimal exposure period tbest. In case 2, the optimal exposure period tbest is shorter than the first exposure period te1 and the second exposure period te2.

[0114] If the condition that the first output voltage VAFE1 is greater than the reference output voltage Vb and the second output voltage VAFE2 is greater than the reference output voltage Vb is not met (step ST17, No), the exposure period adjustment circuit 131 drives the photodiode PD in the third exposure period te3 and detects the third output voltage VAFE3 output from the detection circuit 48 (step ST19).

[0115] In other words, when the first output voltage VAFE1 is smaller than the reference output voltage Vb and the second output voltage VAFE2 is larger than the reference output voltage Vb, the exposure period adjustment circuit 131 executes steps ST19 and after. Also, steps ST19 and after show a method of adjusting the optimal exposure period tbest when there is an inflection point between the first output voltage VAFE1 and the second output voltage VAFE2 in the graph showing the relationship between the output voltage VAFE and the exposure period Pex.

[0116] The third exposure period te3 is a preset period between the first exposure period te1 and the second exposure period te2. Specifically, the third exposure period te3 is longer than the first exposure period te1 and shorter than the second exposure period te2. For example, the third exposure period te3 is set as te3=(te1+te2) / 2. Similarly, the third output voltage VAFE3 is a voltage value between the first output voltage VAFE1 and the second output voltage VAFE2. The third output voltage VAFE3 is a voltage value larger than the first output voltage VAFE1 and smaller than the second output voltage VAFE2.

[0117] Next, the determination circuit 132 compares the third output voltage VAFE3 with the reference output voltage Vb (step ST20).

[0118] If the third output voltage VAFE3 is equal to or lower than the reference output voltage Vb (step ST20, Yes), the determination circuit 132 determines that the first output voltage VAFE1 to the third output voltage VAFE3 are in the linear region (step ST21). In the following description, the case where the first output voltage VAFE1 to the third output voltage VAFE3 are in the linear region is referred to as "Case 3."

[0119] Fig. 17 is a graph showing a relationship between the output voltage output from the detection circuit and the exposure period in case 3. In Fig. 17, the relationship between the output voltage VAFE and the exposure period Pex is shown in a graph from the linear region to the saturation region for easy understanding. However, in step ST21, the exposure period adjustment circuit 131 acquires information on the three output values ​​of the first output voltage VAFE1, the second output voltage VAFE2, and the third output voltage VAFE3 acquired from the detection circuit 48 in association with information on the three exposure periods of the first exposure period te1, the second exposure period te2, and the third exposure period te3.

[0120] The arithmetic circuit 133 acquires the correction information for case 3 from the correction table CT in the memory 136, and calculates the optimum exposure period tbest based on the following formula (2) (step ST22). tbest=(te3-te1)×(Vb-VAFE1) / (VAFE3-VAFE1)+te1 ··· (2)

[0121] In other words, as shown in Fig. 17, in the relationship between the output voltage VAFE and the exposure period Pex, the calculation circuit 133 determines the exposure period at the intersection of the line connecting the first output voltage VAFE1 and the third output voltage VAFE3 in the linear region and the reference output voltage Vb as the optimal exposure period tbest. In case 3, the optimal exposure period tbest is the period between the third exposure period te3 and the second exposure period te2. In other words, in case 3, the third output voltage VAFE3 to the second output voltage VAFE2 are arranged across the linear region and the saturation region, and the exposure time of the inflection point between the third output voltage VAFE3 and the second output voltage VAFE2 is the optimal exposure period tbest.

[0122] When the third output voltage VAFE3 is greater than the reference output voltage Vb (step ST20, No), the determination circuit 132 determines that the third output voltage VAFE3 to the second output voltage VAFE2 are in the saturated region (step ST23). In the following description, the case where the third output voltage VAFE3 to the second output voltage VAFE2 are in the saturated region is referred to as "Case 4."

[0123] 18 is a graph showing a schematic relationship between the output voltage output from the detection circuit and the exposure period in case 4. In case 4, the exposure period adjustment circuit 131 acquires information on the three output values, the first output voltage VAFE1, the second output voltage VAFE2, and the third output voltage VAFE3, acquired from the detection circuit 48, in association with information on the three exposure periods, the first exposure period te1, the second exposure period te2, and the third exposure period te3.

[0124] The arithmetic circuit 133 acquires the correction information for case 4 from the correction table CT in the memory 136, and calculates the optimum exposure period tbest based on the following formula (3) (step ST24). tbest=(te2-te3)×(Vb-VAFE3) / (VAFE2-VAFE3)+te3 ··· (3)

[0125] In other words, as shown in Fig. 18, in the relationship between the output voltage VAFE and the exposure period Pex, the calculation circuit 133 determines the exposure period at the intersection of the line connecting the third output voltage VAFE3 and the second output voltage VAFE2 in the saturation region and the reference output voltage Vb as the optimal exposure period tbest. In case 4, the optimal exposure period tbest is the period between the first exposure period te1 and the third exposure period te3. In other words, in case 4, the first output voltage VAFE1 to the third output voltage VAFE3 are arranged across the linear region and the saturation region, and the exposure time of the inflection point between the first output voltage VAFE1 and the third output voltage VAFE3 is the optimal exposure period tbest.

[0126] The method of adjusting the optimum exposure period tbest shown in Fig. 12 to Fig. 18 is merely an example and can be changed as appropriate. For example, in Fig. 12, steps ST13, ST17, and ST20 are described separately for ease of understanding, but the determination circuit 132 may determine which of cases 1 to 4 it is in one determination. After step ST17, the third output voltage VAFE3 is detected in step ST19, but this is not limiting. The exposure period adjustment circuit 131 may obtain information on the three output values ​​of the first output voltage VAFE1, the second output voltage VAFE2, and the third output voltage VAFE3 in advance.

[0127] As described above, the detection device 100 includes a plurality of photodiodes PD, a light source (first light source 61) that irradiates a detection target with light, a detection circuit 48 that detects detection signals output from the plurality of photodiodes PD, and an exposure period adjustment circuit 131 that determines an exposure period Pex for the plurality of photodiodes PD. The relationship between the output value (output voltage VAFE) output from the detection circuit 48 and the exposure period Pex has a linear region and a saturation region, and the slope of the output value (output voltage VAFE) relative to the exposure period Pex in the saturation region is smaller than the slope of the output value (output voltage VAFE) relative to the exposure period Pex in the linear region. The exposure period adjustment circuit 131 determines the exposure period (optimum exposure period tbest) based on the first output value (first output voltage VAFE1) output from the detection circuit 48 in the first exposure period te1, the second output value (second output voltage VAFE2) output from the detection circuit 48 in the second exposure period te2, and a preset reference output value (reference output voltage Vb).

[0128] In addition, the exposure period adjustment circuit 131 determines the exposure period Pex, which is the substantial intersection point between a correlation line showing the relationship between the output value (output voltage VAFE) in the linear region and the exposure period Pex, and a correlation line showing the relationship between the output value (output voltage VAFE) in the saturation region and the exposure period Pex, as the optimal exposure period tbest of the photodiode PD.

[0129] In the detection device 100, the exposure period adjustment circuit 131 sets the exposure period Pex at the inflection point of the output value (output voltage VAFE) output from the detection circuit 48 as the optimal exposure period tbest in the relationship between the output value (output voltage VAFE) and the exposure period Pex.

[0130] According to this, the exposure period adjustment circuit 131 can set the optimum exposure period tbest by scanning the photodiodes PD at least twice. More specifically, the exposure period adjustment circuit 131 can calculate the optimum exposure period tbest based on information on two output values ​​of the first output voltage VAFE1 and the second output voltage VAFE2 acquired from the detection circuit 48, information on two exposure periods of the first exposure period te1 and the second exposure period te2, and a preset reference output voltage Vb. This allows the exposure period adjustment circuit 131 to set the optimum exposure period tbest for each different object to be detected in a short time and easily, compared to a method of capturing images with several different exposure periods Pex and determining the optimum exposure time by observing the state of the captured images.

[0131] Although the preferred embodiment of the present invention has been described above, the present invention is not limited to such an embodiment. The contents disclosed in the embodiment are merely examples, and various modifications are possible within the scope of the present invention. Appropriate modifications made within the scope of the present invention naturally belong to the technical scope of the present invention. At least one of various omissions, substitutions, and modifications of components can be made within the scope of the gist of each of the above-mentioned embodiments and each modified example. [Explanation of symbols]

[0132] 10 Sensor section 11 Detection control section 15 Gate line driving circuit 16 Signal line selection circuit 40 Detection unit 48 Detection Circuit 61 1st light source 62 Second light source 100, 100A detector 122 Control circuit 123 Power supply circuit 131 Exposure period adjustment circuit 132 Judgment circuit 133 Arithmetic circuit 135 Drive circuit 136 Memory PD Photodiode tbest Optimal Exposure Period te1 First exposure period te2 Second exposure period te3 Third exposure period VAFE Output voltage VAFE1 First output voltage VAFE2 Second output voltage VAFE3 Third output voltage Vb Reference output voltage

Claims

1. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit acquires a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; the reference output value is the output value at an inflection point on the boundary between the linear region and the saturation region, The exposure period adjustment circuit determines the exposure period based on the reference output value, the first output value, and the second output value when it is determined that the first output value and the second output value are both in the linear region based on the relationship between the reference output value, the first output value, and the second output value. Detection device.

2. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; The exposure period adjustment circuit determines an exposure period that is a substantial intersection point between a correlation line showing the relationship between the output value in the linear region and the exposure period and a correlation line showing the relationship between the output value in the saturation region and the exposure period as an optimal exposure period of the photodiode. Detection device.

3. a memory for storing information relating to said reference output value; 3. The detection device according to claim 1 or 2.

4. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; When the first output value and the second output value are equal to or less than the reference output value, the exposure period adjustment circuit determines, in a relationship between the output value and the exposure period, an exposure period at an intersection point between a straight line connecting the first output value and the second output value and the reference output value as an optimal exposure period. Detection device.

5. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; When the first output value and the second output value are greater than the reference output value, the exposure period adjustment circuit determines, in the relationship between the output value and the exposure period, the exposure period at the intersection of a straight line connecting the first output value and the second output value with the reference output value as the optimal exposure period. Detection device.

6. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; the exposure period adjustment circuit acquires a third output value output from the detection circuit in a third exposure period between the first exposure period and the second exposure period when the first output value is smaller than the reference output value and the second output value is larger than the reference output value; When the third output value is equal to or less than the reference output value, in the relationship between the output value and the exposure period, the exposure period at the intersection of a straight line connecting the first output value and the third output value with the reference output value is set as the optimal exposure period. Detection device.

7. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines the exposure period based on a first output value output from the detection circuit in a first exposure period, a second output value output from the detection circuit in a second exposure period, and a preset reference output value; the exposure period adjustment circuit acquires a third output value output from the detection circuit in a third exposure period between the first exposure period and the second exposure period when the first output value is smaller than the reference output value and the second output value is larger than the reference output value; When the third output value is greater than the reference output value, in the relationship between the output value and the exposure period, the exposure period at the intersection of a straight line connecting the third output value and the second output value with the reference output value is set as the optimal exposure period. Detection device.

8. a capacitance provided in parallel with the photodiode as an equivalent circuit; The detection circuit reads out the charge on the capacitance as the output value. A detection device according to any one of claims 1 to 7.

9. A reset period, an exposure period, and a readout period are included, The exposure period between the reset period and the readout period includes a period during which the light source is turned on and a period during which the light source is turned off. A detection device according to any one of claims 1 to 8.

10. The exposure period adjustment circuit scans the plurality of photodiodes during the first exposure period, and selects the photodiode that outputs the largest first output value as the photodiode to be detected.

10. A detection device according to any one of claims 1 to 9.

11. A plurality of photodiodes; A light source that irradiates the object to be detected with light; a detection circuit for detecting detection signals output from the plurality of photodiodes; an exposure period adjustment circuit that determines an exposure period of the plurality of photodiodes; a linear region and a saturation region are defined in a relationship between an output value output from the detection circuit and the exposure period, and a slope of the output value with respect to the exposure period in the saturation region is smaller than a slope of the output value with respect to the exposure period in the linear region; the exposure period adjustment circuit determines an exposure period at an inflection point of the output value output from the detection circuit as an optimal exposure period in a relationship between the output value and the exposure period, The inflection point of the output value is the output value at the boundary between the linear region and the saturation region. Detection device.

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